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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-12-08 16:05:55 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-12-08 16:05:55 +0000
commita98fcfb82b94bbeb6eb7f81a2823a20fb77c8626 (patch)
tree77c07f1b8e27ba34be60ecbd65d855edbc8d5e8e
parentb674238b33984535802bf750e02ca020d3ce76f4 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4885 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--os/hal/platforms/STM32F3xx/hal_lld.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/os/hal/platforms/STM32F3xx/hal_lld.c b/os/hal/platforms/STM32F3xx/hal_lld.c
index 8f7fe9102..f82e23c19 100644
--- a/os/hal/platforms/STM32F3xx/hal_lld.c
+++ b/os/hal/platforms/STM32F3xx/hal_lld.c
@@ -124,6 +124,13 @@ void hal_lld_init(void) {
#if STM32_PVD_ENABLE
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
#endif /* STM32_PVD_ENABLE */
+
+ /* SYSCFG clock enabled here because it is a multi-functional unit shared
+ among multiple drivers.*/
+ rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
+
+ /* USB IRQ relocated to not conflict with CAN.*/
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
}
/**
@@ -192,14 +199,6 @@ void stm32_clock_init(void) {
while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
; /* Waits selection complete. */
#endif
-
- /* SYSCFG clock enabled here because it is a multi-functional unit shared
- among multiple drivers.*/
- rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
-
- /* USB IRQ relocated to not conflict with CAN.*/
- SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
-
#endif /* !STM32_NO_INIT */
}