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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2015-09-02 13:56:57 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2015-09-02 13:56:57 +0000
commit9b7696e58f3b006da9fdc60003f640197951681b (patch)
tree94381e5096cb9d5e1dacda694768d63dc358d596
parent4f5b2d0c975d001949f34d082b1efd764f97c58a (diff)
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STM32F7-specific LD rules file introduced. Code is accessed through the ITCM bus, constants are accessed through AXI bus. Added DMA-friendly region handling.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8270 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/STM32/RT-STM32F746G-DISCOVERY/chconf.h2
-rw-r--r--demos/STM32/RT-STM32F746G-DISCOVERY/main.c12
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/ld/STM32F746xG.ld24
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld (renamed from os/common/ports/ARMCMx/compilers/GCC/rules_dma.ld)34
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/rules.ld20
-rw-r--r--testhal/STM32/STM32F7xx/GPT-ADC/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/PWM-ICU/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/SPI/chconf.h2
-rw-r--r--testhal/STM32/STM32F7xx/SPI/main.c4
-rw-r--r--testhal/STM32/STM32F7xx/USB_CDC/chconf.h2
10 files changed, 60 insertions, 44 deletions
diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/chconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY/chconf.h
index 0077dbe65..fe1c8d375 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY/chconf.h
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY/chconf.h
@@ -494,7 +494,7 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/main.c b/demos/STM32/RT-STM32F746G-DISCOVERY/main.c
index dabc687cb..c14bcf0cb 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY/main.c
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY/main.c
@@ -20,7 +20,7 @@
/*
* This is a periodic thread that does absolutely nothing except flashing
- * a LED attached to TP1.
+ * a LED.
*/
static THD_WORKING_AREA(waThread1, 128);
static THD_FUNCTION(Thread1, arg) {
@@ -28,9 +28,9 @@ static THD_FUNCTION(Thread1, arg) {
(void)arg;
chRegSetThreadName("blinker");
while (true) {
- palSetPad(GPIOH, GPIOH_TP1);
+ palSetPad(GPIOI, GPIOI_ARD_D13);
chThdSleepMilliseconds(500);
- palClearPad(GPIOH, GPIOH_TP1);
+ palClearPad(GPIOI, GPIOI_ARD_D13);
chThdSleepMilliseconds(500);
}
}
@@ -51,6 +51,12 @@ int main(void) {
chSysInit();
/*
+ * GPIOI1 is programmed as output (board LED).
+ */
+ palClearPad(GPIOI, GPIOI_ARD_D13);
+ palSetPadMode(GPIOI, GPIOI_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
+
+ /*
* Activates the serial driver 1 using the driver default configuration.
*/
sdStart(&SD1, NULL);
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F746xG.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F746xG.ld
index 8257ec809..f955bd899 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F746xG.ld
+++ b/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F746xG.ld
@@ -23,15 +23,16 @@
*/
MEMORY
{
- flash : org = 0x08000000, len = 1M
- ram0 : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */
- ram1 : org = 0x20010000, len = 240k /* SRAM1 */
- ram2 : org = 0x2004C000, len = 16k /* SRAM2 */
- ram3 : org = 0x20000000, len = 64k /* DTCM-RAM */
- ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */
- ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */
- ram6 : org = 0x00000000, len = 0
- ram7 : org = 0x00000000, len = 0
+ flash : org = 0x08000000, len = 1M
+ flash_itcm : org = 0x00200000, len = 1M
+ ram0 : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */
+ ram1 : org = 0x20010000, len = 240k /* SRAM1 */
+ ram2 : org = 0x2004C000, len = 16k /* SRAM2 */
+ ram3 : org = 0x20000000, len = 64k /* DTCM-RAM */
+ ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */
+ ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
}
/* RAM region to be used for Main stack. This stack accommodates the processing
@@ -48,4 +49,7 @@ REGION_ALIAS("DATA_RAM", ram0);
/* RAM region to be used for BSS segment.*/
REGION_ALIAS("BSS_RAM", ram0);
-INCLUDE rules.ld
+/* RAM region to be used for DMA segment.*/
+REGION_ALIAS("DMA_RAM", ram0);
+
+INCLUDE ld/rules_STM32F7xx.ld
diff --git a/os/common/ports/ARMCMx/compilers/GCC/rules_dma.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld
index 6292b20aa..93ed8af3a 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/rules_dma.ld
+++ b/os/common/ports/ARMCMx/compilers/GCC/ld/rules_STM32F7xx.ld
@@ -52,7 +52,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
KEEP(*(.vectors))
- } > flash
+ } > flash_itcm AT > flash
constructors : ALIGN(4) SUBALIGN(4)
{
@@ -60,7 +60,7 @@ SECTIONS
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
- } > flash
+ } > flash_itcm AT > flash
destructors : ALIGN(4) SUBALIGN(4)
{
@@ -68,44 +68,42 @@ SECTIONS
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
- } > flash
+ } > flash_itcm AT > flash
.text : ALIGN(16) SUBALIGN(16)
{
*(.text)
*(.text.*)
- *(.rodata)
- *(.rodata.*)
*(.glue_7t)
*(.glue_7)
*(.gcc*)
- } > flash
+ } > flash_itcm AT > flash
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
+ } > flash_itcm AT > flash
.ARM.exidx : {
PROVIDE(__exidx_start = .);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
PROVIDE(__exidx_end = .);
- } > flash
+ } > flash_itcm AT > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
- } > flash
+ } > flash_itcm AT > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
- } > flash
-
+ } > flash_itcm AT > flash
+
.textalign : ONLY_IF_RO
{
. = ALIGN(8);
- } > flash
+ } > flash_itcm AT > flash
. = ALIGN(4);
_etext = .;
@@ -156,6 +154,18 @@ SECTIONS
PROVIDE(_edata = .);
} > DATA_RAM AT > flash
+ /* Constants are placed in the normal flash (non-ITCM) region because it
+ is desirable to make them DMA-accessible.*/
+ .rodata : ALIGN(4)
+ {
+ . = ALIGN(4);
+ PROVIDE(__rodata_base__ = .);
+ *(.rodata)
+ *(.rodata.*)
+ . = ALIGN(4);
+ PROVIDE(__rodata_end__ = .);
+ } > flash
+
.bss : ALIGN(4)
{
. = ALIGN(4);
diff --git a/os/common/ports/ARMCMx/compilers/GCC/rules.ld b/os/common/ports/ARMCMx/compilers/GCC/rules.ld
index 485c0f0fa..0ecb156cc 100644
--- a/os/common/ports/ARMCMx/compilers/GCC/rules.ld
+++ b/os/common/ports/ARMCMx/compilers/GCC/rules.ld
@@ -52,7 +52,7 @@ SECTIONS
startup : ALIGN(16) SUBALIGN(16)
{
KEEP(*(.vectors))
- } > flash
+ } > flash_itcm AT > flash
constructors : ALIGN(4) SUBALIGN(4)
{
@@ -60,7 +60,7 @@ SECTIONS
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE(__init_array_end = .);
- } > flash
+ } > flash_itcm AT > flash
destructors : ALIGN(4) SUBALIGN(4)
{
@@ -68,7 +68,7 @@ SECTIONS
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
PROVIDE(__fini_array_end = .);
- } > flash
+ } > flash_itcm AT > flash
.text : ALIGN(16) SUBALIGN(16)
{
@@ -79,33 +79,33 @@ SECTIONS
*(.glue_7t)
*(.glue_7)
*(.gcc*)
- } > flash
+ } > flash_itcm AT > flash
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
+ } > flash_itcm AT > flash
.ARM.exidx : {
PROVIDE(__exidx_start = .);
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
PROVIDE(__exidx_end = .);
- } > flash
+ } > flash_itcm AT > flash
.eh_frame_hdr :
{
*(.eh_frame_hdr)
- } > flash
+ } > flash_itcm AT > flash
.eh_frame : ONLY_IF_RO
{
*(.eh_frame)
- } > flash
-
+ } > flash_itcm AT > flash
+
.textalign : ONLY_IF_RO
{
. = ALIGN(8);
- } > flash
+ } > flash_itcm AT > flash
. = ALIGN(4);
_etext = .;
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
index eaf41bdee..1646c0e44 100644
--- a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
+++ b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h
@@ -494,7 +494,7 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
index eaf41bdee..1646c0e44 100644
--- a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
+++ b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h
@@ -494,7 +494,7 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/SPI/chconf.h b/testhal/STM32/STM32F7xx/SPI/chconf.h
index eaf41bdee..1646c0e44 100644
--- a/testhal/STM32/STM32F7xx/SPI/chconf.h
+++ b/testhal/STM32/STM32F7xx/SPI/chconf.h
@@ -494,7 +494,7 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/SPI/main.c b/testhal/STM32/STM32F7xx/SPI/main.c
index bfed6c07c..7632ca393 100644
--- a/testhal/STM32/STM32F7xx/SPI/main.c
+++ b/testhal/STM32/STM32F7xx/SPI/main.c
@@ -185,10 +185,6 @@ int main(void) {
PAL_MODE_OUTPUT_PUSHPULL); /* CS1. */
/*
- * Prepare transmit pattern.
- */
-
- /*
* Starting the transmitter and receiver threads.
*/
chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
diff --git a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h
index eaf41bdee..1646c0e44 100644
--- a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h
+++ b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h
@@ -494,7 +494,7 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */