git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@136 35acf78f-673a-0410-8e92-d51de3d6d3f4

7 files changed, 80 insertions, 106 deletions

diff --git a/demos/ARM7-LPC214x-GCC-minimal/chcore.c b/demos/ARM7-LPC214x-GCC-minimal/chcore.c
index f4127cc8e..f46b932be 100644
--- a/demos/ARM7-LPC214x-GCC-minimal/chcore.c
+++ b/demos/ARM7-LPC214x-GCC-minimal/chcore.c
@@ -24,6 +24,7 @@
 //#include "lpc214x_serial.h"

 //#include "lpc214x_ssp.h"

 //#include "mmcsd.h"

+

 //#include "buzzer.h"

 

 extern void IrqHandler(void);

@@ -115,13 +116,11 @@ void hwinit(void) {
    */

   InitVIC();

   VICDefVectAddr = (IOREG32)IrqHandler;

-  SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);

-//  SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);

-//  SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);

 

   /*

    * System Timer initialization, 1ms intervals.

    */

+  SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);

   VICIntEnable = INTMASK(SOURCE_Timer0);

   TC *timer = T0Base;

   timer->TC_PR = VAL_TC0_PRESCALER;

@@ -133,7 +132,7 @@ void hwinit(void) {
   /*

    * Other subsystems.

    */

-//  InitSerial();

+//  InitSerial(1, 2);

 //  InitSSP();

 //  InitMMC();

 //  InitBuzzer();

@@ -152,19 +151,6 @@ void _IdleThread(void *p) {
 }

 

 /*

- * System halt.

- * Yellow LED only.

- */

-void chSysHalt(void) {

-

-  chSysLock();

-  IO0SET = 0x00000C00;

-  IO0CLR = 0x80000000;

-  while (TRUE)

-    ;

-}

-

-/*

  * System console message (not implemented).

  */

 void chSysPuts(char *msg) {

@@ -173,17 +159,45 @@ void chSysPuts(char *msg) {
 /*

  * Non-vectored IRQs handling here.

  */

-void NonVectoredIrq(void) {

-

+__attribute__((naked, weak))

+void IrqHandler(void) {

+

+  asm(".code 32                                 \n\t" \

+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");

+#ifdef THUMB

+  asm("add      r0, pc, #1                      \n\t" \

+      "bx       r0                              \n\t" \

+      ".code 16                                 \n\t");

   VICVectAddr = 0;

+  asm("ldr      r0, =IrqCommon                  \n\t" \

+      "bx       r0                              \n\t");

+#else

+  VICVectAddr = 0;

+  asm("b        IrqCommon                       \n\t");

+#endif

 }

 

 /*

  * Timer 0 IRQ handling here.

  */

-void Timer0Irq(void) {

-

+__attribute__((naked, weak))

+void T0IrqHandler(void) {

+

+  asm(".code 32                                 \n\t" \

+      "stmfd    sp!, {r0-r3, r12, lr}           \n\t");

+#ifdef THUMB

+  asm("add      r0, pc, #1                      \n\t" \

+      "bx       r0                              \n\t" \

+      ".code 16                                 \n\t");

+  T0IR = 1;             /* Clear interrupt on match MR0. */

+  chSysTimerHandlerI();

+  VICVectAddr = 0;

+  asm("ldr      r0, =IrqCommon                  \n\t" \

+      "bx       r0                              \n\t");

+#else

   T0IR = 1;             /* Clear interrupt on match MR0. */

   chSysTimerHandlerI();

   VICVectAddr = 0;

+  asm("b        IrqCommon                       \n\t");

+#endif

 }

diff --git a/demos/ARM7-LPC214x-GCC-minimal/chcore2.s b/demos/ARM7-LPC214x-GCC-minimal/chcore2.s
index 785765fd4..7c9d1d0d7 100644
--- a/demos/ARM7-LPC214x-GCC-minimal/chcore2.s
+++ b/demos/ARM7-LPC214x-GCC-minimal/chcore2.s
@@ -53,26 +53,44 @@ jmpr4:  bx      r4
 .code 32

 #endif

 

+.weak UndHandler

 .globl UndHandler

 UndHandler:

 

+.weak SwiHandler

 .globl SwiHandler

 SwiHandler:

 

+.weak PrefetchHandler

 .globl PrefetchHandler

 PrefetchHandler:

 

+.weak AbortHandler

 .globl AbortHandler

 AbortHandler:

 

+.weak FiqHandler

 .globl FiqHandler

 FiqHandler:

+        b       halt32

+

+.weak chSysHalt

 #ifdef THUMB_NO_INTERWORKING

-        ldr     r0, =chSysHalt

+.code 16

+.globl chSysHalt

+chSysHalt:

+        mov     r0, pc

         bx      r0

+.code 32

 #else

-        b       chSysHalt

+.globl chSysHalt

+chSysHalt:

 #endif

+halt32:

+        mrs     r0, CPSR

+        orr     r0, #I_BIT | F_BIT

+        msr     CPSR_c, r0

+.loop:  b       .loop

 

 #ifdef THUMB

 .globl chSysLock

@@ -111,6 +129,8 @@ chSysSwitchI:
 #endif /* CH_CURRP_REGISTER_CACHE */

 

 /*

+ * Common exit point for all IRQ routines, it performs the rescheduling if

+ * required.

  * System stack frame structure after a context switch in the

  * interrupt handler:

  *

@@ -135,70 +155,6 @@ chSysSwitchI:
  * SP-> |     R4     | -+

  * Low  +------------+

  */

-.globl IrqHandler

-IrqHandler:

-        stmfd   sp!, {r0-r3, r12, lr}

-#ifdef THUMB_NO_INTERWORKING

-        add     r0, pc, #1

-        bx      r0

-.code 16

-        bl      NonVectoredIrq

-        b       IrqCommon

-.code 32

-#else

-        bl      NonVectoredIrq

-        b       IrqCommon

-#endif

-

-.globl T0IrqHandler

-T0IrqHandler:

-        stmfd   sp!, {r0-r3, r12, lr}

-#ifdef THUMB_NO_INTERWORKING

-        add     r0, pc, #1

-        bx      r0

-.code 16

-        bl      Timer0Irq

-        b       IrqCommon

-.code 32

-#else

-        bl      Timer0Irq

-        b       IrqCommon

-#endif

-/*

-.globl UART0IrqHandler

-UART0IrqHandler:

-        stmfd   sp!, {r0-r3, r12, lr}

-#ifdef THUMB_NO_INTERWORKING

-        add     r0, pc, #1

-        bx      r0

-.code 16

-        bl      UART0Irq

-        b       IrqCommon

-.code 32

-#else

-        bl      UART0Irq

-        b       IrqCommon

-#endif

-

-.globl UART1IrqHandler

-UART1IrqHandler:

-        stmfd   sp!, {r0-r3, r12, lr}

-#ifdef THUMB_NO_INTERWORKING

-        add     r0, pc, #1

-        bx      r0

-.code 16

-        bl      UART1Irq

-        b       IrqCommon

-.code 32

-#else

-        bl      UART1Irq

-        b       IrqCommon

-#endif

-*/

-/*

- * Common exit point for all IRQ routines, it performs the rescheduling if

- * required.

- */

 #ifdef THUMB_NO_INTERWORKING

 .code 16

 .globl IrqCommon

@@ -214,7 +170,7 @@ IrqCommon:
 #endif

         cmp     r0, #0                          // Simply returns if a

         ldmeqfd sp!, {r0-r3, r12, lr}           // reschedule is not

-        subeqs  pc, lr, #4			// required.

+        subeqs  pc, lr, #4                      // required.

 

         // Saves the IRQ mode registers in the system stack.

         ldmfd   sp!, {r0-r3, r12, lr}           // IRQ stack now empty.

diff --git a/demos/ARM7-LPC214x-GCC/chcore.c b/demos/ARM7-LPC214x-GCC/chcore.c
index 05305b24e..5313ecdb4 100644
--- a/demos/ARM7-LPC214x-GCC/chcore.c
+++ b/demos/ARM7-LPC214x-GCC/chcore.c
@@ -151,19 +151,6 @@ void _IdleThread(void *p) {
 }

 

 /*

- * System halt.

- * Yellow LED only.

- */

-void chSysHalt(void) {

-

-  chSysLock();

-  IO0SET = 0x00000C00;

-  IO0CLR = 0x80000000;

-  while (TRUE)

-    ;

-}

-

-/*

  * System console message (not implemented).

  */

 void chSysPuts(char *msg) {

diff --git a/demos/ARM7-LPC214x-GCC/chcore2.s b/demos/ARM7-LPC214x-GCC/chcore2.s
index 2a7888387..7c9d1d0d7 100644
--- a/demos/ARM7-LPC214x-GCC/chcore2.s
+++ b/demos/ARM7-LPC214x-GCC/chcore2.s
@@ -72,12 +72,25 @@ AbortHandler:
 .weak FiqHandler

 .globl FiqHandler

 FiqHandler:

+        b       halt32

+

+.weak chSysHalt

 #ifdef THUMB_NO_INTERWORKING

-        ldr     r0, =chSysHalt

+.code 16

+.globl chSysHalt

+chSysHalt:

+        mov     r0, pc

         bx      r0

+.code 32

 #else

-        b       chSysHalt

+.globl chSysHalt

+chSysHalt:

 #endif

+halt32:

+        mrs     r0, CPSR

+        orr     r0, #I_BIT | F_BIT

+        msr     CPSR_c, r0

+.loop:  b       .loop

 

 #ifdef THUMB

 .globl chSysLock

@@ -157,7 +170,7 @@ IrqCommon:
 #endif

         cmp     r0, #0                          // Simply returns if a

         ldmeqfd sp!, {r0-r3, r12, lr}           // reschedule is not

-        subeqs  pc, lr, #4			// required.

+        subeqs  pc, lr, #4                      // required.

 

         // Saves the IRQ mode registers in the system stack.

         ldmfd   sp!, {r0-r3, r12, lr}           // IRQ stack now empty.

diff --git a/docs/Doxyfile b/docs/Doxyfile
index 67d580146..8abfd62b4 100644
--- a/docs/Doxyfile
+++ b/docs/Doxyfile
@@ -4,7 +4,7 @@
 # Project related configuration options
 #---------------------------------------------------------------------------
 PROJECT_NAME           = ChibiOS/RT
-PROJECT_NUMBER         = "0.4.4 beta"
+PROJECT_NUMBER         = "0.4.5 beta"
 OUTPUT_DIRECTORY       = .
 CREATE_SUBDIRS         = NO
 OUTPUT_LANGUAGE        = English
diff --git a/docs/index.html b/docs/index.html
index 619357a57..4ac525ae0 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -13,7 +13,7 @@ Homepage</h2>
     </tr>

     <tr>

       <td style="text-align: center; vertical-align: top; width: 150px;">Current

-Version 0.4.4<br>

+Version 0.4.5<br>

 -<br>

       <a href="http://sourceforge.net/projects/chibios/" rel="me" target="_top">Project on SourceForge</a><br>

       <a href="html/index.html" target="_top" rel="me">Documentation</a><br>

diff --git a/readme.txt b/readme.txt
index c1dbc7eaf..a48834cbc 100644
--- a/readme.txt
+++ b/readme.txt
@@ -45,6 +45,10 @@ AVR-AT90CANx-GCC       - Port on AVR AT90CAN128, not complete yet.
 - Moved all the other interrupt handlers from chcore2.s into chcore.c as

   inline asm code. The interrupt code now is faster because one less call

   level.

+- Fixed a minor problem in chSysHalt() now it disables FIQ too and makes sure

+  to keep the processor in the state it had when it was halted.

+  Note: This is not a kernel bug but something specific with the ARM port, the

+        other ports are not affected.

 

 *** 0.4.4 ***

 - Fixed a very important bug in the preemption ARM code, important enough to