Added PAL driver

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10630 35acf78f-673a-0410-8e92-d51de3d6d3f4

9 files changed, 651 insertions, 30 deletions

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/halconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/halconf.h
index d1d69ab8f..800077363 100644
--- a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/halconf.h
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/halconf.h
@@ -34,7 +34,7 @@
  * @brief   Enables the PAL subsystem.

  */

 #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

-#define HAL_USE_PAL                 FALSE

+#define HAL_USE_PAL                 TRUE

 #endif

 

 /**

@@ -178,6 +178,26 @@
 #endif

 

 /*===========================================================================*/

+/* PAL driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)

+#define PAL_USE_CALLBACKS           FALSE

+#endif

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)

+#define PAL_USE_WAIT                FALSE

+#endif

+

+/*===========================================================================*/

 /* ADC driver related settings.                                              */

 /*===========================================================================*/

 

diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/main.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/main.c
index c0fa19e5f..e06c3471d 100755
--- a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/main.c
+++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED/main.c
@@ -27,9 +27,7 @@ static THD_FUNCTION(Thread1, arg) {
   chRegSetThreadName("blinker");

 

   while (true) {

-    PIOA->PIO_PIO_[1].S_PIO_CODR = S_PIO_CODR_P5;

-    chThdSleepMilliseconds(500);

-    PIOA->PIO_PIO_[1].S_PIO_SODR = S_PIO_SODR_P5;

+    palToggleLine(LINE_LED_BLUE);

     chThdSleepMilliseconds(500);

   }

 }

diff --git a/os/hal/boards/ATSAMA5D2_XULT/board.c b/os/hal/boards/ATSAMA5D2_XULT/board.c
index b7767e73e..594d67beb 100644
--- a/os/hal/boards/ATSAMA5D2_XULT/board.c
+++ b/os/hal/boards/ATSAMA5D2_XULT/board.c
@@ -16,6 +16,7 @@
 

 #include "hal.h"

 

+#define _PIOA                       ((Pio*)0xFC038000U)

 /*

  * SAMA PIO CFGR masks.

  */

@@ -110,64 +111,64 @@ void boardInit(void) {
   /* Configuring all PIO A pads with default configuration.  */

 #if SAMA_HAS_PIOA

 #if SAMA_HAL_IS_SECURE

-  PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

-  PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

+  _PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

+  _PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

 #endif /* SAMA_HAL_IS_SECURE */

-  PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

-  PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

+  _PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

+  _PIOA->PIO_PIO_[SAMA_PIOA].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

 #endif /* SAMA_HAS_PIOA */

 

   /* Configuring all PIO B pads with default configuration.  */

 #if SAMA_HAS_PIOB

 #if SAMA_HAL_IS_SECURE

-  PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

-  PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

+  _PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

+  _PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

 #endif /* SAMA_HAL_IS_SECURE */

-  PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

-  PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

+  _PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

+  _PIOA->PIO_PIO_[SAMA_PIOB].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

 #endif /* SAMA_HAS_PIOB */

 

   /* Configuring all PIO C pads with default configuration.  */

 #if SAMA_HAS_PIOC

 #if SAMA_HAL_IS_SECURE

-  PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

-  PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

+  _PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

+  _PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

 #endif /* SAMA_HAL_IS_SECURE */

-  PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

-  PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

+  _PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

+  _PIOA->PIO_PIO_[SAMA_PIOC].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

 #endif /* SAMA_HAS_PIOC */

 

   /* Configuring all PIO D pads with default configuration.  */

 #if SAMA_HAS_PIOD

 #if SAMA_HAL_IS_SECURE

-  PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

-  PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

+  _PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIOSR = SAMA_DEFAULT_SIOSR;

+  _PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_SIONR = SAMA_DEFAULT_SIONR;

 #endif /* SAMA_HAL_IS_SECURE */

-  PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

-  PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

+  _PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_MSKR = SAMA_DEFAULT_MSKR;

+  _PIOA->PIO_PIO_[SAMA_PIOD].S_PIO_CFGR = SAMA_DEFAULT_CFGR;

 #endif /* SAMA_HAS_PIOD */

 

   /* Initialize PIO registers for defined pads.*/

   i = 0;

   while (sama_inits[i].pio_id != -1) {

 #if SAMA_HAL_IS_SECURE

-    PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SIOSR = sama_inits[i].pio_msk;

-    PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_MSKR = sama_inits[i].pio_msk;

-    PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CFGR = sama_inits[i].pio_cfg;

+    _PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SIOSR = sama_inits[i].pio_msk;

+    _PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_MSKR = sama_inits[i].pio_msk;

+    _PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CFGR = sama_inits[i].pio_cfg;

     if(sama_inits[i].pio_ods == SAMA_PIO_HIGH) {

-      PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SODR = sama_inits[i].pio_msk;

+      _PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_SODR = sama_inits[i].pio_msk;

     }

     else {

-      PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CODR = sama_inits[i].pio_msk;

+      _PIOA->PIO_PIO_[sama_inits[i].pio_id].S_PIO_CODR = sama_inits[i].pio_msk;

     }

 #else

-    PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_MSKR = sama_inits[i].pio_msk;

-    PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CFGR = sama_inits[i].pio_cfg;

+    _PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_MSKR = sama_inits[i].pio_msk;

+    _PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CFGR = sama_inits[i].pio_cfg;

     if(sama_inits[i].pio_ods == SAMA_PIO_HIGH) {

-      PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_SODR = sama_inits[i].pio_msk;

+      _PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_SODR = sama_inits[i].pio_msk;

     }

     else {

-      PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CODR = sama_inits[i].pio_msk;

+      _PIOA->PIO_IO_GROUP[sama_inits[i].pio_id].PIO_CODR = sama_inits[i].pio_msk;

     }

 #endif /* SAMA_HAL_IS_SECURE */

     i++;

diff --git a/os/hal/boards/ATSAMA5D2_XULT/board.h b/os/hal/boards/ATSAMA5D2_XULT/board.h
index 3a72e7551..ec63c6182 100644
--- a/os/hal/boards/ATSAMA5D2_XULT/board.h
+++ b/os/hal/boards/ATSAMA5D2_XULT/board.h
@@ -206,6 +206,16 @@
 #define PIOD_PIN30                  30U

 #define PIOD_PIN31                  31U

 

+/*

+ * IO lines assignments.

+ */

+#define BOARD_LINE(port, pad)                                               \

+  ((uint32_t)((uint32_t)(port)) | ((uint32_t)(pad)))

+

+#define LINE_LED_BLUE               BOARD_LINE(PIOB, 0U)

+#define LINE_LED_GREEN              BOARD_LINE(PIOB, 5U)

+#define LINE_LED_RED                BOARD_LINE(PIOB, 6U)

+

 #if !defined(_FROM_ASM_)

 #ifdef __cplusplus

 extern "C" {

diff --git a/os/hal/ports/SAMA/LLD/PIOv1/driver.mk b/os/hal/ports/SAMA/LLD/PIOv1/driver.mk
new file mode 100644
index 000000000..bba9eb628
--- /dev/null
+++ b/os/hal/ports/SAMA/LLD/PIOv1/driver.mk
@@ -0,0 +1,9 @@
+ifeq ($(USE_SMART_BUILD),yes)

+ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)

+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.c

+endif

+else

+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.c

+endif

+

+PLATFORMINC += $(CHIBIOS)/os/hal/ports/SAMA/LLD/PIOv1

diff --git a/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.c b/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.c
new file mode 100644
index 000000000..8b5a616dc
--- /dev/null
+++ b/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.c
@@ -0,0 +1,55 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    PIOv1/hal_pal_lld.c

+ * @brief   SAMA PAL low level driver code.

+ *

+ * @addtogroup PAL

+ * @{

+ */

+

+#include "hal.h"

+

+#if HAL_USE_PAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+#endif /* HAL_USE_PAL */

+

+/** @} */

diff --git a/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.h b/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.h
new file mode 100644
index 000000000..c6c5d7cca
--- /dev/null
+++ b/os/hal/ports/SAMA/LLD/PIOv1/hal_pal_lld.h
@@ -0,0 +1,510 @@
+/*

+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    PIOv1/hal_pal_lld.h

+ * @brief   SAMA PAL low level driver header.

+ *

+ * @addtogroup PAL

+ * @{

+ */

+

+#ifndef HAL_PAL_LLD_H

+#define HAL_PAL_LLD_H

+

+#if HAL_USE_PAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Unsupported modes and specific modes                                      */

+/*===========================================================================*/

+

+#undef PAL_MODE_RESET

+#undef PAL_MODE_UNCONNECTED

+#undef PAL_MODE_INPUT

+#undef PAL_MODE_INPUT_PULLUP

+#undef PAL_MODE_INPUT_PULLDOWN

+#undef PAL_MODE_INPUT_ANALOG

+#undef PAL_MODE_OUTPUT_PUSHPULL

+#undef PAL_MODE_OUTPUT_OPENDRAIN

+

+/**

+ * @name    SAMA-specific I/O mode flags

+ * @{

+ */

+#define PAL_SAMA_FUNC_MASK             (3U << 0U)

+#define PAL_SAMA_FUNC_GPIO             (0U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_A         (1U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_B         (2U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_C         (3U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_D         (4U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_E         (5U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_F         (6U << 0U)

+#define PAL_SAMA_FUNC_PERIPH_G         (7U << 0U)

+

+#define PAL_SAMA_DIR_MASK              (1U << 8U)

+#define PAL_SAMA_DIR_INPUT             (0U << 8U)

+#define PAL_SAMA_DIR_OUTPUT            (1U << 8U)

+

+#define PAL_SAMA_PUEN_MASK             (1U << 9U)

+#define PAL_SAMA_PUEN_PULLUP           (1U << 9U)

+

+#define PAL_SAMA_PDEN_MASK             (1U << 10U)

+#define PAL_SAMA_PDEN_PULLDOWN         (1U << 10U)

+

+#define PAL_SAMA_IFEN_MASK             (1U << 12U)

+#define PAL_SAMA_PDEN_INPUTFILTER      (1U << 12U)

+

+#define PAL_SAMA_IFSCEN_MASK           (1U << 13U)

+#define PAL_SAMA_IFSCEN_MCK_2          (0U << 13U)

+#define PAL_SAMA_IFSCEN_SLCK_2         (1U << 13U)

+

+#define PAL_SAMA_OPD_MASK              (1U << 14U)

+#define PAL_SAMA_OPD_PUSHPULL          (0U << 14U)

+#define PAL_SAMA_OPD_OPENDRAIN         (1U << 14U)

+

+#define PAL_SAMA_SCHMITT_MASK          (1U << 15U)

+#define PAL_SAMA_SCHMITT               (1U << 15U)

+

+#define PAL_SAMA_DRVSTR_MASK           (3U << 16U)

+#define PAL_SAMA_DRVSTR_LO             (1U << 16U)

+#define PAL_SAMA_DRVSTR_ME             (2U << 16U)

+#define PAL_SAMA_DRVSTR_HI             (3U << 16U)

+

+/**

+ * @name    Standard I/O mode flags

+ * @{

+ */

+/**

+ * @brief   Implemented as input.

+ */

+#define PAL_MODE_RESET                  (PAL_SAMA_DIR_INPUT |               \

+                                         PAL_SAMA_SCHMITT)

+

+/**

+ * @brief   Implemented as input with pull-up.

+ */

+#define PAL_MODE_UNCONNECTED            (PAL_SAMA_DIR_INPUT |               \

+                                         PAL_SAMA_SCHMITT |                 \

+                                         PAL_SAMA_PUEN_PULLUP)

+

+/**

+ * @brief   Regular input high-Z pad.

+ */

+#define PAL_MODE_INPUT                  (PAL_SAMA_DIR_INPUT |               \

+                                         PAL_SAMA_SCHMITT)

+

+/**

+ * @brief   Input pad with weak pull up resistor.

+ */

+#define PAL_MODE_INPUT_PULLUP           (PAL_SAMA_DIR_INPUT |               \

+                                         PAL_SAMA_SCHMITT |                 \

+                                         PAL_SAMA_PUEN_PULLUP)

+

+/**

+ * @brief   Input pad with weak pull down resistor.

+ */

+#define PAL_MODE_INPUT_PULLDOWN         (PAL_SAMA_DIR_INPUT |               \

+                                         PAL_SAMA_SCHMITT |                 \

+                                         PAL_SAMA_PUEN_PULLDOWN)

+

+/**

+ * @brief   Analog input mode.

+ */

+#define PAL_MODE_INPUT_ANALOG           PAL_SAMA_DIR_INPUT

+

+/**

+ * @brief   Push-pull output pad.

+ */

+#define PAL_MODE_OUTPUT_PUSHPULL        PAL_SAMA_DIR_OUTPUT

+

+/**

+ * @brief   Open-drain output pad.

+ */

+#define PAL_MODE_OUTPUT_OPENDRAIN       (PAL_SAMA_DIR_OUTPUT |              \

+                                         PAL_SAMA_OPD_OPENDRAIN)

+/** @} */

+

+/* Discarded definitions from the Atmel headers, the PAL driver uses its own

+   definitions in order to have an unified handling for all devices.

+   Unfortunately the ST headers have no uniform definitions for the same

+   objects across the various sub-families.*/

+#undef PIOA

+

+/**

+ * @name    PIO ports definitions

+ * @{

+ */

+#define PIOA                            ((sama_pio_t *)PIOA_BASE)

+#define PIOB                            ((sama_pio_t *)PIOB_BASE)

+#define PIOC                            ((sama_pio_t *)PIOC_BASE)

+#define PIOD                            ((sama_pio_t *)PIOD_BASE)

+/** @} */

+

+/*===========================================================================*/

+/* I/O Ports Types and constants.                                            */

+/*===========================================================================*/

+

+/**

+ * @name    Port related definitions

+ * @{

+ */

+/**

+ * @brief   Width, in bits, of an I/O port.

+ */

+#define PAL_IOPORTS_WIDTH 32

+

+/**

+ * @brief   Whole port mask.

+ * @details This macro specifies all the valid bits into a port.

+ */

+#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)

+/** @} */

+

+/**

+ * @name    Line handling macros

+ * @{

+ */

+/**

+ * @brief   Forms a line identifier.

+ * @details A port/pad pair are encoded into an @p ioline_t type. The encoding

+ *          of this type is platform-dependent.

+ * @note    In this driver the pad number is encoded in the lower 5 bits of

+ *          the PIO address which are guaranteed to be zero.

+ */

+#define PAL_LINE(port, pad)                                                 \

+  ((ioline_t)((uint32_t)(port)) | ((uint32_t)(pad)))

+

+/**

+ * @brief   Decodes a port identifier from a line identifier.

+ */

+#define PAL_PORT(line)                                                      \

+  ((sama_pio_t *)(((uint32_t)(line)) & 0xFFFFFFE0U))

+

+/**

+ * @brief   Decodes a pad identifier from a line identifier.

+ */

+#define PAL_PAD(line)                                                       \

+  ((uint32_t)((uint32_t)(line) & 0x0000001FU))

+

+/**

+ * @brief   Value identifying an invalid line.

+ */

+#define PAL_NOLINE                      0U

+/** @} */

+

+/**

+ * @brief   SAMA PIO registers block.

+ */

+#if SAMA_HAL_IS_SECURE

+typedef struct {

+  volatile uint32_t MSKR;

+  volatile uint32_t CFGR;

+  volatile uint32_t PDSR;

+  volatile uint32_t LOCKSR;

+  volatile uint32_t SODR;

+  volatile uint32_t CODR;

+  volatile uint32_t ODSR;

+  volatile uint32_t Reserved1;

+  volatile uint32_t IER; 

+  volatile uint32_t IDR;

+  volatile uint32_t IMR;

+  volatile uint32_t ISR;

+  volatile uint32_t Reserved2[3];

+  volatile uint32_t IOFR;

+} sama_pio_t;

+#else

+typedef struct {

+  volatile uint32_t MSKR;

+  volatile uint32_t CFGR;

+  volatile uint32_t PDSR;

+  volatile uint32_t LOCKSR;

+  volatile uint32_t SODR;

+  volatile uint32_t CODR;

+  volatile uint32_t ODSR;

+  volatile uint32_t Reserved1;

+  volatile uint32_t IER; 

+  volatile uint32_t IDR;

+  volatile uint32_t IMR;

+  volatile uint32_t ISR;

+  volatile uint32_t SIONR;

+  volatile uint32_t SIOSR;

+  volatile uint32_t IOSSR;

+  volatile uint32_t IOFR;

+} sama_pio_t;  

+#endif

+

+/**

+ * @brief   SAMA PIO static initializer.

+ * @details It is a dummy.

+ */

+typedef uint32_t PALConfig;

+

+/**

+ * @brief   Type of digital I/O port sized unsigned integer.

+ */

+typedef uint32_t ioportmask_t;

+

+/**

+ * @brief   Type of digital I/O modes.

+ */

+typedef uint32_t iomode_t;

+

+/**

+ * @brief   Type of an I/O line.

+ */

+typedef uint32_t ioline_t;

+

+/**

+ * @brief   Type of an event mode.

+ */

+typedef uint32_t ioeventmode_t;

+

+/**

+ * @brief   Type of a port Identifier.

+ * @details This type can be a scalar or some kind of pointer, do not make

+ *          any assumption about it, use the provided macros when populating

+ *          variables of this type.

+ */

+typedef sama_pio_t * ioportid_t;

+

+/**

+ * @brief   Type of an pad identifier.

+ */

+typedef uint32_t iopadid_t;

+

+/*===========================================================================*/

+/* I/O Ports Identifiers.                                                    */

+/* The low level driver wraps the definitions already present in the SAMA   */

+/* firmware library.                                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   PIO port A identifier.

+ */

+#if SAMA_HAS_PIOA || defined(__DOXYGEN__)

+#define IOPORT1         PIOA

+#endif

+

+/**

+ * @brief   PIO port B identifier.

+ */

+#if SAMA_HAS_PIOB || defined(__DOXYGEN__)

+#define IOPORT2         PIOB

+#endif

+

+/**

+ * @brief   PIO port C identifier.

+ */

+#if SAMA_HAS_PIOC || defined(__DOXYGEN__)

+#define IOPORT3         PIOC

+#endif

+

+/**

+ * @brief   PIO port D identifier.

+ */

+#if SAMA_HAS_PIOD || defined(__DOXYGEN__)

+#define IOPORT4         PIOD

+#endif

+

+/*===========================================================================*/

+/* Implementation, some of the following macros could be implemented as      */

+/* functions, if so please put them in pal_lld.c.                            */

+/*===========================================================================*/

+

+/**

+ * @brief   PIO ports subsystem initialization.

+ *

+ * @notapi

+ */

+#define pal_lld_init(config)

+

+/**

+ * @brief   Reads an I/O port.

+ * @details This function is implemented by reading the PIO PDSR register, the

+ *          implementation has no side effects.

+ * @note    This function is not meant to be invoked directly by the application

+ *          code.

+ *

+ * @param[in] port      port identifier

+ * @return              The port bits.

+ *

+ * @notapi

+ */

+#define pal_lld_readport(port) ((port)->PDSR)

+

+/**

+ * @brief   Reads the output latch.

+ * @details This function is implemented by reading the PIO ODSR register, the

+ *          implementation has no side effects.

+ * @note    This function is not meant to be invoked directly by the application

+ *          code.

+ *

+ * @param[in] port      port identifier

+ * @return              The latched logical states.

+ *

+ * @notapi

+ */

+#define pal_lld_readlatch(port) ((port)->ODSR)

+

+/**

+ * @brief   Writes on a I/O port.

+ * @details This function is implemented by writing the PIO ODR register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port      port identifier

+ * @param[in] bits      bits to be written on the specified port

+ *

+ * @notapi

+ */

+#define pal_lld_writeport(port, bits)                                       \

+  do {                                                                      \

+    (port)->MSKR = 0xFFFFFFFFU;                                             \

+    (port)->ODSR = (bits);                                                   \

+  } while (false) 

+

+/**

+ * @brief   Sets a bits mask on a I/O port.

+ * @details This function is implemented by writing the PIO BSRR register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port      port identifier

+ * @param[in] bits      bits to be ORed on the specified port

+ *

+ * @notapi

+ */

+#define pal_lld_setport(port, bits) ((port)->SODR = (bits))

+

+/**

+ * @brief   Clears a bits mask on a I/O port.

+ * @details This function is implemented by writing the PIO BSRR register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port      port identifier

+ * @param[in] bits      bits to be cleared on the specified port

+ *

+ * @notapi

+ */

+#define pal_lld_clearport(port, bits) ((port)->CODR = (bits))

+

+/**

+ * @brief   Writes a group of bits.

+ * @details This function is implemented by writing the PIO BSRR register, the

+ *          implementation has no side effects.

+ *

+ * @param[in] port      port identifier

+ * @param[in] mask      group mask

+ * @param[in] offset    the group bit offset within the port

+ * @param[in] bits      bits to be written. Values exceeding the group

+ *                      width are masked.

+ *

+ * @notapi

+ */

+#define pal_lld_writegroup(port, mask, offset, bits)                        \

+  do {                                                                      \

+    (port)->MSKR = ((mask) << (offset));                                    \

+    (port)->ODSR = (((bits) & (mask)) << (offset));                         \

+  } while (false)

+

+/**

+ * @brief   Pads group mode setup.

+ * @details This function programs a pads group belonging to the same port

+ *          with the specified mode.

+ *

+ * @param[in] port      port identifier

+ * @param[in] mask      group mask

+ * @param[in] offset    group bit offset within the port

+ * @param[in] mode      group mode

+ *

+ * @notapi

+ */

+#define pal_lld_setgroupmode(port, mask, offset, mode)                      \

+  do {                                                                      \

+    (port)->MSKR = ((mask) << (offset));                                    \

+    (port)->CFGR = (mode);                                                  \

+  } while (false)

+

+/**

+ * @brief   Writes a logical state on an output pad.

+ *

+ * @param[in] port      port identifier

+ * @param[in] pad       pad number within the port

+ * @param[in] bit       logical value, the value must be @p PAL_LOW or

+ *                      @p PAL_HIGH

+ *

+ * @notapi

+ */

+#define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)

+

+/**

+ * @brief   Pad event enable.

+ * @note    Programming an unknown or unsupported mode is silently ignored.

+ *

+ * @param[in] port      port identifier

+ * @param[in] pad       pad number within the port

+ * @param[in] mode      pad event mode

+ *

+ * @notapi

+ */

+#define pal_lld_enablepadevent(port, pad, mode)

+

+/**

+ * @brief   Pad event disable.

+ * @details This function disables previously programmed event callbacks.

+ *

+ * @param[in] port      port identifier

+ * @param[in] pad       pad number within the port

+ *

+ * @notapi

+ */

+#define pal_lld_disablepadevent(port, pad)

+

+/**

+ * @brief   Returns a PAL event structure associated to a pad.

+ *

+ * @param[in] port      port identifier

+ * @param[in] pad       pad number within the port

+ *

+ * @notapi

+ */

+#define pal_lld_get_pad_event(port, pad)

+

+/**

+ * @brief   Returns a PAL event structure associated to a line.

+ *

+ * @param[in] line      line identifier

+ *

+ * @notapi

+ */

+#define pal_lld_get_line_event(line)

+

+#if !defined(__DOXYGEN__)

+extern const PALConfig pal_default_config;

+extern palevent_t _pal_events[16];

+#endif

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* HAL_USE_PAL */

+

+#endif /* HAL_PAL_LLD_H */

+

+/** @} */

diff --git a/os/hal/ports/SAMA/SAMA5D2x/platform.mk b/os/hal/ports/SAMA/SAMA5D2x/platform.mk
index 091b6f507..8cc24582d 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/platform.mk
+++ b/os/hal/ports/SAMA/SAMA5D2x/platform.mk
@@ -22,5 +22,6 @@ endif
 

 # Drivers compatible with the platform.

 include $(CHIBIOS)/os/hal/ports/SAMA/LLD/DMAv1/driver.mk

+include $(CHIBIOS)/os/hal/ports/SAMA/LLD/PIOv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/SAMA/LLD/SPIv1/driver.mk

 include $(CHIBIOS)/os/hal/ports/SAMA/LLD/USARTv1/driver.mk

diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h b/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h
index 35d5e0057..24d10ed48 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_registry.h
@@ -54,10 +54,27 @@
 

 /* PIO attributes.*/

 #define SAMA_HAS_PIOA                       TRUE

+#if SAMA_HAL_IS_SECURE

+#define PIOA_BASE                           0xFC039000U

+#else

+#define PIOA_BASE                           0xFC038000U

+#endif

+

 #define SAMA_HAS_PIOB                       TRUE

+#if SAMA_HAL_IS_SECURE

+#define PIOB_BASE                           0xFC039040U

+#else

+#define PIOB_BASE                           0xFC038040U

+#endif

+

 #define SAMA_HAS_PIOC                       TRUE

-#define SAMA_HAS_PIOD                       FALSE

+#if SAMA_HAL_IS_SECURE

+#define PIOC_BASE                           0xFC039080U

+#else

+#define PIOC_BASE                           0xFC038080U

+#endif

 

+#define SAMA_HAS_PIOD                       FALSE

 /** @} */

 

 #endif /* SAMA_REGISTRY_H */