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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-21 17:42:30 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-21 17:42:30 +0000 |
| commit | 8dfb19e4364eac8aea8f4fe1196cd0d0d6d4c266 (patch) | |
| tree | f7d5064247f7c33d42984856d4724e313821c861 | |
| parent | ae42ff1857ee56d67feca50d379c5f4b66d7fe69 (diff) | |
| download | ChibiOS-8dfb19e4364eac8aea8f4fe1196cd0d0d6d4c266.tar.gz ChibiOS-8dfb19e4364eac8aea8f4fe1196cd0d0d6d4c266.tar.bz2 ChibiOS-8dfb19e4364eac8aea8f4fe1196cd0d0d6d4c266.zip | |
RTC. Minor documentation improvements.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3378 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/platforms/STM32/rtc_lld.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/os/hal/platforms/STM32/rtc_lld.c b/os/hal/platforms/STM32/rtc_lld.c index 6ae2a4aee..c1163d1a1 100644 --- a/os/hal/platforms/STM32/rtc_lld.c +++ b/os/hal/platforms/STM32/rtc_lld.c @@ -109,13 +109,15 @@ CH_IRQ_HANDLER(RTC_IRQHandler) { * @brief Enable access to registers and initialize RTC if BKP domain
* was previously reseted.
*
+ * @note: Cold start time of LSE oscillator on STM32 platform
+ * takes about 3 seconds.
+ *
* @notapi
*/
void rtc_lld_init(void){
uint32_t preload = 0;
rccEnableBKPInterface(FALSE);
- //RCC->APB1ENR |= (RCC_APB1ENR_BKPEN | RCC_APB1ENR_PWREN);
/* enable access to BKP registers */
PWR->CR |= PWR_CR_DBP;
@@ -124,8 +126,7 @@ void rtc_lld_init(void){ #if STM32_RTC == STM32_RTC_LSE
if (! ((RCC->BDCR & RCC_BDCR_RTCEN) || (RCC->BDCR & RCC_BDCR_LSEON))){
- RCC->BDCR |= RCC_BDCR_LSEON;
- /* Note: cold start time of LSE oscillator on STM32 is about 3 seconds. */
+ RCC->BDCR |= RCC_BDCR_LSEON;
while(!(RCC->BDCR & RCC_BDCR_LSERDY))
;
RCC->BDCR |= RCC_BDCR_RTCEN;
|