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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-02 10:01:27 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-02 10:01:27 +0000 |
| commit | 75a75a7ddcdc0ea45941ecc7593900824a088715 (patch) | |
| tree | adb7e9631933e9708bee6cfbdbe34dc9a991fbc5 | |
| parent | 757d877e020aeb43697b80f14ed23f020116576e (diff) | |
| download | ChibiOS-75a75a7ddcdc0ea45941ecc7593900824a088715.tar.gz ChibiOS-75a75a7ddcdc0ea45941ecc7593900824a088715.tar.bz2 ChibiOS-75a75a7ddcdc0ea45941ecc7593900824a088715.zip | |
Fixed bug 3602150.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5096 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/platforms/STM32F0xx/stm32_rcc.h | 54 | ||||
| -rw-r--r-- | readme.txt | 2 |
2 files changed, 56 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32F0xx/stm32_rcc.h b/os/hal/platforms/STM32F0xx/stm32_rcc.h index d10aa6de7..2db4b26fa 100644 --- a/os/hal/platforms/STM32F0xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F0xx/stm32_rcc.h @@ -528,6 +528,60 @@ * @api
*/
#define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST)
+
+/**
+ * @brief Enables the CRC peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCRC(lp) rccEnableAHB(RCC_AHBENR_CRCEN, lp)
+
+/**
+ * @brief Disables the CRC peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp)
+
+/**
+ * @brief Resets the CRC peripheral.
+ *
+ * @api
+ */
+#define rccResetCRC() rccResetAHB(RCC_AHBRSTR_CRCRST)
+
+/**
+ * @brief Enables the WWDG peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp)
+
+/**
+ * @brief Disables the WWDG peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableWWDG(lp) rccDisableAPB1(RCC_APB1ENR_WWDGEN, lp)
+
+/**
+ * @brief Resets the WWDG peripheral.
+ *
+ * @api
+ */
+#define rccResetWWDG() rccResetAPB1(RCC_APB1RSTR_WWDGRST)
/** @} */
/*===========================================================================*/
diff --git a/readme.txt b/readme.txt index 6b632cf65..7cd483b38 100644 --- a/readme.txt +++ b/readme.txt @@ -82,6 +82,8 @@ *****************************************************************************
*** 2.5.2 ***
+- FIX: Fixed STM32F0 RCC enable/disable/reset functions for CRC and WWDG
+ (bug 3602150).
- FIX: Fixed missing parenthesis in use of macro arguments (bug 3601638).
- FIX: Fixed compile errors in Posix-GCC demo (bug 3601621)(backported
to 2.4.4).
|