diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-03-06 10:54:06 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-03-06 10:54:06 +0000 |
| commit | 734288440851424f50664a6a1495446570c84b32 (patch) | |
| tree | cfc5c9c062b2107da7cb8d80523f13452d59cd60 | |
| parent | f26704f6eed57f17cb0eb8c1048dc5cfd7ee11a4 (diff) | |
| download | ChibiOS-734288440851424f50664a6a1495446570c84b32.tar.gz ChibiOS-734288440851424f50664a6a1495446570c84b32.tar.bz2 ChibiOS-734288440851424f50664a6a1495446570c84b32.zip | |
IRQ STORM test demo for LPC13xx (GPT tested).
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2804 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/Makefile | 192 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/ch.ld | 113 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/ch.map | 2983 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/chconf.h | 507 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/halconf.h | 280 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/main.c | 321 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/mcuconf.h | 79 | ||||
| -rw-r--r-- | testhal/LPC13xx/IRQ_STORM/readme.txt | 25 |
8 files changed, 4500 insertions, 0 deletions
diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..6d904e8a8 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -0,0 +1,192 @@ +##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O2 -ggdb -fomit-frame-pointer
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable register caching optimization (read documentation).
+ifeq ($(USE_CURRP_CACHING),)
+ USE_CURRP_CACHING = no
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# Imported source files
+CHIBIOS = ../../..
+include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1343/board.mk
+include $(CHIBIOS)/os/hal/platforms/LPC13xx/platform.mk
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/port.mk
+include $(CHIBIOS)/os/kernel/kernel.mk
+include $(CHIBIOS)/test/test.mk
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(PORTSRC) \
+ $(KERNSRC) \
+ $(TESTSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(CHIBIOS)/os/various/evtimer.c \
+ $(CHIBIOS)/os/various/syscalls.c \
+ main.c +
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(PORTASM)
+
+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
+ $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of default section
+#
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS = -DLPC1348 -D__NEWLIB__
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk
diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld new file mode 100644 index 000000000..83028c619 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/ch.ld @@ -0,0 +1,113 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * LPC1343 memory setup.
+ */
+__main_stack_size__ = 0x0100;
+__process_stack_size__ = 0x0100;
+__stacks_total_size__ = __main_stack_size__ + __process_stack_size__;
+
+MEMORY
+{
+ flash : org = 0x00000000, len = 32k
+ ram : org = 0x10000000, len = 8k
+}
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ _text = .;
+ KEEP(*(vectors))
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ } > flash
+
+ .ctors :
+ {
+ PROVIDE(_ctors_start_ = .);
+ KEEP(*(SORT(.ctors.*)))
+ KEEP(*(.ctors))
+ PROVIDE(_ctors_end_ = .);
+ } > flash
+
+ .dtors :
+ {
+ PROVIDE(_dtors_start_ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(_dtors_end_ = .);
+ } > flash
+
+ .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)}
+
+ __exidx_start = .;
+ .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash
+ __exidx_end = .;
+
+ .eh_frame_hdr : {*(.eh_frame_hdr)}
+
+ .eh_frame : ONLY_IF_RO {*(.eh_frame)}
+
+ . = ALIGN(4);
+ _etext = .;
+ _textdata = _etext;
+
+ .data :
+ {
+ _data = .;
+ *(.data)
+ . = ALIGN(4);
+ *(.data.*)
+ . = ALIGN(4);
+ *(.ramtext)
+ . = ALIGN(4);
+ _edata = .;
+ } > ram AT > flash
+
+ .bss :
+ {
+ _bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ *(.bss.*)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ } > ram
+}
+
+PROVIDE(end = .);
+_end = .;
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__ - __stacks_total_size__;
diff --git a/testhal/LPC13xx/IRQ_STORM/ch.map b/testhal/LPC13xx/IRQ_STORM/ch.map new file mode 100644 index 000000000..95c41185f --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/ch.map @@ -0,0 +1,2983 @@ +Archive member included because of file (symbol)
+
+c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o)
+ ../../../os/various/syscalls.o (memset)
+
+Allocating common symbols
+Common symbol size file
+
+GPTD2 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+test_timer_done 0x4 ../../../test/test.o
+GPTD4 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+GPTD1 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+threads 0x14 ../../../test/test.o
+test 0x578 ../../../test/test.o
+GPTD3 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+vtlist 0x10 ../../../os/kernel/src/chvt.o
+rlist 0x20 ../../../os/kernel/src/chschd.o
+_idle_thread_wa 0xa0 ../../../os/kernel/src/chsys.o
+SD1 0x74 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+
+Discarded input sections
+
+ .data 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+ .bss 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+ .text 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ .data 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ .bss 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ .text 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore.o
+ .data 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore.o
+ .bss 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore.o
+ .text.port_halt
+ 0x00000000 0x4 ../../../os/ports/GCC/ARMCMx/chcore.o
+ .text 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ .data 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ .bss 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ .text 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/nvic.o
+ .data 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/nvic.o
+ .bss 0x00000000 0x0 ../../../os/ports/GCC/ARMCMx/nvic.o
+ .text.NVICDisableVector
+ 0x00000000 0x3c ../../../os/ports/GCC/ARMCMx/nvic.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chsys.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chsys.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chsys.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chdebug.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chdebug.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chdebug.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chlists.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chlists.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chlists.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chvt.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chvt.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chvt.o
+ .text.chTimeIsWithin
+ 0x00000000 0x34 ../../../os/kernel/src/chvt.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chschd.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chschd.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chschd.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chthreads.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chthreads.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chthreads.o
+ .text.chThdSetPriority
+ 0x00000000 0x30 ../../../os/kernel/src/chthreads.o
+ .text.chThdResume
+ 0x00000000 0x1c ../../../os/kernel/src/chthreads.o
+ .text.chThdTerminate
+ 0x00000000 0x18 ../../../os/kernel/src/chthreads.o
+ .text.chThdSleepUntil
+ 0x00000000 0x24 ../../../os/kernel/src/chthreads.o
+ .text.chThdYield
+ 0x00000000 0x28 ../../../os/kernel/src/chthreads.o
+ .text.chThdWait
+ 0x00000000 0x38 ../../../os/kernel/src/chthreads.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chdynamic.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chdynamic.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chdynamic.o
+ .text.chThdAddRef
+ 0x00000000 0x14 ../../../os/kernel/src/chdynamic.o
+ .text.chThdRelease
+ 0x00000000 0x54 ../../../os/kernel/src/chdynamic.o
+ .text.chThdCreateFromHeap
+ 0x00000000 0x44 ../../../os/kernel/src/chdynamic.o
+ .text.chThdCreateFromMemoryPool
+ 0x00000000 0x44 ../../../os/kernel/src/chdynamic.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chregistry.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chregistry.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chregistry.o
+ .text.chRegFirstThread
+ 0x00000000 0x20 ../../../os/kernel/src/chregistry.o
+ .text.chRegNextThread
+ 0x00000000 0x2c ../../../os/kernel/src/chregistry.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chsem.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chsem.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chsem.o
+ .text.chSemResetI
+ 0x00000000 0x28 ../../../os/kernel/src/chsem.o
+ .text.chSemReset
+ 0x00000000 0x18 ../../../os/kernel/src/chsem.o
+ .text.chSemWaitS
+ 0x00000000 0x34 ../../../os/kernel/src/chsem.o
+ .text.chSemWait
+ 0x00000000 0x14 ../../../os/kernel/src/chsem.o
+ .text.chSemWaitTimeout
+ 0x00000000 0x14 ../../../os/kernel/src/chsem.o
+ .text.chSemSignal
+ 0x00000000 0x2c ../../../os/kernel/src/chsem.o
+ .text.chSemSetCounterI
+ 0x00000000 0x28 ../../../os/kernel/src/chsem.o
+ .text.chSemSignalWait
+ 0x00000000 0x64 ../../../os/kernel/src/chsem.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chmtx.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chmtx.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chmtx.o
+ .text.chMtxLockS
+ 0x00000000 0xcc ../../../os/kernel/src/chmtx.o
+ .text.chMtxLock
+ 0x00000000 0x14 ../../../os/kernel/src/chmtx.o
+ .text.chMtxTryLock
+ 0x00000000 0x2c ../../../os/kernel/src/chmtx.o
+ .text.chMtxTryLockS
+ 0x00000000 0x20 ../../../os/kernel/src/chmtx.o
+ .text.chMtxUnlock
+ 0x00000000 0x60 ../../../os/kernel/src/chmtx.o
+ .text.chMtxUnlockS
+ 0x00000000 0x50 ../../../os/kernel/src/chmtx.o
+ .text.chMtxUnlockAll
+ 0x00000000 0x54 ../../../os/kernel/src/chmtx.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chcond.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chcond.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chcond.o
+ .text.chCondInit
+ 0x00000000 0x8 ../../../os/kernel/src/chcond.o
+ .text.chCondSignal
+ 0x00000000 0x24 ../../../os/kernel/src/chcond.o
+ .text.chCondSignalI
+ 0x00000000 0x1c ../../../os/kernel/src/chcond.o
+ .text.chCondBroadcastI
+ 0x00000000 0x24 ../../../os/kernel/src/chcond.o
+ .text.chCondBroadcast
+ 0x00000000 0x18 ../../../os/kernel/src/chcond.o
+ .text.chCondWaitS
+ 0x00000000 0x48 ../../../os/kernel/src/chcond.o
+ .text.chCondWait
+ 0x00000000 0x14 ../../../os/kernel/src/chcond.o
+ .text.chCondWaitTimeoutS
+ 0x00000000 0x58 ../../../os/kernel/src/chcond.o
+ .text.chCondWaitTimeout
+ 0x00000000 0x14 ../../../os/kernel/src/chcond.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chevents.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chevents.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chevents.o
+ .text.chEvtRegisterMask
+ 0x00000000 0x2c ../../../os/kernel/src/chevents.o
+ .text.chEvtUnregister
+ 0x00000000 0x24 ../../../os/kernel/src/chevents.o
+ .text.chEvtClearFlags
+ 0x00000000 0x24 ../../../os/kernel/src/chevents.o
+ .text.chEvtAddFlags
+ 0x00000000 0x20 ../../../os/kernel/src/chevents.o
+ .text.chEvtSignalFlags
+ 0x00000000 0x18 ../../../os/kernel/src/chevents.o
+ .text.chEvtBroadcastFlags
+ 0x00000000 0x18 ../../../os/kernel/src/chevents.o
+ .text.chEvtDispatch
+ 0x00000000 0x34 ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitOne
+ 0x00000000 0x3c ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitAny
+ 0x00000000 0x34 ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitAll
+ 0x00000000 0x38 ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitOneTimeout
+ 0x00000000 0x54 ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitAnyTimeout
+ 0x00000000 0x50 ../../../os/kernel/src/chevents.o
+ .text.chEvtWaitAllTimeout
+ 0x00000000 0x54 ../../../os/kernel/src/chevents.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chmsg.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chmsg.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chmsg.o
+ .text.chMsgSend
+ 0x00000000 0x44 ../../../os/kernel/src/chmsg.o
+ .text.chMsgWait
+ 0x00000000 0x3c ../../../os/kernel/src/chmsg.o
+ .text.chMsgRelease
+ 0x00000000 0x14 ../../../os/kernel/src/chmsg.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chmboxes.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chmboxes.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chmboxes.o
+ .text.chMBReset
+ 0x00000000 0x34 ../../../os/kernel/src/chmboxes.o
+ .text.chMBPostAheadS
+ 0x00000000 0x3c ../../../os/kernel/src/chmboxes.o
+ .text.chMBPostAhead
+ 0x00000000 0x14 ../../../os/kernel/src/chmboxes.o
+ .text.chMBPostAheadI
+ 0x00000000 0x34 ../../../os/kernel/src/chmboxes.o
+ .text.chMBFetchI
+ 0x00000000 0x30 ../../../os/kernel/src/chmboxes.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chqueues.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chqueues.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chqueues.o
+ .text.chIQGetFullI
+ 0x00000000 0x8 ../../../os/kernel/src/chqueues.o
+ .text.chIQResetI
+ 0x00000000 0x18 ../../../os/kernel/src/chqueues.o
+ .text.chOQGetFullI
+ 0x00000000 0x18 ../../../os/kernel/src/chqueues.o
+ .text.chOQResetI
+ 0x00000000 0x18 ../../../os/kernel/src/chqueues.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chmemcore.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chmemcore.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chmemcore.o
+ .text.chCoreAllocI
+ 0x00000000 0x28 ../../../os/kernel/src/chmemcore.o
+ .text.chCoreStatus
+ 0x00000000 0x18 ../../../os/kernel/src/chmemcore.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chheap.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chheap.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chheap.o
+ .text.chHeapInit
+ 0x00000000 0x24 ../../../os/kernel/src/chheap.o
+ .text.chHeapAlloc
+ 0x00000000 0x90 ../../../os/kernel/src/chheap.o
+ .text.chHeapFree
+ 0x00000000 0xa0 ../../../os/kernel/src/chheap.o
+ .text.chHeapStatus
+ 0x00000000 0x40 ../../../os/kernel/src/chheap.o
+ .text 0x00000000 0x0 ../../../os/kernel/src/chmempools.o
+ .data 0x00000000 0x0 ../../../os/kernel/src/chmempools.o
+ .bss 0x00000000 0x0 ../../../os/kernel/src/chmempools.o
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+ .text.gpt_lld_polled_delay
+ 0x00000000 0x20 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ .text 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ .data 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ .bss 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ .text._pal_lld_setgroupmode
+ 0x00000000 0x38 ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ .text 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ .data 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ .bss 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ .text.sd_lld_stop
+ 0x00000000 0x60 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ .text 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/spi_lld.o
+ .data 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/spi_lld.o
+ .bss 0x00000000 0x0 ../../../os/hal/platforms/LPC13xx/spi_lld.o
+ .text 0x00000000 0x0 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ .data 0x00000000 0x0 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ .bss 0x00000000 0x0 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ .text 0x00000000 0x0 ../../../os/various/evtimer.o
+ .data 0x00000000 0x0 ../../../os/various/evtimer.o
+ .bss 0x00000000 0x0 ../../../os/various/evtimer.o
+ .text.tmrcb 0x00000000 0x24 ../../../os/various/evtimer.o
+ .text.evtStart
+ 0x00000000 0x24 ../../../os/various/evtimer.o
+ .text.evtStop 0x00000000 0x18 ../../../os/various/evtimer.o
+ .text 0x00000000 0x0 ../../../os/various/syscalls.o
+ .data 0x00000000 0x0 ../../../os/various/syscalls.o
+ .bss 0x00000000 0x0 ../../../os/various/syscalls.o
+ .text._read_r 0x00000000 0xc ../../../os/various/syscalls.o
+ .text._lseek_r
+ 0x00000000 0x4 ../../../os/various/syscalls.o
+ .text._write_r
+ 0x00000000 0x4 ../../../os/various/syscalls.o
+ .text._close_r
+ 0x00000000 0x4 ../../../os/various/syscalls.o
+ .text._sbrk_r 0x00000000 0x18 ../../../os/various/syscalls.o
+ .text._fstat_r
+ 0x00000000 0x18 ../../../os/various/syscalls.o
+ .text._isatty_r
+ 0x00000000 0x4 ../../../os/various/syscalls.o
+ .text 0x00000000 0x0 main.o
+ .data 0x00000000 0x0 main.o
+ .bss 0x00000000 0x0 main.o
+ .text 0x00000000 0x9c c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o)
+ .data 0x00000000 0x0 c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o)
+ .bss 0x00000000 0x0 c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o)
+
+Memory Configuration
+
+Name Origin Length Attributes
+flash 0x00000000 0x00008000
+ram 0x10000000 0x00002000
+*default* 0x00000000 0xffffffff
+
+Linker script and memory map
+
+LOAD ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+LOAD ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+LOAD ../../../os/ports/GCC/ARMCMx/chcore.o
+LOAD ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+LOAD ../../../os/ports/GCC/ARMCMx/nvic.o
+LOAD ../../../os/kernel/src/chsys.o
+LOAD ../../../os/kernel/src/chdebug.o
+LOAD ../../../os/kernel/src/chlists.o
+LOAD ../../../os/kernel/src/chvt.o
+LOAD ../../../os/kernel/src/chschd.o
+LOAD ../../../os/kernel/src/chthreads.o
+LOAD ../../../os/kernel/src/chdynamic.o
+LOAD ../../../os/kernel/src/chregistry.o
+LOAD ../../../os/kernel/src/chsem.o
+LOAD ../../../os/kernel/src/chmtx.o
+LOAD ../../../os/kernel/src/chcond.o
+LOAD ../../../os/kernel/src/chevents.o
+LOAD ../../../os/kernel/src/chmsg.o
+LOAD ../../../os/kernel/src/chmboxes.o
+LOAD ../../../os/kernel/src/chqueues.o
+LOAD ../../../os/kernel/src/chmemcore.o
+LOAD ../../../os/kernel/src/chheap.o
+LOAD ../../../os/kernel/src/chmempools.o
+LOAD ../../../test/test.o
+LOAD ../../../test/testthd.o
+LOAD ../../../test/testsem.o
+LOAD ../../../test/testmtx.o
+LOAD ../../../test/testmsg.o
+LOAD ../../../test/testmbox.o
+LOAD ../../../test/testevt.o
+LOAD ../../../test/testheap.o
+LOAD ../../../test/testpools.o
+LOAD ../../../test/testdyn.o
+LOAD ../../../test/testqueues.o
+LOAD ../../../test/testbmk.o
+LOAD ../../../os/hal/src/hal.o
+LOAD ../../../os/hal/src/adc.o
+LOAD ../../../os/hal/src/can.o
+LOAD ../../../os/hal/src/gpt.o
+LOAD ../../../os/hal/src/i2c.o
+LOAD ../../../os/hal/src/mac.o
+LOAD ../../../os/hal/src/pal.o
+LOAD ../../../os/hal/src/pwm.o
+LOAD ../../../os/hal/src/serial.o
+LOAD ../../../os/hal/src/spi.o
+LOAD ../../../os/hal/src/uart.o
+LOAD ../../../os/hal/src/usb.o
+LOAD ../../../os/hal/src/mmc_spi.o
+LOAD ../../../os/hal/src/serial_usb.o
+LOAD ../../../os/hal/platforms/LPC13xx/hal_lld.o
+LOAD ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+LOAD ../../../os/hal/platforms/LPC13xx/pal_lld.o
+LOAD ../../../os/hal/platforms/LPC13xx/serial_lld.o
+LOAD ../../../os/hal/platforms/LPC13xx/spi_lld.o
+LOAD ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+LOAD ../../../os/various/evtimer.o
+LOAD ../../../os/various/syscalls.o
+LOAD main.o
+START GROUP
+LOAD c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/thumb/v7m\libgcc.a
+LOAD c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a
+END GROUP
+ 0x00000100 __main_stack_size__ = 0x100
+ 0x00000100 __process_stack_size__ = 0x100
+ 0x00000200 __stacks_total_size__ = (__main_stack_size__ + __process_stack_size__)
+ 0x10000000 __ram_start__ = ORIGIN (ram)
+ 0x00002000 __ram_size__ = 0x2000
+ 0x10002000 __ram_end__ = (__ram_start__ + __ram_size__)
+ 0x00000000 . = 0x0
+
+.text 0x00000000 0x1bb8
+ 0x00000000 _text = .
+ *(vectors)
+ vectors 0x00000000 0x120 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ 0x00000000 _vectors
+ *(.text)
+ .text 0x00000120 0x64 ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+ 0x00000120 ResetHandler
+ 0x00000164 _main_exit_handler
+ *(.text.*)
+ *fill* 0x00000184 0xc 00
+ .text._unhandled_exception
+ 0x00000190 0x4 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ 0x00000190 Vector58
+ 0x00000190 Vector9C
+ 0x00000190 VectorAC
+ 0x00000190 Vector5C
+ 0x00000190 NMIVector
+ 0x00000190 Vector11C
+ 0x00000190 Vector8C
+ 0x00000190 VectorDC
+ 0x00000190 Vector110
+ 0x00000190 VectorC8
+ 0x00000190 Vector94
+ 0x00000190 VectorA8
+ 0x00000190 VectorB4
+ 0x00000190 Vector74
+ 0x00000190 UsageFaultVector
+ 0x00000190 DebugMonitorVector
+ 0x00000190 Vector40
+ 0x00000190 Vector108
+ 0x00000190 VectorBC
+ 0x00000190 PendSVVector
+ 0x00000190 Vector118
+ 0x00000190 Vector64
+ 0x00000190 VectorCC
+ 0x00000190 Vector54
+ 0x00000190 Vector98
+ 0x00000190 VectorD8
+ 0x00000190 Vector24
+ 0x00000190 Vector84
+ 0x00000190 BusFaultVector
+ 0x00000190 VectorD0
+ 0x00000190 VectorC0
+ 0x00000190 HardFaultVector
+ 0x00000190 Vector100
+ 0x00000190 VectorE0
+ 0x00000190 VectorF4
+ 0x00000190 MemManageVector
+ 0x00000190 Vector6C
+ 0x00000190 VectorA0
+ 0x00000190 VectorC4
+ 0x00000190 Vector7C
+ 0x00000190 VectorB0
+ 0x00000190 Vector90
+ 0x00000190 Vector114
+ 0x00000190 Vector60
+ 0x00000190 Vector1C
+ 0x00000190 Vector48
+ 0x00000190 Vector70
+ 0x00000190 VectorD4
+ 0x00000190 Vector4C
+ 0x00000190 Vector80
+ 0x00000190 Vector68
+ 0x00000190 Vector78
+ 0x00000190 _unhandled_exception
+ 0x00000190 Vector88
+ 0x00000190 Vector104
+ 0x00000190 Vector10C
+ 0x00000190 Vector50
+ 0x00000190 Vector44
+ 0x00000190 Vector28
+ 0x00000190 VectorB8
+ 0x00000190 VectorFC
+ 0x00000190 Vector34
+ 0x00000190 VectorA4
+ 0x00000190 Vector20
+ *fill* 0x00000194 0xc 00
+ .text._port_switch_from_isr
+ 0x000001a0 0x8 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x000001a0 _port_switch_from_isr
+ *fill* 0x000001a8 0x8 00
+ .text.SVCallVector
+ 0x000001b0 0x14 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x000001b0 SVCallVector
+ *fill* 0x000001c4 0xc 00
+ .text._port_irq_epilogue
+ 0x000001d0 0x44 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x000001d0 _port_irq_epilogue
+ *fill* 0x00000214 0xc 00
+ .text.SysTickVector
+ 0x00000220 0x18 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x00000220 SysTickVector
+ *fill* 0x00000238 0x8 00
+ .text.port_switch
+ 0x00000240 0x10 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x00000240 port_switch
+ .text._port_thread_start
+ 0x00000250 0x10 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ 0x00000250 _port_thread_start
+ .text.NVICEnableVector
+ 0x00000260 0x4c ../../../os/ports/GCC/ARMCMx/nvic.o
+ 0x00000260 NVICEnableVector
+ *fill* 0x000002ac 0x4 00
+ .text.NVICSetSystemHandlerPriority
+ 0x000002b0 0x30 ../../../os/ports/GCC/ARMCMx/nvic.o
+ 0x000002b0 NVICSetSystemHandlerPriority
+ .text._idle_thread
+ 0x000002e0 0x4 ../../../os/kernel/src/chsys.o
+ 0x000002e0 _idle_thread
+ *fill* 0x000002e4 0xc 00
+ .text.chSysInit
+ 0x000002f0 0x78 ../../../os/kernel/src/chsys.o
+ 0x000002f0 chSysInit
+ *fill* 0x00000368 0x8 00
+ .text.chSysTimerHandlerI
+ 0x00000370 0x50 ../../../os/kernel/src/chsys.o
+ 0x00000370 chSysTimerHandlerI
+ .text.vt_init 0x000003c0 0x18 ../../../os/kernel/src/chvt.o
+ 0x000003c0 vt_init
+ *fill* 0x000003d8 0x8 00
+ .text.chVTSetI
+ 0x000003e0 0x3c ../../../os/kernel/src/chvt.o
+ 0x000003e0 chVTSetI
+ *fill* 0x0000041c 0x4 00
+ .text.chVTResetI
+ 0x00000420 0x24 ../../../os/kernel/src/chvt.o
+ 0x00000420 chVTResetI
+ *fill* 0x00000444 0xc 00
+ .text.wakeup 0x00000450 0x48 ../../../os/kernel/src/chschd.o
+ *fill* 0x00000498 0x8 00
+ .text.scheduler_init
+ 0x000004a0 0x1c ../../../os/kernel/src/chschd.o
+ 0x000004a0 scheduler_init
+ *fill* 0x000004bc 0x4 00
+ .text.chSchReadyI
+ 0x000004c0 0x20 ../../../os/kernel/src/chschd.o
+ 0x000004c0 chSchReadyI
+ .text.chSchGoSleepS
+ 0x000004e0 0x2c ../../../os/kernel/src/chschd.o
+ 0x000004e0 chSchGoSleepS
+ *fill* 0x0000050c 0x4 00
+ .text.chSchGoSleepTimeoutS
+ 0x00000510 0x44 ../../../os/kernel/src/chschd.o
+ 0x00000510 chSchGoSleepTimeoutS
+ *fill* 0x00000554 0xc 00
+ .text.chSchWakeupS
+ 0x00000560 0x60 ../../../os/kernel/src/chschd.o
+ 0x00000560 chSchWakeupS
+ .text.chSchDoRescheduleI
+ 0x000005c0 0x44 ../../../os/kernel/src/chschd.o
+ 0x000005c0 chSchDoRescheduleI
+ *fill* 0x00000604 0xc 00
+ .text.chSchRescheduleS
+ 0x00000610 0x1c ../../../os/kernel/src/chschd.o
+ 0x00000610 chSchRescheduleS
+ *fill* 0x0000062c 0x4 00
+ .text.chSchIsRescRequiredExI
+ 0x00000630 0x28 ../../../os/kernel/src/chschd.o
+ 0x00000630 chSchIsRescRequiredExI
+ *fill* 0x00000658 0x8 00
+ .text._thread_init
+ 0x00000660 0x4c ../../../os/kernel/src/chthreads.o
+ 0x00000660 _thread_init
+ *fill* 0x000006ac 0x4 00
+ .text.chThdCreateI
+ 0x000006b0 0x5c ../../../os/kernel/src/chthreads.o
+ 0x000006b0 chThdCreateI
+ *fill* 0x0000070c 0x4 00
+ .text.chThdCreateStatic
+ 0x00000710 0x30 ../../../os/kernel/src/chthreads.o
+ 0x00000710 chThdCreateStatic
+ .text.chThdSleep
+ 0x00000740 0x18 ../../../os/kernel/src/chthreads.o
+ 0x00000740 chThdSleep
+ *fill* 0x00000758 0x8 00
+ .text.chThdExit
+ 0x00000760 0x48 ../../../os/kernel/src/chthreads.o
+ 0x00000760 chThdExit
+ *fill* 0x000007a8 0x8 00
+ .text.chSemInit
+ 0x000007b0 0x8 ../../../os/kernel/src/chsem.o
+ 0x000007b0 chSemInit
+ *fill* 0x000007b8 0x8 00
+ .text.chSemWaitTimeoutS
+ 0x000007c0 0x40 ../../../os/kernel/src/chsem.o
+ 0x000007c0 chSemWaitTimeoutS
+ .text.chSemSignalI
+ 0x00000800 0x24 ../../../os/kernel/src/chsem.o
+ 0x00000800 chSemSignalI
+ *fill* 0x00000824 0xc 00
+ .text.chMtxInit
+ 0x00000830 0xc ../../../os/kernel/src/chmtx.o
+ 0x00000830 chMtxInit
+ *fill* 0x0000083c 0x4 00
+ .text.chEvtSignalFlagsI
+ 0x00000840 0x38 ../../../os/kernel/src/chevents.o
+ 0x00000840 chEvtSignalFlagsI
+ *fill* 0x00000878 0x8 00
+ .text.chEvtBroadcastFlagsI
+ 0x00000880 0x20 ../../../os/kernel/src/chevents.o
+ 0x00000880 chEvtBroadcastFlagsI
+ .text.chMBInit
+ 0x000008a0 0x2c ../../../os/kernel/src/chmboxes.o
+ 0x000008a0 chMBInit
+ *fill* 0x000008cc 0x4 00
+ .text.chMBPostS
+ 0x000008d0 0x38 ../../../os/kernel/src/chmboxes.o
+ 0x000008d0 chMBPostS
+ *fill* 0x00000908 0x8 00
+ .text.chMBPost
+ 0x00000910 0x14 ../../../os/kernel/src/chmboxes.o
+ 0x00000910 chMBPost
+ *fill* 0x00000924 0xc 00
+ .text.chMBPostI
+ 0x00000930 0x34 ../../../os/kernel/src/chmboxes.o
+ 0x00000930 chMBPostI
+ *fill* 0x00000964 0xc 00
+ .text.chMBFetchS
+ 0x00000970 0x38 ../../../os/kernel/src/chmboxes.o
+ 0x00000970 chMBFetchS
+ *fill* 0x000009a8 0x8 00
+ .text.chMBFetch
+ 0x000009b0 0x14 ../../../os/kernel/src/chmboxes.o
+ 0x000009b0 chMBFetch
+ *fill* 0x000009c4 0xc 00
+ .text.chIQInit
+ 0x000009d0 0x1c ../../../os/kernel/src/chqueues.o
+ 0x000009d0 chIQInit
+ *fill* 0x000009ec 0x4 00
+ .text.chIQPutI
+ 0x000009f0 0x34 ../../../os/kernel/src/chqueues.o
+ 0x000009f0 chIQPutI
+ *fill* 0x00000a24 0xc 00
+ .text.chIQGetTimeout
+ 0x00000a30 0x44 ../../../os/kernel/src/chqueues.o
+ 0x00000a30 chIQGetTimeout
+ *fill* 0x00000a74 0xc 00
+ .text.chIQReadTimeout
+ 0x00000a80 0x88 ../../../os/kernel/src/chqueues.o
+ 0x00000a80 chIQReadTimeout
+ *fill* 0x00000b08 0x8 00
+ .text.chOQInit
+ 0x00000b10 0x20 ../../../os/kernel/src/chqueues.o
+ 0x00000b10 chOQInit
+ .text.chOQPutTimeout
+ 0x00000b30 0x48 ../../../os/kernel/src/chqueues.o
+ 0x00000b30 chOQPutTimeout
+ *fill* 0x00000b78 0x8 00
+ .text.chOQGetI
+ 0x00000b80 0x38 ../../../os/kernel/src/chqueues.o
+ 0x00000b80 chOQGetI
+ *fill* 0x00000bb8 0x8 00
+ .text.chOQWriteTimeout
+ 0x00000bc0 0x88 ../../../os/kernel/src/chqueues.o
+ 0x00000bc0 chOQWriteTimeout
+ *fill* 0x00000c48 0x8 00
+ .text.core_init
+ 0x00000c50 0x2c ../../../os/kernel/src/chmemcore.o
+ 0x00000c50 core_init
+ *fill* 0x00000c7c 0x4 00
+ .text.chCoreAlloc
+ 0x00000c80 0x34 ../../../os/kernel/src/chmemcore.o
+ 0x00000c80 chCoreAlloc
+ *fill* 0x00000cb4 0xc 00
+ .text.heap_init
+ 0x00000cc0 0x24 ../../../os/kernel/src/chheap.o
+ 0x00000cc0 heap_init
+ *fill* 0x00000ce4 0xc 00
+ .text.halInit 0x00000cf0 0x20 ../../../os/hal/src/hal.o
+ 0x00000cf0 halInit
+ .text.gptInit 0x00000d10 0x8 ../../../os/hal/src/gpt.o
+ 0x00000d10 gptInit
+ *fill* 0x00000d18 0x8 00
+ .text.gptObjectInit
+ 0x00000d20 0xc ../../../os/hal/src/gpt.o
+ 0x00000d20 gptObjectInit
+ *fill* 0x00000d2c 0x4 00
+ .text.gptStart
+ 0x00000d30 0x1c ../../../os/hal/src/gpt.o
+ 0x00000d30 gptStart
+ *fill* 0x00000d4c 0x4 00
+ .text.gptStartContinuous
+ 0x00000d50 0x18 ../../../os/hal/src/gpt.o
+ 0x00000d50 gptStartContinuous
+ *fill* 0x00000d68 0x8 00
+ .text.gptStopTimer
+ 0x00000d70 0x18 ../../../os/hal/src/gpt.o
+ 0x00000d70 gptStopTimer
+ *fill* 0x00000d88 0x8 00
+ .text.putwouldblock
+ 0x00000d90 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000d9c 0x4 00
+ .text.getwouldblock
+ 0x00000da0 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000dac 0x4 00
+ .text.getflags
+ 0x00000db0 0x18 ../../../os/hal/src/serial.o
+ *fill* 0x00000dc8 0x8 00
+ .text.readt 0x00000dd0 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000ddc 0x4 00
+ .text.reads 0x00000de0 0x10 ../../../os/hal/src/serial.o
+ .text.writet 0x00000df0 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000dfc 0x4 00
+ .text.writes 0x00000e00 0x10 ../../../os/hal/src/serial.o
+ .text.gett 0x00000e10 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000e1c 0x4 00
+ .text.putt 0x00000e20 0xc ../../../os/hal/src/serial.o
+ *fill* 0x00000e2c 0x4 00
+ .text.sdInit 0x00000e30 0x8 ../../../os/hal/src/serial.o
+ 0x00000e30 sdInit
+ *fill* 0x00000e38 0x8 00
+ .text.sdObjectInit
+ 0x00000e40 0x4c ../../../os/hal/src/serial.o
+ 0x00000e40 sdObjectInit
+ *fill* 0x00000e8c 0x4 00
+ .text.sdStart 0x00000e90 0x1c ../../../os/hal/src/serial.o
+ 0x00000e90 sdStart
+ *fill* 0x00000eac 0x4 00
+ .text.hal_lld_init
+ 0x00000eb0 0x28 ../../../os/hal/platforms/LPC13xx/hal_lld.o
+ 0x00000eb0 hal_lld_init
+ *fill* 0x00000ed8 0x8 00
+ .text.LPC13xx_clock_init
+ 0x00000ee0 0xa0 ../../../os/hal/platforms/LPC13xx/hal_lld.o
+ 0x00000ee0 LPC13xx_clock_init
+ .text.VectorE4
+ 0x00000f80 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x00000f80 VectorE4
+ *fill* 0x00000fb4 0xc 00
+ .text.VectorE8
+ 0x00000fc0 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x00000fc0 VectorE8
+ *fill* 0x00000ff4 0xc 00
+ .text.VectorEC
+ 0x00001000 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x00001000 VectorEC
+ *fill* 0x00001034 0xc 00
+ .text.VectorF0
+ 0x00001040 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x00001040 VectorF0
+ *fill* 0x00001074 0xc 00
+ .text.gpt_lld_init
+ 0x00001080 0x60 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x00001080 gpt_lld_init
+ .text.gpt_lld_start
+ 0x000010e0 0xd0 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x000010e0 gpt_lld_start
+ .text.gpt_lld_start_timer
+ 0x000011b0 0x18 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x000011b0 gpt_lld_start_timer
+ *fill* 0x000011c8 0x8 00
+ .text.gpt_lld_stop_timer
+ 0x000011d0 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ 0x000011d0 gpt_lld_stop_timer
+ .text._pal_lld_init
+ 0x000011e0 0x64 ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ 0x000011e0 _pal_lld_init
+ *fill* 0x00001244 0xc 00
+ .text.notify1 0x00001250 0x4c ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ *fill* 0x0000129c 0x4 00
+ .text.VectorF8
+ 0x000012a0 0x130 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ 0x000012a0 VectorF8
+ .text.sd_lld_init
+ 0x000013d0 0x38 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ 0x000013d0 sd_lld_init
+ *fill* 0x00001408 0x8 00
+ .text.sd_lld_start
+ 0x00001410 0x84 ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ 0x00001410 sd_lld_start
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+
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+DebugMonitorVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+GPTD1 main.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+GPTD2 main.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+GPTD3 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+GPTD4 ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+HardFaultVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+LPC13xx_clock_init ../../../os/hal/platforms/LPC13xx/hal_lld.o
+ ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+MemManageVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+NMIVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+NVICDisableVector ../../../os/ports/GCC/ARMCMx/nvic.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+NVICEnableVector ../../../os/ports/GCC/ARMCMx/nvic.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+NVICSetSystemHandlerPriority ../../../os/ports/GCC/ARMCMx/nvic.o
+ ../../../os/hal/platforms/LPC13xx/hal_lld.o
+ ../../../os/kernel/src/chsys.o
+PendSVVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ResetHandler ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+ ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+SD1 main.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+SVCallVector ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+SysTickVector ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+TestThread ../../../test/test.o
+UsageFaultVector ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
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+__early_init ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+__heap_base__ ../../../os/kernel/src/chmemcore.o
+__heap_end__ ../../../os/kernel/src/chmemcore.o
+__main_stack_size__ ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+__ram_end__ ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+ ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
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+_lseek_r ../../../os/various/syscalls.o
+_main_exit_handler ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+_pal_lld_init ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ ../../../os/hal/src/hal.o
+_pal_lld_setgroupmode ../../../os/hal/platforms/LPC13xx/pal_lld.o
+ ../../../os/hal/src/pal.o
+_port_irq_epilogue ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+_port_switch_from_isr ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+_port_thread_start ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ ../../../os/kernel/src/chthreads.o
+_read_r ../../../os/various/syscalls.o
+_sbrk_r ../../../os/various/syscalls.o
+_test_assert ../../../test/test.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testpools.o
+ ../../../test/testheap.o
+ ../../../test/testevt.o
+ ../../../test/testmbox.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+_test_assert_sequence ../../../test/test.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmbox.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+_test_assert_time_window ../../../test/test.o
+ ../../../test/testevt.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+_test_fail ../../../test/test.o
+_textdata ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+_thread_init ../../../os/kernel/src/chthreads.o
+ ../../../os/kernel/src/chsys.o
+_unhandled_exception ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+_vectors ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o
+_write_r ../../../os/various/syscalls.o
+boardInit ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ ../../../os/hal/src/hal.o
+chCondBroadcast ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondBroadcastI ../../../os/kernel/src/chcond.o
+chCondInit ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondSignal ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondSignalI ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondWait ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondWaitS ../../../os/kernel/src/chcond.o
+chCondWaitTimeout ../../../os/kernel/src/chcond.o
+ ../../../test/testmtx.o
+chCondWaitTimeoutS ../../../os/kernel/src/chcond.o
+chCoreAlloc ../../../os/kernel/src/chmemcore.o
+ ../../../os/various/syscalls.o
+ ../../../os/kernel/src/chheap.o
+chCoreAllocI ../../../os/kernel/src/chmemcore.o
+chCoreStatus ../../../os/kernel/src/chmemcore.o
+ ../../../test/testheap.o
+chEvtAddFlags ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtBroadcastFlags ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtBroadcastFlagsI ../../../os/kernel/src/chevents.o
+ ../../../os/various/evtimer.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+chEvtClearFlags ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtDispatch ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtRegisterMask ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtSignalFlags ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtSignalFlagsI ../../../os/kernel/src/chevents.o
+chEvtUnregister ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitAll ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitAllTimeout ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitAny ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitAnyTimeout ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitOne ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chEvtWaitOneTimeout ../../../os/kernel/src/chevents.o
+ ../../../test/testevt.o
+chHeapAlloc ../../../os/kernel/src/chheap.o
+ ../../../test/testdyn.o
+ ../../../test/testheap.o
+ ../../../os/kernel/src/chdynamic.o
+chHeapFree ../../../os/kernel/src/chheap.o
+ ../../../test/testdyn.o
+ ../../../test/testheap.o
+ ../../../os/kernel/src/chdynamic.o
+chHeapInit ../../../os/kernel/src/chheap.o
+ ../../../test/testdyn.o
+ ../../../test/testheap.o
+chHeapStatus ../../../os/kernel/src/chheap.o
+ ../../../test/testdyn.o
+ ../../../test/testheap.o
+chIQGetFullI ../../../os/kernel/src/chqueues.o
+ ../../../test/testqueues.o
+chIQGetTimeout ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+chIQInit ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+chIQPutI ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+chIQReadTimeout ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chIQResetI ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chMBFetch ../../../os/kernel/src/chmboxes.o
+ main.o
+ ../../../test/testmbox.o
+chMBFetchI ../../../os/kernel/src/chmboxes.o
+ ../../../test/testmbox.o
+chMBFetchS ../../../os/kernel/src/chmboxes.o
+chMBInit ../../../os/kernel/src/chmboxes.o
+ main.o
+ ../../../test/testmbox.o
+chMBPost ../../../os/kernel/src/chmboxes.o
+ main.o
+ ../../../test/testmbox.o
+chMBPostAhead ../../../os/kernel/src/chmboxes.o
+ ../../../test/testmbox.o
+chMBPostAheadI ../../../os/kernel/src/chmboxes.o
+ ../../../test/testmbox.o
+chMBPostAheadS ../../../os/kernel/src/chmboxes.o
+chMBPostI ../../../os/kernel/src/chmboxes.o
+ main.o
+ ../../../test/testmbox.o
+chMBPostS ../../../os/kernel/src/chmboxes.o
+chMBReset ../../../os/kernel/src/chmboxes.o
+ ../../../test/testmbox.o
+chMsgRelease ../../../os/kernel/src/chmsg.o
+ ../../../test/testbmk.o
+ ../../../test/testmsg.o
+chMsgSend ../../../os/kernel/src/chmsg.o
+ ../../../test/testbmk.o
+ ../../../test/testmsg.o
+chMsgWait ../../../os/kernel/src/chmsg.o
+ ../../../test/testbmk.o
+ ../../../test/testmsg.o
+chMtxInit ../../../os/kernel/src/chmtx.o
+ ../../../test/testbmk.o
+ ../../../test/testmtx.o
+ ../../../os/kernel/src/chheap.o
+chMtxLock ../../../os/kernel/src/chmtx.o
+ ../../../test/testbmk.o
+ ../../../test/testmtx.o
+ ../../../os/kernel/src/chheap.o
+chMtxLockS ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chcond.o
+chMtxTryLock ../../../os/kernel/src/chmtx.o
+ ../../../test/testmtx.o
+chMtxTryLockS ../../../os/kernel/src/chmtx.o
+chMtxUnlock ../../../os/kernel/src/chmtx.o
+ ../../../test/testbmk.o
+ ../../../test/testmtx.o
+ ../../../os/kernel/src/chheap.o
+chMtxUnlockAll ../../../os/kernel/src/chmtx.o
+ ../../../test/testmtx.o
+chMtxUnlockS ../../../os/kernel/src/chmtx.o
+ ../../../test/testmtx.o
+ ../../../os/kernel/src/chcond.o
+chOQGetFullI ../../../os/kernel/src/chqueues.o
+ ../../../test/testqueues.o
+chOQGetI ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chOQInit ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chOQPutTimeout ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chOQResetI ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chOQWriteTimeout ../../../os/kernel/src/chqueues.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testqueues.o
+chPoolAlloc ../../../os/kernel/src/chmempools.o
+ ../../../test/testdyn.o
+ ../../../test/testpools.o
+ ../../../os/kernel/src/chdynamic.o
+chPoolAllocI ../../../os/kernel/src/chmempools.o
+chPoolFree ../../../os/kernel/src/chmempools.o
+ ../../../test/testdyn.o
+ ../../../test/testpools.o
+ ../../../os/kernel/src/chdynamic.o
+chPoolFreeI ../../../os/kernel/src/chmempools.o
+chPoolInit ../../../os/kernel/src/chmempools.o
+ ../../../test/testdyn.o
+ ../../../test/testpools.o
+chRegFirstThread ../../../os/kernel/src/chregistry.o
+ ../../../test/testdyn.o
+chRegNextThread ../../../os/kernel/src/chregistry.o
+ ../../../test/testdyn.o
+chSchDoRescheduleI ../../../os/kernel/src/chschd.o
+ ../../../os/kernel/src/chthreads.o
+ ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+chSchGoSleepS ../../../os/kernel/src/chschd.o
+ ../../../test/testbmk.o
+ ../../../os/kernel/src/chmsg.o
+ ../../../os/kernel/src/chevents.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chthreads.o
+chSchGoSleepTimeoutS ../../../os/kernel/src/chschd.o
+ ../../../os/kernel/src/chevents.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chthreads.o
+chSchIsRescRequiredExI ../../../os/kernel/src/chschd.o
+ ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+chSchReadyI ../../../os/kernel/src/chschd.o
+ ../../../os/kernel/src/chmsg.o
+ ../../../os/kernel/src/chevents.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chthreads.o
+chSchRescheduleS ../../../os/kernel/src/chschd.o
+ ../../../os/hal/src/serial.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../os/kernel/src/chmboxes.o
+ ../../../os/kernel/src/chevents.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chthreads.o
+chSchWakeupS ../../../os/kernel/src/chschd.o
+ ../../../test/testbmk.o
+ ../../../os/kernel/src/chmsg.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chdynamic.o
+ ../../../os/kernel/src/chthreads.o
+chSemInit ../../../os/kernel/src/chsem.o
+ ../../../test/testbmk.o
+ ../../../test/testsem.o
+ ../../../os/kernel/src/chqueues.o
+ ../../../os/kernel/src/chmboxes.o
+chSemReset ../../../os/kernel/src/chsem.o
+ ../../../test/testbmk.o
+ ../../../test/testsem.o
+chSemResetI ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chqueues.o
+ ../../../os/kernel/src/chmboxes.o
+chSemSetCounterI ../../../os/kernel/src/chsem.o
+ ../../../test/testsem.o
+chSemSignal ../../../os/kernel/src/chsem.o
+ ../../../test/testbmk.o
+ ../../../test/testsem.o
+chSemSignalI ../../../os/kernel/src/chsem.o
+ ../../../test/testsem.o
+ ../../../os/kernel/src/chqueues.o
+ ../../../os/kernel/src/chmboxes.o
+chSemSignalWait ../../../os/kernel/src/chsem.o
+ ../../../test/testsem.o
+chSemWait ../../../os/kernel/src/chsem.o
+ ../../../test/testbmk.o
+ ../../../test/testsem.o
+chSemWaitS ../../../os/kernel/src/chsem.o
+chSemWaitTimeout ../../../os/kernel/src/chsem.o
+ ../../../test/testsem.o
+chSemWaitTimeoutS ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chqueues.o
+ ../../../os/kernel/src/chmboxes.o
+chSysInit ../../../os/kernel/src/chsys.o
+ main.o
+chSysTimerHandlerI ../../../os/kernel/src/chsys.o
+ ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+chThdAddRef ../../../os/kernel/src/chdynamic.o
+ ../../../test/testdyn.o
+chThdCreateFromHeap ../../../os/kernel/src/chdynamic.o
+ ../../../test/testdyn.o
+chThdCreateFromMemoryPool ../../../os/kernel/src/chdynamic.o
+ ../../../test/testdyn.o
+chThdCreateI ../../../os/kernel/src/chthreads.o
+ ../../../test/testthd.o
+ ../../../os/kernel/src/chdynamic.o
+chThdCreateStatic ../../../os/kernel/src/chthreads.o
+ main.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+ ../../../test/testevt.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+ ../../../os/kernel/src/chsys.o
+chThdExit ../../../os/kernel/src/chthreads.o
+ ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+chThdRelease ../../../os/kernel/src/chdynamic.o
+ ../../../test/testdyn.o
+ ../../../os/kernel/src/chregistry.o
+ ../../../os/kernel/src/chthreads.o
+chThdResume ../../../os/kernel/src/chthreads.o
+ ../../../test/testthd.o
+chThdSetPriority ../../../os/kernel/src/chthreads.o
+ ../../../test/testthd.o
+chThdSleep ../../../os/kernel/src/chthreads.o
+ main.o
+ ../../../test/testbmk.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+ ../../../test/test.o
+chThdSleepUntil ../../../os/kernel/src/chthreads.o
+ ../../../test/testthd.o
+chThdTerminate ../../../os/kernel/src/chthreads.o
+ ../../../test/test.o
+chThdWait ../../../os/kernel/src/chthreads.o
+ ../../../test/testbmk.o
+ ../../../test/test.o
+chThdYield ../../../os/kernel/src/chthreads.o
+ ../../../test/testbmk.o
+chTimeIsWithin ../../../os/kernel/src/chvt.o
+ ../../../test/test.o
+chVTResetI ../../../os/kernel/src/chvt.o
+ ../../../os/various/evtimer.o
+ ../../../test/testbmk.o
+ ../../../os/kernel/src/chschd.o
+chVTSetI ../../../os/kernel/src/chvt.o
+ ../../../os/various/evtimer.o
+ ../../../test/testbmk.o
+ ../../../test/test.o
+ ../../../os/kernel/src/chschd.o
+core_init ../../../os/kernel/src/chmemcore.o
+ ../../../os/kernel/src/chsys.o
+evtStart ../../../os/various/evtimer.o
+evtStop ../../../os/various/evtimer.o
+gptInit ../../../os/hal/src/gpt.o
+ ../../../os/hal/src/hal.o
+gptObjectInit ../../../os/hal/src/gpt.o
+ ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+gptPolledDelay ../../../os/hal/src/gpt.o
+gptStart ../../../os/hal/src/gpt.o
+ main.o
+gptStartContinuous ../../../os/hal/src/gpt.o
+ main.o
+gptStartContinuousI ../../../os/hal/src/gpt.o
+gptStartOneShot ../../../os/hal/src/gpt.o
+gptStartOneShotI ../../../os/hal/src/gpt.o
+gptStop ../../../os/hal/src/gpt.o
+gptStopTimer ../../../os/hal/src/gpt.o
+ main.o
+gptStopTimerI ../../../os/hal/src/gpt.o
+gpt_lld_init ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+gpt_lld_polled_delay ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+gpt_lld_start ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+gpt_lld_start_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+gpt_lld_stop ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+gpt_lld_stop_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o
+ ../../../os/hal/src/gpt.o
+halInit ../../../os/hal/src/hal.o
+ main.o
+hal_lld_init ../../../os/hal/platforms/LPC13xx/hal_lld.o
+ ../../../os/hal/src/hal.o
+heap_init ../../../os/kernel/src/chheap.o
+ ../../../os/kernel/src/chsys.o
+main main.o
+ ../../../os/ports/GCC/ARMCMx/crt0_v7m.o
+memset c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o)
+ ../../../os/various/syscalls.o
+palReadBus ../../../os/hal/src/pal.o
+palSetBusMode ../../../os/hal/src/pal.o
+palWriteBus ../../../os/hal/src/pal.o
+pal_default_config ../../../boards/EA_LPCXPRESSO_BB_1343/board.o
+ ../../../os/hal/src/hal.o
+patternbmk ../../../test/testbmk.o
+ ../../../test/test.o
+patterndyn ../../../test/testdyn.o
+ ../../../test/test.o
+patternevt ../../../test/testevt.o
+ ../../../test/test.o
+patternheap ../../../test/testheap.o
+ ../../../test/test.o
+patternmbox ../../../test/testmbox.o
+ ../../../test/test.o
+patternmsg ../../../test/testmsg.o
+ ../../../test/test.o
+patternmtx ../../../test/testmtx.o
+ ../../../test/test.o
+patternpools ../../../test/testpools.o
+ ../../../test/test.o
+patternqueues ../../../test/testqueues.o
+ ../../../test/test.o
+patternsem ../../../test/testsem.o
+ ../../../test/test.o
+patternthd ../../../test/testthd.o
+ ../../../test/test.o
+port_halt ../../../os/ports/GCC/ARMCMx/chcore.o
+port_switch ../../../os/ports/GCC/ARMCMx/chcore_v7m.o
+ ../../../os/kernel/src/chschd.o
+rlist ../../../test/testbmk.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+ ../../../test/test.o
+ ../../../os/kernel/src/chmsg.o
+ ../../../os/kernel/src/chevents.o
+ ../../../os/kernel/src/chcond.o
+ ../../../os/kernel/src/chmtx.o
+ ../../../os/kernel/src/chsem.o
+ ../../../os/kernel/src/chregistry.o
+ ../../../os/kernel/src/chthreads.o
+ ../../../os/kernel/src/chschd.o
+ ../../../os/kernel/src/chsys.o
+scheduler_init ../../../os/kernel/src/chschd.o
+ ../../../os/kernel/src/chsys.o
+sdIncomingDataI ../../../os/hal/src/serial.o
+sdInit ../../../os/hal/src/serial.o
+ ../../../os/hal/src/hal.o
+sdObjectInit ../../../os/hal/src/serial.o
+ ../../../os/hal/platforms/LPC13xx/serial_lld.o
+sdRequestDataI ../../../os/hal/src/serial.o
+sdStart ../../../os/hal/src/serial.o
+ main.o
+sdStop ../../../os/hal/src/serial.o
+sd_lld_init ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+sd_lld_start ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+sd_lld_stop ../../../os/hal/platforms/LPC13xx/serial_lld.o
+ ../../../os/hal/src/serial.o
+test ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testheap.o
+ ../../../test/testmbox.o
+ ../../../test/test.o
+test_cpu_pulse ../../../test/test.o
+ ../../../test/testmtx.o
+test_emit_token ../../../test/test.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmbox.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+test_print ../../../test/test.o
+ ../../../test/testbmk.o
+test_println ../../../test/test.o
+ ../../../test/testbmk.o
+test_printn ../../../test/test.o
+ ../../../test/testbmk.o
+test_start_timer ../../../test/test.o
+ ../../../test/testbmk.o
+test_terminate_threads ../../../test/test.o
+ ../../../test/testbmk.o
+test_timer_done ../../../test/testbmk.o
+ ../../../test/test.o
+test_wait_threads ../../../test/test.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+test_wait_tick ../../../test/test.o
+ ../../../test/testbmk.o
+ ../../../test/testevt.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+testbmk1 ../../../test/testbmk.o
+testbmk10 ../../../test/testbmk.o
+testbmk11 ../../../test/testbmk.o
+testbmk12 ../../../test/testbmk.o
+testbmk13 ../../../test/testbmk.o
+testbmk2 ../../../test/testbmk.o
+testbmk3 ../../../test/testbmk.o
+testbmk4 ../../../test/testbmk.o
+testbmk5 ../../../test/testbmk.o
+testbmk6 ../../../test/testbmk.o
+testbmk7 ../../../test/testbmk.o
+testbmk8 ../../../test/testbmk.o
+testbmk9 ../../../test/testbmk.o
+testdyn1 ../../../test/testdyn.o
+testdyn2 ../../../test/testdyn.o
+testdyn3 ../../../test/testdyn.o
+testevt1 ../../../test/testevt.o
+testevt2 ../../../test/testevt.o
+testevt3 ../../../test/testevt.o
+testheap1 ../../../test/testheap.o
+testmbox1 ../../../test/testmbox.o
+testmsg1 ../../../test/testmsg.o
+testmtx1 ../../../test/testmtx.o
+testmtx2 ../../../test/testmtx.o
+testmtx3 ../../../test/testmtx.o
+testmtx4 ../../../test/testmtx.o
+testmtx5 ../../../test/testmtx.o
+testmtx6 ../../../test/testmtx.o
+testmtx7 ../../../test/testmtx.o
+testmtx8 ../../../test/testmtx.o
+testpools1 ../../../test/testpools.o
+testqueues1 ../../../test/testqueues.o
+testqueues2 ../../../test/testqueues.o
+testsem1 ../../../test/testsem.o
+testsem2 ../../../test/testsem.o
+testsem3 ../../../test/testsem.o
+testsem4 ../../../test/testsem.o
+testthd1 ../../../test/testthd.o
+testthd2 ../../../test/testthd.o
+testthd3 ../../../test/testthd.o
+testthd4 ../../../test/testthd.o
+thread4 ../../../test/testbmk.o
+threads ../../../test/testbmk.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testevt.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+ ../../../test/test.o
+vt_init ../../../os/kernel/src/chvt.o
+ ../../../os/kernel/src/chsys.o
+vtlist ../../../test/testevt.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
+ ../../../test/test.o
+ ../../../os/kernel/src/chthreads.o
+ ../../../os/kernel/src/chvt.o
+ ../../../os/kernel/src/chsys.o
+wa ../../../test/test.o
+ ../../../test/testbmk.o
+ ../../../test/testqueues.o
+ ../../../test/testdyn.o
+ ../../../test/testpools.o
+ ../../../test/testevt.o
+ ../../../test/testmsg.o
+ ../../../test/testmtx.o
+ ../../../test/testsem.o
+ ../../../test/testthd.o
diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -0,0 +1,507 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/* Kernel parameters. */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 1000
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 20
+#endif
+
+/**
+ * @brief Nested locks.
+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()
+ * operations is allowed.<br>
+ * For performance and code size reasons the recommended setting
+ * is to leave this option disabled.<br>
+ * You may use this option if you need to merge ChibiOS/RT with
+ * external libraries that require nested lock/unlock operations.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)
+#define CH_USE_NESTED_LOCKS FALSE
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_COREMEM.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 0
+#endif
+
+/*===========================================================================*/
+/* Performance options. */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED TRUE
+#endif
+
+/**
+ * @brief Exotic optimization.
+ * @details If defined then a CPU register is used as storage for the global
+ * @p currp variable. Caching this variable in a register greatly
+ * improves both space and time OS efficiency. A side effect is that
+ * one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster context switch.
+ *
+ * @note This option is only usable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p
+ * -ffixed-@<reg@>.
+ * @note This option must be enabled in the Makefile, it is listed here for
+ * documentation only.
+ */
+#if defined(__DOXYGEN__)
+#define CH_CURRP_REGISTER_CACHE "reg"
+#endif
+
+/*===========================================================================*/
+/* Subsystem options. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/*===========================================================================*/
+/* Debug options. */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/*===========================================================================*/
+/* Kernel hooks. */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitily from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..70c240431 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -0,0 +1,280 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT TRUE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Block size for MMC transfers.
+ */
+#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__)
+#define MMC_SECTOR_SIZE 512
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/**
+ * @brief Number of positive insertion queries before generating the
+ * insertion event.
+ */
+#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__)
+#define MMC_POLLING_INTERVAL 10
+#endif
+
+/**
+ * @brief Interval, in milliseconds, between insertion queries.
+ */
+#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__)
+#define MMC_POLLING_DELAY 10
+#endif
+
+/**
+ * @brief Uses the SPI polled API for small data transfers.
+ * @details Polled transfers usually improve performance because it
+ * saves two context switches and interrupt servicing. Note
+ * that this option has no effect on large transfers which
+ * are always performed using DMAs/IRQs.
+ */
+#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__)
+#define MMC_USE_SPI_POLLING TRUE
+#endif
+
+/*===========================================================================*/
+/* PAL driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* PWM driver related settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c new file mode 100644 index 000000000..407ad92a5 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -0,0 +1,321 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <stdlib.h>
+
+#include "ch.h"
+#include "hal.h"
+
+/*===========================================================================*/
+/* Configurable settings. */
+/*===========================================================================*/
+
+#ifndef RANDOMIZE
+#define RANDOMIZE FALSE
+#endif
+
+#ifndef ITERATIONS
+#define ITERATIONS 100
+#endif
+
+#ifndef NUM_THREADS
+#define NUM_THREADS 4
+#endif
+
+#ifndef MAILBOX_SIZE
+#define MAILBOX_SIZE 4
+#endif
+
+/*===========================================================================*/
+/* Test related code. */
+/*===========================================================================*/
+
+#define MSG_SEND_LEFT 0
+#define MSG_SEND_RIGHT 1
+
+static bool_t saturated;
+
+/*
+ * Mailboxes and buffers.
+ */
+static Mailbox mb[NUM_THREADS];
+static msg_t b[NUM_THREADS][MAILBOX_SIZE];
+
+/*
+ * Test worker threads.
+ */
+static WORKING_AREA(waWorkerThread[NUM_THREADS], 128);
+static msg_t WorkerThread(void *arg) {
+ static volatile unsigned x = 0;
+ static unsigned cnt = 0;
+ unsigned me = (unsigned)arg;
+ unsigned target;
+ unsigned r;
+ msg_t msg;
+
+ /* Work loop.*/
+ while (TRUE) {
+ /* Waiting for a message.*/
+ chMBFetch(&mb[me], &msg, TIME_INFINITE);
+
+#if RANDOMIZE
+ /* Pseudo-random delay.*/
+ {
+ chSysLock();
+ r = rand() & 15;
+ chSysUnlock();
+ while (r--)
+ x++;
+ }
+#else
+ /* Fixed delay.*/
+ {
+ r = me >> 4;
+ while (r--)
+ x++;
+ }
+#endif
+
+ /* Deciding in which direction to re-send the message.*/
+ if (msg == MSG_SEND_LEFT)
+ target = me - 1;
+ else
+ target = me + 1;
+
+ if (target < NUM_THREADS) {
+ /* If this thread is not at the end of a chain re-sending the message,
+ note this check works because the variable target is unsigned.*/
+ msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE);
+ if (msg != RDY_OK)
+ saturated = TRUE;
+ }
+ else {
+ /* Provides a visual feedback about the system.*/
+ if (++cnt >= 500) {
+ cnt = 0;
+ palTogglePad(GPIO0, GPIO0_LED2);
+ }
+ }
+ }
+}
+
+/*
+ * GPT1 callback.
+ */
+static void gpt1cb(GPTDriver *gptp) {
+ msg_t msg;
+
+ (void)gptp;
+ chSysLockFromIsr();
+ msg = chMBPostI(&mb[0], MSG_SEND_RIGHT);
+ if (msg != RDY_OK)
+ saturated = TRUE;
+ chSysUnlockFromIsr();
+}
+
+/*
+ * GPT2 callback.
+ */
+static void gpt2cb(GPTDriver *gptp) {
+ msg_t msg;
+
+ (void)gptp;
+ chSysLockFromIsr();
+ msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT);
+ if (msg != RDY_OK)
+ saturated = TRUE;
+ chSysUnlockFromIsr();
+}
+
+/*
+ * GPT1 configuration.
+ */
+static const GPTConfig gpt1cfg = {
+ 1000000, /* 1MHz timer clock.*/
+ gpt1cb /* Timer callback.*/
+};
+
+/*
+ * GPT2 configuration.
+ */
+static const GPTConfig gpt2cfg = {
+ 1000000, /* 1MHz timer clock.*/
+ gpt2cb /* Timer callback.*/
+};
+
+
+/*===========================================================================*/
+/* Generic demo code. */
+/*===========================================================================*/
+
+static void print(char *p) {
+
+ while (*p) {
+ chIOPut(&SD1, *p++);
+ }
+}
+
+static void println(char *p) {
+
+ while (*p) {
+ chIOPut(&SD1, *p++);
+ }
+ chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE);
+}
+
+static void printn(uint32_t n) {
+ char buf[16], *p;
+
+ if (!n)
+ chIOPut(&SD1, '0');
+ else {
+ p = buf;
+ while (n)
+ *p++ = (n % 10) + '0', n /= 10;
+ while (p > buf)
+ chIOPut(&SD1, *--p);
+ }
+}
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+ unsigned i;
+ gptcnt_t interval, threshold, worst;
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Prepares the Serial driver 2 and GPT drivers 1 and 2.
+ */
+ sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/
+ gptStart(&GPTD1, &gpt1cfg);
+ gptStart(&GPTD2, &gpt2cfg);
+
+ /*
+ * Initializes the mailboxes and creates the worker threads.
+ */
+ for (i = 0; i < NUM_THREADS; i++) {
+ chMBInit(&mb[i], b[i], MAILBOX_SIZE);
+ chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i],
+ NORMALPRIO - 20, WorkerThread, (void *)i);
+ }
+
+ /*
+ * Test procedure.
+ */
+ println("");
+ println("*** ChibiOS/RT IRQ-STORM long duration test");
+ println("***");
+ print("*** Kernel: ");
+ println(CH_KERNEL_VERSION);
+#ifdef __GNUC__
+ print("*** GCC Version: ");
+ println(__VERSION__);
+#endif
+ print("*** Architecture: ");
+ println(CH_ARCHITECTURE_NAME);
+#ifdef CH_CORE_VARIANT_NAME
+ print("*** Core Variant: ");
+ println(CH_CORE_VARIANT_NAME);
+#endif
+#ifdef PLATFORM_NAME
+ print("*** Platform: ");
+ println(PLATFORM_NAME);
+#endif
+#ifdef BOARD_NAME
+ print("*** Test Board: ");
+ println(BOARD_NAME);
+#endif
+ println("***");
+ print("*** System Clock: ");
+ printn(LPC13xx_SYSCLK);
+ println("");
+ print("*** Iterations: ");
+ printn(ITERATIONS);
+ println("");
+ print("*** Randomize: ");
+ printn(RANDOMIZE);
+ println("");
+ print("*** Threads: ");
+ printn(NUM_THREADS);
+ println("");
+ print("*** Mailbox size: ");
+ printn(MAILBOX_SIZE);
+ println("");
+
+ println("");
+ worst = 0;
+ for (i = 1; i <= ITERATIONS; i++){
+ print("Iteration ");
+ printn(i);
+ println("");
+ saturated = FALSE;
+ threshold = 0;
+ for (interval = 2000; interval >= 20; interval -= interval / 10) {
+ gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/
+ gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/
+ chThdSleepMilliseconds(1000);
+ gptStopTimer(&GPTD1);
+ gptStopTimer(&GPTD2);
+ if (!saturated)
+ print(".");
+ else {
+ print("#");
+ if (threshold == 0)
+ threshold = interval;
+ }
+ }
+ /* Gives the worker threads a chance to empty the mailboxes before next
+ cycle.*/
+ chThdSleepMilliseconds(20);
+ println("");
+ print("Saturated at ");
+ printn(threshold);
+ println(" uS");
+ println("");
+ if (threshold > worst)
+ worst = threshold;
+ }
+ gptStopTimer(&GPTD1);
+ gptStopTimer(&GPTD2);
+
+ print("Worst case at ");
+ printn(worst);
+ println(" uS");
+ println("");
+ println("Test Complete");
+
+ /*
+ * Normal main() thread activity, nothing in this test.
+ */
+ while (TRUE) {
+ chThdSleepMilliseconds(5000);
+ }
+ return 0;
+}
diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..195eb6c6a --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,79 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * LPC13xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 7...0 Lowest...highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define LPC13xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC
+#define LPC13xx_SYSPLL_MUL 6
+#define LPC13xx_SYSPLL_DIV 4
+#define LPC13xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT
+#define LPC13xx_SYSABHCLK_DIV 1
+
+/*
+ * ADC driver system settings.
+ */
+
+/*
+ * CAN driver system settings.
+ */
+
+/*
+ * GPT driver system settings.
+ */
+#define LPC13xx_GPT_USE_CT16B0 TRUE
+#define LPC13xx_GPT_USE_CT16B1 TRUE
+#define LPC13xx_GPT_USE_CT32B0 TRUE
+#define LPC13xx_GPT_USE_CT32B1 TRUE
+#define LPC13xx_GPT_CT16B0_IRQ_PRIORITY 2
+#define LPC13xx_GPT_CT16B1_IRQ_PRIORITY 2
+#define LPC13xx_GPT_CT32B0_IRQ_PRIORITY 2
+#define LPC13xx_GPT_CT32B1_IRQ_PRIORITY 2
+
+/*
+ * PWM driver system settings.
+ */
+
+/*
+ * SERIAL driver system settings.
+ */
+#define LPC13xx_SERIAL_USE_UART0 TRUE
+#define LPC13xx_SERIAL_FIFO_PRELOAD 16
+#define LPC13xx_SERIAL_UART0CLKDIV 1
+#define LPC13xx_SERIAL_UART0_IRQ_PRIORITY 3
+
+/*
+ * SPI driver system settings.
+ */
+#define LPC13xx_SPI_USE_SSP0 TRUE
+#define LPC13xx_SPI_SSP0CLKDIV 1
+#define LPC13xx_SPI_SSP0_IRQ_PRIORITY 5
+#define LPC13xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt()
+#define LPC13xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11
diff --git a/testhal/LPC13xx/IRQ_STORM/readme.txt b/testhal/LPC13xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..3ddf2e2d6 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/readme.txt @@ -0,0 +1,25 @@ +*****************************************************************************
+** ChibiOS/RT HAL - IRQ-STORM demo for LPC13xx. **
+*****************************************************************************
+
+** TARGET **
+
+The demo will on an LPCXpresso LPC1114 board.
+
+** The Demo **
+
+The application demonstrates the use of the LPC13xx GPT, PAL and Serial drivers
+in order to implement a system stress demo.
+
+** Build Procedure **
+
+The demo has been tested by using the free LPCXpresso toolchain but also with
+Codesourcery and YAGARTO.
+Just modify the TRGT line in the makefile in order to use different GCC ports.
+
+** Notes **
+
+Some files used by the demo are not part of ChibiOS/RT but are copyright of
+NXP and are licensed under a different license.
+
+ http://www.nxp.com
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