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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-01-08 13:43:02 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-01-08 13:43:02 +0000 |
| commit | 6efea1e107c13cfc334ff711ec9f0e40be76ee08 (patch) | |
| tree | a33070575088829ad3dc9bfc753acc8cd85c2aa9 | |
| parent | 76ae8ad95e13630a9a88cd02b5d5c0950f0c75eb (diff) | |
| download | ChibiOS-6efea1e107c13cfc334ff711ec9f0e40be76ee08.tar.gz ChibiOS-6efea1e107c13cfc334ff711ec9f0e40be76ee08.tar.bz2 ChibiOS-6efea1e107c13cfc334ff711ec9f0e40be76ee08.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7616 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/common/ports/ARMCMx/devices/STM32L0xx/cmparams.h | 83 | ||||
| -rw-r--r-- | os/nil/ports/ARMCMx/nilcore.h | 6 | ||||
| -rw-r--r-- | os/rt/ports/ARMCMx/chcore.h | 6 |
3 files changed, 89 insertions, 6 deletions
diff --git a/os/common/ports/ARMCMx/devices/STM32L0xx/cmparams.h b/os/common/ports/ARMCMx/devices/STM32L0xx/cmparams.h new file mode 100644 index 000000000..0002cb05a --- /dev/null +++ b/os/common/ports/ARMCMx/devices/STM32L0xx/cmparams.h @@ -0,0 +1,83 @@ +/*
+ ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013,2014 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file STM32L0xx/cmparams.h
+ * @brief ARM Cortex-M0+ parameters for the STM32L0xx.
+ *
+ * @defgroup ARMCMx_STM32L0xx STM32L0xx Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M0 specific parameters for the
+ * STM32L0xx platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL CORTEX_M0PLUS
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU 0
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 4
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 32
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* If the device type is not externally defined, for example from the Makefile,
+ then a file named board.h is included. This file must contain a device
+ definition compatible with the vendor include file.*/
+#if !defined(STM32L051xx) && !defined(STM32L052xx) && \
+ !defined(STM32L053xx) && !defined(STM32L062xx) && \
+ !defined(STM32L063xx) && !defined(STM32L061xx)
+#include "board.h"
+#endif
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "stm32l0xx.h"
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/nil/ports/ARMCMx/nilcore.h b/os/nil/ports/ARMCMx/nilcore.h index 8a9d98b8f..96c9b645b 100644 --- a/os/nil/ports/ARMCMx/nilcore.h +++ b/os/nil/ports/ARMCMx/nilcore.h @@ -72,9 +72,9 @@ */
#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
#define CORTEX_M0PLUS 1 /**< @brief Cortex-M0+ variant. */
-#define CORTEX_M1 2 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
+#define CORTEX_M1 10 /**< @brief Cortex-M1 variant. */
+#define CORTEX_M3 30 /**< @brief Cortex-M3 variant. */
+#define CORTEX_M4 40 /**< @brief Cortex-M4 variant. */
/** @} */
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
diff --git a/os/rt/ports/ARMCMx/chcore.h b/os/rt/ports/ARMCMx/chcore.h index 773d7a85c..5d44551a8 100644 --- a/os/rt/ports/ARMCMx/chcore.h +++ b/os/rt/ports/ARMCMx/chcore.h @@ -73,9 +73,9 @@ */
#define CORTEX_M0 0 /**< @brief Cortex-M0 variant. */
#define CORTEX_M0PLUS 1 /**< @brief Cortex-M0+ variant. */
-#define CORTEX_M1 2 /**< @brief Cortex-M1 variant. */
-#define CORTEX_M3 3 /**< @brief Cortex-M3 variant. */
-#define CORTEX_M4 4 /**< @brief Cortex-M4 variant. */
+#define CORTEX_M1 10 /**< @brief Cortex-M1 variant. */
+#define CORTEX_M3 30 /**< @brief Cortex-M3 variant. */
+#define CORTEX_M4 40 /**< @brief Cortex-M4 variant. */
/** @} */
/* Inclusion of the Cortex-Mx implementation specific parameters.*/
|