Fixed bug 3158776.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2643 35acf78f-673a-0410-8e92-d51de3d6d3f4

9 files changed, 72 insertions, 44 deletions

diff --git a/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.icf b/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.icf
index 4caa34574..a31967680 100644
--- a/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.icf
+++ b/demos/ARMCM0-LPC1114-LPCXPRESSO/iar/ch.icf
@@ -20,18 +20,20 @@ define memory mem with size = 4G;
 define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];

 define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

 

-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };

-define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ { };

-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

-define block SYSHEAP   with alignment = 8, size = 0     { };

+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};

+define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};

+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};

+define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};

+define block DATABSS with alignment = 8 {readwrite, zeroinit};

 

 initialize by copy { readwrite };

 do not initialize  { section .noinit };

 

 keep { section .intvec };

-place at address mem:__ICFEDIT_intvec_start__ { section .intvec };

 

-place in ROM_region   { readonly };

-place in RAM_region   { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};

-

-define exported symbol __heap_end__     = end(RAM_region) + 1;

+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};

+place in ROM_region                           {readonly};

+place at start of RAM_region                  {block IRQSTACK};

+place in RAM_region                           {block DATABSS, block HEAP};

+place in RAM_region                           {block SYSHEAP};

+place at end of RAM_region                    {block CSTACK};

diff --git a/demos/ARMCM3-LPC1343-LPCXPRESSO/iar/ch.icf b/demos/ARMCM3-LPC1343-LPCXPRESSO/iar/ch.icf
index 4caa34574..a31967680 100644
--- a/demos/ARMCM3-LPC1343-LPCXPRESSO/iar/ch.icf
+++ b/demos/ARMCM3-LPC1343-LPCXPRESSO/iar/ch.icf
@@ -20,18 +20,20 @@ define memory mem with size = 4G;
 define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];

 define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

 

-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };

-define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ { };

-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

-define block SYSHEAP   with alignment = 8, size = 0     { };

+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};

+define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};

+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};

+define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};

+define block DATABSS with alignment = 8 {readwrite, zeroinit};

 

 initialize by copy { readwrite };

 do not initialize  { section .noinit };

 

 keep { section .intvec };

-place at address mem:__ICFEDIT_intvec_start__ { section .intvec };

 

-place in ROM_region   { readonly };

-place in RAM_region   { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};

-

-define exported symbol __heap_end__     = end(RAM_region) + 1;

+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};

+place in ROM_region                           {readonly};

+place at start of RAM_region                  {block IRQSTACK};

+place in RAM_region                           {block DATABSS, block HEAP};

+place in RAM_region                           {block SYSHEAP};

+place at end of RAM_region                    {block CSTACK};

diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/iar/ch.icf b/demos/ARMCM3-STM32F100-DISCOVERY/iar/ch.icf
index f33d49367..fe1ac2c14 100644
--- a/demos/ARMCM3-STM32F100-DISCOVERY/iar/ch.icf
+++ b/demos/ARMCM3-STM32F100-DISCOVERY/iar/ch.icf
@@ -20,18 +20,20 @@ define memory mem with size = 4G;
 define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];

 define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

 

-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };

-define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ { };

-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

-define block SYSHEAP   with alignment = 8, size = 0     { };

+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};

+define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};

+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};

+define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};

+define block DATABSS with alignment = 8 {readwrite, zeroinit};

 

 initialize by copy { readwrite };

 do not initialize  { section .noinit };

 

 keep { section .intvec };

-place at address mem:__ICFEDIT_intvec_start__ { section .intvec };

 

-place in ROM_region   { readonly };

-place in RAM_region   { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};

-

-define exported symbol __heap_end__     = end(RAM_region) + 1;

+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};

+place in ROM_region                           {readonly};

+place at start of RAM_region                  {block IRQSTACK};

+place in RAM_region                           {block DATABSS, block HEAP};

+place in RAM_region                           {block SYSHEAP};

+place at end of RAM_region                    {block CSTACK};

diff --git a/demos/ARMCM3-STM32F103/iar/ch.icf b/demos/ARMCM3-STM32F103/iar/ch.icf
index 0aedf5910..67ef6e73a 100644
--- a/demos/ARMCM3-STM32F103/iar/ch.icf
+++ b/demos/ARMCM3-STM32F103/iar/ch.icf
@@ -20,18 +20,20 @@ define memory mem with size = 4G;
 define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];

 define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

 

-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };

-define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ { };

-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

-define block SYSHEAP   with alignment = 8, size = 0     { };

+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   {section CSTACK};

+define block IRQSTACK  with alignment = 8, size = __ICFEDIT_size_irqstack__ {};

+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     {};

+define block SYSHEAP   with alignment = 8                                   {section SYSHEAP};

+define block DATABSS with alignment = 8 {readwrite, zeroinit};

 

 initialize by copy { readwrite };

 do not initialize  { section .noinit };

 

 keep { section .intvec };

-place at address mem:__ICFEDIT_intvec_start__ { section .intvec };

 

-place in ROM_region   { readonly };

-place in RAM_region   { block IRQSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP};

-

-define exported symbol __heap_end__     = end(RAM_region) + 1;

+place at address mem:__ICFEDIT_intvec_start__ {section .intvec};

+place in ROM_region                           {readonly};

+place at start of RAM_region                  {block IRQSTACK};

+place in RAM_region                           {block DATABSS, block HEAP};

+place in RAM_region                           {block SYSHEAP};

+place at end of RAM_region                    {block CSTACK};

diff --git a/os/ports/IAR/ARMCMx/STM32/vectors.s b/os/ports/IAR/ARMCMx/STM32/vectors.s
index 193150f38..868741f4f 100644
--- a/os/ports/IAR/ARMCMx/STM32/vectors.s
+++ b/os/ports/IAR/ARMCMx/STM32/vectors.s
@@ -31,7 +31,7 @@
         PRESERVE8

 

         SECTION IRQSTACK:DATA:NOROOT(3)

-        SECTION .intvec:CODE:NOROOT(2)

+        SECTION .intvec:CODE:NOROOT(3)

 

         EXTERN  __iar_program_start

         PUBLIC  __vector_table

diff --git a/os/ports/IAR/ARMCMx/chcore_v6m.h b/os/ports/IAR/ARMCMx/chcore_v6m.h
index 9209fbaf4..a2d1a40d3 100644
--- a/os/ports/IAR/ARMCMx/chcore_v6m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v6m.h
@@ -226,7 +226,15 @@ struct intctx {
  * @param[in] ntp       the thread to be switched in

  * @param[in] otp       the thread to be switched out

  */

+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)

 #define port_switch(ntp, otp) _port_switch(ntp, otp)

+#else

+#define port_switch(ntp, otp) {                                             \

+  if ((void *)(__get_SP() - sizeof(struct intctx)) < (void *)(otp + 1))     \

+    chDbgPanic("stack overflow");                                           \

+  _port_switch(ntp, otp);                                                   \

+}

+#endif

 

 #if !defined(__DOXYGEN__)

 extern regarm_t _port_saved_pc;

diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.h b/os/ports/IAR/ARMCMx/chcore_v7m.h
index ba0c83f5a..ad4abf25b 100644
--- a/os/ports/IAR/ARMCMx/chcore_v7m.h
+++ b/os/ports/IAR/ARMCMx/chcore_v7m.h
@@ -225,7 +225,15 @@ struct intctx {
  * @param[in] ntp       the thread to be switched in

  * @param[in] otp       the thread to be switched out

  */

+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)

 #define port_switch(ntp, otp) _port_switch(ntp, otp)

+#else

+#define port_switch(ntp, otp) {                                             \

+  if ((void *)(__get_SP() - sizeof(struct intctx)) < (void *)(otp + 1))     \

+    chDbgPanic("stack overflow");                                           \

+  _port_switch(ntp, otp);                                                   \

+}

+#endif

 

 #ifdef __cplusplus

 extern "C" {

diff --git a/os/ports/IAR/ARMCMx/cstartup.s b/os/ports/IAR/ARMCMx/cstartup.s
index e01cb6dd3..1421ea86e 100644
--- a/os/ports/IAR/ARMCMx/cstartup.s
+++ b/os/ports/IAR/ARMCMx/cstartup.s
@@ -27,9 +27,16 @@ CONTROL_USE_PSP SET 2
         AAPCS INTERWORK, VFP_COMPATIBLE, ROPI

         PRESERVE8

 

-        SECTION CSTACK:DATA:NOROOT(3)

         SECTION .intvec:CODE:NOROOT(3)

 

+        SECTION CSTACK:DATA:NOROOT(3)

+        PUBLIC  __heap_end__

+__heap_end__:

+

+        SECTION SYSHEAP:DATA:NOROOT(3)

+        PUBLIC  __heap_base__

+__heap_base__:

+

         PUBLIC  __iar_program_start

         EXTERN  __vector_table

         EXTWEAK __iar_init_core

@@ -41,7 +48,7 @@ CONTROL_USE_PSP SET 2
         THUMB

 __iar_program_start:

         cpsid   i

-        ldr     r0, =sfe(CSTACK)

+        ldr     r0, =SFE(CSTACK)

         msr     PSP, r0

         movs    r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP

         msr     CONTROL, r0

@@ -55,9 +62,4 @@ __iar_program_start:
 __early_init:

         bx      lr

 

-        SECTION SYSHEAP:DATA:NOROOT(3)

-        PUBLIC  __heap_base__

-__heap_base__:

-        DS32    2

-

         END

diff --git a/readme.txt b/readme.txt
index 87f958738..3b3061fd7 100644
--- a/readme.txt
+++ b/readme.txt
@@ -65,8 +65,10 @@
 *****************************************************************************

 

 *** 2.1.8 ***

+- FIX: Fixed IAR Cortex-Mx port memory organization problem (bug 3158776).

 - FIX: Fixed STM32F103 demo's incorrect clock settings (bug 3153746).

 - NEW: Added OTG clock setting to the STM32 HAL.

+- NEW: Added stack check support to the IAR Cortex-Mx port.

 

 *** 2.1.7 ***

 - FIX: Fixed various errors in the HAL documentation (bug 3153591).