Added new bitmask and updated platform names in STM32F0xx/hal_lld.h

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9995 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 65 insertions, 42 deletions

diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
index e3d3db5b3..316d063b7 100644
--- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h
@@ -28,10 +28,11 @@
  *          One of the following macros must also be defined:

  *          - STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6,

  *            STM32F070xB for Value Line devices.

- *          - STM32F031x6, STM32F038xx, STM32F042x6, STM32F048xx

- *            for Low Density devices.

- *          - STM32F051x8, STM32F058xx, STM32F071xB, STM32F072xB,

- *            STM32F078xx for Medium Density devices.

+ *          - STM32F031x6, STM32F051x8, STM32F071xB, STM32F091xC

+ *            for Access Line devices.

+ *          - STM32F042x6, STM32F072xB for USB Line devices.

+ *          - STM32F038xx, STM32F048xx, STM32F058xx, STM32F078xx,

+ *            STM32F098xx for Low Voltage Line devices.

  *          .

  *

  * @addtogroup HAL

@@ -54,34 +55,7 @@
  * @name    Platform identification macros

  * @{

  */

-#if defined(STM32F051x8) || defined(__DOXYGEN__)

-#define PLATFORM_NAME           "STM32F051x8 Entry Level Medium Density devices"

-

-#elif defined(STM32F058xx)

-#define PLATFORM_NAME           "STM32F058xx Entry Level Medium Density devices"

-

-#elif defined(STM32F071xB)

-#define PLATFORM_NAME           "STM32F071xB Entry Level Medium Density devices"

-

-#elif defined(STM32F072xB)

-#define PLATFORM_NAME           "STM32F072xB Entry Level Medium Density devices"

-

-#elif defined(STM32F078xx)

-#define PLATFORM_NAME           "STM32F078xx Entry Level Medium Density devices"

-

-#elif defined(STM32F031x6)

-#define PLATFORM_NAME           "STM32F031x6 Entry Level Low Density devices"

-

-#elif defined(STM32F038xx)

-#define PLATFORM_NAME           "STM32F038xx Entry Level Low Density devices"

-

-#elif defined(STM32F042x6)

-#define PLATFORM_NAME           "STM32F042x6 Entry Level Low Density devices"

-

-#elif defined(STM32F048xx)

-#define PLATFORM_NAME           "STM32F048xx Entry Level Low Density devices"

-

-#elif defined(STM32F030x6)

+#if defined(STM32F030x6) || defined(__DOXYGEN__)

 #define PLATFORM_NAME           "STM32F030x6 Entry Level Value Line devices"

 

 #elif defined(STM32F030x8)

@@ -96,14 +70,41 @@
 #elif defined(STM32F070xB)

 #define PLATFORM_NAME           "STM32F070xB Entry Level Value Line devices"

 

+#elif defined(STM32F031x6)

+#define PLATFORM_NAME           "STM32F031x6 Entry Level Access Line devices"

+

+#elif defined(STM32F051x8)

+#define PLATFORM_NAME           "STM32F051x8 Entry Level Access Line devices"

+

+#elif defined(STM32F071xB)

+#define PLATFORM_NAME           "STM32F071xB Entry Level Access Line devices"

+

 #elif defined(STM32F091xC)

-#define PLATFORM_NAME           "STM32F091xC Entry Level Medium Density devices"

+#define PLATFORM_NAME           "STM32F091xC Entry Level Access Line devices"

+

+#elif defined(STM32F042x6)

+#define PLATFORM_NAME           "STM32F042x6 Entry Level USB Line devices"

+

+#elif defined(STM32F072xB)

+#define PLATFORM_NAME           "STM32F072xB Entry Level USB Line devices"

+

+#elif defined(STM32F038xx)

+#define PLATFORM_NAME           "STM32F038xx Entry Level Low Voltage Line devices"

+

+#elif defined(STM32F048xx)

+#define PLATFORM_NAME           "STM32F048xx Entry Level Low Voltage Line devices"

+

+#elif defined(STM32F058xx)

+#define PLATFORM_NAME           "STM32F058xx Entry Level Low Voltage Line devices"

+

+#elif defined(STM32F078xx)

+#define PLATFORM_NAME           "STM32F078xx Entry Level Low Voltage Line devices"

 

 #elif defined(STM32F098xx)

-#define PLATFORM_NAME           "STM32F098xx Entry Level Medium Density devices"

+#define PLATFORM_NAME           "STM32F098xx Entry Level Low Voltage Line devices"

 

 #else

-#error "STM32F0xx device not specified"

+#error "STM32F0xx device unsupported or not specified"

 #endif

 /** @} */

 

@@ -242,15 +243,25 @@
 /** @} */

 

 /**

- * @name    RCC_BDCR register bits definitions

+ * @name    RCC_CFGR2 register bits definitions

  * @{

  */

-#define STM32_RTCSEL_MASK       (3 << 8)    /**< RTC clock source mask.     */

-#define STM32_RTCSEL_NOCLOCK    (0 << 8)    /**< No clock.                  */

-#define STM32_RTCSEL_LSE        (1 << 8)    /**< LSE used as RTC clock.     */

-#define STM32_RTCSEL_LSI        (2 << 8)    /**< LSI used as RTC clock.     */

-#define STM32_RTCSEL_HSEDIV     (3 << 8)    /**< HSE divided by 32 used as

-                                                 RTC clock.                 */

+#define STM32_PRE_DIV1          (0 << 0)    /**< PLLSRC divided by 1.       */

+#define STM32_PRE_DIV2          (1 << 0)    /**< SYSCLK divided by 2.       */

+#define STM32_PRE_DIV3          (2 << 0)    /**< SYSCLK divided by 3.       */

+#define STM32_PRE_DIV4          (3 << 0)    /**< PLLSRC divided by 4.       */

+#define STM32_PRE_DIV5          (4 << 0)    /**< SYSCLK divided by 5.       */

+#define STM32_PRE_DIV6          (5 << 0)    /**< SYSCLK divided by 6.       */

+#define STM32_PRE_DIV7          (6 << 0)    /**< PLLSRC divided by 7.       */

+#define STM32_PRE_DIV8          (7 << 0)    /**< SYSCLK divided by 8.       */

+#define STM32_PRE_DIV9          (8 << 0)    /**< SYSCLK divided by 9.       */

+#define STM32_PRE_DIV10         (9 << 0)    /**< PLLSRC divided by 10.      */

+#define STM32_PRE_DIV11         (10 << 0)   /**< SYSCLK divided by 11.      */

+#define STM32_PRE_DIV12         (11 << 0)   /**< SYSCLK divided by 12.      */

+#define STM32_PRE_DIV13         (12 << 0)   /**< PLLSRC divided by 13.      */

+#define STM32_PRE_DIV14         (13 << 0)   /**< SYSCLK divided by 14.      */

+#define STM32_PRE_DIV15         (14 << 0)   /**< SYSCLK divided by 15.      */

+#define STM32_PRE_DIV16         (15 << 0)   /**< PLLSRC divided by 16.      */

 /** @} */

 

 /**

@@ -274,6 +285,18 @@
 #define STM32_USBSW_PCLK        (1 << 7)    /**< USB clock is PCLK.         */

 /** @} */

 

+/**

+ * @name    RCC_BDCR register bits definitions

+ * @{

+ */

+#define STM32_RTCSEL_MASK       (3 << 8)    /**< RTC clock source mask.     */

+#define STM32_RTCSEL_NOCLOCK    (0 << 8)    /**< No clock.                  */

+#define STM32_RTCSEL_LSE        (1 << 8)    /**< LSE used as RTC clock.     */

+#define STM32_RTCSEL_LSI        (2 << 8)    /**< LSI used as RTC clock.     */

+#define STM32_RTCSEL_HSEDIV     (3 << 8)    /**< HSE divided by 32 used as

+                                                 RTC clock.                 */

+/** @} */

+

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

 /*===========================================================================*/