diff options
| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-02-26 09:29:02 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-02-26 09:29:02 +0000 |
| commit | 50439eed0df5c61ecb70483ad7d999f0038f1b3d (patch) | |
| tree | 017bb6e6d51502856b80d3c16e6ffb1a44548580 | |
| parent | 4a03cef983fcf64c8b6fbdc888dfe4b05915425e (diff) | |
| download | ChibiOS-50439eed0df5c61ecb70483ad7d999f0038f1b3d.tar.gz ChibiOS-50439eed0df5c61ecb70483ad7d999f0038f1b3d.tar.bz2 ChibiOS-50439eed0df5c61ecb70483ad7d999f0038f1b3d.zip | |
Added back missing revisions in trunk.
git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11544 110e8d01-0319-4d1e-a829-52ad28d1bb01
| -rw-r--r-- | os/hal/include/hal.h | 1 | ||||
| -rw-r--r-- | os/hal/include/hal_objects.h | 86 | ||||
| -rw-r--r-- | os/hal/include/hal_pal.h | 51 | ||||
| -rw-r--r-- | os/hal/include/hal_streams.h | 6 | ||||
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c | 151 | ||||
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.h | 97 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx/hal_lld.h | 2 | ||||
| -rw-r--r-- | os/hal/ports/simulator/console.c | 1 | ||||
| -rw-r--r-- | os/hal/src/hal_pal.c | 51 | ||||
| -rw-r--r-- | os/hal/src/hal_serial.c | 1 | ||||
| -rw-r--r-- | os/hal/src/hal_serial_usb.c | 1 | ||||
| -rw-r--r-- | readme.txt | 202 | ||||
| -rw-r--r-- | testhal/ATSAMA5D2/UART/chconf.h | 7 | ||||
| -rw-r--r-- | testhal/ATSAMA5D2/UART/main.c | 2 |
14 files changed, 340 insertions, 319 deletions
diff --git a/os/hal/include/hal.h b/os/hal/include/hal.h index 337f85f6f..6eb7ccfb8 100644 --- a/os/hal/include/hal.h +++ b/os/hal/include/hal.h @@ -114,6 +114,7 @@ #include "hal_lld.h"
/* Abstract interfaces.*/
+#include "hal_objects.h"
#include "hal_streams.h"
#include "hal_channels.h"
#include "hal_files.h"
diff --git a/os/hal/include/hal_objects.h b/os/hal/include/hal_objects.h new file mode 100644 index 000000000..59c3884da --- /dev/null +++ b/os/hal/include/hal_objects.h @@ -0,0 +1,86 @@ +/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_objects.h
+ * @brief Base object.
+ * @details This header defines a base object that is the root for the
+ * inheritance system.
+ *
+ * @addtogroup HAL_BASE_OBJECT
+ * @details HAL uses concepts of Object Oriented Programming even if it
+ * is written in C. Things like simple inheritance, multiple
+ * inheritance and interfaces are used through the system.
+ * This module defines a "base object" that is the ancestor of
+ * all classes in the system.
+ * @{
+ */
+
+#ifndef HAL_OBJECTS_H
+#define HAL_OBJECTS_H
+
+/**
+ * @brief @p BaseObject specific methods.
+ * @note This object defines no methods.
+ */
+#define _base_object_methods \
+ /* Instance offset, used for multiple inheritance, normally zero. It
+ represents the offset between the current object and the container
+ object*/ \
+ size_t instance_offset;
+
+/**
+ * @brief @p BaseObject specific data.
+ * @note This object defines no data.
+ */
+#define _base_object_data
+
+/**
+ * @brief @p BaseObject virtual methods table.
+ */
+struct BaseObjectVMT {
+ _base_object_methods
+};
+
+/**
+ * @brief Base stream class.
+ * @details This class represents a generic blocking unbuffered sequential
+ * data stream.
+ */
+typedef struct {
+ /** @brief Virtual Methods Table.*/
+ const struct BaseObjectVMT *vmt;
+ _base_object_data
+} BaseObject;
+
+/**
+ * @name Macro Functions (BaseObject)
+ * @{
+ */
+/**
+ * @brief Returns the instance pointer starting from an interface pointer.
+ *
+ * @param[in] type the type of the instance pointer, it is used for casting
+ * @param[in] ip the interface pointer
+ * @return A pointer to the object implementing the interface
+ */
+#define objGetInstance(type, ip) \
+ (type)(((size_t)(ip)) - (ip)->vmt->instance_offset)
+/** @} */
+
+#endif /* HAL_OBJECTS_H */
+
+/** @} */
diff --git a/os/hal/include/hal_pal.h b/os/hal/include/hal_pal.h index a3c9818ce..86a4fe699 100644 --- a/os/hal/include/hal_pal.h +++ b/os/hal/include/hal_pal.h @@ -949,54 +949,6 @@ typedef struct { } while (false)
#endif /* PAL_USE_CALLBACKS == TRUE */
-#if (PAL_USE_WAIT == TRUE) || defined(__DOXYGEN__)
-/**
- * @brief Waits for an edge on the specified port/pad.
- *
- * @param[in] port port identifier
- * @param[in] pad pad number within the port
- * @param[in] timeout the number of ticks before the operation timeouts,
- * the following special values are allowed:
- * - @a TIME_IMMEDIATE immediate timeout.
- * - @a TIME_INFINITE no timeout.
- * .
- * @returns The operation state.
- * @retval MSG_OK if an edge has been detected.
- * @retval MSG_TIMEOUT if a timeout occurred before an edge cound be detected.
- * @retval MSG_RESET if the event has been disabled while the thread was
- * waiting for an edge.
- *
- * @api
- */
-#define palWaitPadTimeout(port, pad, timeout) \
- do { \
- osalSysLock(); \
- palWaitPadTimeoutS(port, pad, timeout); \
- osalSysUnlock(); \
- } while (false)
-
-
-/**
- * @brief Waits for an edge on the specified line.
- *
- * @param[in] line line identifier
- * @param[in] timeout operation timeout
- * @returns The operation state.
- * @retval MSG_OK if an edge has been detected.
- * @retval MSG_TIMEOUT if a timeout occurred before an edge cound be detected.
- * @retval MSG_RESET if the event has been disabled while the thread was
- * waiting for an edge.
- *
- * @api
- */
-#define palWaitLineTimeout(line, timeout) \
- do { \
- osalSysLock(); \
- palWaitLineTimeoutS(line, timeout); \
- osalSysUnlock(); \
- } while (false)
-#endif /* PAL_USE_WAIT == TRUE */
-
/** @} */
/*===========================================================================*/
@@ -1017,7 +969,10 @@ extern "C" { #if (PAL_USE_WAIT == TRUE) || defined(__DOXYGEN__)
msg_t palWaitPadTimeoutS(ioportid_t port, iopadid_t pad,
sysinterval_t timeout);
+ msg_t palWaitPadTimeout(ioportid_t port, iopadid_t pad,
+ sysinterval_t timeout);
msg_t palWaitLineTimeoutS(ioline_t line, sysinterval_t timeout);
+ msg_t palWaitLineTimeout(ioline_t line, sysinterval_t timeout);
#endif /* PAL_USE_WAIT == TRUE */
#ifdef __cplusplus
}
diff --git a/os/hal/include/hal_streams.h b/os/hal/include/hal_streams.h index 3e414ae04..bbdc65309 100644 --- a/os/hal/include/hal_streams.h +++ b/os/hal/include/hal_streams.h @@ -48,6 +48,7 @@ * @brief BaseSequentialStream specific methods.
*/
#define _base_sequential_stream_methods \
+ _base_object_methods \
/* Stream write buffer method.*/ \
size_t (*write)(void *instance, const uint8_t *bp, size_t n); \
/* Stream read buffer method.*/ \
@@ -62,7 +63,8 @@ * @note It is empty because @p BaseSequentialStream is only an interface
* without implementation.
*/
-#define _base_sequential_stream_data
+#define _base_sequential_stream_data \
+ _base_object_data
/**
* @brief @p BaseSequentialStream virtual methods table.
@@ -72,6 +74,8 @@ struct BaseSequentialStreamVMT { };
/**
+ * @extends BaseObject
+ *
* @brief Base stream class.
* @details This class represents a generic blocking unbuffered sequential
* data stream.
diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c b/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c index 8d286884e..83bf6e52e 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.c @@ -31,7 +31,7 @@ /**
* @brief Periodic Interrupt Timer frequency.
*/
-#define SAMA_PIT (SAMA_MCK / 16 / SAMA_H64MX_H32MX_RATIO)
+#define SAMA_PIT (SAMA_MCK / 16 / SAMA_H64MX_H32MX_RATIO)
#if (SAMA_ST_USE_TC0 == TRUE) || (SAMA_ST_USE_TC1 == TRUE)
/**
@@ -57,6 +57,26 @@ }
#endif
+#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
+
+#if SAMA_ST_USE_PIT
+#error "PIT timer doesn't support tick-less mode"
+#endif
+
+#if SAMA_ST_USE_TC0
+#if ((SAMA_TC0CLK) / (OSAL_ST_FREQUENCY) != 32)
+#error "Bad OSAL_ST_FREQUENCY value in configuration. It must be set to TC0_periph_clk / 32"
+#endif
+#endif
+
+#if SAMA_ST_USE_TC1
+#if ((SAMA_TC1CLK) / (OSAL_ST_FREQUENCY) != 32)
+#error "Bad OSAL_ST_FREQUENCY value in configuration. It must be set to TC1_periph_clk / 32"
+#endif
+#endif
+
+#endif
+
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -69,6 +89,10 @@ /* Driver local variables and types. */
/*===========================================================================*/
+#if SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1
+static Tc *tcp;
+#endif
+
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
@@ -77,39 +101,27 @@ /* Driver interrupt handlers. */
/*===========================================================================*/
-#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
-
-#if (SAMA_ST_USE_TC0)
-OSAL_IRQ_HANDLER(SAMA_ST_TC0_HANDLER) {
-
- OSAL_IRQ_PROLOGUE();
- if (((TC0->TC_CHANNEL[0].TC_SR & TC_SR_CPCS) != 0) &&
- ((TC0->TC_CHANNEL[0].TC_IMR & TC_IMR_CPCS) != 0)) {
- osalSysLockFromISR();
- osalOsTimerHandlerI();
- osalSysUnlockFromISR();
- }
- aicAckInt();
- OSAL_IRQ_EPILOGUE();
-}
-#endif
-
-#if (SAMA_ST_USE_TC1)
-OSAL_IRQ_HANDLER(SAMA_ST_TC1_HANDLER) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1) || defined(__DOXYGEN__)
+/**
+ * @brief System Timer vector.
+ * @details This interrupt is used for system tick in periodic or free running
+ * mode, generated by TCx timer
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(SAMA_ST_TC_HANDLER) {
OSAL_IRQ_PROLOGUE();
- if (((TC1->TC_CHANNEL[0].TC_SR & TC_SR_CPCS) != 0) &&
- ((TC1->TC_CHANNEL[0].TC_IMR & TC_IMR_CPCS) != 0)) {
- osalSysLockFromISR();
- osalOsTimerHandlerI();
- osalSysUnlockFromISR();
- }
+ (void)tcp->TC_CHANNEL[0].TC_SR; /* acknowledge TC interrupt */
+ osalSysLockFromISR();
+ osalOsTimerHandlerI();
+ osalSysUnlockFromISR();
aicAckInt();
OSAL_IRQ_EPILOGUE();
}
#endif
-#if (SAMA_ST_USE_PIT == TRUE)
+#if (SAMA_ST_USE_PIT) || defined(__DOXYGEN__)
/**
* @brief System Timer vector.
* @details This interrupt is used for system tick in periodic mode.
@@ -131,8 +143,6 @@ OSAL_IRQ_HANDLER(PIT_Handler) { }
#endif /* SAMA_ST_USE_PIT == TRUE */
-#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
-
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -144,72 +154,81 @@ OSAL_IRQ_HANDLER(PIT_Handler) { */
void st_lld_init(void) {
-#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC)
+#if SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1
+
+#if SAMA_ST_USE_TC0
+ tcp = TC0;
+ uint32_t rc = (SAMA_TC0CLK) / (OSAL_ST_FREQUENCY);
-#if (SAMA_ST_USE_TC0 == TRUE)
#if SAMA_HAL_IS_SECURE
mtxConfigPeriphSecurity(MATRIX1, ID_TC0, SECURE_PER);
#endif /* SAMA_HAL_IS_SECURE */
+
pmcEnableTC0();
aicSetSourcePriority(ID_TC0, SAMA_TC0_IRQ_PRIORITY);
- aicSetSourceHandler(ID_TC0, SAMA_ST_TC0_HANDLER);
+ aicSetSourceHandler(ID_TC0, SAMA_ST_TC_HANDLER);
aicEnableInt(ID_TC0);
+#endif
+
+#if SAMA_ST_USE_TC1
+ tcp = TC1;
+ uint32_t rc = (SAMA_TC1CLK) / (OSAL_ST_FREQUENCY);
- tcDisableWP(TC0);
- uint32_t rc = (SAMA_TC0CLK) / (OSAL_ST_FREQUENCY);
- TC0->TC_CHANNEL[0].TC_EMR = TC_EMR_NODIVCLK;
- TC0->TC_CHANNEL[0].TC_CMR = TC_CMR_WAVE | TC_CMR_ACPA_SET |
- TC_CMR_ACPC_CLEAR | TC_CMR_WAVSEL_UP_RC;
- TC0->TC_CHANNEL[0].TC_RC = TC_RC_RC(rc);
- TC0->TC_CHANNEL[0].TC_RA = TC_RA_RA(rc);
- TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN;
- TC0->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG;
- TC0->TC_CHANNEL[0].TC_SR; /* Clear pending IRQs. */
- TC0->TC_CHANNEL[0].TC_IER |= TC_IER_CPCS;
- tcEnableWP(TC0);
-#endif /* SAMA_ST_USE_TC0 == TRUE */
-
-#if (SAMA_ST_USE_TC1 == TRUE)
#if SAMA_HAL_IS_SECURE
mtxConfigPeriphSecurity(MATRIX1, ID_TC1, SECURE_PER);
#endif /* SAMA_HAL_IS_SECURE */
+
pmcEnableTC1();
aicSetSourcePriority(ID_TC1, SAMA_TC1_IRQ_PRIORITY);
- aicSetSourceHandler(ID_TC1, SAMA_ST_TC1_HANDLER);
+ aicSetSourceHandler(ID_TC1, SAMA_ST_TC_HANDLER);
aicEnableInt(ID_TC1);
+#endif
- tcDisableWP(TC1);
- uint32_t rc = (SAMA_TC1CLK) / (OSAL_ST_FREQUENCY);
- TC1->TC_CHANNEL[0].TC_EMR = TC_EMR_NODIVCLK;
- TC1->TC_CHANNEL[0].TC_CMR = TC_CMR_WAVE | TC_CMR_ACPA_SET |
- TC_CMR_ACPC_CLEAR | TC_CMR_WAVSEL_UP_RC;
- TC1->TC_CHANNEL[0].TC_RC = TC_RC_RC(rc);
- TC1->TC_CHANNEL[0].TC_RA = TC_RA_RA(rc);
- TC1->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN;
- TC1->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG;
- TC1->TC_CHANNEL[0].TC_SR; /* Clear pending IRQs. */
- TC1->TC_CHANNEL[0].TC_IER |= TC_IER_CPCS;
- tcEnableWP(TC1);
-#endif /* SAMA_ST_USE_TC1 == TRUE */
+ tcDisableWP(tcp);
+
+#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING
+
+ /* Initializing the timer counter in free running mode.
+ * The clock source is the bus clock divided by 32.*/
+ (void)rc;
+ tcp->TC_CHANNEL[0].TC_EMR = 0;
+ tcp->TC_CHANNEL[0].TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP |
+ TC_CMR_TCCLKS(TC_CMR_TCCLKS_TIMER_CLOCK3);
+ tcp->TC_CHANNEL[0].TC_RC = 0;
+ tcp->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;
+ tcp->TC_CHANNEL[0].TC_IDR = 0xFFFFFFFF; /* Disable IRQs. */
+ tcp->TC_CHANNEL[0].TC_SR; /* Clear pending IRQs. */
+#endif
+
+#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
+ tcp->TC_CHANNEL[0].TC_EMR = TC_EMR_NODIVCLK;
+ tcp->TC_CHANNEL[0].TC_CMR = TC_CMR_WAVE | TC_CMR_WAVSEL_UP_RC;
+ tcp->TC_CHANNEL[0].TC_RC = TC_RC_RC(rc);
+ tcp->TC_CHANNEL[0].TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;;
+ tcp->TC_CHANNEL[0].TC_SR; /* Clear pending IRQs. */
+ tcp->TC_CHANNEL[0].TC_IER = TC_IER_CPCS;
+#endif
+
+ tcEnableWP(tcp);
+#endif /* SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1 */
#if (SAMA_ST_USE_PIT == TRUE)
#if SAMA_HAL_IS_SECURE
mtxConfigPeriphSecurity(MATRIX1, ID_PIT, SECURE_PER);
#endif /* SAMA_HAL_IS_SECURE */
- /* Enabling PIT.*/
- pmcEnablePIT();
+ /* Enable PIT.*/
+ pmcEnablePIT();
PIT->PIT_MR = PIT_MR_PIV((SAMA_PIT / OSAL_ST_FREQUENCY) - 1);
PIT->PIT_MR |= PIT_MR_PITEN | PIT_MR_PITIEN;
(void) PIT->PIT_PIVR; /* reset PIT PICNT counter */
- /* IRQ enabled.*/
+ /* Enable IRQ.*/
aicSetSourcePriority(ID_PIT, SAMA_ST_IRQ_PRIORITY);
aicSetSourceHandler(ID_PIT, PIT_Handler);
aicEnableInt(ID_PIT);
-#endif /* SAMA_ST_USE_PIT == TRUE */
+#endif /* SAMA_ST_USE_PIT */
-#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
}
/** @} */
diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.h b/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.h index bce654bc9..3325d4ac8 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.h +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_st_lld.h @@ -95,6 +95,7 @@ #define SAMA_TC1_IS_USED
#endif
#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -128,7 +129,22 @@ extern "C" { */
static inline systime_t st_lld_get_counter(void) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ return (systime_t)tcp->TC_CHANNEL[0].TC_CV;
+#else
+
return (systime_t)0;
+#endif
}
/**
@@ -142,7 +158,26 @@ static inline systime_t st_lld_get_counter(void) { */
static inline void st_lld_start_alarm(systime_t time) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD;
+ tcp->TC_CHANNEL[0].TC_RC = TC_RC_RC((uint32_t)time);
+ tcp->TC_CHANNEL[0].TC_SR;
+ tcp->TC_CHANNEL[0].TC_IER = TC_IER_CPCS;
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD | TC_WPMR_WPEN;
+#else
+
(void)time;
+#endif
}
/**
@@ -152,6 +187,21 @@ static inline void st_lld_start_alarm(systime_t time) { */
static inline void st_lld_stop_alarm(void) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD;
+ tcp->TC_CHANNEL[0].TC_IDR = TC_IDR_CPCS;
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD | TC_WPMR_WPEN;
+#endif
}
/**
@@ -163,7 +213,24 @@ static inline void st_lld_stop_alarm(void) { */
static inline void st_lld_set_alarm(systime_t time) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD;
+ tcp->TC_CHANNEL[0].TC_RC = TC_RC_RC((uint32_t)time);
+ tcp->TC_WPMR = TC_WPMR_WPKEY_PASSWD | TC_WPMR_WPEN;
+#else
+
(void)time;
+#endif
}
/**
@@ -175,7 +242,22 @@ static inline void st_lld_set_alarm(systime_t time) { */
static inline systime_t st_lld_get_alarm(void) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ return (systime_t)tcp->TC_CHANNEL[0].TC_RC;
+#else
+
return (systime_t)0;
+#endif
}
/**
@@ -189,7 +271,22 @@ static inline systime_t st_lld_get_alarm(void) { */
static inline bool st_lld_is_alarm_active(void) {
+#if (SAMA_ST_USE_TC0 || SAMA_ST_USE_TC1)
+
+#if SAMA_ST_USE_TC0
+
+ Tc *tcp = TC0;
+#endif
+#if SAMA_ST_USE_TC1
+
+ Tc *tcp = TC1;
+#endif
+
+ return (bool)((tcp->TC_CHANNEL[0].TC_IMR & TC_IMR_CPCS) != 0);
+#else
+
return false;
+#endif
}
#endif /* HAL_ST_LLD_H */
diff --git a/os/hal/ports/STM32/STM32L4xx/hal_lld.h b/os/hal/ports/STM32/STM32L4xx/hal_lld.h index a40bc2b96..3e6ac5da9 100644 --- a/os/hal/ports/STM32/STM32L4xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32L4xx/hal_lld.h @@ -1182,7 +1182,7 @@ /*
* PLL enable check.
*/
-#if (STM32_CLK48SEL == STM32_CLK48SEL_PLL) || \
+#if (STM32_HSI48_ENABLED && (STM32_CLK48SEL == STM32_CLK48SEL_PLL)) || \
(STM32_SW == STM32_SW_PLL) || \
(STM32_MCOSEL == STM32_MCOSEL_PLL) || \
(STM32_SAI1SEL == STM32_SAI1SEL_PLL) || \
diff --git a/os/hal/ports/simulator/console.c b/os/hal/ports/simulator/console.c index 4a0c2b44c..80b949c73 100644 --- a/os/hal/ports/simulator/console.c +++ b/os/hal/ports/simulator/console.c @@ -123,6 +123,7 @@ static msg_t _ctl(void *ip, unsigned int operation, void *arg) { }
static const struct BaseChannelVMT vmt = {
+ (size_t)0,
_write, _read, _put, _get,
_putt, _gett, _writet, _readt,
_ctl
diff --git a/os/hal/src/hal_pal.c b/os/hal/src/hal_pal.c index 1f2ced277..3861ebae3 100644 --- a/os/hal/src/hal_pal.c +++ b/os/hal/src/hal_pal.c @@ -181,6 +181,35 @@ msg_t palWaitPadTimeoutS(ioportid_t port, }
/**
+ * @brief Waits for an edge on the specified port/pad.
+ *
+ * @param[in] port port identifier
+ * @param[in] pad pad number within the port
+ * @param[in] timeout the number of ticks before the operation timeouts,
+ * the following special values are allowed:
+ * - @a TIME_IMMEDIATE immediate timeout.
+ * - @a TIME_INFINITE no timeout.
+ * .
+ * @returns The operation state.
+ * @retval MSG_OK if an edge has been detected.
+ * @retval MSG_TIMEOUT if a timeout occurred before an edge cound be detected.
+ * @retval MSG_RESET if the event has been disabled while the thread was
+ * waiting for an edge.
+ *
+ * @api
+ */
+msg_t palWaitPadTimeout(ioportid_t port,
+ iopadid_t pad,
+ sysinterval_t timeout) {
+ msg_t msg;
+
+ osalSysLock();
+ msg = palWaitPadTimeoutS(port, pad, timeout);
+ osalSysUnlock();
+ return msg;
+}
+
+/**
* @brief Waits for an edge on the specified line.
*
* @param[in] line line identifier
@@ -199,6 +228,28 @@ msg_t palWaitLineTimeoutS(ioline_t line, palevent_t *pep = pal_lld_get_line_event(line);
return osalThreadEnqueueTimeoutS(&pep->threads, timeout);
}
+
+/**
+ * @brief Waits for an edge on the specified line.
+ *
+ * @param[in] line line identifier
+ * @param[in] timeout operation timeout
+ * @returns The operation state.
+ * @retval MSG_OK if an edge has been detected.
+ * @retval MSG_TIMEOUT if a timeout occurred before an edge cound be detected.
+ * @retval MSG_RESET if the event has been disabled while the thread was
+ * waiting for an edge.
+ *
+ * @api
+ */
+msg_t palWaitLineTimeout(ioline_t line, sysinterval_t timeout) {
+ msg_t msg;
+
+ osalSysLock();
+ msg= palWaitLineTimeoutS(line, timeout);
+ osalSysUnlock();
+ return msg;
+}
#endif /* PAL_USE_WAIT == TRUE */
#endif /* HAL_USE_PAL == TRUE */
diff --git a/os/hal/src/hal_serial.c b/os/hal/src/hal_serial.c index 734316877..d4a85d424 100644 --- a/os/hal/src/hal_serial.c +++ b/os/hal/src/hal_serial.c @@ -115,6 +115,7 @@ static msg_t _ctl(void *ip, unsigned int operation, void *arg) { }
static const struct SerialDriverVMT vmt = {
+ (size_t)0,
_write, _read, _put, _get,
_putt, _gett, _writet, _readt,
_ctl
diff --git a/os/hal/src/hal_serial_usb.c b/os/hal/src/hal_serial_usb.c index 02a61d09b..ec1f1c4fe 100644 --- a/os/hal/src/hal_serial_usb.c +++ b/os/hal/src/hal_serial_usb.c @@ -154,6 +154,7 @@ static msg_t _ctl(void *ip, unsigned int operation, void *arg) { }
static const struct SerialUSBDriverVMT vmt = {
+ (size_t)0,
_write, _read, _put, _get,
_putt, _gett, _writet, _readt,
_ctl
diff --git a/readme.txt b/readme.txt index fd6bf6124..1c9232c8e 100644 --- a/readme.txt +++ b/readme.txt @@ -89,206 +89,10 @@ *****************************************************************************
*** Next ***
-- NEW: Improved external tools launch configuration for OpenOCD.
-- NEW: Added circular continuous mode to the SPI driver.
-- NEW: Added callbacks capability to the CAN driver.
-- NEW: Added initial STM32H7xx support.
-- NEW: Added GHS compiler support to the Power e200 port.
-- NEW: Added tool for board files generation from command line.
-- NEW: Added STM32L496xx/STM32L4A6xx support.
-- NEW: Added STM32F030x4 support.
-- NEW: Added a Managed Flash Storage module to the HAL.
-- NEW: Modified the STM32 OTGv1 driver to work without pump thread, transfers
- are now done in the ISR.
-- NEW: Added I-class functions to the serial driver: sdGetI(), sdReadI(),
- sdPutI() and sdWriteI().
-- NEW: Modified the HAL queues to improve performance. Added new
- functions iqGetI(), iqReadI(), oqPutI() and oqWriteI().
-- NEW: Added an "Objects FIFO" object to the OS Library, it allows to
- exchange complex objects between threads/ISRs. It is based on a
- mailbox and a guarded memory pool.
-- NEW: Added an "Objects Factory" to the OS Library, it allows to dynamically
- allocate reference-counted kernel objects/buffers or to register
- static objects. Allocated/registered objects can be retrieved by name.
-- NEW: The OS Library now has its own test suite.
-- NEW: Updated STM32F1xx headers to 1.6, STM32F3xx to 1.9, STM32L0xx to 1.10,
- STM32L4xx to 1.9, STM32H7xx to 1.1.
-- NEW: Updated CMSIS to 5.1.1, changed directories organization under
- /os/ext/ARM/CMSIS to match the one in CMSIS, removed /os/ext/CMSIS.
-- NEW: Integrated lwIP 2.0.3 and improved lwIP bindings.
-- NEW: The chconf.h configuration files now are tagged with the version
- number for safety. The system rejects obsolete files during
- compilation. Stronger checks are performed on chconf.h, now missing
- settings trigger an error instead of getting a default.
-- NEW: Added alignment capability to memory pools.
-- NEW: Mailbox API changed by adding "Timeout" to those function that have
- timeout capability, for consistency with the rest of the system.
-- NEW: Modified mailboxes to use a size_t as counter instead of a cnt_t,
- this is a leftover of semaphores in previous mailboxes implementation.
-- NEW: Added a new functions to RT events chEvtGetAndClearEventsI() and
- chEvtAddEventsI().
-- NEW: Integrated the latest FatFS 0.13 with patches.
-- NEW: Improved RT and NIL test suite to report version numbers and
- configuration settings. Now it is possible to run multiple test suites
- in the same application.
-- NEW: Added a test suite generator tool written in FTL.
-- NEW: Added a multi-target demo applications for PAL, SPI and USB-CDC
- showcasing how to manage a project with multiple target boards/devices
- and handle portability issues.
-- NEW: Added to the HAL USB driver a new function usbWakeupHost() for
- standby exit.
-- NEW: SPI driver improvements, now it is possible to select different
- modes for CS line handling.
-- NEW: Implemented PAL enhancements on all existing STM32 ports.
-- NEW: PAL driver enhanced with improved callbacks capability and new
- synchronous API for edge synchronization.
-- NEW: Added to the serial driver and channels interface a new "control"
- function that allows to implement extensions in the LLD without
- touching the high level interface. Conceptually it is similar
- to Posix ioctl().
-- NEW: Added an argument to PAL events callback. API changed thus this
- causes a major number change in HAL.
-- NEW: Added shared Eclipse debug configurations for OpenOCD under
- ./tools/eclipse/debug. Now it is no more required to re-create
- those each time a new workspace is created, just import the global
- ChibiOS project in it. The configurations will appear under the
- Eclipse Tools menu. It is required to create an OPENOCD environment
- variable pointing to the OpenOCD executable. It will be done in
- ChibiStudio 20 by default.
-- NEW: Now .mk files are able to add their files to a common directory,
- there is no more need to edit various variables in Makefiles
- anymore.
-- NEW: Added to new makefiles the ability to recursively compile everything
- placed under ./source, if present.
-- NEW: Improved the various rules.mk to handle "touching" of all
- included makefiles, now the makefile is no more assumed to
- be called "Makefile".
-- NEW: Added to the Makefiles the ability to change the default build,
- dependencies and configuration directories. This makes possible
- to have multiple non-conflicting makefiles in the same project.
- Updated the various platform.mk implementing "smart build" mode.
+- HAL: Fixed problem with HSI48 on STM32L4xx (bug #922)(backported to 18.2.1).
+- HAL: Fixed invalid implementation of palWaitPadTimeoutS() and
+ palWaitLineTimeoutS() APIs (bug #921)(backported to 18.2.1).
- HAL: Fixed wrong DMA settings for STM32F76x I2C3 and I2C4 (bug #920)
(backported to 18.2.1 and 17.6.4).
- HAL: Fixed wrong flash waiting state for STM32F7xx (bug #918)
(backported to 18.2.1 and 17.6.4).
-- LIB: Fixed heap allocator failing on simulators (bug #917)(backported
- to 17.6.4).
-- STP: Fixed CRT0_FORCE_MSP_INIT flag not defaulted in crt0_v7m.S (bug #916)
- (backported to 17.6.4).
-- EX: Improved MEMS drivers (bug #916)(backported to 17.6.4).
-- HAL: Improved peripheral classes (bug #915)(backported to 17.6.4).
-- HAL: Fixed more instances of bug #843 (bug #914)(backported to 17.6.4
- and 16.1.10).
-- HAL: Fixed Clock selection for SDMMC2 missing in STM32F7 HAL (bug #913).
-- HAL: Fixed STM32 SDMMCv1 driver not setting DMA channel properly for SDCD2
- instance (bug #912)(backported to 17.6.4).
-- LIB: Fixed inner semaphore not updated in chGuardedPoolAllocI() function
- (bug #911).
-- RT: Fixed compile error with assertions enabled and dynamic extensions
- disabled (bug #909)(backported to 17.6.4).
-- HAL: Fixed compile error HAL UART without WAIT (bug #908)(backported to
- 17.6.4 and 16.1.10).
-- RT: Fixed gcc7 implicit-fallthrough (bug #906)(backported to 17.6.4
- and 16.1.10).
-- HAL: Fixed gcc7 implicit-fallthrough (bug #906)(backported to 17.6.4
- and 16.1.10).
-- HAL: Fixed DAC CH2 marked as not present in STM32F091 registry (bug #905)
- (backported to 17.6.4 and 16.1.10).
-- LIB: Fixed chHeapGetSize value is not obtained from the header (bug #904)
- (backported to 17.6.4).
-- HAL: Fixed ADC does not build on STM32F030 (bug #903)(backported to 17.6.4).
-- LIB: Fixed typo for function evtStop (bug #897)(backported to 17.6.4
- and 16.1.10).
-- NIL: Fixed core and Heap allocators not functional in NIL (bug #902)
- (backported to 17.6.3).
-- HAL: Fixed function uartSendFullTimeout() failing on STM32 USARTv1 and
- v2 drivers (bug #901)(backported to 17.6.3 and 16.1.10).
-- HAL: Fixed broken I2C fallback driver (bug #900)(backported to 17.6.3).
-- LIB: Fixed heap buffer alignment not enforced (bug #899)(backported
- to 17.6.3).
-- LIB: Fixed call protocol violation in chCoreAlloc() (bug #896)(backported
- to 17.6.3).
-- RT: Fixed trace Buffer activation bits state reversed in chconf.h
- (bug #895)(backported to 17.6.3).
-- BLD: Fixed USE_OPT not passed to assembler in rules.mk (bug #892)(backported
- to 17.6.3 and 16.1.10).
-- HAL: Fixed IRQ sharing issue in STM32 DMAv1 driver (bug #891)(backported
- to 17.6.3 and 16.1.10).
-- HAL: Fixed various STM32 registry problems (bug #889)(backported to 17.6.2
- and 16.1.10).
-- LIB: Fixed heap allocator returning unaligned blocks (bug #888)(backported
- to 17.6.2).
-- NIL: Fixed duplicated entries in NIL documentation (bug #887)(backported
- to 17.6.1).
-- HAL: Fixed USB GET_DESCRIPTOR not handled for Interface Recipients (bug #885)
- (backported to 17.6.1 and 16.1.9).
-- RT: MAILBOX_DECL size parameter is actually a count (bug #884)
- (backported to 17.6.1 and 16.1.9).
-- HAL: Fixed error in uartReceiveTimeout() and uartSendTimeout() (bug #883)
- (backported to 17.6.1 and 16.1.9).
-- HAL: Fixed TIMx DBL field macro broken (bug #880)(backported
- to 17.6.1 and 16.1.9).
-- HAL: Fixed STM32 SPI problem in spi_lld_start() (bug #879)(backported
- to 17.6.1 and 16.1.9).
-- HAL: Fixed invalid STM32 CAN3 filters initialization (bug #878)
- (backported to 17.6.1).
-- HAL: Fixed missing CAN definitions in STM32L432 registry entry (bug #877)
- (backported to 17.6.1).
-- HAL: Fixed missing STM32_TIM_MAX_CHANNELS definition in STM32L0 registry
- (bug #876)(backported to 17.6.1 and 16.1.9).
-- HAL: Fixed STM32 OTGv1 driver fails on STM32L4 (bug #875)
- (backported to 17.6.1 and 16.1.9).
-- HAL: Fixed wrong I2S and SAI freq divisor (bug #874)
- (backported to 17.6.1).
-- HAL: Fixed wrong SAI1 and SAI2 clock selection (bug #873)
- (backported to 17.6.1).
-- HAL: Fixed invalid number of DMA channels on STM32L011 (bug #872)
- (backported to 17.6.1).
-- HAL: Fixed STM32 USARTv2 serial incorrect buffer size declarations
- (bug #871)(backported to 17.6.1).
-- HAL: Fixed bug in STM32L0xx port related to STM32L0x1 (bug #870)
- (backported to 17.6.1).
-- HAL: Fixed board file configuration for STM32F3 Discovery REVC (bug #869)
- (backported to 17.6.1).
-- HAL: Fixed wrong PPRE2 and LSI related macros in STM32L0 hal lld (bug #868)
- (backported to 17.6.1 and 16.1.9).
-- HAL: Fixed wrong bit mask in STM32L0 hal lld (bug #866)(backported to
- 17.6.1 and 16.1.9).
-- RT: Fixed misplaced assertion in semaphores code (bug #865)(backported to
- 17.6.1 and 16.1.9).
-- RT: Fixed event cast cleanup for compilation warnings (bug #864)(backported
- to 17.6.1 and 16.1.9).
-- HAL: Fixed STM32 USBv1 fails the state check when USB_USE_WAIT is TRUE
- (bug #863)(backported to 17.6.1 and 16.1.9).
-- HAL: Fixed HSI48 clock support is missing in HAL for STM32L4x2 (bug #862).
-- HAL: Fixed incorrect OTG stepping in STM32F412 registry (bug #861)
- (backported to 17.6.1).
-- HAL: Fixed missing DMA I2C3 streams in STM32F411 registry (bug #860)
- (backported to 17.6.1).
-- HAL: Fixed missing Ethernet PHY in some STM32 Nucleo-144 board files
- (bug #859)(backported to 17.6.1).
-- VAR: Fixed priority issue in STM32 Nucleo-64 F401RE demo (bug #858)(backported
- to 17.6.1).
-- VAR: Fixed STM32L053 Discovery demo which is unaligned to standard demos (bug
- #857)(backported to 17.6.1).
-- HAL: Fixed HSI48 which is not correctly enabled in STM32L0xx port (bug #856)
- (backported to 17.6.1).
-- HAL: Fixed unaligned STM32F0xx mcuconf.h files (bug #855)(backported
- to 17.6.1).
-- HAL: Fixed invalid handling of DST flag in STM32 RTCv2 (bug #854)(backported
- to 17.6.1 and 16.1.9).
-- HAL: Fixed extra right parenthesis in STM32F4 registry (bug #853)(backported
- to 17.6.1).
-- EX: Fixed documentation-related issues (bug #852)(backported to 17.6.1).
-- HAL: Fixed documentation-related issues (bug #852)(backported to 17.6.1).
-- HAL: Fixed wrong frame size code in STM32 USARTv2 UART driver (bug #851)
- (backported to 17.6.1 and 16.1.9).
-- NIL: Fixed documentation-related issues (bug #850)(backported to 17.6.1).
-- RT: Fixed documentation-related issues (bug #850)(backported to 17.6.1).
-- RT: Fixed leftover chcustomer.h file (bug #849)(backported to 17.6.1).
-- RT: Fixed invalid check in chchecks.h (bug #848)(backported to 17.6.1).
-- HAL: Fixed STM32F070xB: USART invalid DMA channels (bug #847)(backported
- to 17.6.1).
-- VAR: Fixed CMSIS_OS issue in timers (bug #846)(backported to 17.6.1
- and 16.1.9).
-- HAL: Fixed injected ADC with regular conversion (bug #822).
diff --git a/testhal/ATSAMA5D2/UART/chconf.h b/testhal/ATSAMA5D2/UART/chconf.h index 98659e9c9..a279c96f4 100644 --- a/testhal/ATSAMA5D2/UART/chconf.h +++ b/testhal/ATSAMA5D2/UART/chconf.h @@ -49,7 +49,8 @@ * @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
-#define CH_CFG_ST_FREQUENCY 1000
+//#define CH_CFG_ST_FREQUENCY 1000 /* periodic tick.*/
+#define CH_CFG_ST_FREQUENCY (83000000 / 32) /* tick-less.*/
/**
* @brief Time intervals data size.
@@ -71,7 +72,7 @@ * The value one is not valid, timeouts are rounded up to
* this value.
*/
-#define CH_CFG_ST_TIMEDELTA 0
+#define CH_CFG_ST_TIMEDELTA 2
/** @} */
@@ -467,7 +468,7 @@ * @note This debug option is not currently compatible with the
* tickless mode.
*/
-#define CH_DBG_THREADS_PROFILING TRUE
+#define CH_DBG_THREADS_PROFILING FALSE
/** @} */
diff --git a/testhal/ATSAMA5D2/UART/main.c b/testhal/ATSAMA5D2/UART/main.c index 2150eb3a1..12bf9b55d 100644 --- a/testhal/ATSAMA5D2/UART/main.c +++ b/testhal/ATSAMA5D2/UART/main.c @@ -157,7 +157,7 @@ int main(void) { uartStopReceive(&FUARTD0);
uartStopSend(&FUARTD0);
uartStartReceive(&FUARTD0, BUFFER, buffer);
- uartStartSend(&FUARTD0, 6, message);
+ uartStartSend(&FUARTD0, BUFFER+1, message);
}
chThdSleepMilliseconds(500);
|