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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-07 08:41:42 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2015-11-07 08:41:42 +0000 |
| commit | 4d059c02e9659a1b4b030fef5537267ad2694e08 (patch) | |
| tree | 1af30264b0ce2a6e2c89eb81d59bcbf4ca3ad220 | |
| parent | 6750ea84066ad5f23553d2a8c5e3e61049522df6 (diff) | |
| download | ChibiOS-4d059c02e9659a1b4b030fef5537267ad2694e08.tar.gz ChibiOS-4d059c02e9659a1b4b030fef5537267ad2694e08.tar.bz2 ChibiOS-4d059c02e9659a1b4b030fef5537267ad2694e08.zip | |
Fixed bug #654.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8439 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/common/ARMCMx/nvic.c | 26 | ||||
| -rw-r--r-- | os/hal/ports/common/ARMCMx/nvic.h | 2 | ||||
| -rw-r--r-- | readme.txt | 2 |
3 files changed, 22 insertions, 8 deletions
diff --git a/os/hal/ports/common/ARMCMx/nvic.c b/os/hal/ports/common/ARMCMx/nvic.c index c8f1f21af..605640d8b 100644 --- a/os/hal/ports/common/ARMCMx/nvic.c +++ b/os/hal/ports/common/ARMCMx/nvic.c @@ -56,9 +56,14 @@ */
void nvicEnableVector(uint32_t n, uint32_t prio) {
- NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
- NVIC->ICPR[n >> 5] = 1 << (n & 0x1F);
- NVIC->ISER[n >> 5] = 1 << (n & 0x1F);
+#if defined(__CORE_CM0_H_GENERIC)
+ NVIC->IP[_IP_IDX(n)] = (NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n))) |
+ (NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(n));
+#else
+ NVIC->IP[n] = NVIC_PRIORITY_MASK(prio);
+#endif
+ NVIC->ICPR[n >> 5U] = 1U << (n & 0x1FU);
+ NVIC->ISER[n >> 5U] = 1U << (n & 0x1FU);
}
/**
@@ -68,8 +73,12 @@ void nvicEnableVector(uint32_t n, uint32_t prio) { */
void nvicDisableVector(uint32_t n) {
- NVIC->ICER[n >> 5] = 1 << (n & 0x1F);
- NVIC->IP[n] = 0;
+ NVIC->ICER[n >> 5U] = 1U << (n & 0x1FU);
+#if defined(__CORE_CM0_H_GENERIC)
+ NVIC->IP[_IP_IDX(n)] = NVIC->IP[_IP_IDX(n)] & ~(0xFFU << _BIT_SHIFT(n));
+#else
+ NVIC->IP[n] = 0U;
+#endif
}
/**
@@ -80,9 +89,12 @@ void nvicDisableVector(uint32_t n) { */
void nvicSetSystemHandlerPriority(uint32_t handler, uint32_t prio) {
- osalDbgCheck(handler <= 12);
+ osalDbgCheck(handler <= 12U);
-#if defined(__CORE_CM7_H_GENERIC)
+#if defined(__CORE_CM0_H_GENERIC)
+ SCB->SHP[_SHP_IDX(handler)] = (SCB->SHP[_SHP_IDX(handler)] & ~(0xFFU << _BIT_SHIFT(handler))) |
+ (NVIC_PRIORITY_MASK(prio) << _BIT_SHIFT(handler));
+#elif defined(__CORE_CM7_H_GENERIC)
SCB->SHPR[handler] = NVIC_PRIORITY_MASK(prio);
#else
SCB->SHP[handler] = NVIC_PRIORITY_MASK(prio);
diff --git a/os/hal/ports/common/ARMCMx/nvic.h b/os/hal/ports/common/ARMCMx/nvic.h index 636cba3b1..868843b73 100644 --- a/os/hal/ports/common/ARMCMx/nvic.h +++ b/os/hal/ports/common/ARMCMx/nvic.h @@ -66,7 +66,7 @@ /**
* @brief Priority level to priority mask conversion macro.
*/
-#define NVIC_PRIORITY_MASK(prio) ((prio) << (8 - __NVIC_PRIO_BITS))
+#define NVIC_PRIORITY_MASK(prio) ((prio) << (8U - (unsigned)__NVIC_PRIO_BITS))
/*===========================================================================*/
/* External declarations. */
diff --git a/readme.txt b/readme.txt index 3cd2d010e..16ee96e32 100644 --- a/readme.txt +++ b/readme.txt @@ -141,6 +141,8 @@ to 3.0.3 and 2.6.10).
- HAL: Fixed wrong vector name for STM32F3xx EXTI33 (bug #655)(backported
to 3.0.3 and 2.6.10).
+- HAL: Fixed nvicEnableVector broken for Cortex-M0 (bug #654)(backported
+ to 3.0.3).
- HAL: Fixed no demo for nucleo STM32F072RB board (bug #652).
- HAL: Fixed missing RCC and ISR definitions for STM32F0xx timers (bug #651)
(backported to 3.0.3 and 2.6.10).
|