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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-04-25 09:33:30 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-04-25 09:33:30 +0000 |
commit | 464ab9297ac103d973421c2210e74f8de4c12f36 (patch) | |
tree | 633458893df8ad17fd2e4e2c43d04958ca684e42 | |
parent | 1fbfd93a98f00a583ded741fa0218b436e1172ac (diff) | |
download | ChibiOS-464ab9297ac103d973421c2210e74f8de4c12f36.tar.gz ChibiOS-464ab9297ac103d973421c2210e74f8de4c12f36.tar.bz2 ChibiOS-464ab9297ac103d973421c2210e74f8de4c12f36.zip |
Updated MSP port.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4134 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r-- | boards/OLIMEX_MSP430_P1611/board.c | 12 | ||||
-rw-r--r-- | demos/MSP430-MSP430x1611-GCC/Makefile | 4 | ||||
-rw-r--r-- | docs/reports/MSP430F1611-8.txt | 34 | ||||
-rw-r--r-- | os/hal/platforms/MSP430/hal_lld.c | 7 | ||||
-rw-r--r-- | os/hal/platforms/MSP430/hal_lld.h | 4 | ||||
-rw-r--r-- | os/hal/platforms/MSP430/pal_lld.c | 26 | ||||
-rw-r--r-- | os/hal/platforms/MSP430/pal_lld.h | 58 | ||||
-rw-r--r-- | os/hal/platforms/MSP430/serial_lld.c | 10 | ||||
-rw-r--r-- | os/ports/GCC/MSP430/chcore.h | 6 | ||||
-rw-r--r-- | os/ports/GCC/MSP430/rules.mk | 3 | ||||
-rw-r--r-- | readme.txt | 3 |
11 files changed, 99 insertions, 68 deletions
diff --git a/boards/OLIMEX_MSP430_P1611/board.c b/boards/OLIMEX_MSP430_P1611/board.c index c81a4d5bc..70534158e 100644 --- a/boards/OLIMEX_MSP430_P1611/board.c +++ b/boards/OLIMEX_MSP430_P1611/board.c @@ -18,8 +18,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <signal.h>
-
#include "ch.h"
#include "hal.h"
@@ -52,7 +50,7 @@ const PALConfig pal_default_config = };
#endif
-CH_IRQ_HANDLER(TIMERA0_VECTOR) {
+CH_IRQ_HANDLER(TIMERA0) {
CH_IRQ_PROLOGUE();
@@ -68,6 +66,14 @@ CH_IRQ_HANDLER(TIMERA0_VECTOR) { */
void boardInit(void) {
+#if USE_MSP430_USART0
+ P3SEL |= (1 << 4) | (1 << 5);
+#endif
+
+#if USE_MSP430_USART1
+ P3SEL |= (1 << 6) | (1 << 7);
+#endif
+
/*
* Timer 0 setup, uses SMCLK as source.
*/
diff --git a/demos/MSP430-MSP430x1611-GCC/Makefile b/demos/MSP430-MSP430x1611-GCC/Makefile index 2d5568fd7..f454a4500 100644 --- a/demos/MSP430-MSP430x1611-GCC/Makefile +++ b/demos/MSP430-MSP430x1611-GCC/Makefile @@ -41,7 +41,7 @@ endif PROJECT = ch
# Define linker script file here
-LDSCRIPT = mspgcc/msp430x1611.x
+LDSCRIPT = msp430.x
# Imported source files
CHIBIOS = ../..
@@ -111,7 +111,7 @@ CPPWARN = -Wall -Wextra #
# List all default C defines here, like -D_DEBUG=1
-DDEFS =
+DDEFS = -D__MSP430F1611__
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
diff --git a/docs/reports/MSP430F1611-8.txt b/docs/reports/MSP430F1611-8.txt index 1db29c9e3..fd2ac8942 100644 --- a/docs/reports/MSP430F1611-8.txt +++ b/docs/reports/MSP430F1611-8.txt @@ -5,13 +5,13 @@ Settings: MCLK=XT2CLK 8MHz *** ChibiOS/RT test suite
***
-*** Kernel: 2.4.0
-*** Compiled: Jan 22 2012 - 20:48:24
-*** Compiler: GCC 3.2.3
+*** Kernel: 2.5.0
+*** Compiled: Apr 25 2012 - 11:28:57
+*** Compiler: GCC 4.6.3 20120301 (mspgcc LTS 20120406 unpatched)
*** Architecture: MSP430
*** Core Variant: MSP430
*** Port Info: None
-*** Platform: MSP430x16x
+*** Platform: MSP430
*** Test Board: Olimex MSP430-P1611
----------------------------------------------------------------------------
@@ -100,55 +100,55 @@ Settings: MCLK=XT2CLK 8MHz --- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
---- Score : 20374 msgs/S, 40748 ctxswc/S
+--- Score : 22756 msgs/S, 45512 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
---- Score : 16780 msgs/S, 33560 ctxswc/S
+--- Score : 17949 msgs/S, 35898 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
---- Score : 16780 msgs/S, 33560 ctxswc/S
+--- Score : 17949 msgs/S, 35898 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
---- Score : 59056 ctxswc/S
+--- Score : 67552 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 11542 threads/S
+--- Score : 12780 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 15539 threads/S
+--- Score : 18071 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 5293 reschedules/S, 31758 ctxswc/S
+--- Score : 5449 reschedules/S, 32694 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 38172 ctxswc/S
+--- Score : 42200 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 68708 bytes/S
+--- Score : 73280 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 60970 timers/S
+--- Score : 69456 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 150700 wait+signal/S
+--- Score : 140132 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 81500 lock+unlock/S
+--- Score : 76804 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
---- System: 224 bytes
+--- System: 222 bytes
--- Thread: 38 bytes
--- Timer : 10 bytes
--- Semaph: 6 bytes
diff --git a/os/hal/platforms/MSP430/hal_lld.c b/os/hal/platforms/MSP430/hal_lld.c index 1acb4d474..0e8ac71dc 100644 --- a/os/hal/platforms/MSP430/hal_lld.c +++ b/os/hal/platforms/MSP430/hal_lld.c @@ -56,9 +56,10 @@ */
void hal_lld_init(void) {
- /*
- * Clock sources setup.
- */
+ /* RTC initially stopped.*/
+ WDTCTL = 0x5A80;
+
+ /* Clock sources setup.*/
DCOCTL = VAL_DCOCTL;
BCSCTL1 = VAL_BCSCTL1;
#if MSP430_USE_CLOCK == MSP430_CLOCK_SOURCE_XT2CLK
diff --git a/os/hal/platforms/MSP430/hal_lld.h b/os/hal/platforms/MSP430/hal_lld.h index 85944038f..ea04b45ff 100644 --- a/os/hal/platforms/MSP430/hal_lld.h +++ b/os/hal/platforms/MSP430/hal_lld.h @@ -29,7 +29,7 @@ #ifndef _HAL_LLD_H_
#define _HAL_LLD_H_
-#include "msp430x16x.h"
+#include "msp430.h"
/*===========================================================================*/
/* Driver constants. */
@@ -43,7 +43,7 @@ /**
* @brief Platform name.
*/
-#define PLATFORM_NAME "MSP430x16x"
+#define PLATFORM_NAME "MSP430"
#define MSP430_CLOCK_SOURCE_XT2CLK 0 /**< @brief XT2CLK clock selector. */
#define MSP430_CLOCK_SOURCE_DCOCLK 1 /**< @brief DCOCLK clock selector. */
diff --git a/os/hal/platforms/MSP430/pal_lld.c b/os/hal/platforms/MSP430/pal_lld.c index 6728d1ac5..562b0efb7 100644 --- a/os/hal/platforms/MSP430/pal_lld.c +++ b/os/hal/platforms/MSP430/pal_lld.c @@ -63,41 +63,41 @@ void _pal_lld_init(const PALConfig *config) {
#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
- IOPORT1->iop_full.ie.reg_p = 0;
- IOPORT1->iop_full.ifg.reg_p = 0;
- IOPORT1->iop_full.sel.reg_p = 0;
+ IOPORT1->iop_full.ie = 0;
+ IOPORT1->iop_full.ifg = 0;
+ IOPORT1->iop_full.sel = 0;
IOPORT1->iop_common.out = config->P1Data.out;
IOPORT1->iop_common.dir = config->P1Data.dir;
#endif
#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
- IOPORT2->iop_full.ie.reg_p = 0;
- IOPORT2->iop_full.ifg.reg_p = 0;
- IOPORT2->iop_full.sel.reg_p = 0;
+ IOPORT2->iop_full.ie = 0;
+ IOPORT2->iop_full.ifg = 0;
+ IOPORT2->iop_full.sel = 0;
IOPORT2->iop_common.out = config->P2Data.out;
IOPORT2->iop_common.dir = config->P2Data.dir;
#endif
#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
- IOPORT3->iop_simple.sel.reg_p = 0;
+ IOPORT3->iop_simple.sel = 0;
IOPORT3->iop_common.out = config->P3Data.out;
IOPORT3->iop_common.dir = config->P3Data.dir;
#endif
#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
- IOPORT4->iop_simple.sel.reg_p = 0;
+ IOPORT4->iop_simple.sel = 0;
IOPORT4->iop_common.out = config->P4Data.out;
IOPORT4->iop_common.dir = config->P4Data.dir;
#endif
#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
- IOPORT5->iop_simple.sel.reg_p = 0;
+ IOPORT5->iop_simple.sel = 0;
IOPORT5->iop_common.out = config->P5Data.out;
IOPORT5->iop_common.dir = config->P5Data.dir;
#endif
#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
- IOPORT6->iop_simple.sel.reg_p = 0;
+ IOPORT6->iop_simple.sel = 0;
IOPORT6->iop_common.out = config->P6Data.out;
IOPORT6->iop_common.dir = config->P6Data.dir;
#endif
@@ -126,12 +126,12 @@ void _pal_lld_setgroupmode(ioportid_t port, switch (mode) {
case PAL_MODE_RESET:
case PAL_MODE_INPUT:
- port->iop_common.dir.reg_p &= ~mask;
+ port->iop_common.dir &= ~mask;
break;
case PAL_MODE_UNCONNECTED:
- port->iop_common.out.reg_p |= mask;
+ port->iop_common.out |= mask;
case PAL_MODE_OUTPUT_PUSHPULL:
- port->iop_common.dir.reg_p |= mask;
+ port->iop_common.dir |= mask;
break;
}
}
diff --git a/os/hal/platforms/MSP430/pal_lld.h b/os/hal/platforms/MSP430/pal_lld.h index 8c035c3f6..a2909a0e7 100644 --- a/os/hal/platforms/MSP430/pal_lld.h +++ b/os/hal/platforms/MSP430/pal_lld.h @@ -45,14 +45,40 @@ /*===========================================================================*/
/**
+ * @brief Simple MSP430 I/O port.
+ */
+struct msp430_port_simple_t {
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
+ volatile uint8_t sel;
+};
+
+/**
+ * @brief Full MSP430 I/O port.
+ */
+struct msp430_port_full_t {
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
+ volatile uint8_t ifg;
+ volatile uint8_t ies;
+ volatile uint8_t ie;
+ volatile uint8_t sel;
+#if defined(__MSP430_HAS_PORT1_R__) || defined(__MSP430_HAS_PORT2_R__)
+ volatile uint8_t ren;
+#endif
+};
+
+/**
* @brief Simplified MSP430 I/O port representation.
* @details This structure represents the common part of all the MSP430 I/O
* ports.
*/
struct msp430_port_common {
- ioregister_t in;
- ioregister_t out;
- ioregister_t dir;
+ volatile uint8_t in;
+ volatile uint8_t out;
+ volatile uint8_t dir;
};
/**
@@ -60,16 +86,16 @@ struct msp430_port_common { */
typedef union {
struct msp430_port_common iop_common;
- struct port_simple_t iop_simple;
- struct port_full_t iop_full;
+ struct msp430_port_simple_t iop_simple;
+ struct msp430_port_full_t iop_full;
} msp430_ioport_t;
/**
* @brief Setup registers common to all the MSP430 ports.
*/
typedef struct {
- ioregister_t out;
- ioregister_t dir;
+ volatile uint8_t out;
+ volatile uint8_t dir;
} msp430_dio_setup_t;
/**
@@ -158,7 +184,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT1__) || \
defined(__MSP430_HAS_PORT1_R__) || \
defined(__DOXYGEN__)
-#define IOPORT1 ((ioportid_t)0x0020)
+#define IOPORT1 ((ioportid_t)P1IN_)
#endif
/**
@@ -168,7 +194,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT2__) || \
defined(__MSP430_HAS_PORT2_R__) || \
defined(__DOXYGEN__)
-#define IOPORT2 ((ioportid_t)0x0028)
+#define IOPORT2 ((ioportid_t)P2IN_)
#endif
/**
@@ -178,7 +204,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT3__) || \
defined(__MSP430_HAS_PORT3_R__) || \
defined(__DOXYGEN__)
-#define IOPORT3 ((ioportid_t)0x0018)
+#define IOPORT3 ((ioportid_t)P3IN_)
#endif
/**
@@ -188,7 +214,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT4__) || \
defined(__MSP430_HAS_PORT4_R__) || \
defined(__DOXYGEN__)
-#define IOPORT4 ((ioportid_t)0x001c)
+#define IOPORT4 ((ioportid_t)P4IN_)
#endif
/**
@@ -198,7 +224,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT5__) || \
defined(__MSP430_HAS_PORT5_R__) || \
defined(__DOXYGEN__)
-#define IOPORT5 ((ioportid_t)0x0030)
+#define IOPORT5 ((ioportid_t)P5IN_)
#endif
/**
@@ -208,7 +234,7 @@ typedef msp430_ioport_t *ioportid_t; #if defined(__MSP430_HAS_PORT6__) || \
defined(__MSP430_HAS_PORT6_R__) || \
defined(__DOXYGEN__)
-#define IOPORT6 ((ioportid_t)0x0034)
+#define IOPORT6 ((ioportid_t)P6IN_)
#endif
/*===========================================================================*/
@@ -236,7 +262,7 @@ typedef msp430_ioport_t *ioportid_t; *
* @notapi
*/
-#define pal_lld_readport(port) ((port)->iop_common.in.reg_p)
+#define pal_lld_readport(port) ((port)->iop_common.in)
/**
* @brief Reads the output latch.
@@ -248,7 +274,7 @@ typedef msp430_ioport_t *ioportid_t; *
* @notapi
*/
-#define pal_lld_readlatch(port) ((port)->iop_common.out.reg_p)
+#define pal_lld_readlatch(port) ((port)->iop_common.out)
/**
* @brief Writes a bits mask on a I/O port.
@@ -260,7 +286,7 @@ typedef msp430_ioport_t *ioportid_t; *
* @notapi
*/
-#define pal_lld_writeport(port, bits) ((port)->iop_common.out.reg_p = (bits))
+#define pal_lld_writeport(port, bits) ((port)->iop_common.out = (bits))
/**
* @brief Pads group mode setup.
diff --git a/os/hal/platforms/MSP430/serial_lld.c b/os/hal/platforms/MSP430/serial_lld.c index a2cec716c..5420fc201 100644 --- a/os/hal/platforms/MSP430/serial_lld.c +++ b/os/hal/platforms/MSP430/serial_lld.c @@ -26,7 +26,7 @@ * @{
*/
-#include <signal.h>
+//#include <signal.h>
#include "ch.h"
#include "hal.h"
@@ -177,7 +177,7 @@ static void usart1_deinit(void) { *
* @isr
*/
-CH_IRQ_HANDLER(USART0TX_VECTOR) {
+CH_IRQ_HANDLER(USART0TX) {
msg_t b;
CH_IRQ_PROLOGUE();
@@ -198,7 +198,7 @@ CH_IRQ_HANDLER(USART0TX_VECTOR) { *
* @isr
*/
-CH_IRQ_HANDLER(USART0RX_VECTOR) {
+CH_IRQ_HANDLER(USART0RX) {
uint8_t urctl;
CH_IRQ_PROLOGUE();
@@ -268,14 +268,10 @@ void sd_lld_init(void) { #if USE_MSP430_USART0
sdObjectInit(&SD1, NULL, notify1);
- /* I/O pins for USART0.*/
- P3SEL |= BV(4) + BV(5);
#endif
#if USE_MSP430_USART1
sdObjectInit(&SD2, NULL, notify2);
- /* I/O pins for USART1.*/
- P3SEL |= BV(6) + BV(7);
#endif
}
diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h index d5cc1f512..290a9fbdb 100644 --- a/os/ports/GCC/MSP430/chcore.h +++ b/os/ports/GCC/MSP430/chcore.h @@ -30,7 +30,7 @@ #define _CHCORE_H_
#include <iomacros.h>
-#include <msp430/common.h>
+#include <isr_compat.h>
#if CH_DBG_ENABLE_STACK_CHECK
#error "option CH_DBG_ENABLE_STACK_CHECK not supported by this port"
@@ -194,12 +194,14 @@ struct context { dbg_check_unlock(); \
}
+#define ISRNAME(pre, id) pre##id
+
/**
* @brief IRQ handler function declaration.
* @note @p id can be a function name or a vector number depending on the
* port implementation.
*/
-#define PORT_IRQ_HANDLER(id) interrupt(id) _vect_##id(void)
+#define PORT_IRQ_HANDLER(id) ISR(id, ISRNAME(vect, id))
/**
* @brief Port-related initialization code.
diff --git a/os/ports/GCC/MSP430/rules.mk b/os/ports/GCC/MSP430/rules.mk index 81eb443eb..e5df10916 100644 --- a/os/ports/GCC/MSP430/rules.mk +++ b/os/ports/GCC/MSP430/rules.mk @@ -4,9 +4,6 @@ OPT = $(USE_OPT)
COPT = $(USE_COPT)
CPPOPT = $(USE_CPPOPT)
-ifeq ($(USE_CURRP_CACHING),yes)
- OPT += -ffixed-r7 -DCH_CURRP_REGISTER_CACHE='"r7"'
-endif
ifeq ($(USE_LINK_GC),yes)
OPT += -ffunction-sections -fdata-sections
endif
diff --git a/readme.txt b/readme.txt index 23b72f607..d75ea68de 100644 --- a/readme.txt +++ b/readme.txt @@ -113,6 +113,9 @@ 3484947)(backported to 2.4.1).
- FIX: Fixed various minor documentation errors (bug 3484942)(backported
to 2.4.1).
+- NEW: Updated the MSP port to work with the latest MSPGCC compiler (4.6.3
+ LTS 20120406 unpatched), now the old MSPGCC 3.2.3 is no more supported
+ (backported to 2.4.1).
- NEW: EXT driver improved, now it is possible to reprogram channels at
runtime without necessarily specifying a new configuration.
TODO: Update AT91SAM7 EXT driver.
|