diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-01-04 22:00:44 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-01-04 22:00:44 +0000 |
| commit | 45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30 (patch) | |
| tree | fbe7dfe5a4b5b7ada42bb33d6153f4fdc1515a4b | |
| parent | 05b919403101cc7395776aa24b92369564c91968 (diff) | |
| download | ChibiOS-45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30.tar.gz ChibiOS-45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30.tar.bz2 ChibiOS-45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30.zip | |
Documentation related fixes and updated all the mcuconf.h for the STM32.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3735 35acf78f-673a-0410-8e92-d51de3d6d3f4
54 files changed, 174 insertions, 114 deletions
diff --git a/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h b/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h index 7a7c6c25a..46b8fa64e 100644 --- a/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h +++ b/demos/ARMCM3-STM32F100-DISCOVERY/mcuconf.h @@ -44,6 +44,8 @@ #define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_ADCPRE STM32_ADCPRE_DIV2
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32F103-FATFS/mcuconf.h b/demos/ARMCM3-STM32F103-FATFS/mcuconf.h index bce5518d6..87f445909 100644 --- a/demos/ARMCM3-STM32F103-FATFS/mcuconf.h +++ b/demos/ARMCM3-STM32F103-FATFS/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32F103-G++/mcuconf.h b/demos/ARMCM3-STM32F103-G++/mcuconf.h index bce5518d6..87f445909 100644 --- a/demos/ARMCM3-STM32F103-G++/mcuconf.h +++ b/demos/ARMCM3-STM32F103-G++/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32F103/mcuconf.h b/demos/ARMCM3-STM32F103/mcuconf.h index c6dc0ce8a..4f4b30d91 100644 --- a/demos/ARMCM3-STM32F103/mcuconf.h +++ b/demos/ARMCM3-STM32F103/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h b/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h index b0dedacac..8fbc1d918 100644 --- a/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h +++ b/demos/ARMCM3-STM32F103ZG-FATFS/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32F107/mcuconf.h b/demos/ARMCM3-STM32F107/mcuconf.h index b8d72d861..2890f7d5e 100644 --- a/demos/ARMCM3-STM32F107/mcuconf.h +++ b/demos/ARMCM3-STM32F107/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
#define STM32_MCO STM32_MCO_PLL3
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h b/demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h index ab26b77a3..7317c1048 100644 --- a/demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h +++ b/demos/ARMCM3-STM32L152-DISCOVERY/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h index 73999ec6b..39ecfd38c 100644 --- a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h +++ b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c index 8afaf39a2..4572b7ea3 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.c +++ b/os/hal/platforms/STM32F1xx/hal_lld.c @@ -74,7 +74,7 @@ void hal_lld_init(void) { dmaInit();
#endif
- /* Programmable voltage detector enable. */
+ /* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/platforms/STM32F1xx/hal_lld.h b/os/hal/platforms/STM32F1xx/hal_lld.h index cf8e09cbe..0d8e0b8b3 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.h +++ b/os/hal/platforms/STM32F1xx/hal_lld.h @@ -48,24 +48,26 @@ /*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
+
/**
* @name PWR_CR register bits definitions
* @{
*/
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
+#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
+#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
+#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
+#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
+#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
+#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
+#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
+
/**
* @brief Enables or disables the programmable voltage detector.
*/
diff --git a/os/hal/platforms/STM32F1xx/stm32_rcc.h b/os/hal/platforms/STM32F1xx/stm32_rcc.h index 41cf725cb..877da08db 100644 --- a/os/hal/platforms/STM32F1xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F1xx/stm32_rcc.h @@ -171,7 +171,7 @@ /** @} */
/**
- * @brief ADC peripherals specific RCC operations
+ * @name ADC peripherals specific RCC operations
* @{
*/
/**
@@ -203,7 +203,7 @@ /** @} */
/**
- * @brief Backup domain interface specific RCC operations
+ * @name Backup domain interface specific RCC operations
* @{
*/
/**
@@ -244,7 +244,7 @@ /** @} */
/**
- * @brief PWR interface specific RCC operations
+ * @name PWR interface specific RCC operations
* @{
*/
/**
@@ -276,7 +276,7 @@ /** @} */
/**
- * @brief CAN peripherals specific RCC operations
+ * @name CAN peripherals specific RCC operations
* @{
*/
/**
@@ -308,7 +308,7 @@ /** @} */
/**
- * @brief DMA peripherals specific RCC operations
+ * @name DMA peripherals specific RCC operations
* @{
*/
/**
@@ -369,7 +369,7 @@ /** @} */
/**
- * @brief ETH peripheral specific RCC operations
+ * @name ETH peripheral specific RCC operations
* @{
*/
/**
@@ -405,7 +405,7 @@ /** @} */
/**
- * @brief I2C peripherals specific RCC operations
+ * @name I2C peripherals specific RCC operations
* @{
*/
/**
@@ -464,7 +464,7 @@ /** @} */
/**
- * @brief SDIO peripheral specific RCC operations
+ * @name SDIO peripheral specific RCC operations
* @{
*/
/**
@@ -497,7 +497,7 @@ /** @} */
/**
- * @brief SPI peripherals specific RCC operations
+ * @name SPI peripherals specific RCC operations
* @{
*/
/**
@@ -583,7 +583,7 @@ /** @} */
/**
- * @brief TIM peripherals specific RCC operations
+ * @name TIM peripherals specific RCC operations
* @{
*/
/**
@@ -750,7 +750,7 @@ /** @} */
/**
- * @brief USART/UART peripherals specific RCC operations
+ * @name USART/UART peripherals specific RCC operations
* @{
*/
/**
@@ -890,7 +890,7 @@ /** @} */
/**
- * @brief USB peripheral specific RCC operations
+ * @name USB peripheral specific RCC operations
* @{
*/
/**
diff --git a/os/hal/platforms/STM32F2xx/hal_lld.c b/os/hal/platforms/STM32F2xx/hal_lld.c index a56051a05..9b9359090 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.c +++ b/os/hal/platforms/STM32F2xx/hal_lld.c @@ -78,7 +78,7 @@ void hal_lld_init(void) { dmaInit();
#endif
- /* Programmable voltage detector enable. */
+ /* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/platforms/STM32F2xx/hal_lld.h b/os/hal/platforms/STM32F2xx/hal_lld.h index 280cbea43..1113ec44b 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.h +++ b/os/hal/platforms/STM32F2xx/hal_lld.h @@ -140,13 +140,13 @@ */
#define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
+#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
+#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
+#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
+#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
+#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
+#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
+#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**
diff --git a/os/hal/platforms/STM32F2xx/stm32_rcc.h b/os/hal/platforms/STM32F2xx/stm32_rcc.h index 39d674bd0..da30c6518 100644 --- a/os/hal/platforms/STM32F2xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F2xx/stm32_rcc.h @@ -256,7 +256,7 @@ /** @} */
/**
- * @brief ADC peripherals specific RCC operations
+ * @name ADC peripherals specific RCC operations
* @{
*/
/**
@@ -336,7 +336,7 @@ /** @} */
/**
- * @brief DMA peripheral specific RCC operations
+ * @name DMA peripheral specific RCC operations
* @{
*/
/**
@@ -391,7 +391,7 @@ /** @} */
/**
- * @brief PWR interface specific RCC operations
+ * @name PWR interface specific RCC operations
* @{
*/
/**
@@ -423,7 +423,7 @@ /** @} */
/**
- * @brief I2C peripherals specific RCC operations
+ * @name I2C peripherals specific RCC operations
* @{
*/
/**
@@ -503,7 +503,7 @@ /** @} */
/**
- * @brief SPI peripherals specific RCC operations
+ * @name SPI peripherals specific RCC operations
* @{
*/
/**
@@ -583,7 +583,7 @@ /** @} */
/**
- * @brief TIM peripherals specific RCC operations
+ * @name TIM peripherals specific RCC operations
* @{
*/
/**
@@ -744,7 +744,7 @@ /** @} */
/**
- * @brief USART/UART peripherals specific RCC operations
+ * @name USART/UART peripherals specific RCC operations
* @{
*/
/**
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c index 71b8ad219..02905b6bd 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.c +++ b/os/hal/platforms/STM32F4xx/hal_lld.c @@ -78,7 +78,7 @@ void hal_lld_init(void) { dmaInit();
#endif
- /* Programmable voltage detector enable. */
+ /* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index 953a7af45..43549fdd9 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -139,13 +139,13 @@ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
+#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
+#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
+#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
+#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
+#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
+#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
+#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index a20274b26..be600e44f 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -256,7 +256,7 @@ /** @} */
/**
- * @brief ADC peripherals specific RCC operations
+ * @name ADC peripherals specific RCC operations
* @{
*/
/**
@@ -336,7 +336,7 @@ /** @} */
/**
- * @brief DMA peripheral specific RCC operations
+ * @name DMA peripheral specific RCC operations
* @{
*/
/**
@@ -391,7 +391,7 @@ /** @} */
/**
- * @brief PWR interface specific RCC operations
+ * @name PWR interface specific RCC operations
* @{
*/
/**
@@ -423,7 +423,7 @@ /** @} */
/**
- * @brief I2C peripherals specific RCC operations
+ * @name I2C peripherals specific RCC operations
* @{
*/
/**
@@ -503,7 +503,7 @@ /** @} */
/**
- * @brief SPI peripherals specific RCC operations
+ * @name SPI peripherals specific RCC operations
* @{
*/
/**
@@ -583,7 +583,7 @@ /** @} */
/**
- * @brief TIM peripherals specific RCC operations
+ * @name TIM peripherals specific RCC operations
* @{
*/
/**
@@ -744,7 +744,7 @@ /** @} */
/**
- * @brief USART/UART peripherals specific RCC operations
+ * @name USART/UART peripherals specific RCC operations
* @{
*/
/**
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.c b/os/hal/platforms/STM32L1xx/hal_lld.c index 69619dead..f4b1b80e7 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.c +++ b/os/hal/platforms/STM32L1xx/hal_lld.c @@ -75,7 +75,7 @@ void hal_lld_init(void) { dmaInit();
#endif
- /* Programmable voltage detector enable. */
+ /* Programmable voltage detector enable.*/
#if STM32_PVD_ENABLE
rccEnablePWRInterface(FALSE);
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h index c11c9ccd8..79d2ca725 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.h +++ b/os/hal/platforms/STM32L1xx/hal_lld.h @@ -69,13 +69,13 @@ #define STM32_PLS_MASK (7 << 5) /**< PLS bits mask. */
#define STM32_PLS_LEV0 (0 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 0. */
-#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 0. */
+#define STM32_PLS_LEV1 (1 << 5) /**< PVD level 1. */
+#define STM32_PLS_LEV2 (2 << 5) /**< PVD level 2. */
+#define STM32_PLS_LEV3 (3 << 5) /**< PVD level 3. */
+#define STM32_PLS_LEV4 (4 << 5) /**< PVD level 4. */
+#define STM32_PLS_LEV5 (5 << 5) /**< PVD level 5. */
+#define STM32_PLS_LEV6 (6 << 5) /**< PVD level 6. */
+#define STM32_PLS_LEV7 (7 << 5) /**< PVD level 7. */
/** @} */
/**
diff --git a/os/hal/platforms/STM32L1xx/stm32_rcc.h b/os/hal/platforms/STM32L1xx/stm32_rcc.h index 9068adc5a..0969aad91 100644 --- a/os/hal/platforms/STM32L1xx/stm32_rcc.h +++ b/os/hal/platforms/STM32L1xx/stm32_rcc.h @@ -177,7 +177,7 @@ /** @} */
/**
- * @brief ADC peripherals specific RCC operations
+ * @name ADC peripherals specific RCC operations
* @{
*/
/**
@@ -207,7 +207,7 @@ /** @} */
/**
- * @brief DMA peripheral specific RCC operations
+ * @name DMA peripheral specific RCC operations
* @{
*/
/**
@@ -237,7 +237,7 @@ /** @} */
/**
- * @brief PWR interface specific RCC operations
+ * @name PWR interface specific RCC operations
* @{
*/
/**
@@ -269,7 +269,7 @@ /** @} */
/**
- * @brief I2C peripherals specific RCC operations
+ * @name I2C peripherals specific RCC operations
* @{
*/
/**
@@ -324,7 +324,7 @@ /** @} */
/**
- * @brief SPI peripherals specific RCC operations
+ * @name SPI peripherals specific RCC operations
* @{
*/
/**
@@ -379,7 +379,7 @@ /** @} */
/**
- * @brief TIM peripherals specific RCC operations
+ * @name TIM peripherals specific RCC operations
* @{
*/
/**
@@ -459,7 +459,7 @@ /** @} */
/**
- * @brief USART/UART peripherals specific RCC operations
+ * @name USART/UART peripherals specific RCC operations
* @{
*/
/**
@@ -539,7 +539,7 @@ /** @} */
/**
- * @brief USB peripheral specific RCC operations
+ * @name USB peripheral specific RCC operations
* @{
*/
/**
diff --git a/readme.txt b/readme.txt index ddca8e345..facab0666 100644 --- a/readme.txt +++ b/readme.txt @@ -79,6 +79,7 @@ - FIX: Fixed SYSCFG clock not started in STM32L1/F4 HALs (bug 3449139).
- FIX: Fixed wrong definitions in STM32L-Discovery board file (bug 3449076).
- OPT: Improved the exception exit code in the GCC Cortex-Mx ports.
+- NEW: Added PVD support to the HAL of all STM32s, by Barthess.
- NEW: Added to the HAL driver the handling of an abstract realtime free
running counter, added the capability to all the STM32 HALs.
- NEW: Modified ARM and ARMCMx build rules to allow parallel build. Now the
diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index c6dc0ce8a..4f4b30d91 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index bf077cbae..06882a795 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -36,15 +36,17 @@ * HAL driver system settings.
*/
#define STM32_SW STM32_SW_HSI
-//#define STM32_PLLSRC STM32_PLLSRC_HSE
-//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
-//#define STM32_PLLMUL_VALUE 9
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV1
#define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_ADCPRE STM32_ADCPRE_DIV4
-//#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 011b609ae..9d9300daf 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index dc4d3960c..a8c187a44 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -43,6 +43,8 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index f37ecca3c..ea55a44f8 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index b8d72d861..2890f7d5e 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3
#define STM32_MCO STM32_MCO_PLL3
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index f3a1f4c8b..51d1e12ab 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -36,8 +36,6 @@ * HAL driver system settings.
*/
#define STM32_SW STM32_SW_PLL
-#define STM32_PVD_ENABLE TRUE
-#define STM32_PLS STM32_PLS_LEV7
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9
@@ -47,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE TRUE
+#define STM32_PLS STM32_PLS_LEV7
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 0ac17c3fd..054b3bc03 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -44,6 +44,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_MCO STM32_MCO_NOCLOCK
#define STM32_RTC STM32_RTC_LSE
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index d70b08473..4acb6f58d 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 4b23c2e7d..27278f054 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USBPRE STM32_USBPRE_DIV1P5
#define STM32_MCO STM32_MCO_NOCLOCK
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 183b0834d..ef52484f4 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE TRUE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 0af8019ee..7a77b422f 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
@@ -63,7 +60,9 @@ #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_RTC STM32_RTC_LSE
-
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 5260d9a73..a383e7753 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 5260d9a73..a383e7753 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 3cc0fb2e3..93d4f6aec 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 60a3e2bd1..b42a8feab 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 797091a3d..1fa7f6615 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_HIGH
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
+#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index b17805089..9db07a695 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index b1e760697..e5f0ce333 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 0e6333b7a..482b34a8a 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 8a232fe4d..74a5bf578 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
-#define STM32_VOS STM32_VOS_1P8
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_RTCSEL STM32_RTCSEL_LSE
#define STM32_RTCPRE STM32_RTCPRE_DIV2
+#define STM32_VOS STM32_VOS_1P8
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
/*
* ADC driver system settings.
|