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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-10-07 09:22:10 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-10-07 09:22:10 +0000
commit40932b20589b66407578a84eb573dd0bfc5395cd (patch)
tree0068560c4728634acb6af9826fd2e6bf9768ce4c
parent0f2e8f0b01edd1a0389426b316f491acf49af596 (diff)
downloadChibiOS-40932b20589b66407578a84eb573dd0bfc5395cd.tar.gz
ChibiOS-40932b20589b66407578a84eb573dd0bfc5395cd.tar.bz2
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Enabled TRNG on L4+.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12344 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat
-rw-r--r--demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h7
-rw-r--r--os/hal/ports/STM32/STM32L4xx+/hal_lld.h5
-rw-r--r--os/hal/ports/STM32/STM32L4xx+/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h28
-rw-r--r--os/hal/ports/STM32/STM32L4xx+/stm32_registry.h3
-rw-r--r--testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h7
-rw-r--r--testhal/STM32/multi/TRNG/.cproject34
-rw-r--r--testhal/STM32/multi/TRNG/Makefile6
-rw-r--r--tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl7
9 files changed, 95 insertions, 3 deletions
diff --git a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
index 027d310bb..324bf6c70 100644
--- a/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32L4R5ZI-NUCLEO144/cfg/mcuconf.h
@@ -94,7 +94,7 @@
#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
-#define STM32_CLK48SEL STM32_CLK48SEL_PLL
+#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
#define STM32_ADFSDMSEL STM32_ADFSDMSEL_SAI1CLK
@@ -272,6 +272,11 @@
#define STM32_ST_USE_TIMER 2
/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1 FALSE
+
+/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
diff --git a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
index df8515aa8..23723d822 100644
--- a/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L4xx+/hal_lld.h
@@ -2138,6 +2138,11 @@
#define STM32_USBCLK STM32_48CLK
/**
+ * @brief RNG clock point.
+ */
+#define STM32_RNGCLK STM32_48CLK
+
+/**
* @brief ADC clock frequency.
*/
#if (STM32_ADCSEL == STM32_ADCSEL_NOCLK) || defined(__DOXYGEN__)
diff --git a/os/hal/ports/STM32/STM32L4xx+/platform.mk b/os/hal/ports/STM32/STM32L4xx+/platform.mk
index d4b905ea0..aaf6b7910 100644
--- a/os/hal/ports/STM32/STM32L4xx+/platform.mk
+++ b/os/hal/ports/STM32/STM32L4xx+/platform.mk
@@ -27,6 +27,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv3/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv3/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/RNGv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk
diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
index b72ee0f29..56c261c76 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_rcc.h
@@ -626,6 +626,34 @@
/** @} */
/**
+ * @name RNG peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the RNG peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableRNG(lp) rccEnableAHB2(RCC_AHB2ENR_RNGEN, lp)
+
+/**
+ * @brief Disables the RNG peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableRNG() rccDisableAHB2(RCC_AHB2ENR_RNGEN)
+
+/**
+ * @brief Resets the RNG peripheral.
+ *
+ * @api
+ */
+#define rccResetRNG() rccResetAHB3(RCC_AHB2RSTR_RNGRST)
+/** @} */
+
+/**
* @name SDMMC peripheral specific RCC operations
* @{
*/
diff --git a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
index f31872e86..c6b4432a9 100644
--- a/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
@@ -194,6 +194,9 @@
/* QUADSPI attributes.*/
#define STM32_HAS_QUADSPI1 FALSE
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
/* RTC attributes.*/
#define STM32_HAS_RTC TRUE
#define STM32_RTC_HAS_SUBSECONDS TRUE
diff --git a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
index edc33c54a..f0aa00c67 100644
--- a/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
+++ b/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
@@ -94,7 +94,7 @@
#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
-#define STM32_CLK48SEL STM32_CLK48SEL_PLL
+#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
#define STM32_ADFSDMSEL STM32_ADFSDMSEL_SAI1CLK
@@ -272,6 +272,11 @@
#define STM32_ST_USE_TIMER 2
/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1 FALSE
+
+/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
diff --git a/testhal/STM32/multi/TRNG/.cproject b/testhal/STM32/multi/TRNG/.cproject
index 14d0bd252..bcf922c70 100644
--- a/testhal/STM32/multi/TRNG/.cproject
+++ b/testhal/STM32/multi/TRNG/.cproject
@@ -69,6 +69,40 @@
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
+ <cconfiguration id="0.365230168.523175374.763979647">
+ <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.763979647" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32L4R5ZI-Nucleo144">
+ <externalSettings/>
+ <extensions>
+ <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+ </extensions>
+ </storageModule>
+ <storageModule moduleId="cdtBuildSystem" version="4.0.0">
+ <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.763979647" name="Build for STM32L4R5ZI-Nucleo144" parent="org.eclipse.cdt.build.core.prefbase.cfg">
+ <folderInfo id="0.365230168.523175374.763979647." name="/" resourcePath="">
+ <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.2084888168" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
+ <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.2084888168.288780185" name=""/>
+ <builder arguments="-f ./make/stm32l4r5zi_nucleo144.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.492713508" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.libs.379612833" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.471867183" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1279469968" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.507502567" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1966021132" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ <tool id="org.eclipse.cdt.build.core.settings.holder.1760956911" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
+ <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1302676825" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
+ </tool>
+ </toolChain>
+ </folderInfo>
+ </configuration>
+ </storageModule>
+ <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+ </cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="STM32-TRNG.null.1829068891" name="STM32-TRNG"/>
diff --git a/testhal/STM32/multi/TRNG/Makefile b/testhal/STM32/multi/TRNG/Makefile
index 8fed918b3..6266997ef 100644
--- a/testhal/STM32/multi/TRNG/Makefile
+++ b/testhal/STM32/multi/TRNG/Makefile
@@ -8,11 +8,17 @@ all:
+@make --no-print-directory -f ./make/stm32l476_discovery.make all
@echo ====================================================================
@echo
+ @echo === Building for STM32L4R5ZI-Nucleo144 =============================
+ +@make --no-print-directory -f ./make/stm32l4r5zi_nucleo144.make all
+ @echo ====================================================================
+ @echo
clean:
@echo
+@make --no-print-directory -f ./make/stm32l476_discovery.make clean
@echo
+ +@make --no-print-directory -f ./make/stm32l4r5zi_nucleo144.make clean
+ @echo
#
##############################################################################
diff --git a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
index 59508f676..652b2342e 100644
--- a/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
+++ b/tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
@@ -105,7 +105,7 @@
#define STM32_I2C3SEL ${doc.STM32_I2C3SEL!"STM32_I2C3SEL_SYSCLK"}
#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK1"}
#define STM32_LPTIM2SEL ${doc.STM32_LPTIM2SEL!"STM32_LPTIM2SEL_PCLK1"}
-#define STM32_CLK48SEL ${doc.STM32_CLK48SEL!"STM32_CLK48SEL_PLL"}
+#define STM32_CLK48SEL ${doc.STM32_CLK48SEL!"STM32_CLK48SEL_PLLSAI1"}
#define STM32_ADCSEL ${doc.STM32_ADCSEL!"STM32_ADCSEL_SYSCLK"}
#define STM32_DFSDMSEL ${doc.STM32_DFSDMSEL!"STM32_DFSDMSEL_PCLK2"}
#define STM32_ADFSDMSEL ${doc.STM32_ADFSDMSEL!"STM32_ADFSDMSEL_SAI1CLK"}
@@ -283,6 +283,11 @@
#define STM32_ST_USE_TIMER ${doc.STM32_ST_USE_TIMER!"2"}
/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1 ${doc.STM32_TRNG_USE_RNG1!"FALSE"}
+
+/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 ${doc.STM32_UART_USE_USART1!"FALSE"}
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-02 03:28:36 +0000