git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8488 35acf78f-673a-0410-8e92-d51de3d6d3f4

5 files changed, 24 insertions, 27 deletions

diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/debug/RT-STM32L152RE-NUCLEO (OpenOCD, Flash and Run).launch b/demos/STM32/RT-STM32L053R8-NUCLEO/debug/RT-STM32L053R8-NUCLEO (OpenOCD, Flash and Run).launch
index c058fad60..9a792695a 100644
--- a/demos/STM32/RT-STM32L053R8-NUCLEO/debug/RT-STM32L152RE-NUCLEO (OpenOCD, Flash and Run).launch
+++ b/demos/STM32/RT-STM32L053R8-NUCLEO/debug/RT-STM32L053R8-NUCLEO (OpenOCD, Flash and Run).launch
@@ -39,7 +39,7 @@
 <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>

 <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RT-STM32L053R8-NUCLEO"/>

 <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>

-<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.1984968159"/>

+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.603687198"/>

 <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">

 <listEntry value="/RT-STM32L053R8-NUCLEO"/>

 </listAttribute>

diff --git a/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h
index ad56a50fd..1dede17e8 100644
--- a/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h
+++ b/demos/STM32/RT-STM32L053R8-NUCLEO/mcuconf.h
@@ -41,9 +41,9 @@
 #define STM32_PVD_ENABLE                    FALSE

 #define STM32_PLS                           STM32_PLS_LEV0

 #define STM32_HSI16_ENABLED                 TRUE

-#define STM32_LSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   FALSE

 #define STM32_HSE_ENABLED                   FALSE

-#define STM32_LSE_ENABLED                   FALSE

+#define STM32_LSE_ENABLED                   TRUE

 #define STM32_ADC_CLOCK_ENABLED             TRUE

 #define STM32_USB_CLOCK_ENABLED             TRUE

 #define STM32_MSIRANGE                      STM32_MSIRANGE_2M

@@ -56,7 +56,7 @@
 #define STM32_PPRE2                         STM32_PPRE2_DIV1

 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

 #define STM32_MCOPRE                        STM32_MCOPRE_DIV1

-#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+#define STM32_RTCSEL                        STM32_RTCSEL_LSE

 #define STM32_RTCPRE                        STM32_RTCPRE_DIV2

 #define STM32_USART1SEL                     STM32_USART1SEL_APB

 #define STM32_USART2SEL                     STM32_USART2SEL_APB

diff --git a/os/hal/boards/ST_NUCLEO_L053R8/board.h b/os/hal/boards/ST_NUCLEO_L053R8/board.h
index 863160d17..9a9035ba4 100644
--- a/os/hal/boards/ST_NUCLEO_L053R8/board.h
+++ b/os/hal/boards/ST_NUCLEO_L053R8/board.h
@@ -29,11 +29,10 @@
 

 /*

  * Board oscillators-related settings.

- * NOTE: LSE not fitted.

  * NOTE: HSE not fitted.

  */

 #if !defined(STM32_LSECLK)

-#define STM32_LSECLK                0U

+#define STM32_LSECLK                32768U

 #endif

 

 #define STM32_LSEDRV                (3U << 11U)

@@ -138,23 +137,6 @@
 #define GPIOH_PIN15                 15U

 

 /*

- * IO lines assignments.

- */

-#define LINE_USART_TX               PAL_LINE(GPIOA, 2U)

-#define LINE_USART_RX               PAL_LINE(GPIOA, 3U)

-#define LINE_LED_GREEN              PAL_LINE(GPIOA, 5U)

-#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)

-#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)

-

-#define LINE_SWO                    PAL_LINE(GPIOB, 3U)

-

-#define LINE_BUTTON                 PAL_LINE(GPIOC, 13U)

-

-

-#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)

-#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)

-

-/*

  * I/O ports initial setup, this configuration is established soon after reset

  * in the initialization code.

  * Please refer to the STM32 Reference Manual for details.

@@ -167,10 +149,10 @@
 #define PIN_ODR_HIGH(n)             (1U << (n))

 #define PIN_OTYPE_PUSHPULL(n)       (0U << (n))

 #define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))

-#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))

+#define PIN_OSPEED_VERYLOW(n)           (0U << ((n) * 2U))

 #define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))

-#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))

-#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))

+#define PIN_OSPEED_MEDIUM(n)          (2U << ((n) * 2U))

+#define PIN_OSPEED_HIGH(n)           (3U << ((n) * 2U))

 #define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))

 #define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))

 #define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))

diff --git a/os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg
index b257ff9bb..e5ad052a5 100644
--- a/os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg
+++ b/os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg
@@ -12,7 +12,7 @@
   <board_id>ST_NUCLEO_L053R8</board_id>
   <board_functions></board_functions>
   <subtype>STM32L053xx</subtype>
-  <clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
+  <clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="32768"
   	LSEBypass="false" LSEDrive="3 High Drive (default)" />
   <ports>
     <GPIOA>
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
index 766677575..31241386b 100644
--- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
@@ -497,6 +497,21 @@
 #error "Using a wrong mcuconf.h file, STM32L0xx_MCUCONF not defined"

 #endif

 

+/*

+ * Board files sanity checks.

+ */

+#if !defined(STM32_LSECLK)

+#error "STM32_LSECLK not defined in board.h"

+#endif

+

+#if !defined(STM32_LSEDRV)

+#error "STM32_LSEDRV not defined in board.h"

+#endif

+

+#if !defined(STM32_HSECLK)

+#error "STM32_HSECLK not defined in board.h"

+#endif

+

 /* Voltage related limits.*/

 #if (STM32_VOS == STM32_VOS_1P8) || defined(__DOXYGEN__)

 /**