diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-11-11 10:47:38 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-11-11 10:47:38 +0000 |
| commit | 3c0d50260180d4d8ec6ee6aa5a46e7e178e4af4b (patch) | |
| tree | c93c080216c0cc41a575303f41ab81c815232809 | |
| parent | 3693a12c72af7bcca240a80746eb74815752fcdc (diff) | |
| download | ChibiOS-3c0d50260180d4d8ec6ee6aa5a46e7e178e4af4b.tar.gz ChibiOS-3c0d50260180d4d8ec6ee6aa5a46e7e178e4af4b.tar.bz2 ChibiOS-3c0d50260180d4d8ec6ee6aa5a46e7e178e4af4b.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6436 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/platforms/STM32F0xx/hal_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F30x/hal_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F37x/hal_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.c | 6 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.h | 1 |
5 files changed, 12 insertions, 7 deletions
diff --git a/os/hal/platforms/STM32F0xx/hal_lld.c b/os/hal/platforms/STM32F0xx/hal_lld.c index debc51ea3..be9ccf1eb 100644 --- a/os/hal/platforms/STM32F0xx/hal_lld.c +++ b/os/hal/platforms/STM32F0xx/hal_lld.c @@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) { #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else
/* No LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */
diff --git a/os/hal/platforms/STM32F30x/hal_lld.c b/os/hal/platforms/STM32F30x/hal_lld.c index 5c1d1efb1..1df31f277 100644 --- a/os/hal/platforms/STM32F30x/hal_lld.c +++ b/os/hal/platforms/STM32F30x/hal_lld.c @@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) { #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else
/* No LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */
diff --git a/os/hal/platforms/STM32F37x/hal_lld.c b/os/hal/platforms/STM32F37x/hal_lld.c index a47ab59fc..ba6100056 100644 --- a/os/hal/platforms/STM32F37x/hal_lld.c +++ b/os/hal/platforms/STM32F37x/hal_lld.c @@ -62,10 +62,10 @@ static void hal_lld_backup_domain_init(void) { #if STM32_LSE_ENABLED
#if defined(STM32_LSE_BYPASS)
/* LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
#else
/* No LSE Bypass.*/
- RCC->BDCR = STM32_LSEDRV | RCC_BDCR_LSEON;
+ RCC->BDCR |= STM32_LSEDRV | RCC_BDCR_LSEON;
#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c index bac4b6675..fc8043675 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.c +++ b/os/hal/platforms/STM32F4xx/hal_lld.c @@ -61,7 +61,13 @@ static void hal_lld_backup_domain_init(void) { }
#if STM32_LSE_ENABLED
+#if defined(STM32_LSE_BYPASS)
+ /* LSE Bypass.*/
+ RCC->BDCR |= RCC_BDCR_LSEON | RCC_BDCR_LSEBYP;
+#else
+ /* No LSE Bypass.*/
RCC->BDCR |= RCC_BDCR_LSEON;
+#endif
while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0)
; /* Waits until LSE is stable. */
#endif
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h index ce3e73bfd..6cad76724 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.h +++ b/os/hal/platforms/STM32F4xx/hal_lld.h @@ -20,7 +20,6 @@ * @pre This module requires the following macros to be defined in the
* @p board.h file:
* - STM32_LSECLK.
- * - STM32_LSEDRV.
* - STM32_LSE_BYPASS (optionally).
* - STM32_HSECLK.
* - STM32_HSE_BYPASS (optionally).
|