git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3488 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 44 insertions, 44 deletions

diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h
index 227f96ce9..d93e4a125 100644
--- a/boards/ST_STM32F4_DISCOVERY/board.h
+++ b/boards/ST_STM32F4_DISCOVERY/board.h
@@ -159,15 +159,15 @@
                                      PIN_PUDR_PULLDOWN(GPIOA_SWCLK) |       \

                                      PIN_PUDR_PULLUP(15))

 #define VAL_GPIOA_ODR               0xFFFFFFFF

-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(4, 6) |                    \

-                                     PIN_AFIO_AF(5, 5) |                    \

-                                     PIN_AFIO_AF(6, 5) |                    \

-                                     PIN_AFIO_AF(7, 5))

-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(10, 10) |                  \

-                                     PIN_AFIO_AF(11, 10) |                  \

-                                     PIN_AFIO_AF(12, 10) |                  \

-                                     PIN_AFIO_AF(13, 0) |                   \

-                                     PIN_AFIO_AF(14, 0))

+#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_LRCK, 6) |           \

+                                     PIN_AFIO_AF(GPIOA_SPC, 5) |            \

+                                     PIN_AFIO_AF(GPIOA_SDO, 5) |            \

+                                     PIN_AFIO_AF(GPIOA_SDI, 5))

+#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) |     \

+                                     PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) |     \

+                                     PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) |     \

+                                     PIN_AFIO_AF(GPIOA_SWDIO, 0) |          \

+                                     PIN_AFIO_AF(GPIOA_SWCLK, 0))

 

 /*

  * Port B setup.

@@ -175,7 +175,6 @@
  * PB3  - GPIOB_SWO             (alternate 0).

  * PB6  - GPIOB_SCL             (alternate 4).

  * PB9  - GPIOB_SDA             (alternate 4).

- * PB10 - GPIOB_SCK             (alternate 5).

  */

 #define VAL_GPIOB_MODER             (PIN_MODE_INPUT(0) |                    \

                                      PIN_MODE_INPUT(1) |                    \

@@ -187,7 +186,7 @@
                                      PIN_MODE_INPUT(7) |                    \

                                      PIN_MODE_INPUT(8) |                    \

                                      PIN_MODE_ALTERNATE(GPIOB_SDA) |        \

-                                     PIN_MODE_ALTERNATE(GPIOB_SCK) |        \

+                                     PIN_MODE_INPUT(10) |                   \

                                      PIN_MODE_INPUT(11) |                   \

                                      PIN_MODE_INPUT(12) |                   \

                                      PIN_MODE_INPUT(13) |                   \

@@ -206,23 +205,21 @@
                                      PIN_PUDR_PULLUP(7) |                   \

                                      PIN_PUDR_PULLUP(8) |                   \

                                      PIN_PUDR_FLOATING(GPIOB_SDA) |         \

-                                     PIN_PUDR_FLOATING(GPIOB_SCK) |         \

+                                     PIN_PUDR_PULLUP(10) |                  \

                                      PIN_PUDR_PULLUP(11) |                  \

                                      PIN_PUDR_PULLUP(12) |                  \

                                      PIN_PUDR_PULLUP(13) |                  \

                                      PIN_PUDR_PULLUP(14) |                  \

                                      PIN_PUDR_PULLUP(15))

 #define VAL_GPIOB_ODR               0xFFFFFFFF

-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(3, 0) |                    \

-                                     PIN_AFIO_AF(6, 4))

-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(9, 4) |                    \

-                                     PIN_AFIO_AF(10, 5))

+#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_SWO, 0) |            \

+                                     PIN_AFIO_AF(GPIOB_SCL, 4))

+#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_SDA, 4))

 

 /*

  * Port C setup.

  * All input with pull-up except:

  * PC0  - GPIOC_OTG_FS_POWER_ON (output push-pull).

- * PC3  - GPIOC_DOUT            (alternate 5).

  * PC7  - GPIOC_MCLK            (alternate 6).

  * PC10 - GPIOC_SCLK            (alternate 6).

  * PC12 - GPIOC_SDIN            (alternate 6).

@@ -230,7 +227,7 @@
 #define VAL_GPIOC_MODER             (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\

                                      PIN_MODE_INPUT(1) |                    \

                                      PIN_MODE_INPUT(2) |                    \

-                                     PIN_MODE_ALTERNATE(GPIOC_DOUT) |       \

+                                     PIN_MODE_INPUT(3) |                    \

                                      PIN_MODE_INPUT(4) |                    \

                                      PIN_MODE_INPUT(5) |                    \

                                      PIN_MODE_INPUT(6) |                    \

@@ -248,7 +245,7 @@
 #define VAL_GPIOC_PUPDR             (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\

                                      PIN_PUDR_PULLUP(1) |                   \

                                      PIN_PUDR_PULLUP(2) |                   \

-                                     PIN_PUDR_FLOATING(GPIOC_DOUT)  |       \

+                                     PIN_PUDR_PULLUP(3) |                   \

                                      PIN_PUDR_PULLUP(4) |                   \

                                      PIN_PUDR_PULLUP(5) |                   \

                                      PIN_PUDR_PULLUP(6) |                   \

@@ -262,10 +259,9 @@
                                      PIN_PUDR_PULLUP(14) |                  \

                                      PIN_PUDR_PULLUP(15))

 #define VAL_GPIOC_ODR               0xFFFFFFFF

-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(3, 5) |                    \

-                                     PIN_AFIO_AF(7, 6))

-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(10, 6) |                   \

-                                     PIN_AFIO_AF(12, 6))

+#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_MCLK, 6))

+#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_SCLK, 6) |           \

+                                     PIN_AFIO_AF(GPIOC_SDIN, 6))

 

 /*

  * Port D setup.

diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c
index d12da4215..2414cc559 100644
--- a/testhal/STM32F4xx/SPI/main.c
+++ b/testhal/STM32F4xx/SPI/main.c
@@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) {
   (void)p;

   chRegSetThreadName("SPI thread 1");

   while (TRUE) {

-    spiAcquireBus(&SPID1);              /* Acquire ownership of the bus.    */

+    spiAcquireBus(&SPID2);              /* Acquire ownership of the bus.    */

     palSetPad(GPIOD, GPIOD_LED5);       /* LED ON.                          */

-    spiStart(&SPID1, &hs_spicfg);       /* Setup transfer parameters.       */

-    spiSelect(&SPID1);                  /* Slave Select assertion.          */

-    spiExchange(&SPID1, 512,

+    spiStart(&SPID2, &hs_spicfg);       /* Setup transfer parameters.       */

+    spiSelect(&SPID2);                  /* Slave Select assertion.          */

+    spiExchange(&SPID2, 512,

                 txbuf, rxbuf);          /* Atomic transfer operations.      */

-    spiUnselect(&SPID1);                /* Slave Select de-assertion.       */

-    spiReleaseBus(&SPID1);              /* Ownership release.               */

+    spiUnselect(&SPID2);                /* Slave Select de-assertion.       */

+    spiReleaseBus(&SPID2);              /* Ownership release.               */

   }

   return 0;

 }

@@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) {
   (void)p;

   chRegSetThreadName("SPI thread 2");

   while (TRUE) {

-    spiAcquireBus(&SPID1);              /* Acquire ownership of the bus.    */

+    spiAcquireBus(&SPID2);              /* Acquire ownership of the bus.    */

     palClearPad(GPIOD, GPIOD_LED5);     /* LED OFF.                         */

-    spiStart(&SPID1, &ls_spicfg);       /* Setup transfer parameters.       */

-    spiSelect(&SPID1);                  /* Slave Select assertion.          */

-    spiExchange(&SPID1, 512,

+    spiStart(&SPID2, &ls_spicfg);       /* Setup transfer parameters.       */

+    spiSelect(&SPID2);                  /* Slave Select assertion.          */

+    spiExchange(&SPID2, 512,

                 txbuf, rxbuf);          /* Atomic transfer operations.      */

-    spiUnselect(&SPID1);                /* Slave Select de-assertion.       */

-    spiReleaseBus(&SPID1);              /* Ownership release.               */

+    spiUnselect(&SPID2);                /* Slave Select de-assertion.       */

+    spiReleaseBus(&SPID2);              /* Ownership release.               */

   }

   return 0;

 }

@@ -106,16 +106,16 @@ int main(void) {
   chSysInit();

 

   /*

-   * SPI1 I/O pins setup.

+   * SPI2 I/O pins setup.

    */

-  palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) |

-                          PAL_STM32_OSPEED_HIGHEST);                /* SCK. */

-  palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) |

-                          PAL_STM32_OSPEED_HIGHEST);                /* MISO.*/

-  palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5) |

-                          PAL_STM32_OSPEED_HIGHEST);                /* MOSI.*/

+  palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) |

+                           PAL_STM32_OSPEED_HIGHEST);       /* New SCK.     */

+  palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) |

+                           PAL_STM32_OSPEED_HIGHEST);       /* New MISO.    */

+  palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) |

+                           PAL_STM32_OSPEED_HIGHEST);       /* New MOSI.    */

   palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL |

-                           PAL_STM32_OSPEED_HIGHEST);

+                           PAL_STM32_OSPEED_HIGHEST);       /* New CS.      */

   palSetPad(GPIOB, 12);

 

   /*

diff --git a/testhal/STM32F4xx/SPI/readme.txt b/testhal/STM32F4xx/SPI/readme.txt
index c1914bc43..2a7751877 100644
--- a/testhal/STM32F4xx/SPI/readme.txt
+++ b/testhal/STM32F4xx/SPI/readme.txt
@@ -8,7 +8,11 @@ The demo runs on an ST STM32F4-Discovery board.
 

 ** The Demo **

 

-The application demonstrates the use of the STM32 SPI driver.

+The application demonstrates the use of the STM32F4xx SPI driver.

+

+** Board Setup **

+

+- Connect PB14 and PB15 together for SPI loop-back.

 

 ** Build Procedure **