git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@278 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 322 insertions, 0 deletions

diff --git a/ports/ARM7-AT91SAM7X/mii.h b/ports/ARM7-AT91SAM7X/mii.h
new file mode 100644
index 000000000..062d074bc
--- /dev/null
+++ b/ports/ARM7-AT91SAM7X/mii.h
@@ -0,0 +1,152 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * Parts of this file are borrowed by the Linux include file linux/mii.h:

+ * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)

+ */

+

+#ifndef _MII_H_

+#define _MII_H_

+

+/* Generic MII registers. */

+#define MII_BMCR            0x00        /* Basic mode control register */

+#define MII_BMSR            0x01        /* Basic mode status register  */

+#define MII_PHYSID1         0x02        /* PHYS ID 1                   */

+#define MII_PHYSID2         0x03        /* PHYS ID 2                   */

+#define MII_ADVERTISE       0x04        /* Advertisement control reg   */

+#define MII_LPA             0x05        /* Link partner ability reg    */

+#define MII_EXPANSION       0x06        /* Expansion register          */

+#define MII_CTRL1000        0x09        /* 1000BASE-T control          */

+#define MII_STAT1000        0x0a        /* 1000BASE-T status           */

+#define MII_ESTATUS         0x0f        /* Extended Status */

+#define MII_DCOUNTER        0x12        /* Disconnect counter          */

+#define MII_FCSCOUNTER      0x13        /* False carrier counter       */

+#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */

+#define MII_RERRCOUNTER     0x15        /* Receive error counter       */

+#define MII_SREVISION       0x16        /* Silicon revision            */

+#define MII_RESV1           0x17        /* Reserved...                 */

+#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */

+#define MII_PHYADDR         0x19        /* PHY address                 */

+#define MII_RESV2           0x1a        /* Reserved...                 */

+#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */

+#define MII_NCONFIG         0x1c        /* Network interface config    */

+

+/* Basic mode control register. */

+#define BMCR_RESV               0x003f  /* Unused...                   */

+#define BMCR_SPEED1000          0x0040  /* MSB of Speed (1000)         */

+#define BMCR_CTST               0x0080  /* Collision test              */

+#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */

+#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */

+#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */

+#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */

+#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */

+#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */

+#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */

+#define BMCR_RESET              0x8000  /* Reset the DP83840           */

+

+/* Basic mode status register. */

+#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */

+#define BMSR_JCD                0x0002  /* Jabber detected             */

+#define BMSR_LSTATUS            0x0004  /* Link status                 */

+#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */

+#define BMSR_RFAULT             0x0010  /* Remote fault detected       */

+#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */

+#define BMSR_RESV               0x00c0  /* Unused...                   */

+#define BMSR_ESTATEN            0x0100  /* Extended Status in R15 */

+#define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX */

+#define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX */

+#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */

+#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */

+#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */

+#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */

+#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */

+

+/* Advertisement control register. */

+#define ADVERTISE_SLCT          0x001f  /* Selector bits               */

+#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */

+#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */

+#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */

+#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */

+#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */

+#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */

+#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */

+#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */

+#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */

+#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */

+#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */

+#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */

+#define ADVERTISE_RESV          0x1000  /* Unused...                   */

+#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */

+#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */

+#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */

+

+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \

+                        ADVERTISE_CSMA)

+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \

+                       ADVERTISE_100HALF | ADVERTISE_100FULL)

+

+/* Link partner ability register. */

+#define LPA_SLCT                0x001f  /* Same as advertise selector  */

+#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */

+#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */

+#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */

+#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */

+#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */

+#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */

+#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */

+#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/

+#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */

+#define LPA_PAUSE_CAP           0x0400  /* Can pause                   */

+#define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */

+#define LPA_RESV                0x1000  /* Unused...                   */

+#define LPA_RFAULT              0x2000  /* Link partner faulted        */

+#define LPA_LPACK               0x4000  /* Link partner acked us       */

+#define LPA_NPAGE               0x8000  /* Next page bit               */

+

+#define LPA_DUPLEX              (LPA_10FULL | LPA_100FULL)

+#define LPA_100                 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)

+

+/* Expansion register for auto-negotiation. */

+#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */

+#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */

+#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */

+#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */

+#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */

+#define EXPANSION_RESV          0xffe0  /* Unused...                   */

+

+#define ESTATUS_1000_TFULL      0x2000  /* Can do 1000BT Full */

+#define ESTATUS_1000_THALF      0x1000  /* Can do 1000BT Half */

+

+/* N-way test register. */

+#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */

+#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */

+#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */

+

+/* 1000BASE-T Control register */

+#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */

+#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */

+

+/* 1000BASE-T Status register */

+#define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */

+#define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */

+#define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */

+#define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */

+

+#endif /* _MII_H_ */

diff --git a/ports/ARM7-AT91SAM7X/sam7x_emac.c b/ports/ARM7-AT91SAM7X/sam7x_emac.c
new file mode 100644
index 000000000..5542e74d2
--- /dev/null
+++ b/ports/ARM7-AT91SAM7X/sam7x_emac.c
@@ -0,0 +1,97 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#include <ch.h>

+

+#include "board.h"

+#include "sam7x_emac.h"

+#include "mii.h"

+#include "at91lib/aic.h"

+

+static BufDescriptorEntry rent[EMAC_RECEIVE_BUFFERS] __attribute__((aligned(4)));

+//static BufDescriptorEntry tent[EMAC_TRANSMIT_BUFFERS] __attribute__((aligned(4)));

+static uint8_t rbuffers[128 * EMAC_RECEIVE_BUFFERS] __attribute__((aligned(4)));

+

+EventSource TransmitDone, ReceiveNotEmpty;

+

+#define AT91C_PB15_ERXDV AT91C_PB15_ERXDV_ECRSDV

+#define EMAC_PIN_MASK (AT91C_PB1_ETXEN  | AT91C_PB2_ETX0   | \

+                       AT91C_PB3_ETX1   | AT91C_PB4_ECRS   | \

+                       AT91C_PB5_ERX0   | AT91C_PB6_ERX1   | \

+                       AT91C_PB7_ERXER  | AT91C_PB8_EMDC   | \

+                       AT91C_PB9_EMDIO  | AT91C_PB10_ETX2  | \

+                       AT91C_PB11_ETX3  | AT91C_PB12_ETXER | \

+                       AT91C_PB13_ERX2  | AT91C_PB14_ERX3  | \

+                       AT91C_PB15_ERXDV | AT91C_PB16_ECOL  | \

+                       AT91C_PB17_ERXCK)

+

+/*

+ * EMAC subsystem initialization.

+ */

+void InitEMAC(int prio) {

+  int i;

+

+  for (i = 0; i < EMAC_RECEIVE_BUFFERS; i++) {

+    rent[i].w1 = (uint32_t)&rbuffers[i * 128];

+    rent[i].w2 = 0;

+  }

+  rent[EMAC_RECEIVE_BUFFERS - 1].w1 |= W1_R_WRAP;

+

+  /*

+   * Disables default pullups, the PHY has an internal pulldowns.

+   * Selects MII mode.

+   */

+  AT91C_BASE_PIOB->PIO_PPUDR = AT91C_PB15_ERXDV | AT91C_PB16_ECOL;

+

+  /*

+   * PHY powerdown.

+   */

+  AT91C_BASE_PIOB->PIO_OER = PIOB_PHY_PD;       // Becomes an output.

+  AT91C_BASE_PIOB->PIO_PPUDR = PIOB_PHY_PD;     // Default pullup disabled.

+  AT91C_BASE_PIOB->PIO_CODR = PIOB_PHY_PD;      // Output to low level.

+

+  /*

+   * PHY reset by pulsing the NRST pin.

+   */

+  AT91C_BASE_RSTC->RSTC_RMR = 0xA5000100;

+  AT91C_BASE_RSTC->RSTC_RCR = 0xA5000000 | AT91C_RSTC_EXTRST;

+  while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL))

+    ;

+

+  /*

+   * EMAC pins setup.

+   */

+  AT91C_BASE_PIOB->PIO_ASR = EMAC_PIN_MASK;

+  AT91C_BASE_PIOB->PIO_PDR = EMAC_PIN_MASK;

+  AT91C_BASE_PIOB->PIO_PPUDR = EMAC_PIN_MASK; // ?????

+

+  /*

+   * EMAC setup.

+   */

+  AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE;  // Enable Management Port.

+  AT91C_BASE_EMAC->EMAC_NCFGR |= 2 << 10;       // CLK = MCK / 32

+

+  chThdSleep(5);

+}

+

+/*

+ * Transmits a data buffer (whole ethernet frame).

+ */

+//bool_t EMACTransmit(uint8_t *buf, size_t size) {

+//}

diff --git a/ports/ARM7-AT91SAM7X/sam7x_emac.h b/ports/ARM7-AT91SAM7X/sam7x_emac.h
new file mode 100644
index 000000000..6f06d7a02
--- /dev/null
+++ b/ports/ARM7-AT91SAM7X/sam7x_emac.h
@@ -0,0 +1,73 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#ifndef _SAM7X_EMAC_H_

+#define _SAM7X_EMAC_H_

+

+#define EMAC_RECEIVE_BUFFERS    60

+#define EMAC_TRANSMIT_BUFFERS   12

+

+typedef struct {

+  uint32_t      w1;

+  uint32_t      w2;

+} BufDescriptorEntry;

+

+#define W1_R_OWNERSHIP          0x00000001

+#define W1_R_WRAP               0x00000002

+#define W1_R_ADDRESS_MASK       0xFFFFFFFC

+

+#define W2_R_LENGTH_MASK        0x00000FFF

+#define W2_R_FRAME_START        0x00004000

+#define W2_R_FRAME_END          0x00008000

+#define W2_R_CFI                0x00010000

+#define W2_R_VLAN_PRIO_MASK     0x000E0000

+#define W2_R_PRIO_TAG_DETECTED  0x00100000

+#define W2_R_VLAN_TAG_DETECTED  0x00200000

+#define W2_R_TYPE_ID_MATCH      0x00400000

+#define W2_R_ADDR4_MATCH        0x00800000

+#define W2_R_ADDR3_MATCH        0x01000000

+#define W2_R_ADDR2_MATCH        0x02000000

+#define W2_R_ADDR1_MATCH        0x04000000

+#define W2_R_RFU1               0x08000000

+#define W2_R_ADDR_EXT_MATCH     0x10000000

+#define W2_R_UNICAST_MATCH      0x20000000

+#define W2_R_MULTICAST_MATCH    0x40000000

+#define W2_R_BROADCAST_DETECTED 0x80000000

+

+#define W2_T_LENGTH_MASK        0x000007FF

+#define W2_T_RFU1               0x00003800

+#define W2_T_LAST_BUFFER        0x00004000

+#define W2_T_NO_CRC             0x00008000

+#define W2_T_RFU2               0x07FF0000

+#define W2_T_BUFFERS_EXHAUSTED  0x08000000

+#define W2_T_TRANSMIT_UNDERRUN  0x10000000

+#define W2_T_RETRY_LIMIT_EXC    0x20000000

+#define W2_T_WRAP               0x40000000

+#define W2_T_USED               0x80000000

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void InitEMAC(int prio);

+  bool_t EMACTransmit(uint8_t *buf, size_t size);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _SAM7X_EMAC_H_ */