git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6185 35acf78f-673a-0410-8e92-d51de3d6d3f4

11 files changed, 427 insertions, 416 deletions

diff --git a/demos/ARMCM0-STM32F051-DISCOVERY/Makefile b/demos/ARMCM0-STM32F051-DISCOVERY/Makefile
index 808327ae4..cdaab0ca2 100644
--- a/demos/ARMCM0-STM32F051-DISCOVERY/Makefile
+++ b/demos/ARMCM0-STM32F051-DISCOVERY/Makefile
@@ -59,12 +59,12 @@ PROJECT = ch
 

 # Imported source files and paths

 CHIBIOS = ../..

-include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk

-include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk

+#include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk

+#include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk

 include $(CHIBIOS)/os/hal/hal.mk

-include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk

-include $(CHIBIOS)/os/kernel/kernel.mk

-include $(CHIBIOS)/test/test.mk

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk

+#include $(CHIBIOS)/test/test.mk

 

 # Define linker script file here

 LDSCRIPT= $(PORTLD)/STM32F051x8.ld

@@ -204,4 +204,4 @@ ifeq ($(USE_FWLIB),yes)
   USE_OPT += -DUSE_STDPERIPH_DRIVER

 endif

 

-include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/rules.mk

diff --git a/demos/ARMCM0-STM32F051-DISCOVERY/chconf.h b/demos/ARMCM0-STM32F051-DISCOVERY/chconf.h
index f943ea80c..cb2582597 100644
--- a/demos/ARMCM0-STM32F051-DISCOVERY/chconf.h
+++ b/demos/ARMCM0-STM32F051-DISCOVERY/chconf.h
@@ -40,8 +40,29 @@
  * @details Frequency of the system timer that drives the system ticks. This

  *          setting also defines the system tick time unit.

  */

-#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)

-#define CH_FREQUENCY                    1000

+#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)

+#define CH_CFG_ST_FREQUENCY                 1000

+#endif

+

+/**

+ * @brief   Realtime Counter frequency.

+ * @details Frequency of the system counter used for realtime delays and

+ *          measurements.

+ */

+#if !defined(CH_CFG_RTC_FREQUENCY) || defined(__DOXYGEN__)

+#define CH_CFG_RTC_FREQUENCY                0

+#endif

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)

+#define CH_CFG_TIMEDELTA                    0

 #endif

 

 /**

@@ -51,12 +72,13 @@
  *          disables the preemption for threads with equal priority and the

  *          round robin becomes cooperative. Note that higher priority

  *          threads can still preempt, the kernel is always preemptive.

- *

  * @note    Disabling the round robin preemption makes the kernel more compact

  *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

  */

-#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)

-#define CH_TIME_QUANTUM                 20

+#if !defined(CH_CFG_TIME_QUANTUM) || defined(__DOXYGEN__)

+#define CH_CFG_TIME_QUANTUM                 0

 #endif

 

 /**

@@ -68,27 +90,20 @@
  *

  * @note    In order to let the OS manage the whole RAM the linker script must

  *          provide the @p __heap_base__ and @p __heap_end__ symbols.

- * @note    Requires @p CH_USE_MEMCORE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

  */

-#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)

-#define CH_MEMCORE_SIZE                 0

+#if !defined(CH_CFG_MEMCORE_SIZE) || defined(__DOXYGEN__)

+#define CH_CFG_MEMCORE_SIZE                 0

 #endif

 

 /**

  * @brief   Idle thread automatic spawn suppression.

  * @details When this option is activated the function @p chSysInit()

- *          does not spawn the idle thread automatically. The application has

- *          then the responsibility to do one of the following:

- *          - Spawn a custom idle thread at priority @p IDLEPRIO.

- *          - Change the main() thread priority to @p IDLEPRIO then enter

- *            an endless loop. In this scenario the @p main() thread acts as

- *            the idle thread.

- *          .

- * @note    Unless an idle thread is spawned the @p main() thread must not

- *          enter a sleep state.

- */

-#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)

-#define CH_NO_IDLE_THREAD               FALSE

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop. */

+#if !defined(CH_CFG_NO_IDLE_THREAD) || defined(__DOXYGEN__)

+#define CH_CFG_NO_IDLE_THREAD               FALSE

 #endif

 

 /** @} */

@@ -108,8 +123,8 @@
  * @note    This is not related to the compiler optimization options.

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)

-#define CH_OPTIMIZE_SPEED               TRUE

+#if !defined(CH_CFG_OPTIMIZE_SPEED) || defined(__DOXYGEN__)

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

 #endif

 

 /** @} */

@@ -122,13 +137,24 @@
 /*===========================================================================*/

 

 /**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#if !defined(CH_CFG_USE_TM) || defined(__DOXYGEN__)

+#define CH_CFG_USE_TM                       FALSE

+#endif

+

+/**

  * @brief   Threads registry APIs.

  * @details If enabled then the registry APIs are included in the kernel.

  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)

-#define CH_USE_REGISTRY                 TRUE

+#if !defined(CH_CFG_USE_REGISTRY) || defined(__DOXYGEN__)

+#define CH_CFG_USE_REGISTRY                 TRUE

 #endif

 

 /**

@@ -138,8 +164,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)

-#define CH_USE_WAITEXIT                 TRUE

+#if !defined(CH_CFG_USE_WAITEXIT) || defined(__DOXYGEN__)

+#define CH_CFG_USE_WAITEXIT                 TRUE

 #endif

 

 /**

@@ -148,8 +174,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)

-#define CH_USE_SEMAPHORES               TRUE

+#if !defined(CH_CFG_USE_SEMAPHORES) || defined(__DOXYGEN__)

+#define CH_CFG_USE_SEMAPHORES               TRUE

 #endif

 

 /**

@@ -157,23 +183,12 @@
  * @details If enabled then the threads are enqueued on semaphores by

  *          priority rather than in FIFO order.

  *

- * @note    The default is @p FALSE. Enable this if you have special requirements.

- * @note    Requires @p CH_USE_SEMAPHORES.

- */

-#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)

-#define CH_USE_SEMAPHORES_PRIORITY      FALSE

-#endif

-

-/**

- * @brief   Atomic semaphore API.

- * @details If enabled then the semaphores the @p chSemSignalWait() API

- *          is included in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_SEMAPHORES.

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

  */

-#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)

-#define CH_USE_SEMSW                    TRUE

+#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

 #endif

 

 /**

@@ -182,8 +197,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)

-#define CH_USE_MUTEXES                  TRUE

+#if !defined(CH_CFG_USE_MUTEXES) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MUTEXES                  TRUE

 #endif

 

 /**

@@ -192,10 +207,10 @@
  *          in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_MUTEXES.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

  */

-#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)

-#define CH_USE_CONDVARS                 TRUE

+#if !defined(CH_CFG_USE_CONDVARS) || defined(__DOXYGEN__)

+#define CH_CFG_USE_CONDVARS                 TRUE

 #endif

 

 /**

@@ -204,10 +219,10 @@
  *          specification are included in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_CONDVARS.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

  */

-#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)

-#define CH_USE_CONDVARS_TIMEOUT         TRUE

+#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

 #endif

 

 /**

@@ -216,8 +231,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)

-#define CH_USE_EVENTS                   TRUE

+#if !defined(CH_CFG_USE_EVENTS) || defined(__DOXYGEN__)

+#define CH_CFG_USE_EVENTS                   TRUE

 #endif

 

 /**

@@ -226,10 +241,10 @@
  *          are included in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_EVENTS.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

  */

-#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)

-#define CH_USE_EVENTS_TIMEOUT           TRUE

+#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

 #endif

 

 /**

@@ -239,8 +254,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)

-#define CH_USE_MESSAGES                 TRUE

+#if !defined(CH_CFG_USE_MESSAGES) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MESSAGES                 TRUE

 #endif

 

 /**

@@ -248,11 +263,12 @@
  * @details If enabled then messages are served by priority rather than in

  *          FIFO order.

  *

- * @note    The default is @p FALSE. Enable this if you have special requirements.

- * @note    Requires @p CH_USE_MESSAGES.

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

  */

-#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)

-#define CH_USE_MESSAGES_PRIORITY        FALSE

+#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

 #endif

 

 /**

@@ -261,10 +277,10 @@
  *          included in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_SEMAPHORES.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

  */

-#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)

-#define CH_USE_MAILBOXES                TRUE

+#if !defined(CH_CFG_USE_MAILBOXES) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MAILBOXES                TRUE

 #endif

 

 /**

@@ -273,8 +289,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)

-#define CH_USE_QUEUES                   TRUE

+#if !defined(CH_CFG_USE_QUEUES) || defined(__DOXYGEN__)

+#define CH_CFG_USE_QUEUES                   TRUE

 #endif

 

 /**

@@ -284,8 +300,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)

-#define CH_USE_MEMCORE                  TRUE

+#if !defined(CH_CFG_USE_MEMCORE) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MEMCORE                  TRUE

 #endif

 

 /**

@@ -294,26 +310,12 @@
  *          in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or

- *          @p CH_USE_SEMAPHORES.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

  * @note    Mutexes are recommended.

  */

-#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)

-#define CH_USE_HEAP                     TRUE

-#endif

-

-/**

- * @brief   C-runtime allocator.

- * @details If enabled the the heap allocator APIs just wrap the C-runtime

- *          @p malloc() and @p free() functions.

- *

- * @note    The default is @p FALSE.

- * @note    Requires @p CH_USE_HEAP.

- * @note    The C-runtime may or may not require @p CH_USE_MEMCORE, see the

- *          appropriate documentation.

- */

-#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)

-#define CH_USE_MALLOC_HEAP              FALSE

+#if !defined(CH_CFG_USE_HEAP) || defined(__DOXYGEN__)

+#define CH_CFG_USE_HEAP                     TRUE

 #endif

 

 /**

@@ -323,8 +325,8 @@
  *

  * @note    The default is @p TRUE.

  */

-#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)

-#define CH_USE_MEMPOOLS                 TRUE

+#if !defined(CH_CFG_USE_MEMPOOLS) || defined(__DOXYGEN__)

+#define CH_CFG_USE_MEMPOOLS                 TRUE

 #endif

 

 /**

@@ -333,11 +335,11 @@
  *          in the kernel.

  *

  * @note    The default is @p TRUE.

- * @note    Requires @p CH_USE_WAITEXIT.

- * @note    Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

  */

-#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)

-#define CH_USE_DYNAMIC                  TRUE

+#if !defined(CH_CFG_USE_DYNAMIC) || defined(__DOXYGEN__)

+#define CH_CFG_USE_DYNAMIC                  TRUE

 #endif

 

 /** @} */

@@ -350,6 +352,15 @@
 /*===========================================================================*/

 

 /**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)

+#define CH_DBG_STATISTICS                   FALSE

+#endif

+

+/**

  * @brief   Debug option, system state check.

  * @details If enabled the correct call protocol for system APIs is checked

  *          at runtime.

@@ -357,7 +368,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)

-#define CH_DBG_SYSTEM_STATE_CHECK       FALSE

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

 #endif

 

 /**

@@ -368,7 +379,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)

-#define CH_DBG_ENABLE_CHECKS            FALSE

+#define CH_DBG_ENABLE_CHECKS                TRUE

 #endif

 

 /**

@@ -380,7 +391,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)

-#define CH_DBG_ENABLE_ASSERTS           FALSE

+#define CH_DBG_ENABLE_ASSERTS               TRUE

 #endif

 

 /**

@@ -391,7 +402,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)

-#define CH_DBG_ENABLE_TRACE             FALSE

+#define CH_DBG_ENABLE_TRACE                 TRUE

 #endif

 

 /**

@@ -405,7 +416,7 @@
  *          @p panic_msg variable set to @p NULL.

  */

 #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)

-#define CH_DBG_ENABLE_STACK_CHECK       FALSE

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

 #endif

 

 /**

@@ -417,20 +428,20 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)

-#define CH_DBG_FILL_THREADS             FALSE

+#define CH_DBG_FILL_THREADS                 TRUE

 #endif

 

 /**

  * @brief   Debug option, threads profiling.

- * @details If enabled then a field is added to the @p Thread structure that

+ * @details If enabled then a field is added to the @p thread_t structure that

  *          counts the system ticks occurred while executing the thread.

  *

- * @note    The default is @p TRUE.

- * @note    This debug option is defaulted to TRUE because it is required by

- *          some test cases into the test suite.

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

  */

 #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)

-#define CH_DBG_THREADS_PROFILING        TRUE

+#define CH_DBG_THREADS_PROFILING            TRUE

 #endif

 

 /** @} */

@@ -444,10 +455,10 @@
 

 /**

  * @brief   Threads descriptor structure extension.

- * @details User fields added to the end of the @p Thread structure.

+ * @details User fields added to the end of the @p thread_t structure.

  */

-#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)

-#define THREAD_EXT_FIELDS                                                   \

+#if !defined(CH_CFG_THREAD_EXTRA_FIELDS) || defined(__DOXYGEN__)

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

   /* Add threads custom fields here.*/

 #endif

 

@@ -458,8 +469,8 @@
  * @note    It is invoked from within @p chThdInit() and implicitly from all

  *          the threads creation APIs.

  */

-#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)

-#define THREAD_EXT_INIT_HOOK(tp) {                                          \

+#if !defined(CH_CFG_THREAD_INIT_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

   /* Add threads initialization code here.*/                                \

 }

 #endif

@@ -472,8 +483,8 @@
  * @note    It is also invoked when the threads simply return in order to

  *          terminate.

  */

-#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)

-#define THREAD_EXT_EXIT_HOOK(tp) {                                          \

+#if !defined(CH_CFG_THREAD_EXIT_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

   /* Add threads finalization code here.*/                                  \

 }

 #endif

@@ -482,18 +493,40 @@
  * @brief   Context switch hook.

  * @details This hook is invoked just before switching between threads.

  */

-#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)

-#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+#if !defined(CH_CFG_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

   /* System halt code here.*/                                               \

 }

 #endif

 

 /**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#if !defined(CH_CFG_IDLE_ENTER_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_IDLE_ENTER_HOOK() {                                         \

+}

+#endif

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#if !defined(CH_CFG_IDLE_LEAVE_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                         \

+}

+#endif

+

+/**

  * @brief   Idle Loop hook.

  * @details This hook is continuously invoked by the idle thread loop.

  */

-#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)

-#define IDLE_LOOP_HOOK() {                                                  \

+#if !defined(CH_CFG_IDLE_LOOP_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

   /* Idle loop code here.*/                                                 \

 }

 #endif

@@ -503,8 +536,8 @@
  * @details This hook is invoked in the system tick handler immediately

  *          after processing the virtual timers queue.

  */

-#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)

-#define SYSTEM_TICK_EVENT_HOOK() {                                          \

+#if !defined(CH_CFG_SYSTEM_TICK_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

   /* System tick event code here.*/                                         \

 }

 #endif

@@ -514,8 +547,8 @@
  * @details This hook is invoked in case to a system halting error before

  *          the system is halted.

  */

-#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)

-#define SYSTEM_HALT_HOOK() {                                                \

+#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

   /* System halt code here.*/                                               \

 }

 #endif

diff --git a/os/rt/ports/ARMCMx/chcore_v6m.c b/os/rt/ports/ARMCMx/chcore_v6m.c
index 04f9c6a83..3a81a0ba4 100644
--- a/os/rt/ports/ARMCMx/chcore_v6m.c
+++ b/os/rt/ports/ARMCMx/chcore_v6m.c
@@ -16,13 +16,6 @@
 

     You should have received a copy of the GNU General Public License

     along with this program.  If not, see <http://www.gnu.org/licenses/>.

-

-                                      ---

-

-    A special exception to the GPL can be applied should you wish to distribute

-    a combined work that includes ChibiOS/RT, without being obliged to provide

-    the source code for any proprietary components. See the file exception.txt

-    for full details of how and when the exception can be applied.

 */

 

 /**

@@ -36,24 +29,28 @@
 #include "ch.h"

 

 /*===========================================================================*/

-/* Port interrupt handlers.                                                  */

+/* Module local definitions.                                                 */

 /*===========================================================================*/

 

-/**

- * @brief   System Timer vector.

- * @details This interrupt is used as system tick.

- * @note    The timer must be initialized in the startup code.

- */

-CH_IRQ_HANDLER(SysTickVector) {

+/*===========================================================================*/

+/* Module exported variables.                                                */

+/*===========================================================================*/

 

-  CH_IRQ_PROLOGUE();

+/*===========================================================================*/

+/* Module local types.                                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Module local variables.                                                   */

+/*===========================================================================*/

 

-  chSysLockFromIsr();

-  chSysTimerHandlerI();

-  chSysUnlockFromIsr();

+/*===========================================================================*/

+/* Module local functions.                                                   */

+/*===========================================================================*/

 

-  CH_IRQ_EPILOGUE();

-}

+/*===========================================================================*/

+/* Module interrupt handlers.                                                */

+/*===========================================================================*/

 

 #if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

 /**

@@ -62,13 +59,18 @@ CH_IRQ_HANDLER(SysTickVector) {
  *          context switch.

  */

 void NMIVector(void) {

-  register struct extctx *ctxp;

+

+  /* The extctx structure is pointed by the PSP register.*/

+  struct extctx *ctxp = (struct extctx *)__get_PSP();

 

   /* Discarding the current exception context and positioning the stack to

      point to the real one.*/

-  asm volatile ("mrs     %0, PSP" : "=r" (ctxp) : : "memory");

   ctxp++;

-  asm volatile ("msr     PSP, %0" : : "r" (ctxp) : "memory");

+

+  /* Writing back the modified PSP value.*/

+  __set_PSP((uint32_t)ctxp);

+

+  /* Restoring the normal interrupts status.*/

   port_unlock_from_isr();

 }

 #endif /* !CORTEX_ALTERNATE_SWITCH */

@@ -80,18 +82,21 @@ void NMIVector(void) {
  *          context switch.

  */

 void PendSVVector(void) {

-  register struct extctx *ctxp;

+

+  /* The extctx structure is pointed by the PSP register.*/

+  struct extctx *ctxp = (struct extctx *)__get_PSP();

 

   /* Discarding the current exception context and positioning the stack to

      point to the real one.*/

-  asm volatile ("mrs     %0, PSP" : "=r" (ctxp) : : "memory");

   ctxp++;

-  asm volatile ("msr     PSP, %0" : : "r" (ctxp) : "memory");

+

+  /* Writing back the modified PSP value.*/

+  __set_PSP((uint32_t)ctxp);

 }

 #endif /* CORTEX_ALTERNATE_SWITCH */

 

 /*===========================================================================*/

-/* Port exported functions.                                                  */

+/* Module exported functions.                                                */

 /*===========================================================================*/

 

 /**

@@ -102,14 +107,21 @@ void PendSVVector(void) {
 void _port_irq_epilogue(regarm_t lr) {

 

   if (lr != (regarm_t)0xFFFFFFF1) {

-    register struct extctx *ctxp;

+    struct extctx *ctxp;

 

     port_lock_from_isr();

+

+    /* The extctx structure is pointed by the PSP register.*/

+    ctxp = (struct extctx *)__get_PSP();

+

     /* Adding an artificial exception return context, there is no need to

        populate it fully.*/

-    asm volatile ("mrs     %0, PSP" : "=r" (ctxp) : : "memory");

     ctxp--;

-    asm volatile ("msr     PSP, %0" : : "r" (ctxp) : "memory");

+

+    /* Writing back the modified PSP value.*/

+    __set_PSP((uint32_t)ctxp);

+

+    /* Setting up a fake XPSR register value.*/

     ctxp->xpsr = (regarm_t)0x01000000;

 

     /* The exit sequence is different depending on if a preemption is

@@ -129,78 +141,4 @@ void _port_irq_epilogue(regarm_t lr) {
   }

 }

 

-/**

- * @brief   Post-IRQ switch code.

- * @details The switch is performed in thread context then an NMI exception

- *          is enforced in order to return to the exact point before the

- *          preemption.

- */

-#if !defined(__DOXYGEN__)

-__attribute__((naked))

-#endif

-void _port_switch_from_isr(void) {

-

-  dbg_check_lock();

-  chSchDoReschedule();

-  dbg_check_unlock();

-  asm volatile ("_port_exit_from_isr:" : : : "memory");

-#if CORTEX_ALTERNATE_SWITCH

-  SCB_ICSR = ICSR_PENDSVSET;

-  port_unlock();

-#else

-  SCB_ICSR = ICSR_NMIPENDSET;

-#endif

-  /* The following loop should never be executed, the exception will kick in

-     immediately.*/

-  while (TRUE)

-    ;

-}

-

-/**

- * @brief   Performs a context switch between two threads.

- * @details This is the most critical code in any port, this function

- *          is responsible for the context switch between 2 threads.

- * @note    The implementation of this code affects <b>directly</b> the context

- *          switch performance so optimize here as much as you can.

- *

- * @param[in] ntp       the thread to be switched in

- * @param[in] otp       the thread to be switched out

- */

-#if !defined(__DOXYGEN__)

-__attribute__((naked))

-#endif

-void _port_switch(Thread *ntp, Thread *otp) {

-  register struct intctx *r13 asm ("r13");

-

-  asm volatile ("push    {r4, r5, r6, r7, lr}                   \n\t"

-                "mov     r4, r8                                 \n\t"

-                "mov     r5, r9                                 \n\t"

-                "mov     r6, r10                                \n\t"

-                "mov     r7, r11                                \n\t"

-                "push    {r4, r5, r6, r7}" : : : "memory");

-

-  otp->p_ctx.r13 = r13;

-  r13 = ntp->p_ctx.r13;

-

-  asm volatile ("pop     {r4, r5, r6, r7}                       \n\t"

-                "mov     r8, r4                                 \n\t"

-                "mov     r9, r5                                 \n\t"

-                "mov     r10, r6                                \n\t"

-                "mov     r11, r7                                \n\t"

-                "pop     {r4, r5, r6, r7, pc}" : : "r" (r13) : "memory");

-}

-

-/**

- * @brief   Start a thread by invoking its work function.

- * @details If the work function returns @p chThdExit() is automatically

- *          invoked.

- */

-void _port_thread_start(void) {

-

-  chSysUnlock();

-  asm volatile ("mov     r0, r5                                 \n\t"

-                "blx     r4                                     \n\t"

-                "bl      chThdExit");

-}

-

 /** @} */

diff --git a/os/rt/ports/ARMCMx/chcore_v6m.h b/os/rt/ports/ARMCMx/chcore_v6m.h
index be1381e49..d16025640 100644
--- a/os/rt/ports/ARMCMx/chcore_v6m.h
+++ b/os/rt/ports/ARMCMx/chcore_v6m.h
@@ -16,13 +16,6 @@
 

     You should have received a copy of the GNU General Public License

     along with this program.  If not, see <http://www.gnu.org/licenses/>.

-

-                                      ---

-

-    A special exception to the GPL can be applied should you wish to distribute

-    a combined work that includes ChibiOS/RT, without being obliged to provide

-    the source code for any proprietary components. See the file exception.txt

-    for full details of how and when the exception can be applied.

 */

 

 /**

@@ -37,10 +30,51 @@
 #define _CHCORE_V6M_H_

 

 /*===========================================================================*/

-/* Port constants.                                                           */

+/* Module constants.                                                         */

 /*===========================================================================*/

 

 /**

+ * @name    Architecture and Compiler

+ * @{

+ */

+#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)

+/**

+ * @brief   Macro defining the specific ARM architecture.

+ */

+#define CH_ARCHITECTURE_ARM_v6M

+

+/**

+ * @brief   Name of the implemented architecture.

+ */

+#define CH_ARCHITECTURE_NAME            "ARMv6-M"

+

+/**

+ * @brief   Name of the architecture variant.

+ */

+#define CH_CORE_VARIANT_NAME            "Cortex-M0"

+

+#elif (CORTEX_MODEL == CORTEX_M0PLUS)

+#define CH_ARCHITECTURE_ARM_v6M

+#define CH_ARCHITECTURE_NAME            "ARMv6-M"

+#define CH_CORE_VARIANT_NAME            "Cortex-M0+"

+#endif

+

+/**

+ * @brief   Port-specific information string.

+ */

+#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

+#define CH_PORT_INFO                    "Preemption through NMI"

+#else

+#define CH_PORT_INFO                    "Preemption through PendSV"

+#endif

+/** @} */

+

+/**

+ * @brief   This port does not support a realtime counter.

+ */

+#define CH_PORT_SUPPORTS_RT             FALSE

+

+/**

  * @brief   PendSV priority level.

  * @note    This priority is enforced to be equal to @p 0,

  *          this handler always has the highest priority that cannot preempt

@@ -49,11 +83,7 @@
 #define CORTEX_PRIORITY_PENDSV          0

 

 /*===========================================================================*/

-/* Port macros.                                                              */

-/*===========================================================================*/

-

-/*===========================================================================*/

-/* Port configurable parameters.                                             */

+/* Module pre-compile time settings.                                         */

 /*===========================================================================*/

 

 /**

@@ -65,8 +95,8 @@
  *          a stack frame when compiling without optimizations. You may

  *          reduce this value to zero when compiling with optimizations.

  */

-#if !defined(PORT_IDLE_THREAD_STACK_SIZE)

-#define PORT_IDLE_THREAD_STACK_SIZE     16

+#if !defined(CH_PORT_IDLE_THREAD_STACK_SIZE)

+#define CH_PORT_IDLE_THREAD_STACK_SIZE  16

 #endif

 

 /**

@@ -78,8 +108,8 @@
  *          with compiler optimizations disabled. The value can be reduced

  *          when compiler optimizations are enabled.

  */

-#if !defined(PORT_INT_REQUIRED_STACK)

-#define PORT_INT_REQUIRED_STACK         32

+#if !defined(CH_PORT_INT_REQUIRED_STACK)

+#define CH_PORT_INT_REQUIRED_STACK      32

 #endif

 

 /**

@@ -90,18 +120,6 @@
 #endif

 

 /**

- * @brief   SYSTICK handler priority.

- * @note    The default SYSTICK handler priority is calculated as the priority

- *          level in the middle of the numeric priorities range.

- */

-#if !defined(CORTEX_PRIORITY_SYSTICK)

-#define CORTEX_PRIORITY_SYSTICK         (CORTEX_PRIORITY_LEVELS >> 1)

-#elif !CORTEX_IS_VALID_PRIORITY(CORTEX_PRIORITY_SYSTICK)

-/* If it is externally redefined then better perform a validity check on it.*/

-#error "invalid priority level specified for CORTEX_PRIORITY_SYSTICK"

-#endif

-

-/**

  * @brief   Alternate preemption method.

  * @details Activating this option will make the Kernel use the PendSV

  *          handler for preemption instead of the NMI handler.

@@ -111,7 +129,7 @@
 #endif

 

 /*===========================================================================*/

-/* Port derived parameters.                                                  */

+/* Derived constants and error checks.                                       */

 /*===========================================================================*/

 

 /**

@@ -124,39 +142,7 @@
 #endif

 

 /*===========================================================================*/

-/* Port exported info.                                                       */

-/*===========================================================================*/

-

-/**

- * @brief   Macro defining the specific ARM architecture.

- */

-#define CH_ARCHITECTURE_ARM_v6M

-

-/**

- * @brief   Name of the implemented architecture.

- */

-#define CH_ARCHITECTURE_NAME            "ARMv6-M"

-

-/**

- * @brief   Name of the architecture variant.

- */

-#if (CORTEX_MODEL == CORTEX_M0) || defined(__DOXYGEN__)

-#define CH_CORE_VARIANT_NAME            "Cortex-M0"

-#elif (CORTEX_MODEL == CORTEX_M1)

-#define CH_CORE_VARIANT_NAME            "Cortex-M1"

-#endif

-

-/**

- * @brief   Port-specific information string.

- */

-#if !CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)

-#define CH_PORT_INFO                    "Preemption through NMI"

-#else

-#define CH_PORT_INFO                    "Preemption through PendSV"

-#endif

-

-/*===========================================================================*/

-/* Port implementation part.                                                 */

+/* Module data structures and types.                                         */

 /*===========================================================================*/

 

 #if !defined(_FROM_ASM_)

@@ -170,7 +156,7 @@ typedef void *regarm_t;
     to not have duplicated structure names into the documentation.*/

 #if !defined(__DOXYGEN__)

 

-typedef uint64_t stkalign_t __attribute__ ((aligned (8)));

+typedef uint64_t stkalign_t;

 

 struct extctx {

   regarm_t      r0;

@@ -198,7 +184,7 @@ struct intctx {
 #endif /* !defined(__DOXYGEN__) */

 

 /**

- * @brief   Platform dependent part of the @p Thread structure.

+ * @brief   Platform dependent part of the @p thread_t structure.

  * @details In this port the structure just holds a pointer to the @p intctx

  *          structure representing the stack pointer at context switch time.

  */

@@ -206,6 +192,10 @@ struct context {
   struct intctx *r13;

 };

 

+/*===========================================================================*/

+/* Module macros.                                                            */

+/*===========================================================================*/

+

 /**

  * @brief   Platform dependent part of the @p chThdCreateI() API.

  * @details This code usually setup the context switching frame represented

@@ -228,10 +218,10 @@ struct context {
 /**

  * @brief   Computes the thread working area global size.

  */

-#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) +                         \

+#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(thread_t) +                       \

                                    sizeof(struct intctx) +                  \

                                    sizeof(struct extctx) +                  \

-                                   (n) + (PORT_INT_REQUIRED_STACK))

+                                   (n) + (CH_PORT_INT_REQUIRED_STACK))

 

 /**

  * @brief   Static working area allocation.

@@ -271,62 +261,152 @@ struct context {
 #define PORT_FAST_IRQ_HANDLER(id) void id(void)

 

 /**

+ * @brief   Performs a context switch between two threads.

+ * @details This is the most critical code in any port, this function

+ *          is responsible for the context switch between 2 threads.

+ * @note    The implementation of this code affects <b>directly</b> the context

+ *          switch performance so optimize here as much as you can.

+ *

+ * @param[in] ntp       the thread to be switched in

+ * @param[in] otp       the thread to be switched out

+ */

+#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)

+#define port_switch(ntp, otp) _port_switch(ntp, otp)

+#else

+#define port_switch(ntp, otp) {                                             \

+  struct intctx *r13 = (struct intctx *)__get_PSP();                        \

+  if ((stkalign_t *)(r13 - 1) < otp->p_stklimit)                            \

+    chSysHalt("stack overflow");                                            \

+  _port_switch(ntp, otp);                                                   \

+}

+#endif

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void port_halt(void);

+  void _port_irq_epilogue(regarm_t lr);

+  void _port_switch_from_isr(void);

+  void _port_exit_from_isr(void);

+  void _port_switch(thread_t *ntp, thread_t *otp);

+  void _port_thread_start(void);

+#ifdef __cplusplus

+}

+#endif

+

+/*===========================================================================*/

+/* Module inline functions.                                                  */

+/*===========================================================================*/

+

+/**

  * @brief   Port-related initialization code.

  */

-#define port_init() {                                                       \

-  SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0);                            \

-  nvicSetSystemHandlerPriority(HANDLER_PENDSV,                              \

-    CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_PENDSV));                          \

-  nvicSetSystemHandlerPriority(HANDLER_SYSTICK,                             \

-    CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK));                         \

+static inline void port_init(void) {

+

+  NVIC_SetPriority(PendSV_IRQn, CORTEX_PRIORITY_PENDSV);

+}

+

+/**

+ * @brief   Returns a word encoding the current interrupts status.

+ *

+ * @return              The interrupts status.

+ */

+static inline syssts_t port_get_irq_status(void) {

+

+  return __get_PRIMASK();

+}

+

+/**

+ * @brief   Checks the interrupt status.

+ *

+ * @param[in] sts       the interrupt status word

+ *

+ * @return              The interrupt status.

+ * @retvel false        the word specified a disabled interrupts status.

+ * @retvel true         the word specified an enabled interrupts status.

+ */

+static inline bool port_irq_enabled(syssts_t sts) {

+

+  return (sts & 1) == 0;

+}

+

+/**

+ * @brief   Determines the current execution context.

+ *

+ * @return              The execution context.

+ * @retval false        not running in ISR mode.

+ * @retval true         running in ISR mode.

+ */

+static inline bool port_is_isr_context(void) {

+

+  return (bool)((__get_IPSR() & 0x1FF) != 0);

 }

 

 /**

  * @brief   Kernel-lock action.

- * @details Usually this function just disables interrupts but may perform

- *          more actions.

+ * @details In this port this function disables interrupts globally.

  */

-#define port_lock() asm volatile ("cpsid   i" : : : "memory")

+static inline void port_lock(void) {

+

+  __disable_irq();

+}

 

 /**

  * @brief   Kernel-unlock action.

- * @details Usually this function just enables interrupts but may perform

- *          more actions.

+ * @details In this port this function enables interrupts globally.

  */

-#define port_unlock() asm volatile ("cpsie   i" : : : "memory")

+static inline void port_unlock(void) {

+

+  __enable_irq();

+}

 

 /**

  * @brief   Kernel-lock action from an interrupt handler.

- * @details This function is invoked before invoking I-class APIs from

- *          interrupt handlers. The implementation is architecture dependent,

- *          in its simplest form it is void.

+ * @details In this port this function disables interrupts globally.

  * @note    Same as @p port_lock() in this port.

  */

-#define port_lock_from_isr() port_lock()

+static inline void port_lock_from_isr(void) {

+

+  port_lock();

+}

 

 /**

  * @brief   Kernel-unlock action from an interrupt handler.

- * @details This function is invoked after invoking I-class APIs from interrupt

- *          handlers. The implementation is architecture dependent, in its

- *          simplest form it is void.

+ * @details In this port this function enables interrupts globally.

  * @note    Same as @p port_lock() in this port.

  */

-#define port_unlock_from_isr() port_unlock()

+static inline void port_unlock_from_isr(void) {

+

+  port_unlock();

+}

 

 /**

  * @brief   Disables all the interrupt sources.

  */

-#define port_disable() asm volatile ("cpsid   i" : : : "memory")

+static inline void port_disable(void) {

+

+  __disable_irq();

+}

 

 /**

  * @brief   Disables the interrupt sources below kernel-level priority.

  */

-#define port_suspend() asm volatile ("cpsid   i" : : : "memory")

+static inline void port_suspend(void) {

+

+  __disable_irq();

+}

 

 /**

  * @brief   Enables all the interrupt sources.

  */

-#define port_enable() asm volatile ("cpsie   i" : : : "memory")

+static inline void port_enable(void) {

+

+  __enable_irq();

+}

 

 /**

  * @brief   Enters an architecture-dependent IRQ-waiting mode.

@@ -336,45 +416,12 @@ struct context {
  *          modes.

  * @note    Implemented as an inlined @p WFI instruction.

  */

-#if CORTEX_ENABLE_WFI_IDLE || defined(__DOXYGEN__)

-#define port_wait_for_interrupt() asm volatile ("wfi" : : : "memory")

-#else

-#define port_wait_for_interrupt()

-#endif

-

-/**

- * @brief   Performs a context switch between two threads.

- * @details This is the most critical code in any port, this function

- *          is responsible for the context switch between 2 threads.

- * @note    The implementation of this code affects <b>directly</b> the context

- *          switch performance so optimize here as much as you can.

- *

- * @param[in] ntp       the thread to be switched in

- * @param[in] otp       the thread to be switched out

- */

-#if !CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)

-#define port_switch(ntp, otp) _port_switch(ntp, otp)

-#else

-#define port_switch(ntp, otp) {                                             \

-  register struct intctx *r13 asm ("r13");                                  \

-  if ((stkalign_t *)(r13 - 1) < otp->p_stklimit)                            \

-    chDbgPanic("stack overflow");                                           \

-  _port_switch(ntp, otp);                                                   \

-}

-#endif

+static inline void port_wait_for_interrupt(void) {

 

-#ifdef __cplusplus

-extern "C" {

+#if CORTEX_ENABLE_WFI_IDLE

+  __WFI;

 #endif

-  void port_halt(void);

-  void _port_irq_epilogue(regarm_t lr);

-  void _port_switch_from_isr(void);

-  void _port_exit_from_isr(void);

-  void _port_switch(Thread *ntp, Thread *otp);

-  void _port_thread_start(void);

-#ifdef __cplusplus

 }

-#endif

 

 #endif /* _FROM_ASM_ */

 

diff --git a/os/rt/ports/ARMCMx/chcore_v7m.h b/os/rt/ports/ARMCMx/chcore_v7m.h
index 9e2c86ede..60770e762 100644
--- a/os/rt/ports/ARMCMx/chcore_v7m.h
+++ b/os/rt/ports/ARMCMx/chcore_v7m.h
@@ -472,9 +472,8 @@ static inline bool port_is_isr_context(void) {
 

 /**

  * @brief   Kernel-lock action.

- * @details Usually this function just disables interrupts but may perform

- *          more actions.

- * @note    In this port this it raises the base priority to kernel level.

+ * @details In this port this function raises the base priority to kernel

+ *          level.

  */

 static inline void port_lock(void) {

 

@@ -487,9 +486,8 @@ static inline void port_lock(void) {
 

 /**

  * @brief   Kernel-unlock action.

- * @details Usually this function just enables interrupts but may perform

- *          more actions.

- * @note    In this port this it lowers the base priority to user level.

+ * @details In this port this function lowers the base priority to user

+ *          level.

  */

 static inline void port_unlock(void) {

 

@@ -502,9 +500,8 @@ static inline void port_unlock(void) {
 

 /**

  * @brief   Kernel-lock action from an interrupt handler.

- * @details This function is invoked before invoking I-class APIs from

- *          interrupt handlers. The implementation is architecture dependent,

- *          in its simplest form it is void.

+ * @details In this port this function raises the base priority to kernel

+ *          level.

  * @note    Same as @p port_lock() in this port.

  */

 static inline void port_lock_from_isr(void) {

@@ -514,9 +511,8 @@ static inline void port_lock_from_isr(void) {
 

 /**

  * @brief   Kernel-unlock action from an interrupt handler.

- * @details This function is invoked after invoking I-class APIs from interrupt

- *          handlers. The implementation is architecture dependent, in its

- *          simplest form it is void.

+ * @details In this port this function lowers the base priority to user

+ *          level.

  * @note    Same as @p port_unlock() in this port.

  */

 static inline void port_unlock_from_isr(void) {

@@ -526,7 +522,6 @@ static inline void port_unlock_from_isr(void) {
 

 /**

  * @brief   Disables all the interrupt sources.

- * @note    Of course non-maskable interrupt sources are not included.

  * @note    In this port it disables all the interrupt sources by raising

  *          the priority mask to level 0.

  */

diff --git a/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s b/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s
index 36864a2c9..a8c0d34cf 100644
--- a/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s
+++ b/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s
@@ -44,14 +44,10 @@
                 .set    CONTEXT_OFFSET, 12

                 .set    SCB_ICSR, 0xE000ED04

                 .set    ICSR_PENDSVSET, 0x10000000

+                .set    ICSR_NMIPENDSET, 0x80000000

 

-                .syntax unified

-                .cpu cortex-m4

-#if CORTEX_USE_FPU

-                .fpu fpv4-sp-d16

-#else

-                .fpu softvfp

-#endif

+                .cpu    cortex-m0

+                .fpu    softvfp

 

                 .thumb

                 .text

@@ -62,16 +58,22 @@
                 .thumb_func

                 .globl  _port_switch

 _port_switch:

-                push    {r4, r5, r6, r7, r8, r9, r10, r11, lr}

-#if CORTEX_USE_FPU

-                vpush   {s16-s31}

-#endif

-                str     sp, [r1, #CONTEXT_OFFSET]

-                ldr     sp, [r0, #CONTEXT_OFFSET]

-#if CORTEX_USE_FPU

-                vpop    {s16-s31}

-#endif

-                pop     {r4, r5, r6, r7, r8, r9, r10, r11, pc}

+                push    {r4, r5, r6, r7, lr}

+                mov     r4, r8

+                mov     r5, r9

+                mov     r6, r10

+                mov     r7, r11

+                push    {r4, r5, r6, r7}

+                mov r3, sp

+                str r3, [r1, #CONTEXT_OFFSET]

+                ldr r3, [r0, #CONTEXT_OFFSET]

+                mov sp, r3

+                pop     {r4, r5, r6, r7}

+                mov     r8, r4

+                mov     r9, r5

+                mov     r10, r6

+                mov     r11, r7

+                pop     {r4, r5, r6, r7, pc}

 

 /*--------------------------------------------------------------------------*

  * Start a thread by invoking its work function.

@@ -90,12 +92,7 @@ _port_thread_start:
 #if CH_DBG_STATISTICS

                 bl      _stats_stop_measure_crit_thd

 #endif

-#if !CORTEX_SIMPLIFIED_PRIORITY

-                movs    r3, #0

-                msr     BASEPRI, r3

-#else /* CORTEX_SIMPLIFIED_PRIORITY */

                 cpsie   i

-#endif /* CORTEX_SIMPLIFIED_PRIORITY */

                 mov     r0, r5

                 blx     r4

                 bl      chThdExit

@@ -123,17 +120,21 @@ _port_switch_from_isr:
 #endif

                 .globl  _port_exit_from_isr

 _port_exit_from_isr:

-#if CORTEX_SIMPLIFIED_PRIORITY

-                movw    r3, #:lower16:SCB_ICSR

-                movt    r3, #:upper16:SCB_ICSR

-                mov     r2, ICSR_PENDSVSET

-                str     r2, [r3, #0]

+                ldr     r3, .L2

+                ldr     r2, .L3

+#if CORTEX_ALTERNATE_SWITCH

                 cpsie   i

-#else /* !CORTEX_SIMPLIFIED_PRIORITY */

-                svc     #0

-#endif /* !CORTEX_SIMPLIFIED_PRIORITY */

+#endif

 .L1:            b       .L1

 

+                .align  2

+.L2:            .word   SCB_ICSR

+#if CORTEX_ALTERNATE_SWITCH

+.L3:            .word   ICSR_PENDSVSET

+#else

+.L3:            .word   ICSR_NMIPENDSET

+#endif

+

 #endif /* !defined(__DOXYGEN__) */

 

 /** @} */

diff --git a/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s b/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
index 36864a2c9..8e3a913e7 100644
--- a/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
+++ b/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s
@@ -46,11 +46,11 @@
                 .set    ICSR_PENDSVSET, 0x10000000

 

                 .syntax unified

-                .cpu cortex-m4

+                .cpu    cortex-m4

 #if CORTEX_USE_FPU

-                .fpu fpv4-sp-d16

+                .fpu    fpv4-sp-d16

 #else

-                .fpu softvfp

+                .fpu    softvfp

 #endif

 

                 .thumb

diff --git a/os/rt/ports/ARMCMx/compilers/GCC/ld/STM32F051x8.ld b/os/rt/ports/ARMCMx/compilers/GCC/ld/STM32F051x8.ld
index 69684e5cf..31c34bbf2 100644
--- a/os/rt/ports/ARMCMx/compilers/GCC/ld/STM32F051x8.ld
+++ b/os/rt/ports/ARMCMx/compilers/GCC/ld/STM32F051x8.ld
@@ -16,13 +16,6 @@
 

     You should have received a copy of the GNU General Public License

     along with this program.  If not, see <http://www.gnu.org/licenses/>.

-

-                                      ---

-

-    A special exception to the GPL can be applied should you wish to distribute

-    a combined work that includes ChibiOS/RT, without being obliged to provide

-    the source code for any proprietary components. See the file exception.txt

-    for full details of how and when the exception can be applied.

 */

 

 /*

diff --git a/os/rt/ports/ARMCMx/devices/STM32F0xx/cmparams.h b/os/rt/ports/ARMCMx/devices/STM32F0xx/cmparams.h
index 929bd10c6..df6f69208 100644
--- a/os/rt/ports/ARMCMx/devices/STM32F0xx/cmparams.h
+++ b/os/rt/ports/ARMCMx/devices/STM32F0xx/cmparams.h
@@ -66,7 +66,11 @@
 /* Including the device CMSIS header. Note, we are not using the definitions

    from this header because we need this file to be usable also from

    assembler source files. We verify that the info matches instead.*/

-#include "stm32f30x.h"

+#include "stm32f0xx.h"

+

+#if !CORTEX_HAS_MPU != !__MPU_PRESENT

+#error "CMSIS __MPU_PRESENT mismatch"

+#endif

 

 #if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS

 #error "CMSIS __NVIC_PRIO_BITS mismatch"

diff --git a/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk b/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk
index 673b97ee9..0b5c82d66 100644
--- a/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk
+++ b/os/rt/ports/ARMCMx/devices/STM32F0xx/port.mk
@@ -1,14 +1,14 @@
-# List of the ChibiOS/RT Cortex-M4 STM32F30x port files.

+# List of the ChibiOS/RT Cortex-M0 STM32F0xx port files.

 PORTSRC = ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \

-          ${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c \

+          ${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v6m.c \

           $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/crt0.c \

           $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/vectors.c \

           

-PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s

+PORTASM = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s

 

 PORTINC = ${CHIBIOS}/os/rt/ports/ARMCMx \

           ${CHIBIOS}/os/rt/ports/ARMCMx/CMSIS/include \

           ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC \

-          ${CHIBIOS}/os/rt/ports/ARMCMx/devices/STM32F30x

+          ${CHIBIOS}/os/rt/ports/ARMCMx/devices/STM32F0xx

 

 PORTLD  = ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC/ld

diff --git a/os/rt/src/chtm.c b/os/rt/src/chtm.c
index 24239e0e2..c001dd7e3 100644
--- a/os/rt/src/chtm.c
+++ b/os/rt/src/chtm.c
@@ -128,8 +128,6 @@ NOINLINE void chTMStopMeasurementX(time_measurement_t *tmp) {
   tm_stop(tmp, chSysGetRealtimeCounterX(), ch.measurement_offset);

 }

 

-#endif /* CH_CFG_USE_TM */

-

 /**

  * @brief   Stops a measurement and chains to the next one using the same time

  *          stamp.

@@ -152,4 +150,6 @@ NOINLINE void chTMChainMeasurementToX(time_measurement_t *tmp1,
   tm_stop(tmp1, tmp2->last, 0);

 }

 

+#endif /* CH_CFG_USE_TM */

+

 /** @} */