git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7936 35acf78f-673a-0410-8e92-d51de3d6d3f4

5 files changed, 125 insertions, 22 deletions

diff --git a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
index 32573a781..8afa4e505 100644
--- a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
+++ b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c
@@ -260,14 +260,18 @@ void dac_lld_start(DACDriver *dacp) {
       rccEnableDAC2(false);

     }

 #endif

-  }

 

-  /* DAC initially disabled.*/

+    /* Enabling DAC in SW triggering mode initially, initializing data to

+       zero.*/

 #if STM32_DAC_DUAL_MODE == FALSE

-  dacp->params->dac->CR = dacp->params->regmask;

+    dacp->params->dac->CR &= dacp->params->regmask;

+    dacp->params->dac->CR |= DAC_CR_EN1 << dacp->params->regshift;

+    *(&dacp->params->dac->DHR12R1 + dacp->params->dataoffset) = 0U;

 #else

-  dacp->params->dac->CR = 0U;

+    dacp->params->dac->CR = DAC_CR_EN2 | DAC_CR_EN1;

+    dacp->params->dac->DAC_DHR12RD = 0U;

 #endif

+  }

 }

 

 /**

@@ -285,10 +289,11 @@ void dac_lld_stop(DACDriver *dacp) {
     /* DMA channel released.*/

     dmaStreamRelease(dacp->params->dma);

 

+    /* Disabling DAC.*/

+    dacp->params->dac->CR &= dacp->params->regmask;

+

 #if STM32_DAC_USE_DAC1_CH1

     if (&DACD1 == dacp) {

-      dacp->params->dac->CR &= ~DAC_CR_EN1;

-

       if ((dacp->params->dac->CR & DAC_CR_EN2) == 0U) {

         rccDisableDAC1(false);

       }

@@ -297,8 +302,6 @@ void dac_lld_stop(DACDriver *dacp) {
 

 #if STM32_DAC_USE_DAC1_CH2

     if (&DACD2 == dacp) {

-      dacp->params->dac->CR &= ~DAC_CR_EN2;

-

       if ((dacp->params->dac->CR & DAC_CR_EN1) == 0U) {

         rccDisableDAC1(false);

       }

@@ -319,7 +322,7 @@ void dac_lld_start_conversion(DACDriver *dacp) {
   uint32_t cr, dmamode;

 

 #if STM32_DAC_DUAL_MODE == FALSE

-  switch (dacp->grpp->dhrm) {

+  switch (dacp->grpp->datamode) {

   /* Sets the DAC data register */

   case DAC_DHRM_12BIT_RIGHT:

     dmaStreamSetPeripheral(dacp->params->dma, &dacp->params->dac->DHR12R1 +

@@ -372,10 +375,9 @@ void dac_lld_start_conversion(DACDriver *dacp) {
 

   /* DAC configuration.*/

 #if STM32_DAC_DUAL_MODE == FALSE

-  cr = DAC_CR_DMAEN1 | (dacp->grpp->cr_tsel << 3) |

-       DAC_CR_TEN1 | DAC_CR_EN1;

-  dacp->params->dac->CR = (dacp->params->dac->CR & dacp->params->regmask) |

-                          (cr << dacp->params->regshift);

+  cr = DAC_CR_DMAEN1 | (dacp->grpp->trigger << 3) | DAC_CR_TEN1 | DAC_CR_EN1;

+  dacp->params->dac->CR &= dacp->params->regmask;

+  dacp->params->dac->CR |= cr << dacp->params->regshift;

 #else

   /* TODO: Dual.*/

 #endif

@@ -396,9 +398,12 @@ void dac_lld_stop_conversion(DACDriver *dacp) {
 

   dmaStreamDisable(dacp->params->dma);

 #if STM32_DAC_DUAL_MODE == FALSE

-  dacp->params->dac->CR = dacp->params->regmask;

+  dacp->params->dac->CR  = dacp->params->regmask;

+  dacp->params->dac->CR |= DAC_CR_EN1 << dacp->params->regshift;

+  *(&dacp->params->dac->DHR12R1 + dacp->params->dataoffset) = 0U;

 #else

-  dacp->params->dac->CR = 0U;

+  dacp->params->dac->CR = DAC_CR_EN2 | DAC_CR_EN1;

+  dacp->params->dac->DAC_DHR12RD = 0U;

 #endif

 }

 

diff --git a/os/hal/ports/STM32/LLD/DACv1/dac_lld.h b/os/hal/ports/STM32/LLD/DACv1/dac_lld.h
index fe0e21006..36842f295 100644
--- a/os/hal/ports/STM32/LLD/DACv1/dac_lld.h
+++ b/os/hal/ports/STM32/LLD/DACv1/dac_lld.h
@@ -33,6 +33,16 @@
 /* Driver constants.                                                         */

 /*===========================================================================*/

 

+/**

+ * @name    DAC trigger modes

+ * @{

+ */

+#define DAC_TRG_MASK                    7U

+#define DAC_TRG(n)                      (n)

+#define DAC_TRG_EXT                     6U

+#define DAC_TRG_SW                      7U

+/** @} */

+

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

 /*===========================================================================*/

@@ -293,7 +303,7 @@ typedef void (*daccallback_t)(DACDriver *dacp,
  *                      callback

  * @param[in] err       ADC error code

  */

-typedef void (*dacerrorcallback_t)(DACDriver *adcp, dacerror_t err);

+typedef void (*dacerrorcallback_t)(DACDriver *dacp, dacerror_t err);

 

 /**

  * @brief   Samples alignment and size mode.

@@ -329,14 +339,14 @@ typedef struct {
   /**

    * @brief   DAC data holding register mode.

    */

-  dacdhrmode_t              dhrm;

+  dacdhrmode_t              datamode;

   /**

    * @brief   DAC initialization data.

    * @note    This field contains the (not shifted) value to be put into the

    *          TSEL field of the DAC CR register during initialization. All

    *          other fields are handled internally.

    */

-  uint32_t                  cr_tsel;

+  uint32_t                  trigger;

 } DACConversionGroup;

 

 /**

diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h
index 083d08e02..33659dc2c 100644
--- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h
@@ -343,7 +343,7 @@
  *

  * @api

  */

-#define rccEnableDAC1(lp) rccEnableAPB2(RCC_APB1ENR_DACEN, lp)

+#define rccEnableDAC1(lp) rccEnableAPB1(RCC_APB1ENR_DACEN, lp)

 

 /**

  * @brief   Disables the DAC1 peripheral clock.

@@ -352,14 +352,14 @@
  *

  * @api

  */

-#define rccDisableDAC1(lp) rccDisableAPB2(RCC_APB1ENR_DACEN, lp)

+#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp)

 

 /**

  * @brief   Resets the DAC1 peripheral.

  *

  * @api

  */

-#define rccResetDAC1() rccResetAPB2(RCC_APB1RSTR_DACRST)

+#define rccResetDAC1() rccResetAPB1(RCC_APB1RSTR_DACRST)

 /** @} */

 

 /**

diff --git a/testhal/STM32/STM32F4xx/DAC/debug/STM32F4xx-DAC (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F4xx/DAC/debug/STM32F4xx-DAC (OpenOCD, Flash and Run).launch
index bb8c1ea60..8a1fa9311 100644
--- a/testhal/STM32/STM32F4xx/DAC/debug/STM32F4xx-DAC (OpenOCD, Flash and Run).launch
+++ b/testhal/STM32/STM32F4xx/DAC/debug/STM32F4xx-DAC (OpenOCD, Flash and Run).launch
@@ -33,7 +33,7 @@
 <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>

 <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>

 <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>

-<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;CR2-adc-adcp-adc_lld_start_conversion-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;CR2-adc-null-port_wait_for_interrupt-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;cr2-adc_lld_start_conversion-(format)&quot; val=&quot;4&quot;/&gt;&lt;/contentList&gt;"/>

+<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;cr2-adc_lld_start_conversion-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;CR2-adc-null-port_wait_for_interrupt-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;CR2-adc-adcp-adc_lld_start_conversion-(format)&quot; val=&quot;4&quot;/&gt;&lt;/contentList&gt;"/>

 <stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>

 <stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>

 <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>

diff --git a/testhal/STM32/STM32F4xx/DAC/main.c b/testhal/STM32/STM32F4xx/DAC/main.c
index 8049ce958..7371cbb2d 100644
--- a/testhal/STM32/STM32F4xx/DAC/main.c
+++ b/testhal/STM32/STM32F4xx/DAC/main.c
@@ -17,6 +17,79 @@
 #include "ch.h"

 #include "hal.h"

 

+#define DAC_BUFFER_SIZE 360

+

+/*

+ * DAC test buffer (sine wave).

+ */

+static const dacsample_t dac_buffer[DAC_BUFFER_SIZE] = {

+  2047, 2082, 2118, 2154, 2189, 2225, 2260, 2296, 2331, 2367, 2402, 2437,

+  2472, 2507, 2542, 2576, 2611, 2645, 2679, 2713, 2747, 2780, 2813, 2846,

+  2879, 2912, 2944, 2976, 3008, 3039, 3070, 3101, 3131, 3161, 3191, 3221,

+  3250, 3278, 3307, 3335, 3362, 3389, 3416, 3443, 3468, 3494, 3519, 3544,

+  3568, 3591, 3615, 3637, 3660, 3681, 3703, 3723, 3744, 3763, 3782, 3801,

+  3819, 3837, 3854, 3870, 3886, 3902, 3917, 3931, 3944, 3958, 3970, 3982,

+  3993, 4004, 4014, 4024, 4033, 4041, 4049, 4056, 4062, 4068, 4074, 4078,

+  4082, 4086, 4089, 4091, 4092, 4093, 4094, 4093, 4092, 4091, 4089, 4086,

+  4082, 4078, 4074, 4068, 4062, 4056, 4049, 4041, 4033, 4024, 4014, 4004,

+  3993, 3982, 3970, 3958, 3944, 3931, 3917, 3902, 3886, 3870, 3854, 3837,

+  3819, 3801, 3782, 3763, 3744, 3723, 3703, 3681, 3660, 3637, 3615, 3591,

+  3568, 3544, 3519, 3494, 3468, 3443, 3416, 3389, 3362, 3335, 3307, 3278,

+  3250, 3221, 3191, 3161, 3131, 3101, 3070, 3039, 3008, 2976, 2944, 2912,

+  2879, 2846, 2813, 2780, 2747, 2713, 2679, 2645, 2611, 2576, 2542, 2507,

+  2472, 2437, 2402, 2367, 2331, 2296, 2260, 2225, 2189, 2154, 2118, 2082,

+  2047, 2012, 1976, 1940, 1905, 1869, 1834, 1798, 1763, 1727, 1692, 1657,

+  1622, 1587, 1552, 1518, 1483, 1449, 1415, 1381, 1347, 1314, 1281, 1248,

+  1215, 1182, 1150, 1118, 1086, 1055, 1024,  993,  963,  933,  903,  873,

+   844,  816,  787,  759,  732,  705,  678,  651,  626,  600,  575,  550,

+   526,  503,  479,  457,  434,  413,  391,  371,  350,  331,  312,  293,

+   275,  257,  240,  224,  208,  192,  177,  163,  150,  136,  124,  112,

+   101,   90,   80,   70,   61,   53,   45,   38,   32,   26,   20,   16,

+    12,    8,    5,    3,    2,    1,    0,    1,    2,    3,    5,    8,

+    12,   16,   20,   26,   32,   38,   45,   53,   61,   70,   80,   90,

+   101,  112,  124,  136,  150,  163,  177,  192,  208,  224,  240,  257,

+   275,  293,  312,  331,  350,  371,  391,  413,  434,  457,  479,  503,

+   526,  550,  575,  600,  626,  651,  678,  705,  732,  759,  787,  816,

+   844,  873,  903,  933,  963,  993, 1024, 1055, 1086, 1118, 1150, 1182,

+  1215, 1248, 1281, 1314, 1347, 1381, 1415, 1449, 1483, 1518, 1552, 1587,

+  1622, 1657, 1692, 1727, 1763, 1798, 1834, 1869, 1905, 1940, 1976, 2012

+};

+

+/*

+ * DAC streaming callback.

+ */

+size_t nx = 0, ny = 0;

+static void end_cb1(DACDriver *dacp, const dacsample_t *buffer, size_t n) {

+

+  (void)dacp;

+

+  if (dac_buffer == buffer) {

+    nx += n;

+  }

+  else {

+    ny += n;

+  }

+}

+

+/*

+ * DAC error callback.

+ */

+static void error_cb1(DACDriver *dacp, dacerror_t err) {

+

+  (void)dacp;

+  (void)err;

+

+  chSysHalt("DAC failure");

+}

+

+static const DACConversionGroup daccfg1 = {

+  num_channels: 1,

+  end_cb:       end_cb1,

+  error_cb:     error_cb1,

+  datamode:     DAC_DHRM_12BIT_RIGHT,

+  trigger:      DAC_TRG(0)

+};

+

 /*

  * Application entry point.

  */

@@ -33,10 +106,25 @@ int main(void) {
   chSysInit();

 

   /*

+   * Starting DAC driver, setting up the output pin as analog as suggested

+   * by the Reference Manual.

+   */

+  palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);

+  dacStart(&DACD1, NULL);

+

+  /*

+   * Starting a continous conversion.

+   */

+  dacStartConversion(&DACD1, &daccfg1, dac_buffer, DAC_BUFFER_SIZE);

+

+  /*

    * Normal main() thread activity, if the button is pressed then the I2s

    * transfer is stopped.

    */

   while (true) {

+    if (palReadPad(GPIOA, GPIOA_BUTTON)) {

+      dacStopConversion(&DACD1);

+    }

     chThdSleepMilliseconds(500);

   }

   return 0;