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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-10-05 15:14:08 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-10-05 15:14:08 +0000 |
| commit | 257a19753d0e1129d2b8c3d087a5f825e0d15e28 (patch) | |
| tree | fc56ca922f4681b6b33fadd7576febcaf6d967fd | |
| parent | cf7b963bcff641797d23d9e12b8b4a05037261c8 (diff) | |
| download | ChibiOS-257a19753d0e1129d2b8c3d087a5f825e0d15e28.tar.gz ChibiOS-257a19753d0e1129d2b8c3d087a5f825e0d15e28.tar.bz2 ChibiOS-257a19753d0e1129d2b8c3d087a5f825e0d15e28.zip | |
Fixed Bug #783.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9853 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/STM32/STM32L0xx/hal_lld.c | 4 | ||||
| -rw-r--r-- | readme.txt | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.c b/os/hal/ports/STM32/STM32L0xx/hal_lld.c index 7df02718a..c3bb6dd87 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.c @@ -273,8 +273,8 @@ void stm32_clock_init(void) { #endif
/* Peripherals clock sources setup.*/
- RCC->CCIPR = STM32_HSI48SEL | STM32_LPTIM1CLK | STM32_I2C1CLK |
- STM32_LPUART1CLK | STM32_USART2CLK | STM32_USART1CLK;
+ RCC->CCIPR = STM32_HSI48SEL | STM32_LPTIM1SEL | STM32_I2C1SEL |
+ STM32_LPUART1SEL | STM32_USART2SEL | STM32_USART1SEL;
/* SYSCFG clock enabled here because it is a multi-functional unit shared
among multiple drivers.*/
diff --git a/readme.txt b/readme.txt index 4907a8fe1..8e8df4c62 100644 --- a/readme.txt +++ b/readme.txt @@ -145,7 +145,9 @@ - RT: Merged RT4.
- NIL: Merged NIL2.
- NIL: Added STM32F7 demo.
-- HAL: Fixed STM32F105 port not compiling. (bug #782)
+- HAL: Fixed STM32L0xx CCIPR initialization (bug #783)
+ (backported to 16.1.6).
+- HAL: Fixed STM32F105 port not compiling (bug #782)
(backported to 16.1.6, 3.0.6, 2.6.10).
(bug #780)(backported to 16.1.6, 3.0.6).
- HAL: Fixed wrong registry for STM32F205xx and STM32F215xx port
|