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authorGiovanni Di Sirio <gdisirio@gmail.com>2018-04-13 08:52:44 +0000
committerGiovanni Di Sirio <gdisirio@gmail.com>2018-04-13 08:52:44 +0000
commit23740a113919b5186340d65a63778dcee8a270b2 (patch)
tree20a59c365893bf00be6d56c67265b7bcd4746c83
parentaa3c1d12b36791a5983d34934698a7f49c930b94 (diff)
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Fixed bug #936.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11917 110e8d01-0319-4d1e-a829-52ad28d1bb01
-rw-r--r--os/hal/ports/STM32/STM32L4xx/stm32_rcc.h23
-rw-r--r--readme.txt2
2 files changed, 25 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
index 3a6c1f50c..e034f9ce8 100644
--- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
+++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h
@@ -446,6 +446,29 @@
* @api
*/
#define rccResetCAN1() rccResetAPB1R1(RCC_APB1RSTR1_CAN1RST)
+
+/**
+ * @brief Enables the CAN2 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableCAN2(lp) rccEnableAPB1R1(RCC_APB1ENR1_CAN2EN, lp)
+
+/**
+ * @brief Disables the CAN2 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableCAN2() rccDisableAPB1R1(RCC_APB1ENR1_CAN2EN)
+
+/**
+ * @brief Resets the CAN2 peripheral.
+ *
+ * @api
+ */
+#define rccResetCAN2() rccResetAPB1R1(RCC_APB1RSTR1_CAN2RST)
/** @} */
/**
diff --git a/readme.txt b/readme.txt
index 604c041ac..e1466ce74 100644
--- a/readme.txt
+++ b/readme.txt
@@ -111,6 +111,8 @@
- EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
+- HAL: Fixed missing CAN2 macros from STM32L4xx stm32_rcc.h file (bug #936)
+ (backported to 18.2.1).
- OTH: Fixed inclusion order problem in STM32L4 cmparams.h file (bug #935)
(backported to 18.2.1 and 17.6.5).
- HAL: Fixed problem clearing UIF timer flag in STM32 PWM driver (bug #934)