aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-09-20 10:49:21 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-09-20 10:49:21 +0000
commit1e7ce9301626ece84c0811c3a4cd55fa60b8680d (patch)
tree57e567f55d1f367fd6d28c278b03c9af5e0b5f47
parent1fd62819b772f03a52c363b92e94a8c41e2fd266 (diff)
downloadChibiOS-1e7ce9301626ece84c0811c3a4cd55fa60b8680d.tar.gz
ChibiOS-1e7ce9301626ece84c0811c3a4cd55fa60b8680d.tar.bz2
ChibiOS-1e7ce9301626ece84c0811c3a4cd55fa60b8680d.zip
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6306 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/rt/RT-STM32F407-DISCOVERY-MEMS/mcuconf.h2
-rw-r--r--demos/rt/RT-STM32F407-DISCOVERY/mcuconf.h2
-rw-r--r--os/hal/hal.mk1
-rw-r--r--os/hal/include/hal.h2
-rw-r--r--os/hal/include/sdc.h182
-rw-r--r--os/hal/src/sdc.c572
-rw-r--r--testhal/STM32F4xx/ADC/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/CAN/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/DMA_STORM/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/EXT/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/GPT/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/I2C/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/IRQ_STORM/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/PWM-ICU/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/RTC/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/SDC/.project7
-rw-r--r--testhal/STM32F4xx/SDC/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/SPI/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/UART/mcuconf.h2
-rw-r--r--testhal/STM32F4xx/USB_CDC/mcuconf.h2
21 files changed, 773 insertions, 23 deletions
diff --git a/demos/rt/RT-STM32F407-DISCOVERY-MEMS/mcuconf.h b/demos/rt/RT-STM32F407-DISCOVERY-MEMS/mcuconf.h
index 1ada2776c..862ca642b 100644
--- a/demos/rt/RT-STM32F407-DISCOVERY-MEMS/mcuconf.h
+++ b/demos/rt/RT-STM32F407-DISCOVERY-MEMS/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/demos/rt/RT-STM32F407-DISCOVERY/mcuconf.h b/demos/rt/RT-STM32F407-DISCOVERY/mcuconf.h
index 1b7e1261e..f5230395b 100644
--- a/demos/rt/RT-STM32F407-DISCOVERY/mcuconf.h
+++ b/demos/rt/RT-STM32F407-DISCOVERY/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/os/hal/hal.mk b/os/hal/hal.mk
index 742ec4180..03c9ee2ad 100644
--- a/os/hal/hal.mk
+++ b/os/hal/hal.mk
@@ -12,6 +12,7 @@ HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
${CHIBIOS}/os/hal/src/mmc_spi.c \
${CHIBIOS}/os/hal/src/pal.c \
${CHIBIOS}/os/hal/src/pwm.c \
+ ${CHIBIOS}/os/hal/src/sdc.c \
${CHIBIOS}/os/hal/src/serial.c \
${CHIBIOS}/os/hal/src/serial_usb.c \
${CHIBIOS}/os/hal/src/spi.c \
diff --git a/os/hal/include/hal.h b/os/hal/include/hal.h
index 6d8456705..c02007d92 100644
--- a/os/hal/include/hal.h
+++ b/os/hal/include/hal.h
@@ -56,7 +56,7 @@
#include "pwm.h"
//#include "rtc.h"
#include "serial.h"
-//#include "sdc.h"
+#include "sdc.h"
#include "spi.h"
#include "st.h"
#include "uart.h"
diff --git a/os/hal/include/sdc.h b/os/hal/include/sdc.h
new file mode 100644
index 000000000..3948a6189
--- /dev/null
+++ b/os/hal/include/sdc.h
@@ -0,0 +1,182 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file sdc.h
+ * @brief SDC Driver macros and structures.
+ *
+ * @addtogroup SDC
+ * @{
+ */
+
+#ifndef _SDC_H_
+#define _SDC_H_
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/**
+ * @name SD card types
+ * @{
+ */
+#define SDC_MODE_CARDTYPE_MASK 0xF /**< @brief Card type mask. */
+#define SDC_MODE_CARDTYPE_SDV11 0
+#define SDC_MODE_CARDTYPE_SDV20 1
+#define SDC_MODE_CARDTYPE_MMC 2
+#define SDC_MODE_HIGH_CAPACITY 0x10
+/** @} */
+
+/**
+ * @name SDC bus error conditions
+ * @{
+ */
+#define SDC_NO_ERROR 0
+#define SDC_CMD_CRC_ERROR 1
+#define SDC_DATA_CRC_ERROR 2
+#define SDC_DATA_TIMEOUT 4
+#define SDC_COMMAND_TIMEOUT 8
+#define SDC_TX_UNDERRUN 16
+#define SDC_RX_OVERRUN 32
+#define SDC_STARTBIT_ERROR 64
+#define SDC_OVERFLOW_ERROR 128
+#define SDC_UNHANDLED_ERROR 0xFFFFFFFF
+/** @} */
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name SDC configuration options
+ * @{
+ */
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+#include "sdc_lld.h"
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/**
+ * @name Macro Functions
+ * @{
+ */
+/**
+ * @brief Returns the card insertion status.
+ * @note This macro wraps a low level function named
+ * @p sdc_lld_is_card_inserted(), this function must be
+ * provided by the application because it is not part of the
+ * SDC driver.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @return The card state.
+ * @retval FALSE card not inserted.
+ * @retval TRUE card inserted.
+ *
+ * @api
+ */
+#define sdcIsCardInserted(sdcp) (sdc_lld_is_card_inserted(sdcp))
+
+/**
+ * @brief Returns the write protect status.
+ * @note This macro wraps a low level function named
+ * @p sdc_lld_is_write_protected(), this function must be
+ * provided by the application because it is not part of the
+ * SDC driver.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @return The card state.
+ * @retval FALSE not write protected.
+ * @retval TRUE write protected.
+ *
+ * @api
+ */
+#define sdcIsWriteProtected(sdcp) (sdc_lld_is_write_protected(sdcp))
+/** @} */
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void sdcInit(void);
+ void sdcObjectInit(SDCDriver *sdcp);
+ void sdcStart(SDCDriver *sdcp, const SDCConfig *config);
+ void sdcStop(SDCDriver *sdcp);
+ bool sdcConnect(SDCDriver *sdcp);
+ bool sdcDisconnect(SDCDriver *sdcp);
+ bool sdcRead(SDCDriver *sdcp, uint32_t startblk,
+ uint8_t *buffer, uint32_t n);
+ bool sdcWrite(SDCDriver *sdcp, uint32_t startblk,
+ const uint8_t *buffer, uint32_t n);
+ sdcflags_t sdcGetAndClearErrors(SDCDriver *sdcp);
+ bool sdcSync(SDCDriver *sdcp);
+ bool sdcGetInfo(SDCDriver *sdcp, BlockDeviceInfo *bdip);
+ bool sdcErase(SDCDriver *mmcp, uint32_t startblk, uint32_t endblk);
+ bool _sdc_wait_for_transfer_state(SDCDriver *sdcp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_SDC */
+
+#endif /* _SDC_H_ */
+
+/** @} */
diff --git a/os/hal/src/sdc.c b/os/hal/src/sdc.c
new file mode 100644
index 000000000..48d181549
--- /dev/null
+++ b/os/hal/src/sdc.c
@@ -0,0 +1,572 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012,2013 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file sdc.c
+ * @brief SDC Driver code.
+ *
+ * @addtogroup SDC
+ * @{
+ */
+
+#include "hal.h"
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Virtual methods table.
+ */
+static const struct SDCDriverVMT sdc_vmt = {
+ (bool (*)(void *))sdc_lld_is_card_inserted,
+ (bool (*)(void *))sdc_lld_is_write_protected,
+ (bool (*)(void *))sdcConnect,
+ (bool (*)(void *))sdcDisconnect,
+ (bool (*)(void *, uint32_t, uint8_t *, uint32_t))sdcRead,
+ (bool (*)(void *, uint32_t, const uint8_t *, uint32_t))sdcWrite,
+ (bool (*)(void *))sdcSync,
+ (bool (*)(void *, BlockDeviceInfo *))sdcGetInfo
+};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Wait for the card to complete pending operations.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS operation succeeded.
+ * @retval HAL_FAILED operation failed.
+ *
+ * @notapi
+ */
+bool _sdc_wait_for_transfer_state(SDCDriver *sdcp) {
+ uint32_t resp[1];
+
+ while (TRUE) {
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEND_STATUS,
+ sdcp->rca, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ return HAL_FAILED;
+ switch (MMCSD_R1_STS(resp[0])) {
+ case MMCSD_STS_TRAN:
+ return HAL_SUCCESS;
+ case MMCSD_STS_DATA:
+ case MMCSD_STS_RCV:
+ case MMCSD_STS_PRG:
+#if SDC_NICE_WAITING
+ osalThreadSleepMilliseconds(1);
+#endif
+ continue;
+ default:
+ /* The card should have been initialized so any other state is not
+ valid and is reported as an error.*/
+ return HAL_FAILED;
+ }
+ }
+ /* If something going too wrong.*/
+ return HAL_FAILED;
+}
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief SDC Driver initialization.
+ * @note This function is implicitly invoked by @p halInit(), there is
+ * no need to explicitly initialize the driver.
+ *
+ * @init
+ */
+void sdcInit(void) {
+
+ sdc_lld_init();
+}
+
+/**
+ * @brief Initializes the standard part of a @p SDCDriver structure.
+ *
+ * @param[out] sdcp pointer to the @p SDCDriver object
+ *
+ * @init
+ */
+void sdcObjectInit(SDCDriver *sdcp) {
+
+ sdcp->vmt = &sdc_vmt;
+ sdcp->state = BLK_STOP;
+ sdcp->errors = SDC_NO_ERROR;
+ sdcp->config = NULL;
+ sdcp->capacity = 0;
+}
+
+/**
+ * @brief Configures and activates the SDC peripheral.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @param[in] config pointer to the @p SDCConfig object, can be @p NULL if
+ * the driver supports a default configuration or
+ * requires no configuration
+ *
+ * @api
+ */
+void sdcStart(SDCDriver *sdcp, const SDCConfig *config) {
+
+ osalDbgCheck(sdcp != NULL);
+
+ osalSysLock();
+ osalDbgAssert((sdcp->state == BLK_STOP) || (sdcp->state == BLK_ACTIVE),
+ "invalid state");
+ sdcp->config = config;
+ sdc_lld_start(sdcp);
+ sdcp->state = BLK_ACTIVE;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Deactivates the SDC peripheral.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ *
+ * @api
+ */
+void sdcStop(SDCDriver *sdcp) {
+
+ osalDbgCheck(sdcp != NULL);
+
+ osalSysLock();
+ osalDbgAssert((sdcp->state == BLK_STOP) || (sdcp->state == BLK_ACTIVE),
+ "invalid state");
+ sdc_lld_stop(sdcp);
+ sdcp->state = BLK_STOP;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Performs the initialization procedure on the inserted card.
+ * @details This function should be invoked when a card is inserted and
+ * brings the driver in the @p BLK_READY state where it is possible
+ * to perform read and write operations.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS operation succeeded.
+ * @retval HAL_FAILED operation failed.
+ *
+ * @api
+ */
+bool sdcConnect(SDCDriver *sdcp) {
+ uint32_t resp[1];
+
+ osalDbgCheck(sdcp != NULL);
+ osalDbgAssert((sdcp->state == BLK_ACTIVE) || (sdcp->state == BLK_READY),
+ "invalid state");
+
+ /* Connection procedure in progress.*/
+ sdcp->state = BLK_CONNECTING;
+
+ /* Card clock initialization.*/
+ sdc_lld_start_clk(sdcp);
+
+ /* Enforces the initial card state.*/
+ sdc_lld_send_cmd_none(sdcp, MMCSD_CMD_GO_IDLE_STATE, 0);
+
+ /* V2.0 cards detection.*/
+ if (!sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEND_IF_COND,
+ MMCSD_CMD8_PATTERN, resp)) {
+ sdcp->cardmode = SDC_MODE_CARDTYPE_SDV20;
+ /* Voltage verification.*/
+ if (((resp[0] >> 8) & 0xF) != 1)
+ goto failed;
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+ }
+ else {
+#if SDC_MMC_SUPPORT
+ /* MMC or SD V1.1 detection.*/
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ sdcp->cardmode = SDC_MODE_CARDTYPE_MMC;
+ else
+#endif /* SDC_MMC_SUPPORT */
+ sdcp->cardmode = SDC_MODE_CARDTYPE_SDV11;
+ }
+
+#if SDC_MMC_SUPPORT
+ if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_MMC) {
+ /* TODO: MMC initialization.*/
+ goto failed;
+ }
+ else
+#endif /* SDC_MMC_SUPPORT */
+ {
+ unsigned i;
+ uint32_t ocr;
+
+ /* SD initialization.*/
+ if ((sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) == SDC_MODE_CARDTYPE_SDV20)
+ ocr = 0xC0100000;
+ else
+ ocr = 0x80100000;
+
+ /* SD-type initialization. */
+ i = 0;
+ while (TRUE) {
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, 0, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+ if (sdc_lld_send_cmd_short(sdcp, MMCSD_CMD_APP_OP_COND, ocr, resp))
+ goto failed;
+ if ((resp[0] & 0x80000000) != 0) {
+ if (resp[0] & 0x40000000)
+ sdcp->cardmode |= SDC_MODE_HIGH_CAPACITY;
+ break;
+ }
+ if (++i >= SDC_INIT_RETRY)
+ goto failed;
+ osalThreadSleepMilliseconds(10);
+ }
+ }
+
+ /* Reads CID.*/
+ if (sdc_lld_send_cmd_long_crc(sdcp, MMCSD_CMD_ALL_SEND_CID, 0, sdcp->cid))
+ goto failed;
+
+ /* Asks for the RCA.*/
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEND_RELATIVE_ADDR,
+ 0, &sdcp->rca))
+ goto failed;
+
+ /* Reads CSD.*/
+ if (sdc_lld_send_cmd_long_crc(sdcp, MMCSD_CMD_SEND_CSD,
+ sdcp->rca, sdcp->csd))
+ goto failed;
+
+ /* Switches to high speed.*/
+ sdc_lld_set_data_clk(sdcp);
+
+ /* Selects the card for operations.*/
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SEL_DESEL_CARD,
+ sdcp->rca, resp))
+ goto failed;
+
+ /* Block length fixed at 512 bytes.*/
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SET_BLOCKLEN,
+ MMCSD_BLOCK_SIZE, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+
+ /* Switches to wide bus mode.*/
+ switch (sdcp->cardmode & SDC_MODE_CARDTYPE_MASK) {
+ case SDC_MODE_CARDTYPE_SDV11:
+ case SDC_MODE_CARDTYPE_SDV20:
+ sdc_lld_set_bus_mode(sdcp, SDC_MODE_4BIT);
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_APP_CMD, sdcp->rca, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+ if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_SET_BUS_WIDTH, 2, resp) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+ break;
+ }
+
+ /* Determine capacity.*/
+ sdcp->capacity = mmcsdGetCapacity(sdcp->csd);
+ if (sdcp->capacity == 0)
+ goto failed;
+
+ /* Initialization complete.*/
+ sdcp->state = BLK_READY;
+ return HAL_SUCCESS;
+
+ /* Connection failed, state reset to BLK_ACTIVE.*/
+failed:
+ sdc_lld_stop_clk(sdcp);
+ sdcp->state = BLK_ACTIVE;
+ return HAL_FAILED;
+}
+
+/**
+ * @brief Brings the driver in a state safe for card removal.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS operation succeeded.
+ * @retval HAL_FAILED operation failed.
+ *
+ * @api
+ */
+bool sdcDisconnect(SDCDriver *sdcp) {
+
+ osalDbgCheck(sdcp != NULL);
+
+ osalSysLock();
+ osalDbgAssert((sdcp->state == BLK_ACTIVE) || (sdcp->state == BLK_READY),
+ "invalid state");
+ if (sdcp->state == BLK_ACTIVE) {
+ osalSysUnlock();
+ return HAL_SUCCESS;
+ }
+ sdcp->state = BLK_DISCONNECTING;
+ osalSysUnlock();
+
+ /* Waits for eventual pending operations completion.*/
+ if (_sdc_wait_for_transfer_state(sdcp)) {
+ sdc_lld_stop_clk(sdcp);
+ sdcp->state = BLK_ACTIVE;
+ return HAL_FAILED;
+ }
+
+ /* Card clock stopped.*/
+ sdc_lld_stop_clk(sdcp);
+ sdcp->state = BLK_ACTIVE;
+ return HAL_SUCCESS;
+}
+
+/**
+ * @brief Reads one or more blocks.
+ * @pre The driver must be in the @p BLK_READY state after a successful
+ * sdcConnect() invocation.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @param[in] startblk first block to read
+ * @param[out] buf pointer to the read buffer
+ * @param[in] n number of blocks to read
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS operation succeeded.
+ * @retval HAL_FAILED operation failed.
+ *
+ * @api
+ */
+bool sdcRead(SDCDriver *sdcp, uint32_t startblk, uint8_t *buf, uint32_t n) {
+ bool status;
+
+ osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0));
+ osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
+
+ if ((startblk + n - 1) > sdcp->capacity){
+ sdcp->errors |= SDC_OVERFLOW_ERROR;
+ return HAL_FAILED;
+ }
+
+ /* Read operation in progress.*/
+ sdcp->state = BLK_READING;
+
+ status = sdc_lld_read(sdcp, startblk, buf, n);
+
+ /* Read operation finished.*/
+ sdcp->state = BLK_READY;
+ return status;
+}
+
+/**
+ * @brief Writes one or more blocks.
+ * @pre The driver must be in the @p BLK_READY state after a successful
+ * sdcConnect() invocation.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @param[in] startblk first block to write
+ * @param[out] buf pointer to the write buffer
+ * @param[in] n number of blocks to write
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS operation succeeded.
+ * @retval HAL_FAILED operation failed.
+ *
+ * @api
+ */
+bool sdcWrite(SDCDriver *sdcp, uint32_t startblk,
+ const uint8_t *buf, uint32_t n) {
+ bool status;
+
+ osalDbgCheck((sdcp != NULL) && (buf != NULL) && (n > 0));
+ osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
+
+ if ((startblk + n - 1) > sdcp->capacity){
+ sdcp->errors |= SDC_OVERFLOW_ERROR;
+ return HAL_FAILED;
+ }
+
+ /* Write operation in progress.*/
+ sdcp->state = BLK_WRITING;
+
+ status = sdc_lld_write(sdcp, startblk, buf, n);
+
+ /* Write operation finished.*/
+ sdcp->state = BLK_READY;
+ return status;
+}
+
+/**
+ * @brief Returns the errors mask associated to the previous operation.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @return The errors mask.
+ *
+ * @api
+ */
+sdcflags_t sdcGetAndClearErrors(SDCDriver *sdcp) {
+ sdcflags_t flags;
+
+ osalDbgCheck(sdcp != NULL);
+ osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
+
+ osalSysLock();
+ flags = sdcp->errors;
+ sdcp->errors = SDC_NO_ERROR;
+ osalSysUnlock();
+ return flags;
+}
+
+/**
+ * @brief Waits for card idle condition.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS the operation succeeded.
+ * @retval HAL_FAILED the operation failed.
+ *
+ * @api
+ */
+bool sdcSync(SDCDriver *sdcp) {
+ bool result;
+
+ osalDbgCheck(sdcp != NULL);
+
+ if (sdcp->state != BLK_READY)
+ return HAL_FAILED;
+
+ /* Synchronization operation in progress.*/
+ sdcp->state = BLK_SYNCING;
+
+ result = sdc_lld_sync(sdcp);
+
+ /* Synchronization operation finished.*/
+ sdcp->state = BLK_READY;
+ return result;
+}
+
+/**
+ * @brief Returns the media info.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @param[out] bdip pointer to a @p BlockDeviceInfo structure
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS the operation succeeded.
+ * @retval HAL_FAILED the operation failed.
+ *
+ * @api
+ */
+bool sdcGetInfo(SDCDriver *sdcp, BlockDeviceInfo *bdip) {
+
+ osalDbgCheck((sdcp != NULL) && (bdip != NULL));
+
+ if (sdcp->state != BLK_READY)
+ return HAL_FAILED;
+
+ bdip->blk_num = sdcp->capacity;
+ bdip->blk_size = MMCSD_BLOCK_SIZE;
+
+ return HAL_SUCCESS;
+}
+
+
+/**
+ * @brief Erases the supplied blocks.
+ *
+ * @param[in] sdcp pointer to the @p SDCDriver object
+ * @param[in] startblk starting block number
+ * @param[in] endblk ending block number
+ *
+ * @return The operation status.
+ * @retval HAL_SUCCESS the operation succeeded.
+ * @retval HAL_FAILED the operation failed.
+ *
+ * @api
+ */
+bool sdcErase(SDCDriver *sdcp, uint32_t startblk, uint32_t endblk) {
+ uint32_t resp[1];
+
+ osalDbgCheck((sdcp != NULL));
+ osalDbgAssert(sdcp->state == BLK_READY, "invalid state");
+
+ /* Erase operation in progress.*/
+ sdcp->state = BLK_WRITING;
+
+ /* Handling command differences between HC and normal cards.*/
+ if (!(sdcp->cardmode & SDC_MODE_HIGH_CAPACITY)) {
+ startblk *= MMCSD_BLOCK_SIZE;
+ endblk *= MMCSD_BLOCK_SIZE;
+ }
+
+ _sdc_wait_for_transfer_state(sdcp);
+
+ if ((sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_ERASE_RW_BLK_START,
+ startblk, resp) != HAL_SUCCESS) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+
+ if ((sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_ERASE_RW_BLK_END,
+ endblk, resp) != HAL_SUCCESS) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+
+ if ((sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_ERASE,
+ 0, resp) != HAL_SUCCESS) ||
+ MMCSD_R1_ERROR(resp[0]))
+ goto failed;
+
+ /* Quick sleep to allow it to transition to programming or receiving state */
+ /* TODO: ??????????????????????????? */
+
+ /* Wait for it to return to transfer state to indicate it has finished erasing */
+ _sdc_wait_for_transfer_state(sdcp);
+
+ sdcp->state = BLK_READY;
+ return HAL_SUCCESS;
+
+failed:
+ sdcp->state = BLK_READY;
+ return HAL_FAILED;
+}
+
+#endif /* HAL_USE_SDC */
+
+/** @} */
diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h
index 1ddd2e50b..573940481 100644
--- a/testhal/STM32F4xx/ADC/mcuconf.h
+++ b/testhal/STM32F4xx/ADC/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h
index 1f540eb54..4ce50cc5b 100644
--- a/testhal/STM32F4xx/CAN/mcuconf.h
+++ b/testhal/STM32F4xx/CAN/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
index 7d95bc527..c68f74f84 100644
--- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h
index 861a2d560..27c2a3da1 100644
--- a/testhal/STM32F4xx/EXT/mcuconf.h
+++ b/testhal/STM32F4xx/EXT/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h
index ff0f33ac3..7ebc4e8bc 100644
--- a/testhal/STM32F4xx/GPT/mcuconf.h
+++ b/testhal/STM32F4xx/GPT/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h
index 3e68b2801..6d9b7f24f 100644
--- a/testhal/STM32F4xx/I2C/mcuconf.h
+++ b/testhal/STM32F4xx/I2C/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
index 7f674ff01..5adf45d59 100644
--- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
index 7f674ff01..5adf45d59 100644
--- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
index e321c9a4f..7667d10e7 100644
--- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h
index a5ad6c8d9..69dbeeec2 100644
--- a/testhal/STM32F4xx/RTC/mcuconf.h
+++ b/testhal/STM32F4xx/RTC/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/SDC/.project b/testhal/STM32F4xx/SDC/.project
index 630877d95..665aec725 100644
--- a/testhal/STM32F4xx/SDC/.project
+++ b/testhal/STM32F4xx/SDC/.project
@@ -27,12 +27,7 @@
<link>
<name>board</name>
<type>2</type>
- <locationURI>CHIBIOS/boards/ST_STM32F4_DISCOVERY</locationURI>
- </link>
- <link>
- <name>fatfs</name>
- <type>2</type>
- <locationURI>CHIBIOS/ext/fatfs</locationURI>
+ <locationURI>CHIBIOS/os/hal/boards/OLIMEX_STM32_E407</locationURI>
</link>
<link>
<name>os</name>
diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h
index 1b7e1261e..f5230395b 100644
--- a/testhal/STM32F4xx/SDC/mcuconf.h
+++ b/testhal/STM32F4xx/SDC/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h
index 6e49d3242..ac2885816 100644
--- a/testhal/STM32F4xx/SPI/mcuconf.h
+++ b/testhal/STM32F4xx/SPI/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h
index 35b022b1e..b2a40a51d 100644
--- a/testhal/STM32F4xx/UART/mcuconf.h
+++ b/testhal/STM32F4xx/UART/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.
diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h
index 1b8b2b79b..8603dd02f 100644
--- a/testhal/STM32F4xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h
@@ -152,7 +152,7 @@
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt("DMA failure")
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
/*
* ICU driver system settings.