EXT support for STM32F7xx.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8163 35acf78f-673a-0410-8e92-d51de3d6d3f4

4 files changed, 562 insertions, 1 deletions

diff --git a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
index f2f8816ae..cb827ab55 100644
--- a/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
+++ b/demos/STM32/RT-STM32F746G-DISCOVERY/mcuconf.h
@@ -280,18 +280,33 @@
 #define STM32_SPI_USE_SPI1                  FALSE

 #define STM32_SPI_USE_SPI2                  FALSE

 #define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_USE_SPI4                  FALSE

+#define STM32_SPI_USE_SPI5                  FALSE

+#define STM32_SPI_USE_SPI6                  FALSE

 #define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)

 #define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

 #define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

 #define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

 #define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

 #define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_SPI_SPI4_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)

+#define STM32_SPI_SPI4_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 1)

+#define STM32_SPI_SPI5_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

+#define STM32_SPI_SPI5_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 4)

+#define STM32_SPI_SPI6_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 6)

+#define STM32_SPI_SPI6_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 5)

 #define STM32_SPI_SPI1_DMA_PRIORITY         1

 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI4_DMA_PRIORITY         1

+#define STM32_SPI_SPI4_DMA_PRIORITY         1

+#define STM32_SPI_SPI4_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         10

 #define STM32_SPI_SPI2_IRQ_PRIORITY         10

 #define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_SPI4_IRQ_PRIORITY         10

+#define STM32_SPI_SPI5_IRQ_PRIORITY         10

+#define STM32_SPI_SPI6_IRQ_PRIORITY         10

 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

 

 /*

diff --git a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c
new file mode 100644
index 000000000..bc3f599a4
--- /dev/null
+++ b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.c
@@ -0,0 +1,375 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    STM32F7xx/ext_lld_isr.c

+ * @brief   STM32F7xx EXT subsystem low level driver ISR code.

+ *

+ * @addtogroup EXT

+ * @{

+ */

+

+#include "hal.h"

+

+#if HAL_USE_EXT || defined(__DOXYGEN__)

+

+#include "ext_lld_isr.h"

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   EXTI[0] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector58) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 0);

+  EXTI->PR = pr;

+  if (pr & (1 << 0))

+    EXTD1.config->channels[0].cb(&EXTD1, 0);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[1] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector5C) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 1);

+  EXTI->PR = pr;

+  if (pr & (1 << 1))

+    EXTD1.config->channels[1].cb(&EXTD1, 1);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[2] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector60) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 2);

+  EXTI->PR = pr;

+  if (pr & (1 << 2))

+    EXTD1.config->channels[2].cb(&EXTD1, 2);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[3] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector64) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 3);

+  EXTI->PR = pr;

+  if (pr & (1 << 3))

+    EXTD1.config->channels[3].cb(&EXTD1, 3);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[4] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector68) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 4);

+  EXTI->PR = pr;

+  if (pr & (1 << 4))

+    EXTD1.config->channels[4].cb(&EXTD1, 4);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[5]...EXTI[9] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector9C) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |

+                               (1 << 9));

+  EXTI->PR = pr;

+  if (pr & (1 << 5))

+    EXTD1.config->channels[5].cb(&EXTD1, 5);

+  if (pr & (1 << 6))

+    EXTD1.config->channels[6].cb(&EXTD1, 6);

+  if (pr & (1 << 7))

+    EXTD1.config->channels[7].cb(&EXTD1, 7);

+  if (pr & (1 << 8))

+    EXTD1.config->channels[8].cb(&EXTD1, 8);

+  if (pr & (1 << 9))

+    EXTD1.config->channels[9].cb(&EXTD1, 9);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[10]...EXTI[15] interrupt handler.

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(VectorE0) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |

+                               (1 << 14) | (1 << 15));

+  EXTI->PR = pr;

+  if (pr & (1 << 10))

+    EXTD1.config->channels[10].cb(&EXTD1, 10);

+  if (pr & (1 << 11))

+    EXTD1.config->channels[11].cb(&EXTD1, 11);

+  if (pr & (1 << 12))

+    EXTD1.config->channels[12].cb(&EXTD1, 12);

+  if (pr & (1 << 13))

+    EXTD1.config->channels[13].cb(&EXTD1, 13);

+  if (pr & (1 << 14))

+    EXTD1.config->channels[14].cb(&EXTD1, 14);

+  if (pr & (1 << 15))

+    EXTD1.config->channels[15].cb(&EXTD1, 15);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[16] interrupt handler (PVD).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector44) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 16);

+  EXTI->PR = pr;

+  if (pr & (1 << 16))

+    EXTD1.config->channels[16].cb(&EXTD1, 16);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[17] interrupt handler (RTC_ALARM).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(VectorE4) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 17);

+  EXTI->PR = pr;

+  if (pr & (1 << 17))

+    EXTD1.config->channels[17].cb(&EXTD1, 17);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[18] interrupt handler (OTG_FS_WKUP).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(VectorE8) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 18);

+  EXTI->PR = pr;

+  if (pr & (1 << 18))

+    EXTD1.config->channels[18].cb(&EXTD1, 18);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[19] interrupt handler (ETH_WKUP).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector138) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 19);

+  EXTI->PR = pr;

+  if (pr & (1 << 19))

+    EXTD1.config->channels[19].cb(&EXTD1, 19);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[20] interrupt handler (OTG_HS_WKUP).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector170) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 20);

+  EXTI->PR = pr;

+  if (pr & (1 << 20))

+    EXTD1.config->channels[20].cb(&EXTD1, 20);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[21] interrupt handler (TAMPER_STAMP).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector48) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 21);

+  EXTI->PR = pr;

+  if (pr & (1 << 21))

+    EXTD1.config->channels[21].cb(&EXTD1, 21);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[22] interrupt handler (RTC_WKUP).

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector4C) {

+  uint32_t pr;

+

+  OSAL_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & EXTI->IMR & (1 << 22);

+  EXTI->PR = pr;

+  if (pr & (1 << 22))

+    EXTD1.config->channels[22].cb(&EXTD1, 22);

+

+  OSAL_IRQ_EPILOGUE();

+}

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables EXTI IRQ sources.

+ *

+ * @notapi

+ */

+void ext_lld_exti_irq_enable(void) {

+

+  nvicEnableVector(EXTI0_IRQn, STM32_EXT_EXTI0_IRQ_PRIORITY);

+  nvicEnableVector(EXTI1_IRQn, STM32_EXT_EXTI1_IRQ_PRIORITY);

+  nvicEnableVector(EXTI2_IRQn, STM32_EXT_EXTI2_IRQ_PRIORITY);

+  nvicEnableVector(EXTI3_IRQn, STM32_EXT_EXTI3_IRQ_PRIORITY);

+  nvicEnableVector(EXTI4_IRQn, STM32_EXT_EXTI4_IRQ_PRIORITY);

+  nvicEnableVector(EXTI9_5_IRQn, STM32_EXT_EXTI5_9_IRQ_PRIORITY);

+  nvicEnableVector(EXTI15_10_IRQn, STM32_EXT_EXTI10_15_IRQ_PRIORITY);

+  nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);

+  nvicEnableVector(RTC_Alarm_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);

+  nvicEnableVector(OTG_FS_WKUP_IRQn, STM32_EXT_EXTI18_IRQ_PRIORITY);

+  nvicEnableVector(ETH_WKUP_IRQn, STM32_EXT_EXTI19_IRQ_PRIORITY);

+  nvicEnableVector(OTG_HS_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);

+  nvicEnableVector(TAMP_STAMP_IRQn, STM32_EXT_EXTI21_IRQ_PRIORITY);

+  nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI22_IRQ_PRIORITY);

+}

+

+/**

+ * @brief   Disables EXTI IRQ sources.

+ *

+ * @notapi

+ */

+void ext_lld_exti_irq_disable(void) {

+

+  nvicDisableVector(EXTI0_IRQn);

+  nvicDisableVector(EXTI1_IRQn);

+  nvicDisableVector(EXTI2_IRQn);

+  nvicDisableVector(EXTI3_IRQn);

+  nvicDisableVector(EXTI4_IRQn);

+  nvicDisableVector(EXTI9_5_IRQn);

+  nvicDisableVector(EXTI15_10_IRQn);

+  nvicDisableVector(PVD_IRQn);

+  nvicDisableVector(RTC_Alarm_IRQn);

+  nvicDisableVector(OTG_FS_WKUP_IRQn);

+  nvicDisableVector(ETH_WKUP_IRQn);

+  nvicDisableVector(OTG_HS_WKUP_IRQn);

+  nvicDisableVector(TAMP_STAMP_IRQn);

+  nvicDisableVector(RTC_WKUP_IRQn);

+}

+

+#endif /* HAL_USE_EXT */

+

+/** @} */

diff --git a/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h
new file mode 100644
index 000000000..5c33f5f83
--- /dev/null
+++ b/os/hal/ports/STM32/STM32F7xx/ext_lld_isr.h
@@ -0,0 +1,170 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    STM32F7xx/ext_lld_isr.h

+ * @brief   STM32F7xx EXT subsystem low level driver ISR header.

+ *

+ * @addtogroup EXT

+ * @{

+ */

+

+#ifndef _EXT_LLD_ISR_H_

+#define _EXT_LLD_ISR_H_

+

+#if HAL_USE_EXT || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @name    Configuration options

+ * @{

+ */

+/**

+ * @brief   EXTI0 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI1 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI2 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI3 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI3_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI4 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI4_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI9..5 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI5_9_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#endif

+

+/**

+ * @brief   EXTI15..10 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI10_15_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#endif

+

+/**

+ * @brief   EXTI16 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI17 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI17_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI18 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI18_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI19 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI19_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI20 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI20_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI21 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI21_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI22 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI22_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       6

+#endif

+/** @} */

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void ext_lld_exti_irq_enable(void);

+  void ext_lld_exti_irq_disable(void);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* HAL_USE_EXT */

+

+#endif /* _EXT_LLD_ISR_H_ */

+

+/** @} */

diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
index 116814937..2f626de71 100644
--- a/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F7xx/stm32_registry.h
@@ -143,7 +143,8 @@
 #define STM32_ETH_NUMBER                    61

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             23

+#define STM32_EXTI_NUM_LINES                23

+#define STM32_EXTI_IMR_MASK                 0

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE