1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
|
/*
Copyright (C) 2014..2016 Marco Veeneman
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/**
* @file TIVA/LLD/spi_lld.h
* @brief TM4C123x/TM4C129x SPI subsystem low level driver.
*
* @addtogroup SPI
* @{
*/
#ifndef HAL_SPI_LLD_H
#define HAL_SPI_LLD_H
#if HAL_USE_SPI || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name Control 0
* @{
*/
#define TIVA_CR0_DSS_MASK 0x0F
#define TIVA_CR0_DSS(n) ((n-1) << 0)
#define TIVA_CR0_FRF_MASK (3 << 4)
#define TIVA_CR0_FRF(n) ((n) << 4)
#define TIVA_CR0_SPO (1 << 6)
#define TIVA_CR0_SPH (1 << 7)
#define TIVA_CR0_SRC_MASK (0xFF << 8)
#define TIVA_CR0_SRC(n) ((n) << 8)
/** @} */
/**
* @name Control 1
* @{
*/
#define TIVA_CR1_LBM (1 << 0)
#define TIVA_CR1_SSE (1 << 1)
#define TIVA_CR1_MS (1 << 2)
#define TIVA_CR1_SOD (1 << 3)
#define TIVA_CR1_EOT (1 << 4)
/** @} */
/**
* @name Status
* @{
*/
#define TIVA_SR_TFE (1 << 0)
#define TIVA_SR_TNF (1 << 1)
#define TIVA_SR_RNE (1 << 2)
#define TIVA_SR_RFF (1 << 3)
#define TIVA_SR_BSY (1 << 4)
/** @} */
/**
* @name Interrupt Mask
* @{
*/
#define TIVA_IM_RORIM (1 << 0)
#define TIVA_IM_RTIM (1 << 1)
#define TIVA_IM_RXIM (1 << 2)
#define TIVA_IM_TXIM (1 << 3)
/** @} */
/**
* @name Interrupt Status
* @{
*/
#define TIVA_IS_RORIS (1 << 0)
#define TIVA_IS_RTIS (1 << 1)
#define TIVA_IS_RXIS (1 << 2)
#define TIVA_IS_TXIS (1 << 3)
/** @} */
/**
* @name Masked Interrupt Status
* @{
*/
#define TIVA_MIS_RORMIS (1 << 0)
#define TIVA_MIS_RTMIS (1 << 1)
#define TIVA_MIS_RXMIS (1 << 2)
#define TIVA_MIS_TXMIS (1 << 3)
/** @} */
/**
* @name Interrupt Clear
* @{
*/
#define TIVA_ICR_RORIC (1 << 0)
#define TIVA_ICR_RTIC (1 << 1)
/** @} */
/**
* @name DMA Control
* @{
*/
#define TIVA_DMACTL_RXDMAE (1 << 0)
#define TIVA_DMACTL_TXDMAE (1 << 1)
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief SSI0 driver enable switch.
* @details If set to @p TRUE the support for SSI0 is included.
* @note The default is @p FALSE.
*/
#if !defined(TIVA_SPI_USE_SSI0) || defined(__DOXYGEN__)
#define TIVA_SPI_USE_SSI0 FALSE
#endif
/**
* @brief SSI1 driver enable switch.
* @details If set to @p TRUE the support for SSI1 is included.
* @note The default is @p FALSE.
*/
#if !defined(TIVA_SPI_USE_SSI1) || defined(__DOXYGEN__)
#define TIVA_SPI_USE_SSI1 FALSE
#endif
/**
* @brief SSI2 driver enable switch.
* @details If set to @p TRUE the support for SSI2 is included.
* @note The default is @p FALSE.
*/
#if !defined(TIVA_SPI_USE_SSI2) || defined(__DOXYGEN__)
#define TIVA_SPI_USE_SSI2 FALSE
#endif
/**
* @brief SSI3 driver enable switch.
* @details If set to @p TRUE the support for SSI3 is included.
* @note The default is @p FALSE.
*/
#if !defined(TIVA_SPI_USE_SSI3) || defined(__DOXYGEN__)
#define TIVA_SPI_USE_SSI3 FALSE
#endif
/**
* @brief SPID1 interrupt priority level setting.
*/
#if !defined(TIVA_SPI_SSI0_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_SPI_SSI0_IRQ_PRIORITY 5
#endif
/**
* @brief SPID2 interrupt priority level setting.
*/
#if !defined(TIVA_SPI_SSI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_SPI_SSI1_IRQ_PRIORITY 5
#endif
/**
* @brief SPID3 interrupt priority level setting.
*/
#if !defined(TIVA_SPI_SSI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_SPI_SSI2_IRQ_PRIORITY 5
#endif
/**
* @brief SPID4 interrupt priority level setting.
*/
#if !defined(TIVA_SPI_SSI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define TIVA_SPI_SSI3_IRQ_PRIORITY 5
#endif
/**
* @brief SPI error hook.
*/
#if !defined(TIVA_SPI_SSI_ERROR_HOOK) || defined(__DOXYGEN__)
#define TIVA_SPI_SSI_ERROR_HOOK(spip) osalSysHalt("SSI failure")
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if TIVA_SPI_USE_SSI0 && !TIVA_HAS_SSI0
#error "SSI0 not present in the selected device"
#endif
#if TIVA_SPI_USE_SSI1 && !TIVA_HAS_SSI1
#error "SSI1 not present in the selected device"
#endif
#if TIVA_SPI_USE_SSI2 && !TIVA_HAS_SSI2
#error "SSI2 not present in the selected device"
#endif
#if TIVA_SPI_USE_SSI3 && !TIVA_HAS_SSI03
#error "SSI3 not present in the selected device"
#endif
#if !TIVA_SPI_USE_SSI0 && !TIVA_SPI_USE_SSI1 && !TIVA_SPI_USE_SSI2 && \
!TIVA_SPI_USE_SSI3
#error "SPI driver activated but no SSI peripheral assigned"
#endif
#if TIVA_SPI_USE_SSI0 && \
!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI0_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to SSI0"
#endif
#if TIVA_SPI_USE_SSI1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI1_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to SSI1"
#endif
#if TIVA_SPI_USE_SSI2 && \
!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI2_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to SSI2"
#endif
#if TM4C123x_SPI_USE_SSI3 && \
!OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI3_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to SSI3"
#endif
#if !defined(TIVA_UDMA_REQUIRED)
#define TIVA_UDMA_REQUIRED
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a structure representing an SPI driver.
*/
typedef struct SPIDriver SPIDriver;
/**
* @brief SPI notification callback type.
*
* @param[in] spip pointer to the @p SPIDriver object triggering the
* callback
*/
typedef void (*spicallback_t)(SPIDriver *spip);
/**
* @brief Driver configuration structure.
*/
typedef struct {
/**
* @brief Operation complete callback or @p NULL.
*/
spicallback_t end_cb;
/* End of the mandatory fields.*/
/**
* @brief The chip select line port.
*/
ioportid_t ssport;
/**
* @brief The chip select line pad number.
*/
uint16_t sspad;
/**
* @brief SSI CR0 initialization data.
*/
uint16_t cr0;
/**
* @brief SSI CPSR initialization data.
*/
uint32_t cpsr;
} SPIConfig;
/**
* @brief Structure representing a SPI driver.
*/
struct SPIDriver {
/**
* @brief Driver state.
*/
spistate_t state;
/**
* @brief Current configuration data.
*/
const SPIConfig *config;
#if SPI_USE_WAIT || defined(__DOXYGEN__)
/**
* @brief Waiting thread.
*/
thread_reference_t thread;
#endif /* SPI_USE_WAIT */
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
/**
* @brief Mutex protecting the bus.
*/
mutex_t mutex;
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#if defined(SPI_DRIVER_EXT_FIELDS)
SPI_DRIVER_EXT_FIELDS
#endif
/* End of the mandatory fields.*/
/**
* @brief Pointer to the SSI registers block.
*/
SSI_TypeDef *ssi;
/**
* @brief Receive DMA channel number.
*/
uint8_t dmarxnr;
/**
* @brief Transmit DMA channel number.
*/
uint8_t dmatxnr;
/**
* @brief Receive DMA channel map.
*/
uint8_t rxchnmap;
/**
* @brief Transmit DMA channel map.
*/
uint8_t txchnmap;
};
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if TIVA_SPI_USE_SSI0 && !defined(__DOXYGEN__)
extern SPIDriver SPID1;
#endif
#if TIVA_SPI_USE_SSI1 && !defined(__DOXYGEN__)
extern SPIDriver SPID2;
#endif
#if TIVA_SPI_USE_SSI2 && !defined(__DOXYGEN__)
extern SPIDriver SPID3;
#endif
#if TIVA_SPI_USE_SSI3 && !defined(__DOXYGEN__)
extern SPIDriver SPID4;
#endif
#ifdef __cplusplus
extern "C" {
#endif
void spi_lld_init(void);
void spi_lld_start(SPIDriver *spip);
void spi_lld_stop(SPIDriver *spip);
void spi_lld_select(SPIDriver *spip);
void spi_lld_unselect(SPIDriver *spip);
void spi_lld_ignore(SPIDriver *spip, size_t n);
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf);
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
#ifdef __cplusplus
}
#endif
#endif /* HAL_USE_SPI */
#endif /* HAL_SPI_LLD_H */
/** @} */
|
