Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix for rccEnableCRC macro parameter. | Dave Flogeras | 2018-11-01 | 1 | -1/+1 |
| | | | | | | | | | | | This was removed in commit ae7a4d40b84d8afc999691577210696f16e682f6#diff-7ddaa5ecc31109f41b7801dea2660b47 But I think is still necessary as the underlying rccEnableAHB macros take parameter 'lp'. It seems to work for the F0xx series, because its rccEnableAHB ignores the 'lp'. It is required when I tried to use the CRC driver on a family that does require the 'lp' parameter in the lower level macros. | ||||
* | avoid using list_for_each_entry_safe when closing endpoints to prevent ↵ | Austin Morton | 2018-10-01 | 1 | -2/+3 |
| | | | | | | | | | | | potential infinite loop list_for_each_entry_safe is only safe when the current entry is being removed. If other entries in the list could potentially be removed it can result in an infinite loop. Because usbh_lld_ep_close blocks on each urb during iteration, it may give up its lock on the system and allow an interrupt to remove a different urb from the list, resulting in an infinite loop when the thread resumes. | ||||
* | fix some compiler warnings around USBH_DEBUG_ENABLE conditions | Austin Morton | 2018-10-01 | 1 | -2/+2 |
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* | implement _ptxfe_int to support ISO and INT out transfers | Austin Morton | 2018-10-01 | 1 | -3/+11 |
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* | Update STM32 platform makefiles, add per-driver makefiles. | Konstantin Oblaukhov | 2018-09-24 | 13 | -71/+178 |
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* | Fix STM32 LLD CRCv1 large data bug in DMA mode | Unknown | 2018-07-12 | 2 | -5/+21 |
| | | | | | * STM32 DMA can only handle 65535 bytes per transfer so larger data sets have to split up to be correctly handled when using DMA | ||||
* | Merge branch 'master' into update_tests | Fabien Poussin | 2018-03-15 | 2 | -1/+22 |
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| * | Merge pull request #148 from romainreignier/add_stm32L4 | Fabien Poussin | 2018-03-15 | 1 | -0/+21 |
| |\ | | | | | | | platform: add support for STM32L4 family | ||||
| | * | platform: add support for STM32L4 family | Romain Reignier | 2018-03-12 | 1 | -0/+21 |
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| * | | Fixed most testhal examples for STM32, updated configs using script. Fixed ↵ | Fabien Poussin | 2018-03-14 | 3 | -6/+6 |
| |/ | | | | | | | deprecated MS2ST calls. | ||||
| * | Keep track of STM32 RCC API | Romain Reignier | 2018-03-11 | 3 | -25/+25 |
| | | | | | | | | | | | | | | RCC API changed in 01/2018 so apply the changes. Note that ae7a4d40b84d8afc999691577210696f16e682f6 partially fixed the changes in QEI module but some were missing. So update the other modules too. | ||||
* | | hal_usbh: update to new Time macros | Romain Reignier | 2018-03-12 | 1 | -4/+4 |
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* | | hal_fsmc: update to new RCC API | Romain Reignier | 2018-03-12 | 1 | -1/+1 |
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* | | hal: stm32: Keep track of latest STM32 RCC API | Romain Reignier | 2018-03-12 | 3 | -25/+25 |
|/ | | | | | | | RCC API changed in 01/2018 so apply the changes. Note that ae7a4d40b84d8afc999691577210696f16e682f6 partially fixed the changes in QEI module but some were missing. So update the other modules too. | ||||
* | Fixes for STM32F0 testhal | Fabien Poussin | 2018-03-08 | 2 | -14/+14 |
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* | Added support for STM32F7 | Adrian | 2018-01-31 | 5 | -5/+20 |
| | | | | Tested only for STM32F746, other chipsets have to be checked. | ||||
* | Add STM32F769 to FSMCv1 sdram driver | Dave Flogeras | 2017-12-14 | 3 | -3/+5 |
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* | USBH: STM32 LLD: break LS activity detect loop if port is disabled | Diego Ismirlian | 2017-08-07 | 1 | -11/+18 |
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* | USBH: STM32 LLD: various improvements | Diego Ismirlian | 2017-07-31 | 2 | -112/+134 |
| | | | | | | | | | - general cleanup - implemented workaround to undocumented erratum (the OTG core may report successful enabling of port when connecting a low-speed device, but really it generates no traffic and remains in a "dumb" state) - improved handling of disconnection of devices (avoid submitting URBs if the port is disabled) | ||||
* | USBH: remove unnecessary reschedules and add necessary ones | Diego Ismirlian | 2017-07-16 | 1 | -7/+1 |
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* | USBH: Correct bug in LLD | Diego Ismirlian | 2017-07-16 | 1 | -1/+1 |
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* | USBH: moved definition of driver to LLD | Diego Ismirlian | 2017-07-09 | 1 | -0/+7 |
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* | USBH: moved declaration of driver to LLD | Diego Ismirlian | 2017-06-09 | 1 | -0/+9 |
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* | USBH: STM32 lld, activate correction of unexpected length | Diego Ismirlian | 2017-06-08 | 1 | -1/+1 |
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* | Mass license dates update | Diego Ismirlian | 2017-06-05 | 2 | -4/+4 |
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* | Remove redundant hal_stm32_otg.h file | Diego Ismirlian | 2017-06-05 | 1 | -934/+0 |
| | | | | The correct version is already present in ChibiOS | ||||
* | USB Host fixes | Diego Ismirlian | 2017-06-05 | 2 | -20/+92 |
| | | | | | | | | - Cleaned up alignment macros for GCC & IAR - Corrected EP halt and Clear halt behaviours - Initialization of class drivers by USB Host main driver - Minor cosmetic fixes - Updated USB_HOST testhal app | ||||
* | Add checks to QEI if STM32 TIM is already used | Andres Vahter | 2017-06-05 | 1 | -4/+54 |
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* | [DMA2D, LTDC] Removing ch.h dependencies. Fix #111. | Romain Reignier | 2017-02-28 | 2 | -2/+0 |
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* | [Comp] Adding interrupt functions, updating example. | Fabien Poussin | 2017-02-09 | 2 | -2/+200 |
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* | [Comp] Adding support for STM32F0. | Fabien Poussin | 2017-02-07 | 1 | -1/+7 |
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* | [Comp] Adding more defines | Fabien Poussin | 2017-02-07 | 1 | -0/+45 |
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* | [Comp] Adding init, helper defines. | Fabien Poussin | 2017-02-07 | 1 | -0/+94 |
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* | [Comp] Cleaning example, removing dependencies and adding checks. | Fabien Poussin | 2017-02-07 | 2 | -138/+134 |
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* | [COMP] Fixing headers, missing includes. | Fabien Poussin | 2017-02-07 | 1 | -5/+5 |
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* | Adding COMP Driver. | Fabien Poussin | 2017-02-06 | 3 | -0/+665 |
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* | [Timcap/Eeprom] Removing ch.h dependencies. | Fabien Poussin | 2017-02-06 | 2 | -2/+0 |
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* | [STM32, NAND] Fixed #elif without expression | barthess | 2017-01-24 | 1 | -2/+1 |
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* | FSMC NAND improvements. | barthess | 2017-01-17 | 3 | -65/+140 |
| | | | | | 1) Implemented 16 bit bus width support 2) Added workaround errata in STM32 | ||||
* | Merge branch 'master' of github.com:ChibiOS/ChibiOS-Contrib | barthess | 2017-01-06 | 4 | -19/+33 |
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| * | Merge pull request #107 from pl4nkton/stm32_fixes | Fabien Poussin | 2017-01-04 | 4 | -19/+33 |
| |\ | | | | | | | Stm32 fixes | ||||
| | * | STM32: fix USB HOST HS when cpu is in sleep mode | Nicolas Reinecke | 2016-12-05 | 1 | -1/+2 |
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| | * | change qei types to int16_t | Peter | 2016-12-05 | 1 | -1/+1 |
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| | * | usbh: add otg stepping 2 code | Nicolas Reinecke | 2016-12-05 | 2 | -0/+12 |
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| | * | usbh: cleanup | Nicolas Reinecke | 2016-12-05 | 3 | -17/+18 |
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* | | | NAND. Added reset function. | barthess | 2017-01-06 | 2 | -8/+21 |
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* / | FSMC. Sync mode improvements. | barthess | 2016-12-09 | 1 | -2/+8 |
|/ | | | | | | | 1) Control registers writes reordered in init sequence to eliminate incorrect output clock frequnency in short period after CCLKEN bit set and B(W)TR registers set. 2) Added reset of CCLEN bit in stop procedure. | ||||
* | whitespace | Nicolas Reinecke | 2016-11-08 | 1 | -8/+8 |
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* | add STM32F7 FMC write FIFO disable bit | Nicolas Reinecke | 2016-11-08 | 1 | -0/+3 |
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* | STM32 CRC : Fix asserts | Kimmo Lindholm | 2016-11-05 | 1 | -6/+6 |
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