3 files changed, 24 insertions, 12 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
index 20fd46c..a72fba8 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
@@ -32,6 +32,20 @@
 #endif
 
 /**
+ * @brief   Enables the SDRAM subsystem.
+ */
+#if !defined(HAL_USE_SDRAM) || defined(__DOXYGEN__)
+#define HAL_USE_SDRAM               FALSE
+#endif
+
+/**
+ * @brief   Enables the SRAM subsystem.
+ */
+#if !defined(HAL_USE_SRAM) || defined(__DOXYGEN__)
+#define HAL_USE_SRAM                FALSE
+#endif
+
+/**
  * @brief   Enables the NAND subsystem.
  */
 #if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
index 73c9cb3..c4e2324 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
@@ -78,9 +78,9 @@
 #define NAND_TEST_KILL_BLOCK      8000
 #endif
 
-#if STM32_NAND_USE_FSMC_NAND1
+#if STM32_NAND_USE_NAND1
   #define NAND                    NANDD1
-#elif STM32_NAND_USE_FSMC_NAND2
+#elif STM32_NAND_USE_NAND2
   #define NAND                    NANDD2
 #else
 #error "You should enable at least one NAND interface"
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
index 108d84c..bba7f08 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
@@ -24,8 +24,8 @@
 /*
  * FSMC NAND driver system settings.
  */
-#define STM32_NAND_USE_FSMC_NAND1           TRUE
-#define STM32_NAND_USE_FSMC_NAND2           FALSE
+#define STM32_NAND_USE_NAND1                TRUE
+#define STM32_NAND_USE_NAND2                FALSE
 #define STM32_NAND_USE_EXT_INT              FALSE
 #define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
 #define STM32_NAND_DMA_PRIORITY             0
@@ -34,18 +34,16 @@
 /*
  * FSMC SRAM driver system settings.
  */
-#define STM32_USE_FSMC_SRAM                 FALSE
-#define STM32_SRAM_USE_FSMC_SRAM1           FALSE
-#define STM32_SRAM_USE_FSMC_SRAM2           FALSE
-#define STM32_SRAM_USE_FSMC_SRAM3           FALSE
-#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
+#define STM32_SRAM_USE_SRAM1           FALSE
+#define STM32_SRAM_USE_SRAM2           FALSE
+#define STM32_SRAM_USE_SRAM3           FALSE
+#define STM32_SRAM_USE_SRAM4           FALSE
 
 /*
  * FSMC SDRAM driver system settings.
  */
-#define STM32_USE_FSMC_SDRAM                FALSE
-#define STM32_SDRAM_USE_FSMC_SDRAM1         FALSE
-#define STM32_SDRAM_USE_FSMC_SDRAM2         TRUE
+#define STM32_SDRAM_USE_SDRAM1         FALSE
+#define STM32_SDRAM_USE_SDRAM2         FALSE
 
 /*
  * TIMCAP driver system settings.