diff options
Diffstat (limited to 'os')
40 files changed, 1789 insertions, 217 deletions
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld index 53e04bd..8f676a0 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld @@ -20,7 +20,29 @@ MEMORY { flash : org = 0x00000000, len = 32k - ram : org = 0x20000000, len = 12k + ram0 : org = 0x20000000, len = 12k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld index 4378c41..1968cd0 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld @@ -20,7 +20,29 @@ MEMORY { flash : org = 0x00000000, len = 64k - ram : org = 0x20000000, len = 24k + ram0 : org = 0x20000000, len = 24k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld index cad084f..7b12b53 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld @@ -20,7 +20,29 @@ MEMORY { flash : org = 0x00000000, len = 128k - ram : org = 0x20000000, len = 32k + ram0 : org = 0x20000000, len = 32k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld index ecdcf26..5c049b9 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld @@ -20,7 +20,28 @@ MEMORY { flash : org = 0x00000000, len = 256k - ram : org = 0x20000000, len = 32k + ram0 : org = 0x20000000, len = 32k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld index 875158e..0f3fef1 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld @@ -20,7 +20,29 @@ MEMORY { flash : org = 0x00000000, len = 512k - ram : org = 0x20000000, len = 256k + ram0 : org = 0x20000000, len = 256k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld index f36164e..fd23266 100644 --- a/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld +++ b/os/common/ports/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld @@ -19,8 +19,30 @@ */ MEMORY { - flash : org = 0x00000000, len = 1024k - ram : org = 0x20000000, len = 256k + flash : org = 0x00000000, len = 1M + ram0 : org = 0x20000000, len = 256k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 } +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + + INCLUDE rules.ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk new file mode 100644 index 0000000..35d4fc8 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk @@ -0,0 +1,10 @@ +# List of the ChibiOS generic TM4C123x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/community/os/common/ports/ARMCMx/devices/TM4C123x \ + $(CHIBIOS)/os/ext/CMSIS/include + +STARTUPLD = $(CHIBIOS)/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk new file mode 100644 index 0000000..6ce72da --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk @@ -0,0 +1,10 @@ +# List of the ChibiOS generic TM4C129x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt1.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c + +STARTUPASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s + +STARTUPINC = $(CHIBIOS)/community/os/common/ports/ARMCMx/devices/TM4C129x \ + $(CHIBIOS)/os/ext/CMSIS/include + +STARTUPLD = $(CHIBIOS)/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/common/ports/ARMCMx/devices/TM4C123x/cmparams.h b/os/common/ports/ARMCMx/devices/TM4C123x/cmparams.h index 3e5457c..c9e98bd 100644 --- a/os/common/ports/ARMCMx/devices/TM4C123x/cmparams.h +++ b/os/common/ports/ARMCMx/devices/TM4C123x/cmparams.h @@ -26,7 +26,7 @@ /** * @brief Cortex core model. */ -#define CORTEX_MODEL CORTEX_M4 +#define CORTEX_MODEL 4 /** * @brief Memory Protection unit presence. diff --git a/os/common/ports/ARMCMx/devices/TM4C129x/cmparams.h b/os/common/ports/ARMCMx/devices/TM4C129x/cmparams.h index ea5821f..5bd8a7b 100644 --- a/os/common/ports/ARMCMx/devices/TM4C129x/cmparams.h +++ b/os/common/ports/ARMCMx/devices/TM4C129x/cmparams.h @@ -26,7 +26,7 @@ /** * @brief Cortex core model. */ -#define CORTEX_MODEL CORTEX_M4 +#define CORTEX_MODEL 4 /** * @brief Memory Protection unit presence. diff --git a/os/hal/ports/TIVA/LLD/ext_lld.c b/os/hal/ports/TIVA/LLD/ext_lld.c new file mode 100644 index 0000000..dc58d99 --- /dev/null +++ b/os/hal/ports/TIVA/LLD/ext_lld.c @@ -0,0 +1,981 @@ +/* + Copyright (C) 2014 Marco Veeneman + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file Tiva/ext_lld.c + * @brief Tiva EXT subsystem low level driver source. + * + * @addtogroup EXT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/** + * @brief Generic interrupt serving code for multiple pins per interrupt + * handler. + */ +#define ext_lld_serve_port_interrupt(gpiop, start) \ + do { \ + uint32_t mis = gpiop->MIS; \ + \ + gpiop->ICR = mis; \ + \ + if (mis & (1 << 0)) { \ + EXTD1.config->channels[start + 0].cb(&EXTD1, start + 0); \ + } \ + if (mis & (1 << 1)) { \ + EXTD1.config->channels[start + 1].cb(&EXTD1, start + 1); \ + } \ + if (mis & (1 << 2)) { \ + EXTD1.config->channels[start + 2].cb(&EXTD1, start + 2); \ + } \ + if (mis & (1 << 3)) { \ + EXTD1.config->channels[start + 3].cb(&EXTD1, start + 3); \ + } \ + if (mis & (1 << 4)) { \ + EXTD1.config->channels[start + 4].cb(&EXTD1, start + 4); \ + } \ + if (mis & (1 << 5)) { \ + EXTD1.config->channels[start + 5].cb(&EXTD1, start + 5); \ + } \ + if (mis & (1 << 6)) { \ + EXTD1.config->channels[start + 6].cb(&EXTD1, start + 6); \ + } \ + if (mis & (1 << 7)) { \ + EXTD1.config->channels[start + 7].cb(&EXTD1, start + 7); \ + } \ + } while (0); + +/** + * @brief Generic interrupt serving code for single pin per interrupt + * handler. + */ +#define ext_lld_serve_pin_interrupt(gpiop, start, pin) \ + do { \ + gpiop->ICR = (1 << pin); \ + EXTD1.config->channels[start].cb(&EXTD1, start); \ + } while (0); + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief EXTD1 driver identifier. + */ +EXTDriver EXTD1; + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +const ioportid_t gpio[] = +{ +#if TIVA_HAS_GPIOA + GPIOA, +#endif +#if TIVA_HAS_GPIOB + GPIOB, +#endif +#if TIVA_HAS_GPIOC + GPIOC, +#endif +#if TIVA_HAS_GPIOD + GPIOD, +#endif +#if TIVA_HAS_GPIOE + GPIOE, +#endif +#if TIVA_HAS_GPIOF + GPIOF, +#endif +#if TIVA_HAS_GPIOG + GPIOG, +#endif +#if TIVA_HAS_GPIOH + GPIOH, +#endif +#if TIVA_HAS_GPIOJ + GPIOJ, +#endif +#if TIVA_HAS_GPIOK + GPIOK, +#endif +#if TIVA_HAS_GPIOL + GPIOL, +#endif +#if TIVA_HAS_GPIOM + GPIOM, +#endif +#if TIVA_HAS_GPION + GPION, +#endif +#if TIVA_HAS_GPIOP + GPIOP, +#endif +#if TIVA_HAS_GPIOQ + GPIOQ, +#endif +#if TIVA_HAS_GPIOR + GPIOR, +#endif +#if TIVA_HAS_GPIOS + GPIOS, +#endif +#if TIVA_HAS_GPIOT + GPIOT, +#endif +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief Enables GPIO IRQ sources. + * + * @notapi + */ +static void ext_lld_irq_enable(void) +{ +#if TIVA_HAS_GPIOA + nvicEnableVector(TIVA_GPIOA_NUMBER, TIVA_EXT_GPIOA_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOB + nvicEnableVector(TIVA_GPIOB_NUMBER, TIVA_EXT_GPIOB_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOC + nvicEnableVector(TIVA_GPIOC_NUMBER, TIVA_EXT_GPIOC_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOD + nvicEnableVector(TIVA_GPIOD_NUMBER, TIVA_EXT_GPIOD_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOE + nvicEnableVector(TIVA_GPIOE_NUMBER, TIVA_EXT_GPIOE_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOF + nvicEnableVector(TIVA_GPIOF_NUMBER, TIVA_EXT_GPIOF_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOG + nvicEnableVector(TIVA_GPIOG_NUMBER, TIVA_EXT_GPIOG_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOH + nvicEnableVector(TIVA_GPIOH_NUMBER, TIVA_EXT_GPIOH_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOJ + nvicEnableVector(TIVA_GPIOJ_NUMBER, TIVA_EXT_GPIOJ_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOK + nvicEnableVector(TIVA_GPIOK_NUMBER, TIVA_EXT_GPIOK_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOL + nvicEnableVector(TIVA_GPIOL_NUMBER, TIVA_EXT_GPIOL_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOM + nvicEnableVector(TIVA_GPIOM_NUMBER, TIVA_EXT_GPIOM_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPION + nvicEnableVector(TIVA_GPION_NUMBER, TIVA_EXT_GPION_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOP + nvicEnableVector(TIVA_GPIOP0_NUMBER, TIVA_EXT_GPIOP0_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP1_NUMBER, TIVA_EXT_GPIOP1_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP2_NUMBER, TIVA_EXT_GPIOP2_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP3_NUMBER, TIVA_EXT_GPIOP3_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP4_NUMBER, TIVA_EXT_GPIOP4_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP5_NUMBER, TIVA_EXT_GPIOP5_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP6_NUMBER, TIVA_EXT_GPIOP6_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOP7_NUMBER, TIVA_EXT_GPIOP7_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOQ + nvicEnableVector(TIVA_GPIOQ0_NUMBER, TIVA_EXT_GPIOQ0_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ1_NUMBER, TIVA_EXT_GPIOQ1_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ2_NUMBER, TIVA_EXT_GPIOQ2_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ3_NUMBER, TIVA_EXT_GPIOQ3_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ4_NUMBER, TIVA_EXT_GPIOQ4_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ5_NUMBER, TIVA_EXT_GPIOQ5_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ6_NUMBER, TIVA_EXT_GPIOQ6_IRQ_PRIORITY); + nvicEnableVector(TIVA_GPIOQ7_NUMBER, TIVA_EXT_GPIOQ7_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOR + nvicEnableVector(TIVA_GPIOR_NUMBER, TIVA_EXT_GPIOR_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOS + nvicEnableVector(TIVA_GPIOS_NUMBER, TIVA_EXT_GPIOS_IRQ_PRIORITY); +#endif +#if TIVA_HAS_GPIOT + nvicEnableVector(TIVA_GPIOT_NUMBER, TIVA_EXT_GPIOT_IRQ_PRIORITY); +#endif +} + +/** + * @brief Disables GPIO IRQ sources. + * + * @notapi + */ +static void ext_lld_irq_disable(void) +{ +#if TIVA_HAS_GPIOA + nvicDisableVector(TIVA_GPIOA_NUMBER); +#endif +#if TIVA_HAS_GPIOB + nvicDisableVector(TIVA_GPIOB_NUMBER); +#endif +#if TIVA_HAS_GPIOC + nvicDisableVector(TIVA_GPIOC_NUMBER); +#endif +#if TIVA_HAS_GPIOD + nvicDisableVector(TIVA_GPIOD_NUMBER); +#endif +#if TIVA_HAS_GPIOE + nvicDisableVector(TIVA_GPIOE_NUMBER); +#endif +#if TIVA_HAS_GPIOF + nvicDisableVector(TIVA_GPIOF_NUMBER); +#endif +#if TIVA_HAS_GPIOG + nvicDisableVector(TIVA_GPIOG_NUMBER); +#endif +#if TIVA_HAS_GPIOH + nvicDisableVector(TIVA_GPIOH_NUMBER); +#endif +#if TIVA_HAS_GPIOJ + nvicDisableVector(TIVA_GPIOJ_NUMBER); +#endif +#if TIVA_HAS_GPIOK + nvicDisableVector(TIVA_GPIOK_NUMBER); +#endif +#if TIVA_HAS_GPIOL + nvicDisableVector(TIVA_GPIOL_NUMBER); +#endif +#if TIVA_HAS_GPIOM + nvicDisableVector(TIVA_GPIOM_NUMBER); +#endif +#if TIVA_HAS_GPION + nvicDisableVector(TIVA_GPION_NUMBER); +#endif +#if TIVA_HAS_GPIOP + nvicDisableVector(TIVA_GPIOP0_NUMBER); + nvicDisableVector(TIVA_GPIOP1_NUMBER); + nvicDisableVector(TIVA_GPIOP2_NUMBER); + nvicDisableVector(TIVA_GPIOP3_NUMBER); + nvicDisableVector(TIVA_GPIOP4_NUMBER); + nvicDisableVector(TIVA_GPIOP5_NUMBER); + nvicDisableVector(TIVA_GPIOP6_NUMBER); + nvicDisableVector(TIVA_GPIOP7_NUMBER); +#endif +#if TIVA_HAS_GPIOQ + nvicDisableVector(TIVA_GPIOQ0_NUMBER); + nvicDisableVector(TIVA_GPIOQ1_NUMBER); + nvicDisableVector(TIVA_GPIOQ2_NUMBER); + nvicDisableVector(TIVA_GPIOQ3_NUMBER); + nvicDisableVector(TIVA_GPIOQ4_NUMBER); + nvicDisableVector(TIVA_GPIOQ5_NUMBER); + nvicDisableVector(TIVA_GPIOQ6_NUMBER); + nvicDisableVector(TIVA_GPIOQ7_NUMBER); +#endif +#if TIVA_HAS_GPIOR + nvicDisableVector(TIVA_GPIOR_NUMBER); +#endif +#if TIVA_HAS_GPIOS + nvicDisableVector(TIVA_GPIOS_NUMBER); +#endif +#if TIVA_HAS_GPIOT + nvicDisableVector(TIVA_GPIOT_NUMBER); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if TIVA_HAS_GPIOA || defined(__DOXYGEN__) +/** + * @brief GPIOA interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOA_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOA, 0); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOB || defined(__DOXYGEN__) +/** + * @brief GPIOB interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOB_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOB, 8); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOC || defined(__DOXYGEN__) +/** + * @brief GPIOC interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOC_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOC, 16); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOD || defined(__DOXYGEN__) +/** + * @brief GPIOD interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOD_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOD, 24); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOE || defined(__DOXYGEN__) +/** + * @brief GPIOE interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOE_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOE, 32); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOF || defined(__DOXYGEN__) +/** + * @brief GPIOF interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOF_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(GPIOF, 40); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOG || defined(__DOXYGEN__) +/** + * @brief GPIOG interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOG_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOG, 48); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOH || defined(__DOXYGEN__) +/** + * @brief GPIOH interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOH_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOH, 56); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOJ || defined(__DOXYGEN__) +/** + * @brief GPIOJ interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOJ_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOJ, 64); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOK || defined(__DOXYGEN__) +/** + * @brief GPIOK interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOK_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOK, 72); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOL || defined(__DOXYGEN__) +/** + * @brief GPIOL interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOL_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOL, 80); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOM || defined(__DOXYGEN__) +/** + * @brief GPIOM interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOM_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOM, 88); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPION || defined(__DOXYGEN__) +/** + * @brief GPION interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPION_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPION, 96); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOP || defined(__DOXYGEN__) +/** + * @brief GPIOP0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP0_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 104, 0); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP1_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 105, 1); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP2_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 106, 2); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP3 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP3_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 107, 3); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP4 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP4_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 108, 4); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP5 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP5_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 109, 5); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP6 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP6_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 110, 6); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOP7 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOP7_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOP, 111, 7); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOQ || defined(__DOXYGEN__) +/** + * @brief GPIOQ0 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ0_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 112, 0); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ1_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 113, 1); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ2_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 114, 2); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ3 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ3_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 115, 3); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ4 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ4_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 116, 4); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ5 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ5_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 117, 5); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ6 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ6_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 118, 6); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief GPIOQ7 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOQ7_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_pin_interrupt(&GPIOQ, 119, 7); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOR || defined(__DOXYGEN__) +/** + * @brief GPIOR interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOR_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOR, 120); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOS || defined(__DOXYGEN__) +/** + * @brief GPIOS interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOS_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOS, 128); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if TIVA_HAS_GPIOT || defined(__DOXYGEN__) +/** + * @brief GPIOT interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIVA_GPIOT_HANDLER) +{ + OSAL_IRQ_PROLOGUE(); + + ext_lld_serve_port_interrupt(&GPIOT, 132); + + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level EXT driver initialization. + * + * @notapi + */ +void ext_lld_init(void) +{ + extObjectInit(&EXTD1); +} + +/** + * @brief Configures and activates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_start(EXTDriver *extp) +{ + uint8_t i; + + if (extp->state == EXT_STOP) { + ext_lld_irq_enable(); + } + + /* Configuration of automatic channels.*/ + for (i = 0; i < EXT_MAX_CHANNELS; i++) { + if (extp->config->channels[i].mode & EXT_CH_MODE_AUTOSTART) { + ext_lld_channel_enable(extp, i); + } + else { + ext_lld_channel_disable(extp, i); + } + } +} + +/** + * @brief Deactivates the EXT peripheral. + * + * @param[in] extp pointer to the @p EXTDriver object + * + * @notapi + */ +void ext_lld_stop(EXTDriver *extp) +{ + if (extp->state == EXT_ACTIVE) { + ext_lld_irq_disable(); + } + +#if TIVA_HAS_GPIOA + GPIOA->IM = 0; +#endif +#if TIVA_HAS_GPIOB + GPIOB->IM = 0; +#endif +#if TIVA_HAS_GPIOC + GPIOC->IM = 0; +#endif +#if TIVA_HAS_GPIOD + GPIOD->IM = 0; +#endif +#if TIVA_HAS_GPIOE + GPIOE->IM = 0; +#endif +#if TIVA_HAS_GPIOF + GPIOF->IM = 0; +#endif +#if TIVA_HAS_GPIOG + GPIOG->IM = 0; +#endif +#if TIVA_HAS_GPIOH + GPIOH->IM = 0; +#endif +#if TIVA_HAS_GPIOJ + GPIOJ->IM = 0; +#endif +#if TIVA_HAS_GPIOK + GPIOK->IM = 0; +#endif +#if TIVA_HAS_GPIOL + GPIOL->IM = 0; +#endif +#if TIVA_HAS_GPIOM + GPIOM->IM = 0; +#endif +#if TIVA_HAS_GPION + GPION->IM = 0; +#endif +#if TIVA_HAS_GPIOP + GPIOP->IM = 0; +#endif +#if TIVA_HAS_GPIOQ + GPIOQ->IM = 0; +#endif +#if TIVA_HAS_GPIOR + GPIOR->IM = 0; +#endif +#if TIVA_HAS_GPIOS + GPIOS->IM = 0; +#endif +#if TIVA_HAS_GPIOT + GPIOT->IM = 0; +#endif +} + +/** + * @brief Enables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be enabled + * + * @notapi + */ +void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel) +{ + GPIO_TypeDef *gpiop; + uint8_t pin; + uint32_t im; + + pin = channel & 0x07; + gpiop = gpio[channel >> 3]; + + /* Disable interrupts */ + im = gpiop->IM; + gpiop->IM = 0; + + /* Configure pin to be edge-sensitive.*/ + gpiop->IS &= ~(1 << pin); + + /* Programming edge registers.*/ + if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) == + EXT_CH_MODE_BOTH_EDGES) { + gpiop->IBE |= (1 << pin); + } + else if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) == + EXT_CH_MODE_FALLING_EDGE) { + gpiop->IBE &= ~(1 << pin); + gpiop->IEV &= ~(1 << pin); + } + else if ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) == + EXT_CH_MODE_RISING_EDGE) { + gpiop->IBE &= ~(1 << pin); + gpiop->IEV |= (1 << pin); + } + + /* Programming interrupt and event registers.*/ + if ((extp->config->channels[channel].cb != NULL) && + ((extp->config->channels[channel].mode & EXT_CH_MODE_EDGES_MASK) != + EXT_CH_MODE_DISABLED)) { + im |= (1 << pin); + } + else { + im &= ~(1 << pin); + } + + /* Restore interrupts */ + gpiop->IM = im; +} + +/** + * @brief Disables an EXT channel. + * + * @param[in] extp pointer to the @p EXTDriver object + * @param[in] channel channel to be disabled + * + * @notapi + */ +void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel) +{ + (void)extp; + GPIO_TypeDef *gpiop; + uint8_t pin; + + pin = channel & 0x07; + gpiop = gpio[channel >> 3]; + + gpiop->IM &= ~(1 << pin); +} + +#endif /* HAL_USE_EXT */ + +/** @} */ diff --git a/os/hal/ports/TIVA/LLD/ext_lld.h b/os/hal/ports/TIVA/LLD/ext_lld.h new file mode 100644 index 0000000..3817130 --- /dev/null +++ b/os/hal/ports/TIVA/LLD/ext_lld.h @@ -0,0 +1,523 @@ +/* + Copyright (C) 2014 Marco Veeneman + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file Tiva/ext_lld.h + * @brief Tiva EXT subsystem low level driver header. + * + * @addtogroup EXT + * @{ + */ + +#ifndef _EXT_LLD_H_ +#define _EXT_LLD_H_ + +#if HAL_USE_EXT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Number of EXT per port. + */ +#define EXT_MAX_CHANNELS TIVA_GPIO_PINS + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief GPIOA interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOA_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOA_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOB interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOB_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOB_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOC interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOC_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOC_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOD interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOD_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOD_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOE interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOE_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOE_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOF interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOF_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOF_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOG interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOG_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOG_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOH interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOH_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOH_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOJ interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOJ_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOJ_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOK interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOK_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOK_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOL interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOL_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOL_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOM interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOM_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOM_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPION interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPION_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPION_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP0 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP0_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP1 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP1_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP2 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP2_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP3 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP3_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP3_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP4 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP4_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP4_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP5 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP5_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP5_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP6 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP6_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP6_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOP7 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOP7_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOP7_IRQ_PRIORITY 3 +#endif +/** @} */ + +/** + * @brief GPIOQ0 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ0_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ0_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ1 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ1_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ1_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ2 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ2_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ2_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ3 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ3_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ3_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ4 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ4_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ4_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ5 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ5_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ5_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ6 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ6_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ6_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOQ7 interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOQ7_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOQ7_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOR interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOR_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOR_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOS interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOS_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOS_IRQ_PRIORITY 3 +#endif + +/** + * @brief GPIOT interrupt priority level setting. + */ +#if !defined(TIVA_EXT_GPIOT_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define TIVA_EXT_GPIOT_IRQ_PRIORITY 3 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if TIVA_HAS_GPIOA && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOA_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOA" +#endif + +#if TIVA_HAS_GPIOB && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOB_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOB" +#endif + +#if TIVA_HAS_GPIOC && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOC_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOC" +#endif + +#if TIVA_HAS_GPIOD && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOD_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOD" +#endif + +#if TIVA_HAS_GPIOE && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOE_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOE" +#endif + +#if TIVA_HAS_GPIOF && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOF_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOF" +#endif + +#if TIVA_HAS_GPIOG && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOG_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOG" +#endif + +#if TIVA_HAS_GPIOH && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOH_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOH" +#endif + +#if TIVA_HAS_GPIOJ && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOJ_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOJ" +#endif + +#if TIVA_HAS_GPIOK && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOK_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOK" +#endif + +#if TIVA_HAS_GPIOL && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOL_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOL" +#endif + +#if TIVA_HAS_GPIOM && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOM_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOM" +#endif + +#if TIVA_HAS_GPION && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPION_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPION" +#endif + +#if TIVA_HAS_GPIOP0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP0" +#endif + +#if TIVA_HAS_GPIOP1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP1" +#endif + +#if TIVA_HAS_GPIOP2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP2" +#endif + +#if TIVA_HAS_GPIOP3 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP3_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP3" +#endif + +#if TIVA_HAS_GPIOP4 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP4_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP4" +#endif + +#if TIVA_HAS_GPIOP5 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP5_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP5" +#endif + +#if TIVA_HAS_GPIOP6 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP6_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP6" +#endif + +#if TIVA_HAS_GPIOP7 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOP7_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOP7" +#endif + +#if TIVA_HAS_GPIOQ0 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ0_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ0" +#endif + +#if TIVA_HAS_GPIOQ1 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ1_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ1" +#endif + +#if TIVA_HAS_GPIOQ2 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ2_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ2" +#endif + +#if TIVA_HAS_GPIOQ3 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ3_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ3" +#endif + +#if TIVA_HAS_GPIOQ4 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ4_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ4" +#endif + +#if TIVA_HAS_GPIOQ5 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ5_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ5" +#endif + +#if TIVA_HAS_GPIOQ6 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ6_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ6" +#endif + +#if TIVA_HAS_GPIOQ7 && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOQ7_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOQ7" +#endif + +#if TIVA_HAS_GPIOR && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOR_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOR" +#endif + +#if TIVA_HAS_GPIOS && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOS_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOS" +#endif + +#if TIVA_HAS_GPIOT && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_EXT_GPIOT_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to GPIOT" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief EXT channel identifier. + */ +typedef uint32_t expchannel_t; + +/** + * @brief Type of an EXT generic notification callback. + * + * @param[in] extp pointer to the @p EXPDriver object triggering the + * callback + */ +typedef void (*extcallback_t)(EXTDriver *extp, expchannel_t channel); + +/** + * @brief Channel configuration structure. + */ +typedef struct { + /** + * @brief Channel mode. + */ + uint32_t mode; + /** + * @brief Channel callback. + */ + extcallback_t cb; +} EXTChannelConfig; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Channel configurations. + */ + EXTChannelConfig channels[EXT_MAX_CHANNELS]; + /* End of the mandatory fields.*/ +} EXTConfig; + +/** + * @brief Structure representing an EXT driver. + */ +struct EXTDriver { + /** + * @brief Driver state. + */ + extstate_t state; + /** + * @brief Current configuration data. + */ + const EXTConfig *config; + /* End of the mandatory fields.*/ +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) +extern EXTDriver EXTD1; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void ext_lld_init(void); + void ext_lld_start(EXTDriver *extp); + void ext_lld_stop(EXTDriver *extp); + void ext_lld_channel_enable(EXTDriver *extp, expchannel_t channel); + void ext_lld_channel_disable(EXTDriver *extp, expchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_EXT */ + +#endif /* _EXT_LLD_H_ */ + +/** @} */ diff --git a/os/hal/ports/TIVA/LLD/gpt_lld.h b/os/hal/ports/TIVA/LLD/gpt_lld.h index 0e27017..2f1f75d 100644 --- a/os/hal/ports/TIVA/LLD/gpt_lld.h +++ b/os/hal/ports/TIVA/LLD/gpt_lld.h @@ -294,62 +294,62 @@ #endif #if TIVA_GPT_USE_GPT0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT0A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT0A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT0" #endif #if TIVA_GPT_USE_GPT1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT1A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT1A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT1" #endif #if TIVA_GPT_USE_GPT2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT2A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT2A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT2" #endif #if TIVA_GPT_USE_GPT3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT3A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT3A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT3" #endif #if TIVA_GPT_USE_GPT4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT4A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT4A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT4" #endif #if TIVA_GPT_USE_GPT5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_GPT5A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_GPT5A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to GPT5" #endif #if TIVA_GPT_USE_WGPT0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT0A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT0A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT0" #endif #if TIVA_GPT_USE_WGPT1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT1A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT1A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT1" #endif #if TIVA_GPT_USE_WGPT2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT2A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT2A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT2" #endif #if TIVA_GPT_USE_WGPT3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT3A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT3A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT3" #endif #if TIVA_GPT_USE_WGPT4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT4A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT4A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT4" #endif #if TIVA_GPT_USE_WGPT5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_GPT_WGPT5A_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_GPT_WGPT5A_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to WGPT5" #endif diff --git a/os/hal/ports/TIVA/LLD/i2c_lld.h b/os/hal/ports/TIVA/LLD/i2c_lld.h index 9b7b743..1479600 100644 --- a/os/hal/ports/TIVA/LLD/i2c_lld.h +++ b/os/hal/ports/TIVA/LLD/i2c_lld.h @@ -300,52 +300,52 @@ #endif #if TIVA_I2C_USE_I2C0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C0_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C0_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C0" #endif #if TIVA_I2C_USE_I2C1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C1" #endif #if TIVA_I2C_USE_I2C2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C2" #endif #if TIVA_I2C_USE_I2C3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C3" #endif #if TIVA_I2C_USE_I2C4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C4_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C4_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C4" #endif #if TIVA_I2C_USE_I2C5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C5_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C5_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C5" #endif #if TIVA_I2C_USE_I2C6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C6_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C6_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C6" #endif #if TIVA_I2C_USE_I2C7 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C7_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C7_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C7" #endif #if TIVA_I2C_USE_I2C8 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C8_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C8_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C8" #endif #if TIVA_I2C_USE_I2C9 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_I2C_I2C9_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_I2C_I2C9_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to I2C9" #endif diff --git a/os/hal/ports/TIVA/LLD/mac_lld.h b/os/hal/ports/TIVA/LLD/mac_lld.h index 7c86dbd..af088b0 100644 --- a/os/hal/ports/TIVA/LLD/mac_lld.h +++ b/os/hal/ports/TIVA/LLD/mac_lld.h @@ -262,6 +262,10 @@ #error "TIVA_MAC_PHY_TIMEOUT requires the realtime counter service" #endif +#if !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_MAC_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to MAC" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/TIVA/LLD/pwm_lld.h b/os/hal/ports/TIVA/LLD/pwm_lld.h index 70ba97b..472bae8 100644 --- a/os/hal/ports/TIVA/LLD/pwm_lld.h +++ b/os/hal/ports/TIVA/LLD/pwm_lld.h @@ -154,52 +154,52 @@ #endif #if TIVA_PWM_USE_PWM0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM0_FAULT_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM0_FAULT_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM0 FAULT" #endif #if TIVA_PWM_USE_PWM0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM0_0_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM0_0_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM0 GEN0" #endif #if TIVA_PWM_USE_PWM0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM0_1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM0_1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM0 GEN1" #endif #if TIVA_PWM_USE_PWM0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM0_2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM0_2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM0 GEN2" #endif #if TIVA_PWM_USE_PWM0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM0_3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM0_3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM0 GEN3" #endif #if TIVA_PWM_USE_PWM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM1_FAULT_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM1_FAULT_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM1 FAULT" #endif #if TIVA_PWM_USE_PWM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM1_0_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM1_0_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM1 GEN0" #endif #if TIVA_PWM_USE_PWM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM1_1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM1_1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM1 GEN1" #endif #if TIVA_PWM_USE_PWM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM1_2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM1_2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM1 GEN2" #endif #if TIVA_PWM_USE_PWM1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_PWM_PWM1_3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_PWM_PWM1_3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to PWM1 GEN3" #endif diff --git a/os/hal/ports/TIVA/LLD/serial_lld.h b/os/hal/ports/TIVA/LLD/serial_lld.h index 5ba4645..535d0a5 100644 --- a/os/hal/ports/TIVA/LLD/serial_lld.h +++ b/os/hal/ports/TIVA/LLD/serial_lld.h @@ -341,42 +341,42 @@ #endif #if TIVA_SERIAL_USE_UART0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART0_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART0_PRIORITY) #error "Invalid IRQ priority assigned to UART0" #endif #if TIVA_SERIAL_USE_UART1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART1_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART1_PRIORITY) #error "Invalid IRQ priority assigned to UART1" #endif #if TIVA_SERIAL_USE_UART2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART2_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART2_PRIORITY) #error "Invalid IRQ priority assigned to UART2" #endif #if TIVA_SERIAL_USE_UART3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART3_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART3_PRIORITY) #error "Invalid IRQ priority assigned to UART3" #endif #if TIVA_SERIAL_USE_UART4 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART4_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART4_PRIORITY) #error "Invalid IRQ priority assigned to UART4" #endif #if TIVA_SERIAL_USE_UART5 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART5_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART5_PRIORITY) #error "Invalid IRQ priority assigned to UART5" #endif #if TIVA_SERIAL_USE_UART6 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART6_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART6_PRIORITY) #error "Invalid IRQ priority assigned to UART6" #endif #if TIVA_SERIAL_USE_UART7 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SERIAL_UART7_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SERIAL_UART7_PRIORITY) #error "Invalid IRQ priority assigned to UART7" #endif diff --git a/os/hal/ports/TIVA/LLD/spi_lld.h b/os/hal/ports/TIVA/LLD/spi_lld.h index c757a22..5c04d69 100644 --- a/os/hal/ports/TIVA/LLD/spi_lld.h +++ b/os/hal/ports/TIVA/LLD/spi_lld.h @@ -114,7 +114,7 @@ */ #define TIVA_DMACTL_RXDMAE (1 << 0) #define TIVA_DMACTL_TXDMAE (1 << 1) -/** @} +/** @} */ /*===========================================================================*/ /* Driver pre-compile time settings. */ @@ -222,22 +222,22 @@ #endif #if TIVA_SPI_USE_SSI0 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SPI_SSI0_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI0_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SSI0" #endif #if TIVA_SPI_USE_SSI1 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SPI_SSI1_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI1_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SSI1" #endif #if TIVA_SPI_USE_SSI2 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SPI_SSI2_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI2_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SSI2" #endif #if TM4C123x_SPI_USE_SSI3 && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_SPI_SSI3_IRQ_PRIORITY) + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_SPI_SSI3_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to SSI3" #endif diff --git a/os/hal/ports/TIVA/LLD/st_lld.h b/os/hal/ports/TIVA/LLD/st_lld.h index bec1a36..23b3ef5 100644 --- a/os/hal/ports/TIVA/LLD/st_lld.h +++ b/os/hal/ports/TIVA/LLD/st_lld.h @@ -164,6 +164,11 @@ #error "wrong value defined for TIVA_ST_USE_WIDE_TIMER" #endif +#if OSAL_ST_MODE != OSAL_ST_MODE_NONE && \ + !OSAL_IRQ_IS_VALID_PRIORITY(TIVA_ST_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to ST" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/TIVA/TM4C123x/hal_lld.h b/os/hal/ports/TIVA/TM4C123x/hal_lld.h index 72b53b4..5c2cd25 100644 --- a/os/hal/ports/TIVA/TM4C123x/hal_lld.h +++ b/os/hal/ports/TIVA/TM4C123x/hal_lld.h @@ -329,11 +329,6 @@ */ #define TIVA_SYSCLK (TIVA_SRC / (((TIVA_SYSDIV_VALUE << TIVA_DIV400_VALUE /*& TIVA_BYPASS_VALUE*/) | (TIVA_SYSDIV2LSB >> 22)) + 1)) -#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_ST_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SysTick" -#endif - /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/TIVA/TM4C123x/platform.mk b/os/hal/ports/TIVA/TM4C123x/platform.mk index 0f54c5a..e808142 100644 --- a/os/hal/ports/TIVA/TM4C123x/platform.mk +++ b/os/hal/ports/TIVA/TM4C123x/platform.mk @@ -8,7 +8,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/gpt_lld.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/pwm_lld.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/spi_lld.c \ - ${CHISIOS}/community/os/hal/ports/TIVA/LLD/tiva_udma.c + ${CHISIOS}/community/os/hal/ports/TIVA/LLD/tiva_udma.c \ + ${CHISIOS}/community/os/hal/ports/TIVA/LLD/ext_lld.c # Required include directories PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ diff --git a/os/hal/ports/TIVA/TM4C123x/tiva_registry.h b/os/hal/ports/TIVA/TM4C123x/tiva_registry.h index 09a8c75..04786e0 100644 --- a/os/hal/ports/TIVA/TM4C123x/tiva_registry.h +++ b/os/hal/ports/TIVA/TM4C123x/tiva_registry.h @@ -98,6 +98,7 @@ #define TIVA_HAS_GPIOR FALSE #define TIVA_HAS_GPIOS FALSE #define TIVA_HAS_GPIOT FALSE +#define TIVA_GPIO_PINS 56 #endif #if defined(TM4C1231C3PM) || defined(TM4C1231D5PM) || defined(TM4C1231E6PM) \ || defined(TM4C1231H6PM) || defined(TM4C1233C3PM) || defined(TM4C1233D5PM) \ @@ -122,6 +123,7 @@ #define TIVA_HAS_GPIOR FALSE #define TIVA_HAS_GPIOS FALSE #define TIVA_HAS_GPIOT FALSE +#define TIVA_GPIO_PINS 48 #endif #if defined(TM4C1231D5PZ) || defined(TM4C1231E6PZ) || defined(TM4C1231H6PZ) \ || defined(TM4C1233D5PZ) || defined(TM4C1233E6PZ) || defined(TM4C1233H6PZ) \ @@ -146,6 +148,7 @@ #define TIVA_HAS_GPIOR FALSE #define TIVA_HAS_GPIOS FALSE #define TIVA_HAS_GPIOT FALSE +#define TIVA_GPIO_PINS 88 #endif #if defined(TM4C1231H6PGE) || defined(TM4C1233H6PGE) || defined(TM4C1237H6PGE)\ || defined(TM4C123BH6PGE) || defined(TM4C123GH6PGE) @@ -167,6 +170,7 @@ #define TIVA_HAS_GPIOR FALSE #define TIVA_HAS_GPIOS FALSE #define TIVA_HAS_GPIOT FALSE +#define TIVA_GPIO_PINS 112 #endif #if defined(TM4C123BH6ZRB) || defined(TM4C123GH6ZRB) || defined(TM4C123GH5ZXR) #define TIVA_HAS_GPIOA TRUE @@ -187,6 +191,7 @@ #define TIVA_HAS_GPIOR FALSE #define TIVA_HAS_GPIOS FALSE #define TIVA_HAS_GPIOT FALSE +#define TIVA_GPIO_PINS 120 #endif /* GPTM attributes.*/ diff --git a/os/hal/ports/TIVA/TM4C129x/hal_lld.h b/os/hal/ports/TIVA/TM4C129x/hal_lld.h index a0e769b..dc6644f 100644 --- a/os/hal/ports/TIVA/TM4C129x/hal_lld.h +++ b/os/hal/ports/TIVA/TM4C129x/hal_lld.h @@ -344,11 +344,6 @@ */ #define TIVA_SYSCLK 120000000 -#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC && \ - !CORTEX_IS_VALID_KERNEL_PRIORITY(TIVA_ST_IRQ_PRIORITY) -#error "Invalid IRQ priority assigned to SysTick" -#endif - /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/os/hal/ports/TIVA/TM4C129x/platform.mk b/os/hal/ports/TIVA/TM4C129x/platform.mk index 35de5ce..97a5a73 100644 --- a/os/hal/ports/TIVA/TM4C129x/platform.mk +++ b/os/hal/ports/TIVA/TM4C129x/platform.mk @@ -4,7 +4,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/st_lld.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/pal_lld.c \ ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/serial_lld.c \ - ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/mac_lld.c + ${CHIBIOS}/community/os/hal/ports/TIVA/LLD/mac_lld.c \ + ${CHISIOS}/community/os/hal/ports/TIVA/LLD/ext_lld.c # Required include directories PLATFORMINC = ${CHIBIOS}/os/hal/ports/common/ARMCMx \ diff --git a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk deleted file mode 100644 index bd76209..0000000 --- a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4F TM4C123x port files. -PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ - $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \ - ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore.c \ - ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore_v7m.c - -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s \ - $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/nilcoreasm_v7m.s - -PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \ - ${CHIBIOS}/community/os/common/ports/ARMCMx/devices/TM4C123x \ - ${CHIBIOS}/os/nil/ports/ARMCMx \ - ${CHIBIOS}/os/nil/ports/ARMCMx/compilers/GCC - -PORTLD = ${CHIBIOS}/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk b/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk deleted file mode 100644 index 7e55117..0000000 --- a/os/nil/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4F TM4C129x port files. -PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ - $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \ - ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore.c \ - ${CHIBIOS}/os/nil/ports/ARMCMx/nilcore_v7m.c - -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s \ - $(CHIBIOS)/os/nil/ports/ARMCMx/compilers/GCC/nilcoreasm_v7m.s - -PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \ - ${CHIBIOS}/community/os/common/ports/ARMCMx/devices/TM4C129x \ - ${CHIBIOS}/os/nil/ports/ARMCMx \ - ${CHIBIOS}/os/nil/ports/ARMCMx/compilers/GCC - -PORTLD = ${CHIBIOS}/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk b/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk deleted file mode 100644 index 470f42d..0000000 --- a/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c123x.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4F TM4C123x port files. -PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ - $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \ - ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \ - ${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c - -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s \ - $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s - -PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \ - ${CHIBIOS}/community/os/common/ports/ARMCMx/devices/TM4C123x \ - ${CHIBIOS}/os/rt/ports/ARMCMx \ - ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC - -PORTLD = ${CHIBIOS}/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk b/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk deleted file mode 100644 index 0891b83..0000000 --- a/os/rt/ports/ARMCMx/compilers/GCC/mk/port_tm4c129x.mk +++ /dev/null @@ -1,15 +0,0 @@ -# List of the ChibiOS/RT Cortex-M4F TM4C129x port files. -PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0.c \ - $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/vectors.c \ - ${CHIBIOS}/os/rt/ports/ARMCMx/chcore.c \ - ${CHIBIOS}/os/rt/ports/ARMCMx/chcore_v7m.c - -PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s \ - $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s - -PORTINC = ${CHIBIOS}/os/ext/CMSIS/include \ - ${CHIBIOS}/community/os/common/ports/ARMCMx/devices/TM4C129x \ - ${CHIBIOS}/os/rt/ports/ARMCMx \ - ${CHIBIOS}/os/rt/ports/ARMCMx/compilers/GCC - -PORTLD = ${CHIBIOS}/community/os/common/ports/ARMCMx/compilers/GCC/ld diff --git a/os/various/devices_lib/l3gd20.c b/os/various/devices_lib/mems/l3gd20.c index 2d93ee8..1cc52c9 100644 --- a/os/various/devices_lib/l3gd20.c +++ b/os/various/devices_lib/mems/l3gd20.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -21,7 +21,9 @@ Special thanks to Giovanni Di Sirio for teachings, his moral support and friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. - Please refer to ChibiOS/RT license before use it. + Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,10 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "l3gd20.h" -#if (GYRO_USE_L3GD20) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -85,7 +85,7 @@ void l3gd20WriteRegister(SPIDriver *spip, uint8_t reg, uint8_t value) { /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lg3d20WriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lg3d20WriteRegister(), reserved register"); case L3GD20_AD_WHO_AM_I: case L3GD20_AD_OUT_TEMP : case L3GD20_AD_STATUS_REG: @@ -120,7 +120,4 @@ void l3gd20WriteRegister(SPIDriver *spip, uint8_t reg, uint8_t value) { spiUnselect(spip); } } - -#endif /* (GYRO_USE_L3GD20) */ - /** @} */ diff --git a/os/various/devices_lib/l3gd20.h b/os/various/devices_lib/mems/l3gd20.h index 3fc58cb..08d9092 100644 --- a/os/various/devices_lib/l3gd20.h +++ b/os/various/devices_lib/mems/l3gd20.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -34,16 +36,13 @@ #ifndef _L3GD20_H_ #define _L3GD20_H_ -#if (GYRO_USE_L3GD20) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ -#if (PLAY_USE_FLOAT) || defined(__DOXYGEN__) #define L3GD20_SENS_250DPS ((float)131.072f) /*!< gyroscope sensitivity with 250 dps full scale [LSB/dps] */ #define L3GD20_SENS_500DPS ((float)65.536f) /*!< gyroscope sensitivity with 500 dps full scale [LSB/dps] */ #define L3GD20_SENS_2000DPS ((float)16.384f) /*!< gyroscope sensitivity with 2000 dps full scale [LSB/dps] */ -#endif /* PLAY_USE_FLOAT */ /** * @name L3GD20 register names * @{ @@ -238,11 +237,7 @@ extern "C" { } #endif -#endif /* GYRO_USE_L3GD20 */ #endif /* _L3GD20_H_ */ /** @} */ -/* - * TODO PLAY--> add i2c support, and Multiple reg read. - */ diff --git a/os/various/devices_lib/lis3mdl.c b/os/various/devices_lib/mems/lis3mdl.c index dba95c3..99b71e4 100644 --- a/os/various/devices_lib/lis3mdl.c +++ b/os/various/devices_lib/mems/lis3mdl.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,11 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "lis3mdl.h" -#if (COMP_USE_LIS3MDL) || defined(__DOXYGEN__) - /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -117,7 +116,7 @@ void lis3mdlWriteRegister(I2CDriver *i2cp, uint8_t sad, uint8_t sub, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lis3mdlWriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lis3mdlWriteRegister(), reserved register"); case LIS3MDL_SUB_WHO_AM_I: case LIS3MDL_SUB_STATUS_REG: case LIS3MDL_SUB_OUT_X_L: @@ -149,6 +148,4 @@ void lis3mdlWriteRegister(I2CDriver *i2cp, uint8_t sad, uint8_t sub, break; } } - -#endif /* COMP_USE_LIS3MDL */ /** @} */ diff --git a/os/various/devices_lib/lis3mdl.h b/os/various/devices_lib/mems/lis3mdl.h index 8ef37ef..e55978e 100644 --- a/os/various/devices_lib/lis3mdl.h +++ b/os/various/devices_lib/mems/lis3mdl.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -34,17 +36,14 @@ #ifndef _LIS3MDL_H_ #define _LIS3MDL_H_ -#if (COMP_USE_LIS3MDL) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ -#if (PLAY_USE_FLOAT) || defined(__DOXYGEN__) #define LIS3MDL_COMP_SENS_4GA ((float)6842.0f) /*!< compass sensitivity with 4 GA full scale [LSB / Ga] */ -#define LIS3MDL_COMP_SENS_8GA ((float)3421.0f) /*!< compass sensitivity with 8 GA full scale [LSB / Ga] */ -#define LIS3MDL_COMP_SENS_12GA ((float)2281.0f) /*!< compass sensitivity with 12 GA full scale [LSB / Ga] */ -#define LIS3MDL_COMP_SENS_16GA ((float)1711.0f) /*!< compass sensitivity with 16 GA full scale [LSB / Ga] */ -#endif /* PLAY_USE_FLOAT */ +#define LIS3MDL_COMP_SENS_8GA ((float)3421.0f) /*!< compass sensitivity with 8 GA full scale [LSB / Ga] */ +#define LIS3MDL_COMP_SENS_12GA ((float)2281.0f) /*!< compass sensitivity with 12 GA full scale [LSB / Ga] */ +#define LIS3MDL_COMP_SENS_16GA ((float)1711.0f) /*!< compass sensitivity with 16 GA full scale [LSB / Ga] */ /** * @name LIS3MDL register names * @{ @@ -254,7 +253,6 @@ extern "C" { } #endif -#endif /* COMP_USE_LIS3MDL */ #endif /* _LIS3MDL_H_ */ /** @} */ diff --git a/os/various/devices_lib/lsm303dlhc.c b/os/various/devices_lib/mems/lsm303dlhc.c index 7861255..070c49c 100644 --- a/os/various/devices_lib/lsm303dlhc.c +++ b/os/various/devices_lib/mems/lsm303dlhc.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,11 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "lsm303dlhc.h" -#if (ACCEL_USE_LSM303DLHC) || (COMP_USE_LSM303DLHC) || defined(__DOXYGEN__) - /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -121,7 +120,7 @@ void lsm303dlhcWriteRegister(I2CDriver *i2cp,uint8_t sad, uint8_t sub, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lsm303dlhcWriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lsm303dlhcWriteRegister(), reserved register"); case LSM303DLHC_SUB_ACC_STATUS_REG: case LSM303DLHC_SUB_ACC_OUT_X_L: case LSM303DLHC_SUB_ACC_OUT_X_H: @@ -172,7 +171,7 @@ void lsm303dlhcWriteRegister(I2CDriver *i2cp,uint8_t sad, uint8_t sub, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lsm303dlhcWriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lsm303dlhcWriteRegister(), reserved register"); case LSM303DLHC_SUB_COMP_OUT_X_H: case LSM303DLHC_SUB_COMP_OUT_X_L: case LSM303DLHC_SUB_COMP_OUT_Z_H: @@ -203,5 +202,4 @@ void lsm303dlhcWriteRegister(I2CDriver *i2cp,uint8_t sad, uint8_t sub, } } } -#endif /* (ACCEL_USE_LSM303DLHC) || (COMP_USE_LSM303DLHC) */ /** @} */ diff --git a/os/various/devices_lib/lsm303dlhc.h b/os/various/devices_lib/mems/lsm303dlhc.h index 4ea788a..46b51bc 100644 --- a/os/various/devices_lib/lsm303dlhc.h +++ b/os/various/devices_lib/mems/lsm303dlhc.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,12 +37,10 @@ #ifndef _LSM303DLHC_H_ #define _LSM303DLHC_H_ -#if (ACCEL_USE_LSM303DLHC) || (COMP_USE_LSM303DLHC) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ -#if (PLAY_USE_FLOAT) || defined(__DOXYGEN__) #define LSM303DLHC_ACC_SENS_2G ((float)1671.836f) /*!< Accelerometer sensitivity with 2 G full scale [LSB * s^2 / m] */ #define LSM303DLHC_ACC_SENS_4G ((float)835.918f) /*!< Accelerometer sensitivity with 4 G full scale [LSB * s^2 / m] */ #define LSM303DLHC_ACC_SENS_8G ((float)417.959f) /*!< Accelerometer sensitivity with 8 G full scale [LSB * s^2 / m] */ @@ -61,7 +61,6 @@ #define LSM303DLHC_COMP_SENS_Z_4_7GA ((float)355.0f) /*!< Compass sensitivity with 4.7 GA full scale [LSB / Ga] */ #define LSM303DLHC_COMP_SENS_Z_5_6GA ((float)295.0f) /*!< Compass sensitivity with 5.6 GA full scale [LSB / Ga] */ #define LSM303DLHC_COMP_SENS_Z_8_1GA ((float)205.0f) /*!< Compass sensitivity with 8.1 GA full scale [LSB / Ga] */ -#endif /* PLAY_USE_FLOAT */ /** * @name LSM303DLHC register names * @{ @@ -348,10 +347,6 @@ extern "C" { #ifdef __cplusplus } #endif -#endif /* (ACCEL_USE_LSM303DLHC) || (COMP_USE_LSM303DLHC) */ #endif /* _LSM303DLHC_H_ */ /** @} */ -/* - * TODO PLAY--> add spi support, and Multiple reg read. - */ diff --git a/os/various/devices_lib/lsm6ds0.c b/os/various/devices_lib/mems/lsm6ds0.c index 304b340..da67f12 100644 --- a/os/various/devices_lib/lsm6ds0.c +++ b/os/various/devices_lib/mems/lsm6ds0.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,11 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "lsm6ds0.h" -#if (ACCEL_USE_LSM6DS0) || (GYRO_USE_LSM6DS0) || defined(__DOXYGEN__) - /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -117,7 +116,7 @@ void lsm6ds0WriteRegister(I2CDriver *i2cp, uint8_t sad, uint8_t sub, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lsm6ds0WriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lsm6ds0WriteRegister(), reserved register"); case LSM6DS0_SUB_WHO_AM_I: case LSM6DS0_SUB_INT_GEN_SRC_G: case LSM6DS0_SUB_OUT_TEMP_L: @@ -182,5 +181,4 @@ void lsm6ds0WriteRegister(I2CDriver *i2cp, uint8_t sad, uint8_t sub, } } -#endif /* (ACCEL_USE_LSM6DS0) || (GYRO_USE_LSM6DS0) */ /** @} */ diff --git a/os/various/devices_lib/lsm6ds0.h b/os/various/devices_lib/mems/lsm6ds0.h index 9f27e1b..57e2057 100644 --- a/os/various/devices_lib/lsm6ds0.h +++ b/os/various/devices_lib/mems/lsm6ds0.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -34,12 +36,10 @@ #ifndef _LSM6DS0_H_ #define _LSM6DS0_H_ -#if (ACCEL_USE_LSM6DS0) || (GYRO_USE_LSM6DS0) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ -#if (PLAY_USE_FLOAT) || defined(__DOXYGEN__) #define LSM6DS0_ACC_SENS_2G ((float)1671.095f) /*!< Accelerometer sensitivity with 2 G full scale [LSB * s^2 / m] */ #define LSM6DS0_ACC_SENS_4G ((float)835.547f) /*!< Accelerometer sensitivity with 4 G full scale [LSB * s^2 / m] */ #define LSM6DS0_ACC_SENS_8G ((float)417.774) /*!< Accelerometer sensitivity with 8 G full scale [LSB * s^2 / m] */ @@ -48,8 +48,6 @@ #define LSM6DS0_GYRO_SENS_245DPS ((float)114.286f) /*!< Gyroscope sensitivity with 245 dps full scale [LSB * s / °] */ #define LSM6DS0_GYRO_SENS_500DPS ((float)57.143f) /*!< Gyroscope sensitivity with 500 dps full scale [LSB * s / °] */ #define LSM6DS0_GYRO_SENS_2000DPS ((float)14.286f) /*!< Gyroscope sensitivity with 2000 dps full scale [LSB * s / °] */ - -#endif /* PLAY_USE_FLOAT */ /** * @name LSM6DS0 register names * @{ @@ -479,7 +477,6 @@ extern "C" { } #endif -#endif /* (ACCEL_USE_LSM6DS0) || (GYRO_USE_LSM6DS0) */ #endif /* _LSM6DS0_H_ */ /** @} */ diff --git a/os/various/devices_lib/max7219.c b/os/various/devices_lib/others/max7219.c index b15699e..0e51167 100644 --- a/os/various/devices_lib/max7219.c +++ b/os/various/devices_lib/others/max7219.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -21,7 +21,9 @@ Special thanks to Giovanni Di Sirio for teachings, his moral support and friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. - Please refer to ChibiOS/RT license before use it. + Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,10 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "max7219.h" -#if (PLAY_USE_MAX7219) || defined (__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -91,5 +91,4 @@ void max7219WriteRegister(SPIDriver *spip, uint16_t adr, uint8_t data) { spiUnselect(spip); } } -#endif /* PLAY_USE_MAX7219 */ /** @} */ diff --git a/os/various/devices_lib/max7219.h b/os/various/devices_lib/others/max7219.h index 80524be..f2bbbdf 100644 --- a/os/various/devices_lib/max7219.h +++ b/os/various/devices_lib/others/max7219.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -34,7 +36,6 @@ #ifndef _MAX7219_H_ #define _MAX7219_H_ -#if (PLAY_USE_MAX7219) || defined (__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ @@ -180,7 +181,6 @@ extern "C" { #ifdef __cplusplus } #endif -#endif /* PLAY_USE_MAX7219 */ #endif /* _MAX7219_H_ */ /** @} */ diff --git a/os/various/devices_lib/nrf24l01.c b/os/various/devices_lib/rf/nrf24l01.c index 34d8bff..f526fbe 100644 --- a/os/various/devices_lib/nrf24l01.c +++ b/os/various/devices_lib/rf/nrf24l01.c @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -21,7 +21,9 @@ Special thanks to Giovanni Di Sirio for teachings, his moral support and friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. - Please refer to ChibiOS/RT license before use it. + Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -35,10 +37,8 @@ #include "ch.h" #include "hal.h" -#include "play.h" #include "nrf24l01.h" -#if (RF_USE_NRF24L01) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver local definitions. */ /*===========================================================================*/ @@ -123,7 +123,7 @@ NRF24L01_status_t nrf24l01WriteRegister(SPIDriver *spip, uint8_t reg, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "lg3d20WriteRegister(), #1", "reserved register"); + chDbgAssert(FALSE, "lg3d20WriteRegister(), reserved register"); case NRF24L01_AD_OBSERVE_TX: case NRF24L01_AD_CD: case NRF24L01_AD_RX_ADDR_P0: @@ -182,7 +182,7 @@ NRF24L01_status_t nrf24l01WriteAddress(SPIDriver *spip, uint8_t reg, unsigned i; if(addlen > NRF24L01_MAX_ADD_LENGHT) { - chDbgAssert(FALSE, "nrf24l01WriteAddress(), #1", "wrong address length"); + chDbgAssert(FALSE, "nrf24l01WriteAddress(), wrong address length"); return 0; } txbuf[0] = (NRF24L01_CMD_WRITE | reg); @@ -197,7 +197,7 @@ NRF24L01_status_t nrf24l01WriteAddress(SPIDriver *spip, uint8_t reg, /* Reserved register must not be written, according to the datasheet * this could permanently damage the device. */ - chDbgAssert(FALSE, "nrf24l01WriteAddress(), #1", "reserved register"); + chDbgAssert(FALSE, "nrf24l01WriteAddress(), reserved register"); case NRF24L01_AD_OBSERVE_TX: case NRF24L01_AD_CD: case NRF24L01_AD_CONFIG: @@ -436,6 +436,5 @@ NRF24L01_status_t nrf24l01WriteTxPlNoAck(SPIDriver *spip, uint8_t paylen, return status; } #endif /* NRF24L01_USE_FEATURE */ -#endif /* RF_USE_NRF24L01 */ /** @} */ diff --git a/os/various/devices_lib/nrf24l01.h b/os/various/devices_lib/rf/nrf24l01.h index 7112b9f..86ba127 100644 --- a/os/various/devices_lib/nrf24l01.h +++ b/os/various/devices_lib/rf/nrf24l01.h @@ -1,6 +1,6 @@ /* - Pretty LAYer for ChibiOS/RT - Copyright (C) 2014 Rocco Marco Guglielmi - + Pretty LAYer for ChibiOS/RT - Copyright (C) 2015 Rocco Marco Guglielmi + This file is part of PLAY for ChibiOS/RT. PLAY is free software; you can redistribute it and/or modify @@ -22,6 +22,8 @@ friendship. Note that some or every piece of this file could be part of the ChibiOS project that is intellectual property of Giovanni Di Sirio. Please refer to ChibiOS/RT license before use this file. + + For suggestion or Bug report - roccomarco.guglielmi@playembedded.org */ /** @@ -34,9 +36,6 @@ #ifndef _NRF24L01_H_ #define _NRF24L01_H_ -#include "playconf.h" - -#if (RF_USE_NRF24L01) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ @@ -571,7 +570,6 @@ NRF24L01_status_t nrf24l01WriteTxPlNoAck(SPIDriver *spip, uint8_t paylen, } #endif -#endif /* RF_USE_NRF24L01 */ #endif /* _NRF24L01_H_ */ /** @} */ |