diff options
Diffstat (limited to 'os/common')
-rw-r--r-- | os/common/ports/MSP430X/chcore.c | 103 | ||||
-rw-r--r-- | os/common/ports/MSP430X/chcore.h | 437 | ||||
-rw-r--r-- | os/common/ports/MSP430X/chcore_timer.h | 119 | ||||
-rw-r--r-- | os/common/ports/MSP430X/compilers/GCC/chtypes.h | 99 | ||||
-rw-r--r-- | os/common/ports/MSP430X/compilers/GCC/mk/port.mk | 7 | ||||
-rw-r--r-- | os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld | 390 | ||||
-rw-r--r-- | os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk | 10 | ||||
-rw-r--r-- | os/common/startup/MSP430X/compilers/GCC/rules.mk | 269 |
8 files changed, 1434 insertions, 0 deletions
diff --git a/os/common/ports/MSP430X/chcore.c b/os/common/ports/MSP430X/chcore.c new file mode 100644 index 0000000..4e09b8f --- /dev/null +++ b/os/common/ports/MSP430X/chcore.c @@ -0,0 +1,103 @@ +/*
+ ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file MSP430X/nilcore.c
+ * @brief MSP430X port code.
+ *
+ * @addtogroup MSP430X_CORE
+ * @{
+ */
+
+#include "ch.h"
+
+/*===========================================================================*/
+/* Module local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module local types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Performs a context switch between two threads.
+ * @details This is the most critical code in any port, this function
+ * is responsible for the context switch between 2 threads.
+ * @note The implementation of this code affects <b>directly</b> the context
+ * switch performance so optimize here as much as you can.
+ *
+ * @param[in] ntp the thread to be switched in
+ * @param[in] otp the thread to be switched out
+ */
+#if !defined(__DOXYGEN__) && defined(__OPTIMIZE__)
+__attribute__((naked))
+#endif
+void _port_switch(thread_t *ntp, thread_t *otp) {
+#if !defined(__OPTIMIZE__)
+ asm volatile ("add #4, r1");
+#endif
+ (void)(ntp);
+ (void)(otp);
+#if defined(__MSP430X_LARGE__)
+ asm volatile ("pushm.a #7, R10");
+ asm volatile ("mova r1, @R13");
+ asm volatile ("mova @R12, r1");
+ asm volatile ("popm.a #7, R10");
+ asm volatile ("reta");
+#else
+ asm volatile ("pushm.w #7, R10");
+ asm volatile ("mov r1, @R13");
+ asm volatile ("mov @R12, r1");
+ asm volatile ("popm.w #7, R10");
+ asm volatile ("ret");
+#endif
+}
+
+/**
+ * @brief Start a thread by invoking its work function.
+ * @details If the work function returns @p chThdExit() is automatically
+ * invoked.
+ */
+void _port_thread_start(void) {
+
+ /* See PORT_SETUP_CONTEXT in nilcore.h */
+ chSysUnlock();
+#if defined(__MSP430X_LARGE__)
+ asm volatile ("mova R5, R12");
+ asm volatile ("calla R4");
+#else
+ asm volatile ("mov R5, R12");
+ asm volatile ("call R4");
+#endif
+ chSysHalt(0);
+}
+/** @} */
diff --git a/os/common/ports/MSP430X/chcore.h b/os/common/ports/MSP430X/chcore.h new file mode 100644 index 0000000..09f87c4 --- /dev/null +++ b/os/common/ports/MSP430X/chcore.h @@ -0,0 +1,437 @@ +/*
+ ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file MSP430X/nilcore.h
+ * @brief MSP430X port macros and structures.
+ *
+ * @addtogroup MSP430X_CORE
+ * @{
+ */
+
+#ifndef CHCORE_H
+#define CHCORE_H
+
+#include <msp430.h>
+#include <in430.h>
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/**
+ * @name Architecture and Compiler
+ * @{
+ */
+/**
+ * @brief Macro defining the port architecture.
+ */
+#define PORT_ARCHITECTURE_MSP430X
+
+/**
+ * @brief Name of the implemented architecture.
+ */
+#define PORT_ARCHITECTURE_NAME "MSP430X"
+
+/**
+ * @brief Name of the architecture variant.
+ */
+#define PORT_CORE_VARIANT_NAME "MSP430Xv2"
+
+/* The following code is not processed when the file is included from an
+ * asm module because those intrinsic macrosa re not necessarily defined
+ * by the assembler too.*/
+#if !defined(_FROM_ASM_)
+
+/**
+ * @brief Compiler name and version.
+ */
+#if defined(__GNUC__) || defined(__DOXYGEN__)
+#define PORT_COMPILER_NAME "GCC " __VERSION__
+
+#else
+#error "unsupported compiler"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+/**
+ * @brief Port-specific information string.
+ */
+#define PORT_INFO "16 bits code addressing"
+
+/**
+ * @brief This port supports a realtime counter.
+ */
+#define PORT_SUPPORTS_RT FALSE
+/** @} */
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Stack size for the system idle thread.
+ * @details This size depends on the idle thread implementation, usually
+ * the idle thread should take no more space than those reserved
+ * by @p PORT_INT_REQUIRED_STACK.
+ * @note In this port it is set to 8.
+ */
+#if !defined(PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__)
+#define PORT_IDLE_THREAD_STACK_SIZE 8
+#endif
+
+/**
+ * @brief Per-thread stack overhead for interrupts servicing.
+ * @details This constant is used in the calculation of the correct working
+ * area size.
+ * @note In this port the default is 32 bytes per thread.
+ */
+#if !defined(PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__)
+#define PORT_INT_REQUIRED_STACK 32
+#endif
+
+/**
+ * @brief Enables an alternative timer implementation.
+ * @details Usually the port uses a timer interface defined in the file
+ * @p nilcore_timer.h, if this option is enabled then the file
+ * @p nilcore_timer_alt.h is included instead.
+ */
+#if !defined(PORT_USE_ALT_TIMER)
+#define PORT_USE_ALT_TIMER FALSE
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/**
+ * @brief Type of stack and memory alignment enforcement.
+ */
+typedef uint16_t stkalign_t;
+
+/**
+ * @brief Type of natural register size - depends on memory model.
+ */
+#if defined(__MSP430X_LARGE__)
+typedef unsigned __int20 reg_t;
+#else
+typedef uint16_t reg_t;
+#endif
+
+/**
+ * @brief Natural alignment constant.
+ * @note It is the minimum alignment for pointer-size variables.
+ */
+#define PORT_NATURAL_ALIGN 2U
+
+/**
+ * @brief Stack alignment constant.
+ * @note It is the alignement required for the stack pointer.
+ */
+#define PORT_STACK_ALIGN 2U
+
+/**
+ * @brief Working Areas alignment constant.
+ * @note It is the alignment to be enforced for thread working areas.
+ */
+#define PORT_WORKING_AREA_ALIGN 2U
+/** @} */
+
+/**
+ * @brief System saved context.
+ * @details This structure represents the inner stack frame during a context
+ * switching.
+ */
+struct port_intctx {
+ reg_t r4;
+ reg_t r5;
+ reg_t r6;
+ reg_t r7;
+ reg_t r8;
+ reg_t r9;
+ reg_t r10;
+ reg_t r0; /* program counter */
+};
+
+/**
+ * @brief Platform dependent part of the @p thread_t structure.
+ * @details This structure usually contains just the saved stack pointer
+ * defined as a pointer to a @p port_intctx structure.
+ */
+struct port_context {
+ struct port_intctx *sp;
+};
+
+#endif /* !defined(_FROM_ASM_) */
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/**
+ * @brief Platform dependent thread stack setup.
+ * @details This code usually setup the context switching frame represented
+ * by an @p port_intctx structure.
+ */
+#define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) { \
+ (tp)->ctx.sp = (struct port_intctx*)(((uint8_t *)(wtop)) - \
+ sizeof(struct port_intctx)); \
+ (tp)->ctx.sp->r4 = (reg_t)pf; \
+ (tp)->ctx.sp->r5 = (reg_t)arg; \
+ (tp)->ctx.sp->r0 = (reg_t)_port_thread_start; \
+}
+
+/**
+ * @brief Static working area allocation.
+ * @details This macro is used to allocate a static thread working area
+ * aligned as both position and size.
+ *
+ * @param[in] s the name to be assigned to the stack array
+ * @param[in] n the stack size to be assigned to the thread
+ */
+#define PORT_WORKING_AREA(s, n) \
+ stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)]
+
+/**
+ * @brief Computes the thread working area global size.
+ * @note There is no need to perform alignments in this macro.
+ */
+#define PORT_WA_SIZE(n) ((sizeof(struct port_intctx) - 1) + \
+ (n) + (PORT_INT_REQUIRED_STACK))
+
+/**
+ * @brief IRQ prologue code.
+ * @details This macro must be inserted at the start of all IRQ handlers
+ * enabled to invoke system APIs.
+ */
+#define PORT_IRQ_PROLOGUE()
+
+/**
+ * @brief IRQ epilogue code.
+ * @details This macro must be inserted at the end of all IRQ handlers
+ * enabled to invoke system APIs.
+ */
+#define PORT_IRQ_EPILOGUE() chSchRescheduleS()
+
+/**
+ * @brief IRQ handler function declaration.
+ * @note @p id can be a function name or a vector number depending on the
+ * port implementation.
+ */
+#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \
+ void ISR_ ## id (void)
+
+/**
+ * @brief Fast IRQ handler function declaration.
+ * @note @p id can be a function name or a vector number depending on the
+ * port implementation.
+ */
+#define PORT_FAST_IRQ_HANDLER(id) PORT_IRQ_HANDLER(id)
+
+/**
+ * @brief Performs a context switch between two threads.
+ * @details This is the most critical code in any port, this function
+ * is responsible for the context switch between 2 threads.
+ * @note The implementation of this code affects <b>directly</b> the context
+ * switch performance so optimize here as much as you can.
+ *
+ * @param[in] ntp the thread to be switched in
+ * @param[in] otp the thread to be switched out
+ */
+#define port_switch(ntp, otp) _port_switch(ntp, otp)
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void _port_irq_epilogue(void);
+ void _port_switch(thread_t *ntp, thread_t *otp);
+ void _port_thread_start(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/**
+ * @brief Port-related initialization code.
+ */
+static inline void port_init(void) {
+
+}
+
+/**
+ * @brief Returns a word encoding the current interrupts status.
+ *
+ * @return The interrupts status.
+ */
+static inline syssts_t port_get_irq_status(void) {
+
+ return __get_SR_register();
+}
+
+/**
+ * @brief Checks the interrupt status.
+ *
+ * @param[in] sts the interrupt status word
+ *
+ * @return The interrupt status.
+ * @retvel false the word specified a disabled interrupts status.
+ * @retvel true the word specified an enabled interrupts status.
+ */
+static inline bool port_irq_enabled(syssts_t sts) {
+
+ return sts & GIE;
+}
+
+/**
+ * @brief Determines the current execution context.
+ *
+ * @return The execution context.
+ * @retval false not running in ISR mode.
+ * @retval true running in ISR mode.
+ */
+static inline bool port_is_isr_context(void) {
+ /* Efficiency would be enhanced by not doing this,
+ * because of implementation details */
+ return __get_SR_register() & GIE;
+}
+
+/**
+ * @brief Kernel-lock action.
+ */
+static inline void port_lock(void) {
+
+ _disable_interrupts();
+ asm volatile("nop");
+}
+
+/**
+ * @brief Kernel-unlock action.
+ */
+static inline void port_unlock(void) {
+ asm volatile("nop");
+ _enable_interrupts();
+}
+
+/**
+ * @brief Kernel-lock action from an interrupt handler.
+ * @note This function is empty in this port.
+ */
+static inline void port_lock_from_isr(void) {
+
+}
+
+/**
+ * @brief Kernel-unlock action from an interrupt handler.
+ * @note This function is empty in this port.
+ */
+static inline void port_unlock_from_isr(void) {
+
+}
+
+/**
+ * @brief Disables all the interrupt sources.
+ */
+static inline void port_disable(void) {
+
+ _disable_interrupts();
+ asm volatile("nop");
+}
+
+/**
+ * @brief Disables the interrupt sources below kernel-level priority.
+ */
+static inline void port_suspend(void) {
+
+ _disable_interrupts();
+ asm volatile("nop");
+}
+
+/**
+ * @brief Enables all the interrupt sources.
+ */
+static inline void port_enable(void) {
+
+ asm volatile("nop");
+ _enable_interrupts();
+}
+
+/**
+ * @brief Enters an architecture-dependent IRQ-waiting mode.
+ * @details The function is meant to return when an interrupt becomes pending.
+ * The simplest implementation is an empty function or macro but this
+ * would not take advantage of architecture-specific power saving
+ * modes.
+ */
+static inline void port_wait_for_interrupt(void) {
+
+}
+
+/**
+ * @brief Returns the current value of the realtime counter.
+ *
+ * @return The realtime counter value.
+ */
+static inline rtcnt_t port_rt_get_counter_value(void) {
+ /* TODO implement realtime counter */
+ return 0;
+}
+
+#endif /* !defined(_FROM_ASM_) */
+
+/*===========================================================================*/
+/* Module late inclusions. */
+/*===========================================================================*/
+
+#if !defined(_FROM_ASM_)
+
+#if CH_CFG_ST_TIMEDELTA > 0
+#if !PORT_USE_ALT_TIMER
+#include "chcore_timer.h"
+#else /* PORT_USE_ALT_TIMER */
+#include "chcore_timer_alt.h"
+#endif /* PORT_USE_ALT_TIMER */
+#endif /* CH_CFG_ST_TIMEDELTA > 0 */
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* CHCORE_H */
+
+/** @} */
diff --git a/os/common/ports/MSP430X/chcore_timer.h b/os/common/ports/MSP430X/chcore_timer.h new file mode 100644 index 0000000..87ea514 --- /dev/null +++ b/os/common/ports/MSP430X/chcore_timer.h @@ -0,0 +1,119 @@ +/*
+ ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file MSP430X/chcore_timer.h
+ * @brief System timer header file.
+ *
+ * @addtogroup MSP430X_TIMER
+ * @{
+ */
+
+#ifndef CHCORE_TIMER_H
+#define CHCORE_TIMER_H
+
+#include "hal_st.h"
+
+/*===========================================================================*/
+/* Module constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Module inline functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Starts the alarm.
+ * @note Makes sure that no spurious alarms are triggered after
+ * this call.
+ *
+ * @param[in] abstime the time to be set for the first alarm
+ *
+ * @notapi
+ */
+static inline void port_timer_start_alarm(systime_t abstime) {
+
+ stStartAlarm(abstime);
+}
+
+/**
+ * @brief Stops the alarm interrupt.
+ *
+ * @notapi
+ */
+static inline void port_timer_stop_alarm(void) {
+ stStopAlarm();
+}
+
+/**
+ * @brief Sets the alarm time.
+ *
+ * @param[in] abstime the time to be set for the next alarm
+ *
+ * @notapi
+ */
+static inline void port_timer_set_alarm(systime_t abstime) {
+
+ stSetAlarm(abstime);
+}
+
+/**
+ * @brief Returns the system time.
+ *
+ * @return The system time.
+ *
+ * @notapi
+ */
+static inline systime_t port_timer_get_time(void) {
+
+ return stGetCounter();
+}
+
+/**
+ * @brief Returns the current alarm time.
+ *
+ * @return The currently set alarm time.
+ *
+ * @notapi
+ */
+static inline systime_t port_timer_get_alarm(void) {
+
+ return stGetAlarm();
+}
+
+#endif /* CHCORE_TIMER_H */
+
+/** @} */
diff --git a/os/common/ports/MSP430X/compilers/GCC/chtypes.h b/os/common/ports/MSP430X/compilers/GCC/chtypes.h new file mode 100644 index 0000000..11cc980 --- /dev/null +++ b/os/common/ports/MSP430X/compilers/GCC/chtypes.h @@ -0,0 +1,99 @@ +/*
+ ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file MSP430X/compilers/GCC/chtypes.h
+ * @brief MSP430X port system types.
+ *
+ * @addtogroup MSP430X_GCC_CORE
+ * @{
+ */
+
+#ifndef CHTYPES_H
+#define CHTYPES_H
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * @name Common constants
+ */
+/**
+ * @brief Generic 'false' boolean constant.
+ */
+#if !defined(FALSE) || defined(__DOXYGEN__)
+#define FALSE 0
+#endif
+
+/**
+ * @brief Generic 'true' boolean constant.
+ */
+#if !defined(TRUE) || defined(__DOXYGEN__)
+#define TRUE 1
+#endif
+/** @} */
+
+/**
+ * @name Kernel types
+ * @{
+ */
+typedef uint16_t rtcnt_t; /**< Realtime counter. */
+typedef uint64_t rttime_t; /**< Realtime accumulator. */
+typedef uint16_t syssts_t; /**< System status word. */
+typedef uint8_t tmode_t; /**< Thread flags. */
+typedef uint8_t tstate_t; /**< Thread state. */
+typedef uint8_t trefs_t; /**< Thread references counter. */
+typedef uint8_t tslices_t; /**< Thread time slices counter.*/
+typedef uint8_t tprio_t; /**< Thread priority. */
+typedef int16_t msg_t; /**< Inter-thread message. */
+typedef int32_t eventid_t; /**< Numeric event identifier. */
+typedef uint8_t eventmask_t; /**< Mask of event identifiers. */
+typedef int16_t cnt_t; /**< Generic signed counter. */
+typedef uint16_t ucnt_t; /**< Generic unsigned counter. */
+
+/**
+ * @brief ROM constant modifier.
+ * @note It is set to use the "const" keyword in this port.
+ */
+#define ROMCONST const
+
+/**
+ * @brief Makes functions not inlineable.
+ * @note If the compiler does not support such attribute then the
+ * realtime counter precision could be degraded.
+ */
+#define NOINLINE __attribute__((noinline))
+
+/**
+ * @brief Optimized thread function declaration macro.
+ */
+#define PORT_THD_FUNCTION(tname, arg) \
+ void tname(void *arg)
+
+/**
+ * @brief Packed variable specifier.
+ */
+#define PACKED_VAR __attribute__((packed))
+
+/**
+ * @brief Memory alignment enforcement for variables.
+ */
+#define ALIGNED_VAR(n) __attribute__((aligned(n)))
+
+#endif /* _NILTYPES_H_ */
+
+/** @} */
diff --git a/os/common/ports/MSP430X/compilers/GCC/mk/port.mk b/os/common/ports/MSP430X/compilers/GCC/mk/port.mk new file mode 100644 index 0000000..0ef5378 --- /dev/null +++ b/os/common/ports/MSP430X/compilers/GCC/mk/port.mk @@ -0,0 +1,7 @@ +# List of the ChibiOS/RT MSP430X port files.
+PORTSRC = ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X/chcore.c
+
+PORTASM =
+
+PORTINC = ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X \
+ ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X/compilers/GCC
diff --git a/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld new file mode 100644 index 0000000..b618455 --- /dev/null +++ b/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld @@ -0,0 +1,390 @@ +/* This file supports MSP430FR5969 devices. */
+/* Version: 1.0 */
+/* ChibiOS linker script, for normal executables */
+
+OUTPUT_ARCH(msp430)
+ENTRY(_start)
+
+MEMORY {
+ SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
+ PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0 /* END=0x0100, size 240 */
+ PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size 256 */
+ RAM : ORIGIN = 0x1C00, LENGTH = 0x0800 /* END=0x23FF, size 2048 */
+ INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
+ INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
+ INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
+ INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
+ INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
+ FRAM (rxw) : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */
+ VECT1 : ORIGIN = 0xFF90, LENGTH = 0x0002
+ VECT2 : ORIGIN = 0xFF92, LENGTH = 0x0002
+ VECT3 : ORIGIN = 0xFF94, LENGTH = 0x0002
+ VECT4 : ORIGIN = 0xFF96, LENGTH = 0x0002
+ VECT5 : ORIGIN = 0xFF98, LENGTH = 0x0002
+ VECT6 : ORIGIN = 0xFF9A, LENGTH = 0x0002
+ VECT7 : ORIGIN = 0xFF9C, LENGTH = 0x0002
+ VECT8 : ORIGIN = 0xFF9E, LENGTH = 0x0002
+ VECT9 : ORIGIN = 0xFFA0, LENGTH = 0x0002
+ VECT10 : ORIGIN = 0xFFA2, LENGTH = 0x0002
+ VECT11 : ORIGIN = 0xFFA4, LENGTH = 0x0002
+ VECT12 : ORIGIN = 0xFFA6, LENGTH = 0x0002
+ VECT13 : ORIGIN = 0xFFA8, LENGTH = 0x0002
+ VECT14 : ORIGIN = 0xFFAA, LENGTH = 0x0002
+ VECT15 : ORIGIN = 0xFFAC, LENGTH = 0x0002
+ VECT16 : ORIGIN = 0xFFAE, LENGTH = 0x0002
+ VECT17 : ORIGIN = 0xFFB0, LENGTH = 0x0002
+ VECT18 : ORIGIN = 0xFFB2, LENGTH = 0x0002
+ VECT19 : ORIGIN = 0xFFB4, LENGTH = 0x0002
+ VECT20 : ORIGIN = 0xFFB6, LENGTH = 0x0002
+ VECT21 : ORIGIN = 0xFFB8, LENGTH = 0x0002
+ VECT22 : ORIGIN = 0xFFBA, LENGTH = 0x0002
+ VECT23 : ORIGIN = 0xFFBC, LENGTH = 0x0002
+ VECT24 : ORIGIN = 0xFFBE, LENGTH = 0x0002
+ VECT25 : ORIGIN = 0xFFC0, LENGTH = 0x0002
+ VECT26 : ORIGIN = 0xFFC2, LENGTH = 0x0002
+ VECT27 : ORIGIN = 0xFFC4, LENGTH = 0x0002
+ VECT28 : ORIGIN = 0xFFC6, LENGTH = 0x0002
+ VECT29 : ORIGIN = 0xFFC8, LENGTH = 0x0002
+ VECT30 : ORIGIN = 0xFFCA, LENGTH = 0x0002
+ VECT31 : ORIGIN = 0xFFCC, LENGTH = 0x0002
+ VECT32 : ORIGIN = 0xFFCE, LENGTH = 0x0002
+ VECT33 : ORIGIN = 0xFFD0, LENGTH = 0x0002
+ VECT34 : ORIGIN = 0xFFD2, LENGTH = 0x0002
+ VECT35 : ORIGIN = 0xFFD4, LENGTH = 0x0002
+ VECT36 : ORIGIN = 0xFFD6, LENGTH = 0x0002
+ VECT37 : ORIGIN = 0xFFD8, LENGTH = 0x0002
+ VECT38 : ORIGIN = 0xFFDA, LENGTH = 0x0002
+ VECT39 : ORIGIN = 0xFFDC, LENGTH = 0x0002
+ VECT40 : ORIGIN = 0xFFDE, LENGTH = 0x0002
+ VECT41 : ORIGIN = 0xFFE0, LENGTH = 0x0002
+ VECT42 : ORIGIN = 0xFFE2, LENGTH = 0x0002
+ VECT43 : ORIGIN = 0xFFE4, LENGTH = 0x0002
+ VECT44 : ORIGIN = 0xFFE6, LENGTH = 0x0002
+ VECT45 : ORIGIN = 0xFFE8, LENGTH = 0x0002
+ VECT46 : ORIGIN = 0xFFEA, LENGTH = 0x0002
+ VECT47 : ORIGIN = 0xFFEC, LENGTH = 0x0002
+ VECT48 : ORIGIN = 0xFFEE, LENGTH = 0x0002
+ VECT49 : ORIGIN = 0xFFF0, LENGTH = 0x0002
+ VECT50 : ORIGIN = 0xFFF2, LENGTH = 0x0002
+ VECT51 : ORIGIN = 0xFFF4, LENGTH = 0x0002
+ VECT52 : ORIGIN = 0xFFF6, LENGTH = 0x0002
+ VECT53 : ORIGIN = 0xFFF8, LENGTH = 0x0002
+ VECT54 : ORIGIN = 0xFFFA, LENGTH = 0x0002
+ VECT55 : ORIGIN = 0xFFFC, LENGTH = 0x0002
+ RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
+ BSL : ORIGIN = 0x1000, LENGTH = 0x0800
+ HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00003FFF
+}
+
+PHDRS {
+ vectors PT_LOAD ;
+ stack PT_LOAD ;
+ rodata PT_LOAD ;
+ data PT_LOAD ;
+ text PT_LOAD ;
+ upper_rodata PT_LOAD ;
+ upper_data PT_LOAD ;
+ upper_text PT_LOAD ;
+}
+
+SECTIONS
+{
+ __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 :vectors =0x3C00
+ __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 =0x3C00
+ __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3 =0x3C00
+ __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4 =0x3C00
+ __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 =0x3C00
+ __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 =0x3C00
+ __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 =0x3C00
+ __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 =0x3C00
+ __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9 =0x3C00
+ __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10 =0x3C00
+ __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11 =0x3C00
+ __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 =0x3C00
+ __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 =0x3C00
+ __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 =0x3C00
+ __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15 =0x3C00
+ __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16 =0x3C00
+ __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17 =0x3C00
+ __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18 =0x3C00
+ __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19 =0x3C00
+ __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20 =0x3C00
+ __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21 =0x3C00
+ __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22 =0x3C00
+ __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23 =0x3C00
+ __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24 =0x3C00
+ __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25 =0x3C00
+ __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26 =0x3C00
+ __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27 =0x3C00
+ __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28 =0x3C00
+ __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29 =0x3C00
+ __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30 =0x3C00
+ __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_aes256)) } > VECT31 =0x3C00
+ __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_rtc)) } > VECT32 =0x3C00
+ __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port4)) } > VECT33 =0x3C00
+ __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_port3)) } > VECT34 =0x3C00
+ __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT35 =0x3C00
+ __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT36 =0x3C00
+ __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_port2)) } > VECT37 =0x3C00
+ __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38 =0x3C00
+ __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39 =0x3C00
+ __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_port1)) } > VECT40 =0x3C00
+ __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT41 =0x3C00
+ __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT42 =0x3C00
+ __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_dma)) } > VECT43 =0x3C00
+ __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT44 =0x3C00
+ __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT45 =0x3C00
+ __interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT46 =0x3C00
+ __interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_adc12)) } > VECT47 =0x3C00
+ __interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT48 =0x3C00
+ __interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT49 =0x3C00
+ __interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_wdt)) } > VECT50 =0x3C00
+ __interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT51 =0x3C00
+ __interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT52 =0x3C00
+ __interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_comp_e)) } > VECT53 =0x3C00
+ __interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_unmi)) } > VECT54 =0x3C00
+ __interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT55 =0x3C00
+ __reset_vector :
+ {
+ KEEP (*(__interrupt_vector_56))
+ KEEP (*(__interrupt_vector_reset))
+ KEEP (*(.resetvec))
+ } > RESETVEC
+
+ .stack :
+ {
+ __main_thread_stack_base__ = .;
+ *(.stack)
+ . += __idle_stack_size__;
+ PROVIDE (__stack = .);
+ . = ALIGN(2);
+ __main_thread_stack_end__ = .;
+ } > FRAM :stack
+
+ .rodata :
+ {
+ . = ALIGN(2);
+ *(.plt)
+ *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
+ *(.rodata1)
+ *(.lower.rodata.* .lower.rodata)
+
+ *(.eh_frame_hdr)
+ KEEP (*(.eh_frame))
+ KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
+ PROVIDE (__preinit_array_start = .);
+ KEEP (*(.preinit_array))
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array))
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ KEEP (*(.fini_array))
+ KEEP (*(SORT(.fini_array.*)))
+ PROVIDE (__fini_array_end = .);
+ LONG(0); /* Sentinel. */
+
+ /* gcc uses crtbegin.o to find the start of the constructors, so
+ we make sure it is first. Because this is a wildcard, it
+ doesn't matter if the user does not actually link against
+ crtbegin.o; the linker won't look for a file to match a
+ wildcard. The wildcard also means that it doesn't matter which
+ directory crtbegin.o is in. */
+ KEEP (*crtbegin*.o(.ctors))
+
+ /* We don't want to include the .ctor section from from the
+ crtend.o file until after the sorted ctors. The .ctor section
+ from the crtend file contains the end of ctors marker and it
+ must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } > FRAM :rodata
+
+ .data :
+ {
+ . = ALIGN(2);
+ PROVIDE (__datastart = .);
+
+ KEEP (*(.jcr))
+ *(.data.rel.ro.local) *(.data.rel.ro*)
+ *(.dynamic)
+
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ *(.data1)
+ *(.got.plt) *(.got)
+
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ . = ALIGN(2);
+ *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
+
+ . = ALIGN(2);
+ *(.lower.data.* .lower.data)
+ . = ALIGN(2);
+
+ _edata = .;
+ PROVIDE (edata = .);
+ PROVIDE (__dataend = .);
+ } > FRAM :data
+
+ /* Note that crt0 assumes this is a multiple of two; all the
+ start/stop symbols are also assumed word-aligned. */
+ PROVIDE(__romdatastart = LOADADDR(.data));
+ PROVIDE (__romdatacopysize = SIZEOF(.data));
+
+ .bss :
+ {
+ . = ALIGN(2);
+ PROVIDE (__bssstart = .);
+ *(.dynbss)
+ *(.sbss .sbss.*)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(.lower.bss.* .lower.bss)
+ . = ALIGN(2);
+ *(COMMON)
+ PROVIDE (__bssend = .);
+ } > FRAM
+ PROVIDE (__bsssize = SIZEOF(.bss));
+
+ /* This section contains data that is not initialised at startup. */
+ .noinit (NOLOAD) :
+ {
+ . = ALIGN(2);
+ PROVIDE (__noinit_start = .);
+ *(.noinit)
+ . = ALIGN(2);
+ PROVIDE (__noinit_end = .);
+ } > FRAM /* Because I think this has to go right above .bss */
+
+ _end = .;
+ PROVIDE (end = .);
+
+ .text :
+ {
+ PROVIDE (_start = .);
+
+ . = ALIGN(2);
+ KEEP (*(SORT(.crt_*)))
+
+ . = ALIGN(2);
+ KEEP (*(.lowtext))
+
+ . = ALIGN(2);
+ *(.lower.text.* .lower.text)
+
+ . = ALIGN(2);
+ *(.text .stub .text.* .gnu.linkonce.t.* .text:*)
+
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.interp .hash .dynsym .dynstr .gnu.version*)
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ . = ALIGN(2);
+ KEEP (*(.init))
+ KEEP (*(.fini))
+ KEEP (*(.tm_clone_table))
+ } > FRAM :text
+
+ .upper.rodata :
+ {
+ *(.upper.rodata.* .upper.rodata)
+ } > HIFRAM :upper_rodata
+
+ .upper.data :
+ {
+ __upper_data_init = LOADADDR (.upper.data);
+ /* Status word. */
+ SHORT(1);
+ __high_datastart = .;
+ *(.upper.data.* .upper.data)
+ __high_dataend = .;
+ } > HIFRAM :upper_data
+
+ __rom_highdatacopysize = SIZEOF(.upper.data) - 2;
+ __rom_highdatastart = LOADADDR(.upper.data) + 2;
+
+ .upper.bss :
+ {
+ . = ALIGN(2);
+ __high_bssstart = .;
+ *(.upper.bss.* .upper.bss)
+ . = ALIGN(2);
+ __high_bssend = .;
+ } > HIFRAM
+
+ .upper.text :
+ {
+ . = ALIGN(2);
+ *(.upper.text.* .upper.text)
+ } > HIFRAM :upper_text
+
+ .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
+ .infoB : {} > INFOB
+ .infoC : {} > INFOC
+ .infoD : {} > INFOD
+
+ /* The rest are all not normally part of the runtime image. */
+
+ .MP430.attributes 0 :
+ {
+ KEEP (*(.MSP430.attributes))
+ KEEP (*(.gnu.attributes))
+ KEEP (*(__TI_build_attributes))
+ }
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1. */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions. */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2. */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2. */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions. */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* DWARF 3 */
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }
+ .debug_ranges 0 : { *(.debug_ranges) }
+ /* DWARF Extension. */
+ .debug_macro 0 : { *(.debug_macro) }
+
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+INCLUDE msp430fr5969_symbols.ld
diff --git a/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk b/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk new file mode 100644 index 0000000..9c063cd --- /dev/null +++ b/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk @@ -0,0 +1,10 @@ +# List of the ChibiOS generic MSP430X startup and linker files.
+STARTUPSRC =
+#$(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/vectors.c
+
+STARTUPASM =
+
+STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/ld
+
diff --git a/os/common/startup/MSP430X/compilers/GCC/rules.mk b/os/common/startup/MSP430X/compilers/GCC/rules.mk new file mode 100644 index 0000000..a431b96 --- /dev/null +++ b/os/common/startup/MSP430X/compilers/GCC/rules.mk @@ -0,0 +1,269 @@ +# ARM Cortex-Mx common makefile scripts and rules.
+
+##############################################################################
+# Processing options coming from the upper Makefile.
+#
+
+# Compiler options
+OPT = $(USE_OPT)
+COPT = $(USE_COPT)
+CPPOPT = $(USE_CPPOPT)
+
+# Garbage collection
+ifeq ($(USE_LINK_GC),yes)
+ OPT += -ffunction-sections -fdata-sections -fno-common
+ LDOPT := ,--gc-sections
+else
+ LDOPT :=
+endif
+
+# Linker extra options
+ifneq ($(USE_LDOPT),)
+ LDOPT := $(LDOPT),$(USE_LDOPT)
+endif
+
+# Link time optimizations
+ifeq ($(USE_LTO),yes)
+ OPT += -flto
+endif
+
+# HWMULT-related options
+ifeq ($(USE_HWMULT),)
+ USE_HWMULT = none
+endif
+ifneq ($(USE_HWMULT),none)
+ OPT += -mhwmult=$(USE_HWMULT)
+endif
+
+# Idle thread stack size
+ifeq ($(USE_IDLE_STACKSIZE),)
+ LDOPT := $(LDOPT),--defsym=__idle_stack_size__=0x40
+else
+ LDOPT := $(LDOPT),--defsym=__idle_stack_size__=$(USE_IDLE_STACKSIZE)
+endif
+
+# Output directory and files
+ifeq ($(BUILDDIR),)
+ BUILDDIR = build
+endif
+ifeq ($(BUILDDIR),.)
+ BUILDDIR = build
+endif
+OUTFILES = $(BUILDDIR)/$(PROJECT).elf \
+ $(BUILDDIR)/$(PROJECT).hex \
+ $(BUILDDIR)/$(PROJECT).bin \
+ $(BUILDDIR)/$(PROJECT).dmp \
+ $(BUILDDIR)/$(PROJECT).list
+
+ifdef SREC
+ OUTFILES += $(BUILDDIR)/$(PROJECT).srec
+endif
+
+# Source files groups and paths
+ACSRC = $(CSRC)
+ACPPSRC = $(CPPSRC)
+ASRC = $(CSRC)$(CPPSRC)
+SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)))
+
+# Various directories
+OBJDIR = $(BUILDDIR)/obj
+LSTDIR = $(BUILDDIR)/lst
+
+# Object files groups
+ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o)))
+ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o)))
+ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
+ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
+OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS)
+
+# Paths
+IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
+LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+
+# Macros
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+
+# Libs
+LIBS = $(DLIBS) $(ULIBS)
+
+# Various settings
+MCFLAGS = -mmcu=$(MCU) $(MOPT)
+ODFLAGS = -x --syms
+ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
+ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
+CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
+CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
+LDFLAGS = $(MCFLAGS) $(OPT) -minrt $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT)
+
+# Temporary specfile to deal with messed-up msp430-elf default spec file
+SPECFILE := $(shell mktemp -u)
+
+# Generate dependency information
+ASFLAGS += -MD -MP -MF .dep/$(@F).d
+CFLAGS += -MD -MP -MF .dep/$(@F).d
+CPPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+# Paths where to search for sources
+VPATH = $(SRCPATHS)
+
+#
+# Makefile rules
+#
+
+all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK
+
+PRE_MAKE_ALL_RULE_HOOK:
+
+POST_MAKE_ALL_RULE_HOOK:
+
+$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR)
+
+$(BUILDDIR):
+ifneq ($(USE_VERBOSE_COMPILE),yes)
+ @echo Compiler Options
+ @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
+ @echo
+endif
+ @mkdir -p $(BUILDDIR)
+
+$(OBJDIR):
+ @mkdir -p $(OBJDIR)
+
+$(LSTDIR):
+ @mkdir -p $(LSTDIR)
+
+$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CPPC) -c $(CPPFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ACOBJS) : $(OBJDIR)/%.o : %.c Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(CFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(TCOBJS) : $(OBJDIR)/%.o : %.c Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(CFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
+endif
+
+$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+else
+ @echo Compiling $(<F)
+ @$(CC) -c $(ASXFLAGS) $(TOPT) -I. $(IINCDIR) $< -o $@
+endif
+
+# This is gcc-specific - if LD isn't gcc it will fail
+$(SPECFILE) :
+ $(LD) -dumpspecs > $(SPECFILE)
+ sed -i 's/%{!T.*}//' $(SPECFILE)
+
+$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT) $(SPECFILE)
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ @echo
+ $(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@
+else
+ @echo Linking $@
+ @$(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@
+endif
+
+%.hex: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(HEX) $< $@
+else
+ @echo Creating $@
+ @$(HEX) $< $@
+endif
+
+%.bin: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(BIN) $< $@
+else
+ @echo Creating $@
+ @$(BIN) $< $@
+endif
+
+%.srec: %.elf
+ifdef SREC
+ ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(SREC) $< $@
+ else
+ @echo Creating $@
+ @$(SREC) $< $@
+ endif
+endif
+
+%.dmp: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(OD) $(ODFLAGS) $< > $@
+ $(SZ) $<
+else
+ @echo Creating $@
+ @$(OD) $(ODFLAGS) $< > $@
+ @echo
+ @$(SZ) $<
+endif
+
+%.list: %.elf
+ifeq ($(USE_VERBOSE_COMPILE),yes)
+ $(OD) -S $< > $@
+else
+ @echo Creating $@
+ @$(OD) -S $< > $@
+ @echo
+ @echo Done
+endif
+
+lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a
+
+$(BUILDDIR)/lib$(PROJECT).a: $(OBJS)
+ @$(AR) -r $@ $^
+ @echo
+ @echo Done
+
+clean:
+ @echo Cleaning
+ -rm -fR .dep $(BUILDDIR)
+ @echo
+ @echo Done
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***
|