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authorbarthess <barthess@yandex.ru>2014-10-22 10:33:02 +0300
committerbarthess <barthess@yandex.ru>2014-10-22 10:33:02 +0300
commit5f231b6aaf4f3506b462faed77db0b3a5595d918 (patch)
tree4c7d0acd1cd51045e671667d74624a4b4f5cc33c /testhal
parente52b67e87f5ae2fcef035584de5f38477f6b478e (diff)
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FSMC. SDRAM. Style cleanup
Diffstat (limited to 'testhal')
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/.project2
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile2
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c2
-rw-r--r--testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h2
4 files changed, 3 insertions, 5 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/.project b/testhal/STM32/STM32F4xx/FSMC_SDRAM/.project
index dd98b90..120dc0c 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/.project
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/.project
@@ -27,7 +27,7 @@
<link>
<name>os</name>
<type>2</type>
- <locationURI>CHIBIOS/os</locationURI>
+ <locationURI>CHIBIOS</locationURI>
</link>
</linkedResources>
</projectDescription>
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
index 5443c63..7e083fa 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
@@ -82,7 +82,7 @@ PROJECT = ch
# Imported source files and paths
CHIBIOS = ../../../../..
include $(CHIBIOS)/community/os/hal/hal.mk
-include $(CHIBIOS)/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk
+include $(CHIBIOS)/os/hal/boards/ST_STM32F429I_DISCOVERY/board.mk
include $(CHIBIOS)/community/os/hal/ports/STM32/STM32F4xx/platform.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
include $(CHIBIOS)/os/rt/rt.mk
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c
index 9e107fb..4a3497d 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/main.c
@@ -50,7 +50,6 @@ write memtest function using ideas from http://www.memtest86.com/technical.htm
*/
/*
-/*
******************************************************************************
* GLOBAL VARIABLES
******************************************************************************
@@ -81,7 +80,6 @@ static const SDRAMConfig sdram_cfg = {
(2 << 24) // FMC_RCDDelay = 2 (TRCD: 20ns => 2x11.11ns)
};
-
/* benchmarking results in MiB/S */
double memset_speed_ext;
double memset_speed_int;
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
index f265834..cc44f87 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
@@ -41,7 +41,7 @@
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE 12
+#define STM32_PLLM_VALUE 8
#define STM32_PLLN_VALUE 336
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 7