Merge branch 'master' into mike

9 files changed, 1020 insertions, 702 deletions

diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject b/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject
index d5451e0..034a4fc 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/.cproject
@@ -1,33 +1,79 @@
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 					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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 					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+							<tool id="org.eclipse.cdt.build.core.settings.holder.1165165914" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
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+									<listOptionValue builtIn="false" value="&quot;/opt/arm-none-eabi/lib/gcc/arm-none-eabi/${GCC_VERSION}/include&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;/opt/arm-none-eabi/lib/gcc/arm-none-eabi/${GCC_VERSION}/include-fixed&quot;"/>
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+									<listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5"/>
+									<listOptionValue builtIn="false" value="/usr/include"/>
+									<listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5/backward"/>
+									<listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include"/>
+									<listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include-fixed"/>
+									<listOptionValue builtIn="false" value="/usr/lib/gcc/x86_64-pc-linux-gnu/5.4.0/include/g++-v5/x86_64-pc-linux-gnu"/>
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@@ -41,12 +87,10 @@
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 	<storageModule moduleId="scannerConfiguration">
 		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
-		<scannerConfigBuildInfo instanceId="0.1570569554">
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 			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
 		</scannerConfigBuildInfo>
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 	</storageModule>
 	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope"/>
 </cproject>
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile
index 6ad8126..5996f17 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile
@@ -30,7 +30,7 @@ endif
 
 # Enable this if you want link time optimizations (LTO)
 ifeq ($(USE_LTO),)
-  USE_LTO = no
+  USE_LTO = yes
 endif
 
 # If enabled, this option allows to compile the application in THUMB mode.
@@ -46,7 +46,7 @@ endif
 # If enabled, this option makes the build process faster by not compiling
 # modules not used in the current configuration.
 ifeq ($(USE_SMART_BUILD),)
-  USE_SMART_BUILD = no
+  USE_SMART_BUILD = yes
 endif
 
 #
@@ -98,9 +98,13 @@ include $(CHIBIOS)/os/hal/osal/rt/osal.mk
 # RTOS files (optional).
 include $(CHIBIOS)/os/rt/rt.mk
 include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+#include $(CHIBIOS)/test/lib/test.mk
+#include $(CHIBIOS)/test/rt/rt_test.mk
+#include $(CHIBIOS)/test/oslib/oslib_test.mk
 
 # Define linker script file here
-LDSCRIPT = $(STARTUPLD)/STM32F407xG.ld
+LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld
 
 # C sources that can be compiled in ARM or THUMB mode depending on the global
 # setting.
@@ -149,7 +153,6 @@ ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
 INCDIR = $(CHIBIOS)/os/license \
          $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
          $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
-         $(CHIBIOS)/os/various \
          $(CHIBIOS_CONTRIB)/os/various
 
 #
@@ -189,7 +192,7 @@ TOPT = -mthumb -DTHUMB
 CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
 
 # Define C++ warning options here
-CPPWARN = -Wall -Wextra
+CPPWARN = -Wall -Wextra -Wundef
 
 #
 # Compiler settings
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
index 1065821..1843208 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h
@@ -1,520 +1,608 @@
-/*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/**
- * @file    templates/chconf.h
- * @brief   Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- *          contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef CHCONF_H
-#define CHCONF_H
-
-#define _CHIBIOS_RT_CONF_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 10000
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 TRUE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 TRUE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                TRUE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  TRUE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     TRUE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 TRUE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS                   FALSE
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK           FALSE
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS                FALSE
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS               FALSE
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the trace buffer is activated.
- *
- * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
-
-/**
- * @brief   Trace buffer entries.
- * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
- *          different from @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_BUFFER_SIZE            128
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK           FALSE
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS                 FALSE
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING            FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* Context switch code here.*/                                            \
-}
-
-/**
- * @brief   ISR enter hook.
- */
-#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
-  /* IRQ prologue code here.*/                                              \
-}
-
-/**
- * @brief   ISR exit hook.
- */
-#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
-  /* IRQ epilogue code here.*/                                              \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
-  /* Idle-enter code here.*/                                                \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
-  /* Idle-leave code here.*/                                                \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* System halt code here.*/                                               \
-}
-
-/**
- * @brief   Trace hook.
- * @details This hook is invoked each time a new record is written in the
- *          trace buffer.
- */
-#define CH_CFG_TRACE_HOOK(tep) {                                            \
-  /* Trace code here.*/                                                     \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h).    */
-/*===========================================================================*/
-
-#endif  /* CHCONF_H */
-
-/** @} */
+/*

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef CHCONF_H

+#define CHCONF_H

+

+#define _CHIBIOS_RT_CONF_

+#define _CHIBIOS_RT_CONF_VER_5_0_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 10000

+

+/**

+ * @brief   Time intervals data size.

+ * @note    Allowed values are 16, 32 or 64 bits.

+ */

+#define CH_CFG_INTERVALS_SIZE               32

+

+/**

+ * @brief   Time types data size.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_TIME_TYPES_SIZE              32

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 2

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       TRUE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief  Objects FIFOs APIs.

+ * @details If enabled then the objects FIFOs APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_OBJ_FIFOS                TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Objects factory options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Objects Factory APIs.

+ * @details If enabled then the objects factory APIs are included in the

+ *          kernel.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_CFG_USE_FACTORY                  TRUE

+

+/**

+ * @brief   Maximum length for object names.

+ * @details If the specified length is zero then the name is stored by

+ *          pointer but this could have unintended side effects.

+ */

+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8

+

+/**

+ * @brief   Enables the registry of generic objects.

+ */

+#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE

+

+/**

+ * @brief   Enables factory for generic buffers.

+ */

+#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE

+

+/**

+ * @brief   Enables factory for semaphores.

+ */

+#define CH_CFG_FACTORY_SEMAPHORES           TRUE

+

+/**

+ * @brief   Enables factory for mailboxes.

+ */

+#define CH_CFG_FACTORY_MAILBOXES            TRUE

+

+/**

+ * @brief   Enables factory for objects FIFOs.

+ */

+#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the trace buffer is activated.

+ *

+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_ALL

+

+/**

+ * @brief   Trace buffer entries.

+ * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is

+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.

+ */

+#define CH_DBG_TRACE_BUFFER_SIZE            128

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System structure extension.

+ * @details User fields added to the end of the @p ch_system_t structure.

+ */

+#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   System initialization hook.

+ * @details User initialization code added to the @p chSysInit() function

+ *          just before interrupts are enabled globally.

+ */

+#define CH_CFG_SYSTEM_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p _thread_init() function.

+ *

+ * @note    It is invoked from within @p _thread_init() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   ISR enter hook.

+ */

+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \

+  /* IRQ prologue code here.*/                                              \

+}

+

+/**

+ * @brief   ISR exit hook.

+ */

+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \

+  /* IRQ epilogue code here.*/                                              \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+  /* Idle-enter code here.*/                                                \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+  /* Idle-leave code here.*/                                                \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/**

+ * @brief   Trace hook.

+ * @details This hook is invoked each time a new record is written in the

+ *          trace buffer.

+ */

+#define CH_CFG_TRACE_HOOK(tep) {                                            \

+  /* Trace code here.*/                                                     \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* CHCONF_H */

+

+/** @} */

diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c
index e36fbc9..7f02c11 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/dma_storm_spi.c
@@ -49,10 +49,12 @@ static const uint8_t testbuf_flash[SPI_BUF_SIZE];
  *
  */
 static const SPIConfig spicfg = {
+    false,
     spi_end_cb,
     GPIOA,
     GPIOA_SPI1_NSS,
     0, //SPI_CR1_BR_1 | SPI_CR1_BR_0
+    0
 };
 
 static uint32_t ints;
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h
index e690d15..18a6ec7 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -52,6 +52,13 @@
 #endif
 
 /**
+ * @brief   Enables the cryptographic subsystem.
+ */
+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
+#define HAL_USE_CRY                 FALSE
+#endif
+
+/**
  * @brief   Enables the DAC subsystem.
  */
 #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
@@ -62,7 +69,7 @@
  * @brief   Enables the EXT subsystem.
  */
 #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
+#define HAL_USE_EXT                 FALSE
 #endif
 
 /**
@@ -115,6 +122,13 @@
 #endif
 
 /**
+ * @brief   Enables the QSPI subsystem.
+ */
+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
+#define HAL_USE_QSPI                FALSE
+#endif
+
+/**
  * @brief   Enables the RTC subsystem.
  */
 #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
@@ -202,6 +216,28 @@
 #endif
 
 /*===========================================================================*/
+/* CRY driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the SW fall-back of the cryptographic driver.
+ * @details When enabled, this option, activates a fall-back software
+ *          implementation for algorithms not supported by the underlying
+ *          hardware.
+ * @note    Fall-back implementations may not be present for all algorithms.
+ */
+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_USE_FALLBACK                FALSE
+#endif
+
+/**
+ * @brief   Makes the driver forcibly use the fall-back implementations.
+ */
+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_ENFORCE_FALLBACK            FALSE
+#endif
+
+/*===========================================================================*/
 /* I2C driver related settings.                                              */
 /*===========================================================================*/
 
@@ -376,10 +412,6 @@
 #define USB_USE_WAIT                FALSE
 #endif
 
-/*===========================================================================*/
-/* Community drivers's includes                                              */
-/*===========================================================================*/
-
 #include "halconf_community.h"
 
 #endif /* HALCONF_H */
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
index f480707..20fd46c 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h
@@ -14,8 +14,8 @@
     limitations under the License.

 */

 

-#ifndef _HALCONF_COMMUNITY_H_

-#define _HALCONF_COMMUNITY_H_

+#ifndef HALCONF_COMMUNITY_H

+#define HALCONF_COMMUNITY_H

 

 /**

  * @brief   Enables the community overlay.

@@ -66,6 +66,48 @@
 #define HAL_USE_RNG                 FALSE

 #endif

 

+/**

+ * @brief   Enables the EEPROM subsystem.

+ */

+#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)

+#define HAL_USE_EEPROM              FALSE

+#endif

+

+/**

+ * @brief   Enables the TIMCAP subsystem.

+ */

+#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)

+#define HAL_USE_TIMCAP              FALSE

+#endif

+

+/**

+ * @brief   Enables the TIMCAP subsystem.

+ */

+#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)

+#define HAL_USE_COMP                FALSE

+#endif

+

+/**

+ * @brief   Enables the QEI subsystem.

+ */

+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)

+#define HAL_USE_QEI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the USBH subsystem.

+ */

+#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)

+#define HAL_USE_USBH                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB_MSD subsystem.

+ */

+#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__)

+#define HAL_USE_USB_MSD             FALSE

+#endif

+

 /*===========================================================================*/

 /* FSMCNAND driver related settings.                                         */

 /*===========================================================================*/

@@ -93,6 +135,39 @@
  */

 #define ONEWIRE_USE_SEARCH_ROM      TRUE

 

-#endif /* _HALCONF_COMMUNITY_H_ */

+/*===========================================================================*/

+/* QEI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables discard of overlow

+ */

+#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__)

+#define QEI_USE_OVERFLOW_DISCARD    FALSE

+#endif

+

+/**

+ * @brief   Enables min max of overlow

+ */

+#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__)

+#define QEI_USE_OVERFLOW_MINMAX     FALSE

+#endif

+

+/*===========================================================================*/

+/* EEProm driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables 24xx series I2C eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE24XX FALSE

+ /**

+ * @brief   Enables 25xx series SPI eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE25XX FALSE

+

+#endif /* HALCONF_COMMUNITY_H */

 

 /** @} */

diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
index 2379a12..73c9cb3 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c
@@ -56,8 +56,6 @@
  ******************************************************************************
  */
 
-#define USE_BAD_MAP               TRUE
-
 #define USE_KILL_BLOCK_TEST       FALSE
 
 #define FSMCNAND_TIME_SET         ((uint32_t) 2) //(8nS)
@@ -74,7 +72,7 @@
 #define NAND_COL_WRITE_CYCLES     2
 
 #define NAND_TEST_START_BLOCK     1200
-#define NAND_TEST_END_BLOCK       1220
+#define NAND_TEST_END_BLOCK       1300
 
 #if USE_KILL_BLOCK_TEST
 #define NAND_TEST_KILL_BLOCK      8000
@@ -88,6 +86,8 @@
 #error "You should enable at least one NAND interface"
 #endif
 
+#define BAD_MAP_LEN     (NAND_BLOCKS_COUNT / (sizeof(bitmap_word_t) * 8))
+
 /*
  ******************************************************************************
  * EXTERNS
@@ -99,11 +99,6 @@
  * PROTOTYPES
  ******************************************************************************
  */
-#if STM32_NAND_USE_EXT_INT
-static void ready_isr_enable(void);
-static void ready_isr_disable(void);
-static void nand_ready_cb(EXTDriver *extp, expchannel_t channel);
-#endif
 
 /*
  ******************************************************************************
@@ -126,14 +121,14 @@ static time_measurement_t tmu_read_data;
 static time_measurement_t tmu_read_spare;
 static time_measurement_t tmu_driver_start;
 
-#if USE_BAD_MAP
-#define BAD_MAP_LEN     (NAND_BLOCKS_COUNT / (sizeof(bitmap_word_t) * 8))
-static bitmap_word_t    badblock_map_array[BAD_MAP_LEN];
+/*
+ *
+ */
+static bitmap_word_t badblock_map_array[BAD_MAP_LEN];
 static bitmap_t badblock_map = {
     badblock_map_array,
     BAD_MAP_LEN
 };
-#endif
 
 /*
  *
@@ -147,47 +142,11 @@ static const NANDConfig nandcfg = {
     NAND_COL_WRITE_CYCLES,
     /* stm32 specific fields */
     ((FSMCNAND_TIME_HIZ << 24) | (FSMCNAND_TIME_HOLD << 16) | \
-                                 (FSMCNAND_TIME_WAIT << 8) | FSMCNAND_TIME_SET),
-#if STM32_NAND_USE_EXT_INT
-    ready_isr_enable,
-    ready_isr_disable
-#endif
+                                 (FSMCNAND_TIME_WAIT << 8) | FSMCNAND_TIME_SET)
 };
 
-/**
- *
- */
-#if STM32_NAND_USE_EXT_INT
-static const EXTConfig extcfg = {
-  {
-    {EXT_CH_MODE_DISABLED, NULL},     //0
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //4
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_RISING_EDGE | EXT_MODE_GPIOD, nand_ready_cb},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //8
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //12
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //16
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},     //20
-    {EXT_CH_MODE_DISABLED, NULL},
-    {EXT_CH_MODE_DISABLED, NULL},
-  }
-};
-#endif /* STM32_NAND_USE_EXT_INT */
-
 static volatile uint32_t BackgroundThdCnt = 0;
+static thread_reference_t background_thd_ptr = NULL;
 
 #if USE_KILL_BLOCK_TEST
 static uint32_t KillCycle = 0;
@@ -202,25 +161,10 @@ static uint32_t KillCycle = 0;
  */
 static void nand_wp_assert(void)   {palClearPad(GPIOB, GPIOB_NAND_WP);}
 static void nand_wp_release(void)  {palSetPad(GPIOB, GPIOB_NAND_WP);}
-static void red_led_on(void)       {palSetPad(GPIOI, GPIOI_LED_R);}
+//static void red_led_on(void)       {palSetPad(GPIOI, GPIOI_LED_R);}
 static void red_led_off(void)      {palClearPad(GPIOI, GPIOI_LED_R);}
-
-#if STM32_NAND_USE_EXT_INT
-static void nand_ready_cb(EXTDriver *extp, expchannel_t channel){
-  (void)extp;
-  (void)channel;
-
-  NAND.isr_handler(&NAND);
-}
-
-static void ready_isr_enable(void) {
-  extChannelEnable(&EXTD1, GPIOD_NAND_RB_NWAIT);
-}
-
-static void ready_isr_disable(void) {
-  extChannelDisable(&EXTD1, GPIOD_NAND_RB_NWAIT);
-}
-#endif /* STM32_NAND_USE_EXT_INT */
+static void red_led_toggle(void)   {palTogglePad(GPIOI, GPIOI_LED_R);}
+static void green_led_toggle(void) {palTogglePad(GPIOI, GPIOI_LED_G);}
 
 /**
  *
@@ -467,8 +411,6 @@ static void general_test (NANDDriver *nandp, size_t first,
   uint8_t op_status;
   uint32_t recc, wecc;
 
-  red_led_on();
-
   /* initialize time measurement units */
   chTMObjectInit(&tmu_erase);
   chTMObjectInit(&tmu_write_data);
@@ -478,16 +420,38 @@ static void general_test (NANDDriver *nandp, size_t first,
 
   /* perform basic checks */
   for (block=first; block<last; block++){
+    red_led_toggle();
+    if (!nandIsBad(nandp, block)){
+      if (!is_erased(nandp, block)){
+        op_status = nandErase(nandp, block);
+        osalDbgCheck(0 == (op_status & 1)); /* operation failed */
+      }
+    }
+  }
+
+  /* check fail status */
+  for (block=first; block<last; block++){
     if (!nandIsBad(nandp, block)){
       if (!is_erased(nandp, block)){
         op_status = nandErase(nandp, block);
         osalDbgCheck(0 == (op_status & 1)); /* operation failed */
       }
+      pattern_fill();
+      op_status = nandWritePageData(nandp, block, 0,
+                    nand_buf, nandp->config->page_data_size, &wecc);
+      osalDbgCheck(0 == (op_status & 1));
+
+      pattern_fill();
+      op_status = nandWritePageData(nandp, block, 0,
+                    nand_buf, nandp->config->page_data_size, &wecc);
+      /* operation must failed here because of write in unerased space */
+      osalDbgCheck(1 == (op_status & 1));
     }
   }
 
   /* write block with pattern, read it back and compare */
   for (block=first; block<last; block++){
+    red_led_toggle();
     if (!nandIsBad(nandp, block)){
       for (page=0; page<nandp->config->pages_per_block; page++){
         pattern_fill();
@@ -538,72 +502,47 @@ static void general_test (NANDDriver *nandp, size_t first,
   red_led_off();
 }
 
-
 /*
- ******************************************************************************
- * EXPORTED FUNCTIONS
- ******************************************************************************
- */
-
-/*
- * Application entry point.
+ *
  */
-int main(void) {
+static void nand_test(bool use_badblock_map) {
 
   /* performance counters */
   int32_t adc_ints = 0;
-  int32_t spi_ints = 0;
   int32_t uart_ints = 0;
   int32_t adc_idle_ints = 0;
-  int32_t spi_idle_ints = 0;
   int32_t uart_idle_ints = 0;
   uint32_t background_cnt = 0;
   systime_t T = 0;
 
-  /*
-   * System initializations.
-   * - HAL initialization, this also initializes the configured device drivers
-   *   and performs the board-specific initializations.
-   * - Kernel initialization, the main() function becomes a thread and the
-   *   RTOS is active.
-   */
-  halInit();
-  chSysInit();
-
-#if STM32_NAND_USE_EXT_INT
-  extStart(&EXTD1, &extcfg);
-#endif
   chTMObjectInit(&tmu_driver_start);
   chTMStartMeasurementX(&tmu_driver_start);
-#if USE_BAD_MAP
-  nandStart(&NAND, &nandcfg, &badblock_map);
-#else
-  nandStart(&NAND, &nandcfg, NULL);
-#endif
+  if (use_badblock_map) {
+    nandStart(&NAND, &nandcfg, &badblock_map);
+  }
+  else {
+    nandStart(&NAND, &nandcfg, NULL);
+  }
   chTMStopMeasurementX(&tmu_driver_start);
 
   chThdSleepMilliseconds(4000);
 
-  chThdCreateStatic(BackgroundThreadWA,
-        sizeof(BackgroundThreadWA),
-        NORMALPRIO - 20,
-        BackgroundThread,
-        NULL);
-
-  nand_wp_release();
+  BackgroundThdCnt = 0;
+  if (NULL != background_thd_ptr) {
+    background_thd_ptr = chThdCreateStatic(BackgroundThreadWA,
+        sizeof(BackgroundThreadWA), NORMALPRIO - 10, BackgroundThread, NULL);
+  }
 
   /*
-   * run NAND test in parallel with DMA load and background thread
+   * run NAND test in parallel with DMA loads and background thread
    */
   dma_storm_adc_start();
   dma_storm_uart_start();
-  dma_storm_spi_start();
   T = chVTGetSystemTimeX();
   general_test(&NAND, NAND_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1);
   T = chVTGetSystemTimeX() - T;
-  adc_ints = dma_storm_adc_stop();
+  adc_ints  = dma_storm_adc_stop();
   uart_ints = dma_storm_uart_stop();
-  spi_ints = dma_storm_spi_stop();
   chSysLock();
   background_cnt = BackgroundThdCnt;
   BackgroundThdCnt = 0;
@@ -614,11 +553,9 @@ int main(void) {
    */
   dma_storm_adc_start();
   dma_storm_uart_start();
-  dma_storm_spi_start();
   chThdSleep(T);
   adc_idle_ints = dma_storm_adc_stop();
   uart_idle_ints = dma_storm_uart_stop();
-  spi_idle_ints = dma_storm_spi_stop();
 
   /*
    * ensure that NAND code have negligible impact on other subsystems
@@ -626,12 +563,40 @@ int main(void) {
   osalDbgCheck(background_cnt > (BackgroundThdCnt / 4));
   osalDbgCheck(abs(adc_ints  - adc_idle_ints)  < (adc_idle_ints  / 20));
   osalDbgCheck(abs(uart_ints - uart_idle_ints) < (uart_idle_ints / 20));
-  osalDbgCheck(abs(spi_ints  - spi_idle_ints)  < (spi_idle_ints  / 10));
 
   /*
    * perform ECC calculation test
    */
   ecc_test(&NAND, NAND_TEST_END_BLOCK);
+}
+
+/*
+ ******************************************************************************
+ * EXPORTED FUNCTIONS
+ ******************************************************************************
+ */
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+
+
+  /*
+   * System initializations.
+   * - HAL initialization, this also initializes the configured device drivers
+   *   and performs the board-specific initializations.
+   * - Kernel initialization, the main() function becomes a thread and the
+   *   RTOS is active.
+   */
+  halInit();
+  chSysInit();
+
+  nand_wp_release();
+
+  nand_test(true);
+  nand_test(false);
 
 #if USE_KILL_BLOCK_TEST
   kill_block(&NAND, NAND_TEST_KILL_BLOCK);
@@ -642,7 +607,9 @@ int main(void) {
   /*
    * Normal main() thread activity, in this demo it does nothing.
    */
+  red_led_off();
   while (true) {
+    green_led_toggle();
     chThdSleepMilliseconds(500);
   }
 }
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h
index d2333ba..14f1daf 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -65,16 +65,34 @@
 #define STM32_BKPRAM_ENABLE                 FALSE
 
 /*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_PRIORITY            6
+#define STM32_IRQ_EXTI1_PRIORITY            6
+#define STM32_IRQ_EXTI2_PRIORITY            6
+#define STM32_IRQ_EXTI3_PRIORITY            6
+#define STM32_IRQ_EXTI4_PRIORITY            6
+#define STM32_IRQ_EXTI5_9_PRIORITY          6
+#define STM32_IRQ_EXTI10_15_PRIORITY        6
+#define STM32_IRQ_EXTI16_PRIORITY           6
+#define STM32_IRQ_EXTI17_PRIORITY           15
+#define STM32_IRQ_EXTI18_PRIORITY           6
+#define STM32_IRQ_EXTI19_PRIORITY           6
+#define STM32_IRQ_EXTI20_PRIORITY           6
+#define STM32_IRQ_EXTI21_PRIORITY           15
+#define STM32_IRQ_EXTI22_PRIORITY           15
+
+/*
  * ADC driver system settings.
  */
 #define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
 #define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
+#define STM32_ADC_USE_ADC2                  TRUE
+#define STM32_ADC_USE_ADC3                  TRUE
 #define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
 #define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
 #define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY         3
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
 #define STM32_ADC_ADC2_DMA_PRIORITY         2
 #define STM32_ADC_ADC3_DMA_PRIORITY         2
 #define STM32_ADC_IRQ_PRIORITY              6
@@ -104,24 +122,6 @@
 #define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
 
 /*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
-
-/*
  * GPT driver system settings.
  */
 #define STM32_GPT_USE_TIM1                  FALSE
@@ -238,8 +238,8 @@
  */
 #define STM32_SDC_SDIO_DMA_PRIORITY         3
 #define STM32_SDC_SDIO_IRQ_PRIORITY         9
-#define STM32_SDC_WRITE_TIMEOUT_MS          250
-#define STM32_SDC_READ_TIMEOUT_MS           25
+#define STM32_SDC_WRITE_TIMEOUT_MS          1000
+#define STM32_SDC_READ_TIMEOUT_MS           1000
 #define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
 #define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
 #define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
@@ -252,7 +252,7 @@
 #define STM32_SERIAL_USE_USART3             FALSE
 #define STM32_SERIAL_USE_UART4              FALSE
 #define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USE_USART6             FALSE
+#define STM32_SERIAL_USE_USART6             TRUE
 #define STM32_SERIAL_USART1_PRIORITY        12
 #define STM32_SERIAL_USART2_PRIORITY        12
 #define STM32_SERIAL_USART3_PRIORITY        12
@@ -305,20 +305,20 @@
 #define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
 #define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
 #define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 1)
-#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 6)
+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
 #define STM32_UART_USART1_IRQ_PRIORITY      12
 #define STM32_UART_USART2_IRQ_PRIORITY      12
 #define STM32_UART_USART3_IRQ_PRIORITY      12
 #define STM32_UART_UART4_IRQ_PRIORITY       12
 #define STM32_UART_UART5_IRQ_PRIORITY       12
-#define STM32_UART_USART6_IRQ_PRIORITY      6
+#define STM32_UART_USART6_IRQ_PRIORITY      12
 #define STM32_UART_USART1_DMA_PRIORITY      0
 #define STM32_UART_USART2_DMA_PRIORITY      0
 #define STM32_UART_USART3_DMA_PRIORITY      0
 #define STM32_UART_UART4_DMA_PRIORITY       0
 #define STM32_UART_UART5_DMA_PRIORITY       0
-#define STM32_UART_USART6_DMA_PRIORITY      2
+#define STM32_UART_USART6_DMA_PRIORITY      0
 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
 
 /*
@@ -339,9 +339,6 @@
  */
 #define STM32_WDG_USE_IWDG                  FALSE
 
-/*
- * header for community drivers.
- */
 #include "mcuconf_community.h"
 
 #endif /* MCUCONF_H */
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
index 9638dbe..eb72c0a 100644
--- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h
@@ -41,6 +41,116 @@
 #define STM32_SRAM_USE_FSMC_SRAM4           FALSE
 
 /*
- * FSMC PC card driver system settings.
+ * FSMC SDRAM driver system settings.
  */
-#define STM32_USE_FSMC_PCCARD               FALSE
+#define STM32_USE_FSMC_SDRAM                FALSE
+
+/*
+ * TIMCAP driver system settings.
+ */
+#define STM32_TIMCAP_USE_TIM1                  TRUE
+#define STM32_TIMCAP_USE_TIM2                  FALSE
+#define STM32_TIMCAP_USE_TIM3                  TRUE
+#define STM32_TIMCAP_USE_TIM4                  TRUE
+#define STM32_TIMCAP_USE_TIM5                  TRUE
+#define STM32_TIMCAP_USE_TIM8                  TRUE
+#define STM32_TIMCAP_USE_TIM9                  TRUE
+#define STM32_TIMCAP_TIM1_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM2_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM3_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM4_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM5_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM8_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM9_IRQ_PRIORITY         3
+
+/*
+ * COMP driver system settings.
+ */
+#define STM32_COMP_USE_COMP1                  TRUE
+#define STM32_COMP_USE_COMP2                  TRUE
+#define STM32_COMP_USE_COMP3                  TRUE
+#define STM32_COMP_USE_COMP4                  TRUE
+#define STM32_COMP_USE_COMP5                  TRUE
+#define STM32_COMP_USE_COMP6                  TRUE
+#define STM32_COMP_USE_COMP7                  TRUE
+
+#define STM32_COMP_USE_INTERRUPTS             TRUE
+#define STM32_COMP_1_2_3_IRQ_PRIORITY         5
+#define STM32_COMP_4_5_6_IRQ_PRIORITY         5
+#define STM32_COMP_7_IRQ_PRIORITY             5
+
+#if STM32_COMP_USE_INTERRUPTS
+#define STM32_DISABLE_EXTI21_22_29_HANDLER
+#define STM32_DISABLE_EXTI30_32_HANDLER
+#define STM32_DISABLE_EXTI33_HANDLER
+#endif
+
+/*
+ * USBH driver system settings.
+ */
+#define STM32_OTG1_CHANNELS_NUMBER          8
+#define STM32_OTG2_CHANNELS_NUMBER          12
+
+#define STM32_USBH_USE_OTG1                 1
+#define STM32_OTG1_RXFIFO_SIZE              1024
+#define STM32_OTG1_PTXFIFO_SIZE             128
+#define STM32_OTG1_NPTXFIFO_SIZE            128
+
+#define STM32_USBH_USE_OTG2                 0
+#define STM32_OTG2_RXFIFO_SIZE              2048
+#define STM32_OTG2_PTXFIFO_SIZE             1024
+#define STM32_OTG2_NPTXFIFO_SIZE            1024
+
+#define STM32_USBH_MIN_QSPACE               4
+#define STM32_USBH_CHANNELS_NP              4
+
+/*
+ * CRC driver system settings.
+ */
+#define STM32_CRC_USE_CRC1                  TRUE
+#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY     1
+#define STM32_CRC_CRC1_DMA_PRIORITY         2
+#define STM32_CRC_CRC1_DMA_STREAM           STM32_DMA1_STREAM2
+
+#define CRCSW_USE_CRC1                      FALSE
+#define CRCSW_CRC32_TABLE                   TRUE
+#define CRCSW_CRC16_TABLE                   TRUE
+#define CRCSW_PROGRAMMABLE                  TRUE
+
+/*
+ * EICU driver system settings.
+ */
+#define STM32_EICU_USE_TIM1                 TRUE
+#define STM32_EICU_USE_TIM2                 FALSE
+#define STM32_EICU_USE_TIM3                 TRUE
+#define STM32_EICU_USE_TIM4                 TRUE
+#define STM32_EICU_USE_TIM5                 TRUE
+#define STM32_EICU_USE_TIM8                 TRUE
+#define STM32_EICU_USE_TIM9                 TRUE
+#define STM32_EICU_USE_TIM10                TRUE
+#define STM32_EICU_USE_TIM11                TRUE
+#define STM32_EICU_USE_TIM12                TRUE
+#define STM32_EICU_USE_TIM13                TRUE
+#define STM32_EICU_USE_TIM14                TRUE
+#define STM32_EICU_TIM1_IRQ_PRIORITY        7
+#define STM32_EICU_TIM2_IRQ_PRIORITY        7
+#define STM32_EICU_TIM3_IRQ_PRIORITY        7
+#define STM32_EICU_TIM4_IRQ_PRIORITY        7
+#define STM32_EICU_TIM5_IRQ_PRIORITY        7
+#define STM32_EICU_TIM8_IRQ_PRIORITY        7
+#define STM32_EICU_TIM9_IRQ_PRIORITY        7
+#define STM32_EICU_TIM10_IRQ_PRIORITY       7
+#define STM32_EICU_TIM11_IRQ_PRIORITY       7
+#define STM32_EICU_TIM12_IRQ_PRIORITY       7
+#define STM32_EICU_TIM13_IRQ_PRIORITY       7
+#define STM32_EICU_TIM14_IRQ_PRIORITY       7
+
+/*
+ * QEI driver system settings.
+ */
+#define STM32_QEI_USE_TIM1                TRUE
+#define STM32_QEI_USE_TIM2                FALSE
+#define STM32_QEI_USE_TIM3                TRUE
+#define STM32_QEI_TIM1_IRQ_PRIORITY         3
+#define STM32_QEI_TIM2_IRQ_PRIORITY         3
+#define STM32_QEI_TIM3_IRQ_PRIORITY         3