Fixes for STM32F0 testhal

3 files changed, 183 insertions, 47 deletions

diff --git a/testhal/STM32/STM32F0xx/qei/chconf.h b/testhal/STM32/STM32F0xx/qei/chconf.h
index b3260d4..53bd676 100644
--- a/testhal/STM32/STM32F0xx/qei/chconf.h
+++ b/testhal/STM32/STM32F0xx/qei/chconf.h
@@ -1,5 +1,5 @@
 /*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -42,7 +42,7 @@
  * @brief   System time counter resolution.

  * @note    Allowed values are 16 or 32 bits.

  */

-#define CH_CFG_ST_RESOLUTION                16

+#define CH_CFG_ST_RESOLUTION                32

 

 /**

  * @brief   System tick frequency.

@@ -52,6 +52,18 @@
 #define CH_CFG_ST_FREQUENCY                 10000

 

 /**

+ * @brief   Time intervals data size.

+ * @note    Allowed values are 16, 32 or 64 bits.

+ */

+#define CH_CFG_INTERVALS_SIZE               32

+

+/**

+ * @brief   Time types data size.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_TIME_TYPES_SIZE              32

+

+/**

  * @brief   Time delta constant for the tick-less mode.

  * @note    If this value is zero then the system uses the classic

  *          periodic tick. This value represents the minimum number

@@ -296,6 +308,15 @@
 #define CH_CFG_USE_MEMPOOLS                 TRUE

 

 /**

+ * @brief  Objects FIFOs APIs.

+ * @details If enabled then the objects FIFOs APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_OBJ_FIFOS                TRUE

+

+/**

  * @brief   Dynamic Threads APIs.

  * @details If enabled then the dynamic threads creation APIs are included

  *          in the kernel.

@@ -310,6 +331,56 @@
 

 /*===========================================================================*/

 /**

+ * @name Objects factory options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Objects Factory APIs.

+ * @details If enabled then the objects factory APIs are included in the

+ *          kernel.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_CFG_USE_FACTORY                  TRUE

+

+/**

+ * @brief   Maximum length for object names.

+ * @details If the specified length is zero then the name is stored by

+ *          pointer but this could have unintended side effects.

+ */

+#define CH_CFG_FACTORY_MAX_NAMES_LENGTH     8

+

+/**

+ * @brief   Enables the registry of generic objects.

+ */

+#define CH_CFG_FACTORY_OBJECTS_REGISTRY     TRUE

+

+/**

+ * @brief   Enables factory for generic buffers.

+ */

+#define CH_CFG_FACTORY_GENERIC_BUFFERS      TRUE

+

+/**

+ * @brief   Enables factory for semaphores.

+ */

+#define CH_CFG_FACTORY_SEMAPHORES           TRUE

+

+/**

+ * @brief   Enables factory for mailboxes.

+ */

+#define CH_CFG_FACTORY_MAILBOXES            TRUE

+

+/**

+ * @brief   Enables factory for objects FIFOs.

+ */

+#define CH_CFG_FACTORY_OBJ_FIFOS            TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

  * @name Debug options

  * @{

  */

@@ -329,7 +400,7 @@
  *

  * @note    The default is @p FALSE.

  */

-#define CH_DBG_SYSTEM_STATE_CHECK           FALSE

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

 

 /**

  * @brief   Debug option, parameters checks.

@@ -338,7 +409,7 @@
  *

  * @note    The default is @p FALSE.

  */

-#define CH_DBG_ENABLE_CHECKS                FALSE

+#define CH_DBG_ENABLE_CHECKS                TRUE

 

 /**

  * @brief   Debug option, consistency checks.

@@ -348,7 +419,7 @@
  *

  * @note    The default is @p FALSE.

  */

-#define CH_DBG_ENABLE_ASSERTS               FALSE

+#define CH_DBG_ENABLE_ASSERTS               TRUE

 

 /**

  * @brief   Debug option, trace buffer.

@@ -356,7 +427,7 @@
  *

  * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.

  */

-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED

+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_ALL

 

 /**

  * @brief   Trace buffer entries.

@@ -375,7 +446,7 @@
  * @note    The default failure mode is to halt the system with the global

  *          @p panic_msg variable set to @p NULL.

  */

-#define CH_DBG_ENABLE_STACK_CHECK           FALSE

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

 

 /**

  * @brief   Debug option, stacks initialization.

@@ -385,7 +456,7 @@
  *

  * @note    The default is @p FALSE.

  */

-#define CH_DBG_FILL_THREADS                 FALSE

+#define CH_DBG_FILL_THREADS                 TRUE

 

 /**

  * @brief   Debug option, threads profiling.

@@ -408,6 +479,22 @@
 /*===========================================================================*/

 

 /**

+ * @brief   System structure extension.

+ * @details User fields added to the end of the @p ch_system_t structure.

+ */

+#define CH_CFG_SYSTEM_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   System initialization hook.

+ * @details User initialization code added to the @p chSysInit() function

+ *          just before interrupts are enabled globally.

+ */

+#define CH_CFG_SYSTEM_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

  * @brief   Threads descriptor structure extension.

  * @details User fields added to the end of the @p thread_t structure.

  */

@@ -416,9 +503,9 @@
 

 /**

  * @brief   Threads initialization hook.

- * @details User initialization code added to the @p chThdInit() API.

+ * @details User initialization code added to the @p _thread_init() function.

  *

- * @note    It is invoked from within @p chThdInit() and implicitly from all

+ * @note    It is invoked from within @p _thread_init() and implicitly from all

  *          the threads creation APIs.

  */

 #define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

diff --git a/testhal/STM32/STM32F0xx/qei/halconf.h b/testhal/STM32/STM32F0xx/qei/halconf.h
index 93cc713..ef429c4 100644
--- a/testhal/STM32/STM32F0xx/qei/halconf.h
+++ b/testhal/STM32/STM32F0xx/qei/halconf.h
@@ -1,5 +1,5 @@
 /*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -52,6 +52,13 @@
 #endif

 

 /**

+ * @brief   Enables the cryptographic subsystem.

+ */

+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)

+#define HAL_USE_CRY                 FALSE

+#endif

+

+/**

  * @brief   Enables the DAC subsystem.

  */

 #if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

@@ -115,6 +122,13 @@
 #endif

 

 /**

+ * @brief   Enables the QSPI subsystem.

+ */

+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)

+#define HAL_USE_QSPI                FALSE

+#endif

+

+/**

  * @brief   Enables the RTC subsystem.

  */

 #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

@@ -202,6 +216,28 @@
 #endif

 

 /*===========================================================================*/

+/* CRY driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the SW fall-back of the cryptographic driver.

+ * @details When enabled, this option, activates a fall-back software

+ *          implementation for algorithms not supported by the underlying

+ *          hardware.

+ * @note    Fall-back implementations may not be present for all algorithms.

+ */

+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)

+#define HAL_CRY_USE_FALLBACK                FALSE

+#endif

+

+/**

+ * @brief   Makes the driver forcibly use the fall-back implementations.

+ */

+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)

+#define HAL_CRY_ENFORCE_FALLBACK            FALSE

+#endif

+

+/*===========================================================================*/

 /* I2C driver related settings.                                              */

 /*===========================================================================*/

 

diff --git a/testhal/STM32/STM32F0xx/qei/mcuconf.h b/testhal/STM32/STM32F0xx/qei/mcuconf.h
index 6fb24b0..98a9e21 100644
--- a/testhal/STM32/STM32F0xx/qei/mcuconf.h
+++ b/testhal/STM32/STM32F0xx/qei/mcuconf.h
@@ -1,5 +1,5 @@
 /*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

+    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -50,38 +50,33 @@
 #define STM32_PLLMUL_VALUE                  12

 #define STM32_HPRE                          STM32_HPRE_DIV1

 #define STM32_PPRE                          STM32_PPRE_DIV1

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

+#define STM32_MCOPRE                        STM32_MCOPRE_DIV1

+#define STM32_PLLNODIV                      STM32_PLLNODIV_DIV2

+#define STM32_USBSW                         STM32_USBSW_HSI48

 #define STM32_CECSW                         STM32_CECSW_HSI

 #define STM32_I2C1SW                        STM32_I2C1SW_HSI

 #define STM32_USART1SW                      STM32_USART1SW_PCLK

 #define STM32_RTCSEL                        STM32_RTCSEL_LSI

 

 /*

- * ADC driver system settings.

+ * IRQ system settings.

  */

-#define STM32_ADC_USE_ADC1                  FALSE

-#define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              2

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

+#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY      3

+#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY      3

+#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY     3

+#define STM32_IRQ_EXTI16_IRQ_PRIORITY       3

+#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY    3

+#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY    3

 

 /*

- * CAN driver system settings.

- */

-#define STM32_CAN_USE_CAN1                  FALSE

-#define STM32_CAN_CAN1_IRQ_PRIORITY         11

-

-/*

- * EXT driver system settings.

+ * ADC driver system settings.

  */

-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3

-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3

+#define STM32_ADC_USE_ADC1                  TRUE

+#define STM32_ADC_ADC1_CKMODE               STM32_ADC_CKMODE_ADCCLK

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

 

 /*

  * GPT driver system settings.

@@ -106,9 +101,32 @@
 #define STM32_I2C_USE_DMA                   TRUE

 #define STM32_I2C_I2C1_DMA_PRIORITY         1

 #define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

 

 /*

+ * I2S driver system settings.

+ */

+#define STM32_I2S_USE_SPI1                  FALSE

+#define STM32_I2S_USE_SPI2                  FALSE

+#define STM32_I2S_SPI1_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI2_MODE                 (STM32_I2S_MODE_MASTER |        \

+                                             STM32_I2S_MODE_RX)

+#define STM32_I2S_SPI1_IRQ_PRIORITY         2

+#define STM32_I2S_SPI2_IRQ_PRIORITY         2

+#define STM32_I2S_SPI1_DMA_PRIORITY         1

+#define STM32_I2S_SPI2_DMA_PRIORITY         1

+#define STM32_I2S_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2S_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")

+

+/*

  * ICU driver system settings.

  */

 #define STM32_ICU_USE_TIM1                  FALSE

@@ -130,11 +148,6 @@
 #define STM32_PWM_TIM3_IRQ_PRIORITY         3

 

 /*

- * RTC driver system settings.

- */

-#define STM32_RTC_IRQ_PRIORITY              15

-

-/*

  * SERIAL driver system settings.

  */

 #define STM32_SERIAL_USE_USART1             FALSE

@@ -151,6 +164,10 @@
 #define STM32_SPI_SPI2_DMA_PRIORITY         1

 #define STM32_SPI_SPI1_IRQ_PRIORITY         2

 #define STM32_SPI_SPI2_IRQ_PRIORITY         2

+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)

 #define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

 

 /*

@@ -168,20 +185,16 @@
 #define STM32_UART_USART2_IRQ_PRIORITY      3

 #define STM32_UART_USART1_DMA_PRIORITY      0

 #define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)

 #define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

 

 /*

- * USB driver system settings.

- */

-#define STM32_USB_USE_USB1                  FALSE

-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

-#define STM32_USB_USB1_HP_IRQ_PRIORITY      13

-#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

-

-/*

  * WDG driver system settings.

  */

-#define STM32_WDG_USE_IWDG                  TRUE

+#define STM32_WDG_USE_IWDG                  FALSE

 

 /*

  * header for community drivers.