[KINETIS] Add new testhal demos (KL27Z,Teensies,MCHCK).

9 files changed, 1594 insertions, 0 deletions

diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile
new file mode 100644
index 0000000..50a3187
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile
@@ -0,0 +1,217 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = no
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x200
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+ifeq ($(USE_FPU),)
+  USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+# Startup files.
+include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3_1/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+
+# Define linker script file here
+LDSCRIPT= $(STARTUPLD)/MK20DX256.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       eeprom.c \
+       main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
+         $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU  = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+SREC = $(CP) -O srec
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile.3_0 b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile.3_0
new file mode 100644
index 0000000..6f8f396
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/Makefile.3_0
@@ -0,0 +1,217 @@
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = no
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x200
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+ifeq ($(USE_FPU),)
+  USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+# Startup files.
+include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/PJRC_TEENSY_3/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+
+# Define linker script file here
+LDSCRIPT= $(STARTUPLD)/MK20DX128.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       eeprom.c \
+       main.c
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
+         $(CHIBIOS)/os/various
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU  = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+SREC = $(CP) -O srec
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra -Wundef
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/README.md b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/README.md
new file mode 100644
index 0000000..7f01bac
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/README.md
@@ -0,0 +1,8 @@
+# Teensy 3.0 EEPROM via FlexRAM example
+
+FlexRAM, which is present on K20x MCUs, is configured to EEPROM mode, so it behaves like EEPROM. The maximum available size is 2K, but explicitly using a smaller chunk enables wear-levelling and increases write endurance.
+
+
+## Credits
+
+Most of the actual EEPROM code is from [PJRC/Teensyduino](https://www.pjrc.com/teensy/teensyduino.html).
\ No newline at end of file
diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h
new file mode 100644
index 0000000..ea87df8
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/chconf.h
@@ -0,0 +1,516 @@
+/*

+    ChibiOS - (C) 2015-2016 flabbergast <s3+flabbergast@sdfeu.org>

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    TEENSY3_x/EEPROM_EMU/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+#define _CHIBIOS_RT_CONF_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 1000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 0

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 20

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       FALSE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      TRUE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_TRACE                 TRUE

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   ISR enter hook.

+ */

+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \

+  /* IRQ prologue code here.*/                                              \

+}

+

+/**

+ * @brief   ISR exit hook.

+ */

+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \

+  /* IRQ epilogue code here.*/                                              \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/**

+ * @brief   Trace hook.

+ * @details This hook is invoked each time a new record is written in the

+ *          trace buffer.

+ */

+#define CH_CFG_TRACE_HOOK(tep) {                                            \

+  /* Trace code here.*/                                                     \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.c b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.c
new file mode 100644
index 0000000..c78b39f
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.c
@@ -0,0 +1,300 @@
+/*
+ * Eeprom emulation for K20x chips.
+ * (c) 2015 flabbergast
+ * Most of the code is from PJRC/Teensyduino (license below)
+ */
+
+/* Teensyduino Core Library
+ * http://www.pjrc.com/teensy/
+ * Copyright (c) 2013 PJRC.COM, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * 1. The above copyright notice and this permission notice shall be 
+ * included in all copies or substantial portions of the Software.
+ *
+ * 2. If the Software is incorporated into a build system that allows 
+ * selection among a list of target devices, then similar target
+ * devices manufactured by PJRC.COM must be included in the list of
+ * target devices and selectable in the same manner.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+// The EEPROM is really RAM with a hardware-based backup system to
+// flash memory.  Selecting a smaller size EEPROM allows more wear
+// leveling, for higher write endurance.  If you edit this file,
+// set this to the smallest size your application can use.  Also,
+// due to Freescale's implementation, writing 16 or 32 bit words
+// (aligned to 2 or 4 byte boundaries) has twice the endurance
+// compared to writing 8 bit bytes.
+//
+#define EEPROM_SIZE 32
+
+// Writing unaligned 16 or 32 bit data is handled automatically when
+// this is defined, but at a cost of extra code size.  Without this,
+// any unaligned write will cause a hard fault exception!  If you're
+// absolutely sure all 16 and 32 bit writes will be aligned, you can
+// remove the extra unnecessary code.
+//
+#define HANDLE_UNALIGNED_WRITES
+
+// Minimum EEPROM Endurance
+// ------------------------
+#if (EEPROM_SIZE == 2048)	// 35000 writes/byte or 70000 writes/word
+  #define EEESIZE 0x33
+#elif (EEPROM_SIZE == 1024)	// 75000 writes/byte or 150000 writes/word
+  #define EEESIZE 0x34
+#elif (EEPROM_SIZE == 512)	// 155000 writes/byte or 310000 writes/word
+  #define EEESIZE 0x35
+#elif (EEPROM_SIZE == 256)	// 315000 writes/byte or 630000 writes/word
+  #define EEESIZE 0x36
+#elif (EEPROM_SIZE == 128)	// 635000 writes/byte or 1270000 writes/word
+  #define EEESIZE 0x37
+#elif (EEPROM_SIZE == 64)	// 1275000 writes/byte or 2550000 writes/word
+  #define EEESIZE 0x38
+#elif (EEPROM_SIZE == 32)	// 2555000 writes/byte or 5110000 writes/word
+  #define EEESIZE 0x39
+#endif
+
+void eeprom_initialize(void)
+{
+	uint32_t count=0;
+	uint16_t do_flash_cmd[] = {
+		0xf06f, 0x037f, 0x7003, 0x7803,
+		0xf013, 0x0f80, 0xd0fb, 0x4770};
+	uint8_t status;
+
+	if (FTFL->FCNFG & FTFL_FCNFG_RAMRDY) {
+		// FlexRAM is configured as traditional RAM
+		// We need to reconfigure for EEPROM usage
+		FTFL->FCCOB0 = 0x80; // PGMPART = Program Partition Command
+		FTFL->FCCOB4 = EEESIZE; // EEPROM Size
+		FTFL->FCCOB5 = 0x03; // 0K for Dataflash, 32K for EEPROM backup
+		__disable_irq();
+		// do_flash_cmd() must execute from RAM.  Luckily the C syntax is simple...
+		(*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&(FTFL->FSTAT));
+		__enable_irq();
+		status = FTFL->FSTAT;
+		if (status & (FTFL_FSTAT_RDCOLERR|FTFL_FSTAT_ACCERR|FTFL_FSTAT_FPVIOL)) {
+			FTFL->FSTAT = (status & (FTFL_FSTAT_RDCOLERR|FTFL_FSTAT_ACCERR|FTFL_FSTAT_FPVIOL));
+			return; // error
+		}
+	}
+	// wait for eeprom to become ready (is this really necessary?)
+	while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) {
+		if (++count > 20000) break;
+	}
+}
+
+#define FlexRAM ((uint8_t *)0x14000000)
+
+uint8_t eeprom_read_byte(const uint8_t *addr)
+{
+	uint32_t offset = (uint32_t)addr;
+	if (offset >= EEPROM_SIZE) return 0;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	return FlexRAM[offset];
+}
+
+uint16_t eeprom_read_word(const uint16_t *addr)
+{
+	uint32_t offset = (uint32_t)addr;
+	if (offset >= EEPROM_SIZE-1) return 0;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	return *(uint16_t *)(&FlexRAM[offset]);
+}
+
+uint32_t eeprom_read_dword(const uint32_t *addr)
+{
+	uint32_t offset = (uint32_t)addr;
+	if (offset >= EEPROM_SIZE-3) return 0;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	return *(uint32_t *)(&FlexRAM[offset]);
+}
+
+void eeprom_read_block(void *buf, const void *addr, uint32_t len)
+{
+	uint32_t offset = (uint32_t)addr;
+	uint8_t *dest = (uint8_t *)buf;
+	uint32_t end = offset + len;
+	
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	if (end > EEPROM_SIZE) end = EEPROM_SIZE;
+	while (offset < end) {
+		*dest++ = FlexRAM[offset++];
+	}
+}
+
+int eeprom_is_ready(void)
+{
+	return (FTFL->FCNFG & FTFL_FCNFG_EEERDY) ? 1 : 0;
+}
+
+static void flexram_wait(void)
+{
+	while (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) {
+		// TODO: timeout
+	}
+}
+
+void eeprom_write_byte(uint8_t *addr, uint8_t value)
+{
+	uint32_t offset = (uint32_t)addr;
+
+	if (offset >= EEPROM_SIZE) return;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	if (FlexRAM[offset] != value) {
+		FlexRAM[offset] = value;
+		flexram_wait();
+	}
+}
+
+void eeprom_write_word(uint16_t *addr, uint16_t value)
+{
+	uint32_t offset = (uint32_t)addr;
+
+	if (offset >= EEPROM_SIZE-1) return;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+#ifdef HANDLE_UNALIGNED_WRITES
+	if ((offset & 1) == 0) {
+#endif
+		if (*(uint16_t *)(&FlexRAM[offset]) != value) {
+			*(uint16_t *)(&FlexRAM[offset]) = value;
+			flexram_wait();
+		}
+#ifdef HANDLE_UNALIGNED_WRITES
+	} else {
+		if (FlexRAM[offset] != value) {
+			FlexRAM[offset] = value;
+			flexram_wait();
+		}
+		if (FlexRAM[offset + 1] != (value >> 8)) {
+			FlexRAM[offset + 1] = value >> 8;
+			flexram_wait();
+		}
+	}
+#endif
+}
+
+void eeprom_write_dword(uint32_t *addr, uint32_t value)
+{
+	uint32_t offset = (uint32_t)addr;
+
+	if (offset >= EEPROM_SIZE-3) return;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+#ifdef HANDLE_UNALIGNED_WRITES
+	switch (offset & 3) {
+	case 0:
+#endif
+		if (*(uint32_t *)(&FlexRAM[offset]) != value) {
+			*(uint32_t *)(&FlexRAM[offset]) = value;
+			flexram_wait();
+		}
+		return;
+#ifdef HANDLE_UNALIGNED_WRITES
+	case 2:
+		if (*(uint16_t *)(&FlexRAM[offset]) != value) {
+			*(uint16_t *)(&FlexRAM[offset]) = value;
+			flexram_wait();
+		}
+		if (*(uint16_t *)(&FlexRAM[offset + 2]) != (value >> 16)) {
+			*(uint16_t *)(&FlexRAM[offset + 2]) = value >> 16;
+			flexram_wait();
+		}
+		return;
+	default:
+		if (FlexRAM[offset] != value) {
+			FlexRAM[offset] = value;
+			flexram_wait();
+		}
+		if (*(uint16_t *)(&FlexRAM[offset + 1]) != (value >> 8)) {
+			*(uint16_t *)(&FlexRAM[offset + 1]) = value >> 8;
+			flexram_wait();
+		}
+		if (FlexRAM[offset + 3] != (value >> 24)) {
+			FlexRAM[offset + 3] = value >> 24;
+			flexram_wait();
+		}
+	}
+#endif
+}
+
+void eeprom_write_block(const void *buf, void *addr, uint32_t len)
+{
+	uint32_t offset = (uint32_t)addr;
+	const uint8_t *src = (const uint8_t *)buf;
+
+	if (offset >= EEPROM_SIZE) return;
+	if (!(FTFL->FCNFG & FTFL_FCNFG_EEERDY)) eeprom_initialize();
+	if (len >= EEPROM_SIZE) len = EEPROM_SIZE;
+	if (offset + len >= EEPROM_SIZE) len = EEPROM_SIZE - offset;
+	while (len > 0) {
+		uint32_t lsb = offset & 3;
+		if (lsb == 0 && len >= 4) {
+			// write aligned 32 bits
+			uint32_t val32;
+			val32 = *src++;
+			val32 |= (*src++ << 8);
+			val32 |= (*src++ << 16);
+			val32 |= (*src++ << 24);
+			if (*(uint32_t *)(&FlexRAM[offset]) != val32) {
+				*(uint32_t *)(&FlexRAM[offset]) = val32;
+				flexram_wait();
+			}
+			offset += 4;
+			len -= 4;
+		} else if ((lsb == 0 || lsb == 2) && len >= 2) {
+			// write aligned 16 bits
+			uint16_t val16;
+			val16 = *src++;
+			val16 |= (*src++ << 8);
+			if (*(uint16_t *)(&FlexRAM[offset]) != val16) {
+				*(uint16_t *)(&FlexRAM[offset]) = val16;
+				flexram_wait();
+			}
+			offset += 2;
+			len -= 2;
+		} else {
+			// write 8 bits
+			uint8_t val8 = *src++;
+			if (FlexRAM[offset] != val8) {
+				FlexRAM[offset] = val8;
+				flexram_wait();
+			}
+			offset++;
+			len--;
+		}
+	}
+}
+
+/*
+void do_flash_cmd(volatile uint8_t *fstat)
+{
+	*fstat = 0x80;
+	while ((*fstat & 0x80) == 0) ; // wait
+}
+00000000 <do_flash_cmd>:
+   0:	f06f 037f 	mvn.w	r3, #127	; 0x7f
+   4:	7003      	strb	r3, [r0, #0]
+   6:	7803      	ldrb	r3, [r0, #0]
+   8:	f013 0f80 	tst.w	r3, #128	; 0x80
+   c:	d0fb      	beq.n	6 <do_flash_cmd+0x6>
+   e:	4770      	bx	lr
+*/
diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.h
new file mode 100644
index 0000000..1bd714e
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/eeprom.h
@@ -0,0 +1,21 @@
+/*
+ * Eeprom emulation for K20x chips.
+ * (c) 2015 flabbergast
+ * Most of the code is from PJRC/Teensyduino (license in eeprom.c)
+ */
+
+#ifndef _EEPROM_H_
+#define _EEPROM_H_
+
+void eeprom_initialize(void);
+int eeprom_is_ready(void);
+uint8_t eeprom_read_byte(const uint8_t *addr);
+uint16_t eeprom_read_word(const uint16_t *addr);
+uint32_t eeprom_read_dword(const uint32_t *addr);
+void eeprom_read_block(void *buf, const void *addr, uint32_t len);
+void eeprom_write_byte(uint8_t *addr, uint8_t data);
+void eeprom_write_word(uint16_t *addr, uint16_t value);
+void eeprom_write_dword(uint32_t *addr, uint32_t value);
+void eeprom_write_block(const void *buf, void *addr, uint32_t len);
+
+#endif /* _EEPROM_H_ */
\ No newline at end of file
diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf.h
new file mode 100644
index 0000000..5cc1b57
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/halconf.h
@@ -0,0 +1,187 @@
+/*

+    ChibiOS - (C) 2015-2016 flabbergast <s3+flabbergast@sdfeu.org>

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    TEENSY3_x/EEPROM_EMU/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 FALSE

+#endif

+

+/*===========================================================================*/

+/* USB driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

+#define USB_USE_WAIT                FALSE

+#endif

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/main.c b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/main.c
new file mode 100644
index 0000000..e1ef889
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/main.c
@@ -0,0 +1,77 @@
+/*

+    (C) 2015-2016 flabbergast <s3+flabbergast@sdfeu.org>

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+#include "hal.h"

+

+#include "eeprom.h"

+

+#define LED_GPIO TEENSY_PIN13_IOPORT

+#define LED_PIN TEENSY_PIN13

+

+uint8_t n_of_blinks;

+

+static THD_WORKING_AREA(waBlinkThread, 128);

+static THD_FUNCTION(BlinkThread, arg) {

+  (void)arg;

+  uint8_t i;

+

+  for(i=0; i<n_of_blinks; i++) {

+    palSetPad(LED_GPIO, LED_PIN);

+    chThdSleepMilliseconds(400);

+    palClearPad(LED_GPIO, LED_PIN);

+    chThdSleepMilliseconds(400);

+  }

+}

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+  n_of_blinks = 0;

+  

+  uint8_t *ee_addr = (uint8_t *)3;

+

+  eeprom_write_byte(ee_addr,5);

+  chThdSleepMilliseconds(500);

+

+  eeprom_write_byte(ee_addr,10);

+  chThdSleepMilliseconds(500);

+

+  n_of_blinks = eeprom_read_byte(ee_addr);

+

+  /*

+   * Create the blink thread.

+   */

+  chThdCreateStatic(waBlinkThread, sizeof(waBlinkThread), NORMALPRIO, BlinkThread, NULL);

+

+  /*

+   * Normal main() thread activity, in this demo it does nothing.

+   */

+  while(TRUE) {

+    chThdSleepMilliseconds(500);

+  }

+

+  return 0;

+}

diff --git a/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/mcuconf.h b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/mcuconf.h
new file mode 100644
index 0000000..d614644
--- /dev/null
+++ b/testhal/KINETIS/TEENSY3_x/EEPROM_EMU/mcuconf.h
@@ -0,0 +1,51 @@
+/*

+    ChibiOS - (C) 2015-2016 flabbergast <s3+flabbergast@sdfeu.org>

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _MCUCONF_H_

+#define _MCUCONF_H_

+

+#define K20x_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#if 1

+/* PEE mode - 48MHz system clock driven by (16 MHz) external crystal. */

+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_PEE

+#define KINETIS_PLLCLK_FREQUENCY    96000000UL

+#define KINETIS_SYSCLK_FREQUENCY    48000000UL

+#endif

+

+#if 0

+/* crystal-less FEI mode - 48 MHz with internal 32.768 kHz crystal */

+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_FEI

+#define KINETIS_MCG_FLL_DMX32       1           /* Fine-tune for 32.768 kHz */

+#define KINETIS_MCG_FLL_DRS         1           /* 1464x FLL factor */

+#define KINETIS_SYSCLK_FREQUENCY    47972352UL  /* 32.768 kHz * 1464 (~48 MHz) */

+#define KINETIS_CLKDIV1_OUTDIV1     1           /* do not divide system clock */

+#endif

+

+/*

+ * SERIAL driver system settings.

+ */

+#define KINETIS_SERIAL_USE_UART0              TRUE

+

+/*

+ * USB driver settings

+ */

+#define KINETIS_USB_USE_USB0                  TRUE

+

+#endif /* _MCUCONF_H_ */