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| author | Fabio Utzig <utzig@utzig.org> | 2015-05-13 20:30:12 -0300 |
|---|---|---|
| committer | Fabio Utzig <utzig@utzig.org> | 2015-05-13 20:30:12 -0300 |
| commit | 825c8ea30bf3e13698221c918a1a4dfc04bcec5e (patch) | |
| tree | 8f47535ee6ab1aa14f117e63df8eb5876d2613f6 /os | |
| parent | f0bcca7b4670b2b8fa5f69009e68d2fefeac67e4 (diff) | |
| download | ChibiOS-Contrib-825c8ea30bf3e13698221c918a1a4dfc04bcec5e.tar.gz ChibiOS-Contrib-825c8ea30bf3e13698221c918a1a4dfc04bcec5e.tar.bz2 ChibiOS-Contrib-825c8ea30bf3e13698221c918a1a4dfc04bcec5e.zip | |
Add TIMER0 based ticker for OS
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/NRF51/NRF51822/st_lld.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/os/hal/ports/NRF51/NRF51822/st_lld.c b/os/hal/ports/NRF51/NRF51822/st_lld.c index d439f63..526db35 100644 --- a/os/hal/ports/NRF51/NRF51822/st_lld.c +++ b/os/hal/ports/NRF51/NRF51822/st_lld.c @@ -50,6 +50,29 @@ /* Driver interrupt handlers. */
/*===========================================================================*/
+#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
+/**
+ * @brief System Timer vector.
+ * @details This interrupt is used for system tick in periodic mode.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector60) {
+
+ OSAL_IRQ_PROLOGUE();
+
+ /* Clear timer compare event */
+ if (NRF_TIMER0->EVENTS_COMPARE[0] != 0)
+ NRF_TIMER0->EVENTS_COMPARE[0] = 0;
+
+ osalSysLockFromISR();
+ osalOsTimerHandlerI();
+ osalSysUnlockFromISR();
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -60,6 +83,31 @@ * @notapi
*/
void st_lld_init(void) {
+
+#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
+ NRF_TIMER0->TASKS_CLEAR = 1;
+
+ /*
+ * Using 32-bit mode with prescaler 16 configures this
+ * timer with a 1MHz clock.
+ */
+ NRF_TIMER0->BITMODE = 3;
+ NRF_TIMER0->PRESCALER = 4;
+
+ /*
+ * Configure timer 0 compare capture 0 to generate interrupt
+ * and clear timer value when event is generated.
+ */
+ NRF_TIMER0->CC[0] = (1000000 / OSAL_ST_FREQUENCY) - 1;
+ NRF_TIMER0->SHORTS = 1;
+ NRF_TIMER0->INTENSET = 0x10000;
+
+ nvicEnableVector(TIMER0_IRQn, 8);
+
+ /* Start timer */
+ NRF_TIMER0->TASKS_START = 1;
+#endif
+
}
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
|