diff options
| author | Nicolas Reinecke <nr@das-labor.org> | 2016-04-30 16:03:33 +0200 |
|---|---|---|
| committer | Nicolas Reinecke <nr@das-labor.org> | 2016-05-08 18:27:11 +0200 |
| commit | 6f67aa78c3061654bb50ed86dc5f104ca49e87b8 (patch) | |
| tree | c263cbbc5d551292b03a83dc0ec9390451e55895 /os/hal | |
| parent | cf02c79b5aa7209542cbf1b0cefe703a2c0c60be (diff) | |
| download | ChibiOS-Contrib-6f67aa78c3061654bb50ed86dc5f104ca49e87b8.tar.gz ChibiOS-Contrib-6f67aa78c3061654bb50ed86dc5f104ca49e87b8.tar.bz2 ChibiOS-Contrib-6f67aa78c3061654bb50ed86dc5f104ca49e87b8.zip | |
add STM32 qei (quadrature encoder interface) driver
Code from tinito in forum thread:
http://forum.chibios.org/phpbb/viewtopic.php?f=14&t=685
Updated to chibios trunk.
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/hal.mk | 1 | ||||
| -rw-r--r-- | os/hal/include/hal_community.h | 1 | ||||
| -rw-r--r-- | os/hal/include/hal_qei.h | 130 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c | 293 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h | 347 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/platform.mk | 1 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F1xx/platform.mk | 1 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F3xx/platform.mk | 3 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F4xx/platform.mk | 1 | ||||
| -rw-r--r-- | os/hal/src/hal_community.c | 4 | ||||
| -rw-r--r-- | os/hal/src/hal_qei.c | 214 |
11 files changed, 995 insertions, 1 deletions
diff --git a/os/hal/hal.mk b/os/hal/hal.mk index 54414a0..751b59a 100644 --- a/os/hal/hal.mk +++ b/os/hal/hal.mk @@ -17,5 +17,6 @@ HALSRC += ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_ee25xx.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_eeprom.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \
+ ${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \
HALINC += ${CHIBIOS_CONTRIB}/os/hal/include
diff --git a/os/hal/include/hal_community.h b/os/hal/include/hal_community.h index 6420964..3d8ac16 100644 --- a/os/hal/include/hal_community.h +++ b/os/hal/include/hal_community.h @@ -35,6 +35,7 @@ #include "hal_rng.h"
#include "hal_usbh.h"
#include "hal_timcap.h"
+#include "hal_qei.h"
/* Complex drivers.*/
#include "hal_onewire.h"
diff --git a/os/hal/include/hal_qei.h b/os/hal/include/hal_qei.h new file mode 100644 index 0000000..b71dad2 --- /dev/null +++ b/os/hal/include/hal_qei.h @@ -0,0 +1,130 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_qei.h
+ * @brief QEI Driver macros and structures.
+ *
+ * @addtogroup QEI
+ * @{
+ */
+
+#ifndef HAL_QEI_H
+#define HAL_QEI_H
+
+#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Driver state machine possible states.
+ */
+typedef enum {
+ QEI_UNINIT = 0, /**< Not initialized. */
+ QEI_STOP = 1, /**< Stopped. */
+ QEI_READY = 2, /**< Ready. */
+ QEI_ACTIVE = 3, /**< Active. */
+} qeistate_t;
+
+/**
+ * @brief Type of a structure representing an QEI driver.
+ */
+typedef struct QEIDriver QEIDriver;
+
+/**
+ * @brief QEI notification callback type.
+ *
+ * @param[in] qeip pointer to a @p QEIDriver object
+ */
+typedef void (*qeicallback_t)(QEIDriver *qeip);
+
+#include "hal_qei_lld.h"
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/**
+ * @name Macro Functions
+ * @{
+ */
+/**
+ * @brief Enables the input capture.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @iclass
+ */
+#define qeiEnableI(qeip) qei_lld_enable(qeip)
+
+/**
+ * @brief Disables the input capture.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @iclass
+ */
+#define qeiDisableI(qeip) qei_lld_disable(qeip)
+
+/**
+ * @brief Returns the counter value.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @return The current counter value.
+ *
+ * @iclass
+ */
+#define qeiGetCountI(qeip) qei_lld_get_count(qeip)
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void qeiInit(void);
+ void qeiObjectInit(QEIDriver *qeip);
+ void qeiStart(QEIDriver *qeip, const QEIConfig *config);
+ void qeiStop(QEIDriver *qeip);
+ void qeiEnable(QEIDriver *qeip);
+ void qeiDisable(QEIDriver *qeip);
+ qeicnt_t qeiGetCount(QEIDriver *qeip);
+ qeidelta_t qeiUpdate(QEIDriver *qeip);
+ qeidelta_t qeiUpdateI(QEIDriver *qeip);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_QEI == TRUE */
+
+#endif /* HAL_QEI_H */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c new file mode 100644 index 0000000..c9f511b --- /dev/null +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c @@ -0,0 +1,293 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file TIMv1/hal_qei_lld.c
+ * @brief STM32 QEI subsystem low level driver header.
+ *
+ * @addtogroup QEI
+ * @{
+ */
+
+#include "hal.h"
+
+#if HAL_USE_QEI || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/**
+ * @brief QEID1 driver identifier.
+ * @note The driver QEID1 allocates the complex timer TIM1 when enabled.
+ */
+#if STM32_QEI_USE_TIM1 || defined(__DOXYGEN__)
+QEIDriver QEID1;
+#endif
+
+/**
+ * @brief QEID2 driver identifier.
+ * @note The driver QEID1 allocates the timer TIM2 when enabled.
+ */
+#if STM32_QEI_USE_TIM2 || defined(__DOXYGEN__)
+QEIDriver QEID2;
+#endif
+
+/**
+ * @brief QEID3 driver identifier.
+ * @note The driver QEID1 allocates the timer TIM3 when enabled.
+ */
+#if STM32_QEI_USE_TIM3 || defined(__DOXYGEN__)
+QEIDriver QEID3;
+#endif
+
+/**
+ * @brief QEID4 driver identifier.
+ * @note The driver QEID4 allocates the timer TIM4 when enabled.
+ */
+#if STM32_QEI_USE_TIM4 || defined(__DOXYGEN__)
+QEIDriver QEID4;
+#endif
+
+/**
+ * @brief QEID5 driver identifier.
+ * @note The driver QEID5 allocates the timer TIM5 when enabled.
+ */
+#if STM32_QEI_USE_TIM5 || defined(__DOXYGEN__)
+QEIDriver QEID5;
+#endif
+
+/**
+ * @brief QEID8 driver identifier.
+ * @note The driver QEID8 allocates the timer TIM8 when enabled.
+ */
+#if STM32_QEI_USE_TIM8 || defined(__DOXYGEN__)
+QEIDriver QEID8;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level QEI driver initialization.
+ *
+ * @notapi
+ */
+void qei_lld_init(void) {
+
+#if STM32_QEI_USE_TIM1
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID1);
+ QEID1.tim = STM32_TIM1;
+#endif
+
+#if STM32_QEI_USE_TIM2
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID2);
+ QEID2.tim = STM32_TIM2;
+#endif
+
+#if STM32_QEI_USE_TIM3
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID3);
+ QEID3.tim = STM32_TIM3;
+#endif
+
+#if STM32_QEI_USE_TIM4
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID4);
+ QEID4.tim = STM32_TIM4;
+#endif
+
+#if STM32_QEI_USE_TIM5
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID5);
+ QEID5.tim = STM32_TIM5;
+#endif
+
+#if STM32_QEI_USE_TIM8
+ /* Driver initialization.*/
+ qeiObjectInit(&QEID8);
+ QEID8.tim = STM32_TIM8;
+#endif
+}
+
+/**
+ * @brief Configures and activates the QEI peripheral.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @notapi
+ */
+void qei_lld_start(QEIDriver *qeip) {
+
+ if (qeip->state == QEI_STOP) {
+ /* Clock activation and timer reset.*/
+#if STM32_QEI_USE_TIM1
+ if (&QEID1 == qeip) {
+ rccEnableTIM1(FALSE);
+ rccResetTIM1();
+ }
+#endif
+#if STM32_QEI_USE_TIM2
+ if (&QEID2 == qeip) {
+ rccEnableTIM2(FALSE);
+ rccResetTIM2();
+ }
+#endif
+#if STM32_QEI_USE_TIM3
+ if (&QEID3 == qeip) {
+ rccEnableTIM3(FALSE);
+ rccResetTIM3();
+ }
+#endif
+#if STM32_QEI_USE_TIM4
+ if (&QEID4 == qeip) {
+ rccEnableTIM4(FALSE);
+ rccResetTIM4();
+ }
+#endif
+
+#if STM32_QEI_USE_TIM5
+ if (&QEID5 == qeip) {
+ rccEnableTIM5(FALSE);
+ rccResetTIM5();
+ }
+#endif
+#if STM32_QEI_USE_TIM8
+ if (&QEID8 == qeip) {
+ rccEnableTIM8(FALSE);
+ rccResetTIM8();
+ }
+#endif
+ }
+ /* Timer configuration.*/
+ qeip->tim->CR1 = 0; /* Initially stopped. */
+ qeip->tim->CR2 = 0;
+ qeip->tim->PSC = 0;
+ qeip->tim->DIER = 0;
+ qeip->tim->ARR = 0xFFFF;
+
+ /* Set Capture Compare 1 and Capture Compare 2 as input. */
+ qeip->tim->CCMR1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0;
+
+ if (qeip->config->mode == QEI_MODE_QUADRATURE) {
+ if (qeip->config->resolution == QEI_BOTH_EDGES)
+ qeip->tim->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0;
+ else
+ qeip->tim->SMCR = TIM_SMCR_SMS_0;
+ } else {
+ /* Direction/Clock mode.
+ * Direction input on TI1, Clock input on TI2. */
+ qeip->tim->SMCR = TIM_SMCR_SMS_0;
+ }
+
+ if (qeip->config->dirinv == QEI_DIRINV_TRUE)
+ qeip->tim->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P | TIM_CCER_CC2E;
+ else
+ qeip->tim->CCER = TIM_CCER_CC1E | TIM_CCER_CC2E;
+}
+
+/**
+ * @brief Deactivates the QEI peripheral.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @notapi
+ */
+void qei_lld_stop(QEIDriver *qeip) {
+
+ if (qeip->state == QEI_READY) {
+ qeip->tim->CR1 = 0; /* Timer disabled. */
+
+ /* Clock deactivation.*/
+#if STM32_QEI_USE_TIM1
+ if (&QEID1 == qeip) {
+ rccDisableTIM1(FALSE);
+ }
+#endif
+#if STM32_QEI_USE_TIM2
+ if (&QEID2 == qeip) {
+ rccDisableTIM2(FALSE);
+ }
+#endif
+#if STM32_QEI_USE_TIM3
+ if (&QEID3 == qeip) {
+ rccDisableTIM3(FALSE);
+ }
+#endif
+#if STM32_QEI_USE_TIM4
+ if (&QEID4 == qeip) {
+ rccDisableTIM4(FALSE);
+ }
+#endif
+#if STM32_QEI_USE_TIM5
+ if (&QEID5 == qeip) {
+ rccDisableTIM5(FALSE);
+ }
+#endif
+ }
+#if STM32_QEI_USE_TIM8
+ if (&QEID8 == qeip) {
+ rccDisableTIM8(FALSE);
+ }
+#endif
+}
+
+/**
+ * @brief Enables the input capture.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @notapi
+ */
+void qei_lld_enable(QEIDriver *qeip) {
+
+ qeip->tim->CR1 = TIM_CR1_CEN; /* Timer enabled. */
+}
+
+/**
+ * @brief Disables the input capture.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @notapi
+ */
+void qei_lld_disable(QEIDriver *qeip) {
+
+ qeip->tim->CR1 = 0; /* Timer disabled. */
+}
+
+#endif /* HAL_USE_QEI */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h new file mode 100644 index 0000000..f098d7b --- /dev/null +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.h @@ -0,0 +1,347 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file TIMv1/hal_qei_lld.h
+ * @brief STM32 QEI subsystem low level driver header.
+ *
+ * @addtogroup QEI
+ * @{
+ */
+
+#ifndef HAL_QEI_LLD_H
+#define HAL_QEI_LLD_H
+
+#if HAL_USE_QEI || defined(__DOXYGEN__)
+
+#include "stm32_tim.h"
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @name Configuration options
+ * @{
+ */
+/**
+ * @brief QEID1 driver enable switch.
+ * @details If set to @p TRUE the support for QEID1 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM1) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM1 FALSE
+#endif
+
+/**
+ * @brief QEID2 driver enable switch.
+ * @details If set to @p TRUE the support for QEID2 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM2) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM2 FALSE
+#endif
+
+/**
+ * @brief QEID3 driver enable switch.
+ * @details If set to @p TRUE the support for QEID3 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM3) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM3 FALSE
+#endif
+
+/**
+ * @brief QEID4 driver enable switch.
+ * @details If set to @p TRUE the support for QEID4 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM4) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM4 FALSE
+#endif
+
+/**
+ * @brief QEID5 driver enable switch.
+ * @details If set to @p TRUE the support for QEID5 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM5) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM5 FALSE
+#endif
+
+/**
+ * @brief QEID8 driver enable switch.
+ * @details If set to @p TRUE the support for QEID8 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_QEI_USE_TIM8) || defined(__DOXYGEN__)
+#define STM32_QEI_USE_TIM8 FALSE
+#endif
+
+/**
+ * @brief QEID1 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM1_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief QEID2 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM2_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief QEID3 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM3_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief QEID4 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM4_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief QEID5 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM5_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM5_IRQ_PRIORITY 7
+#endif
+
+/**
+ * @brief QEID8 interrupt priority level setting.
+ */
+#if !defined(STM32_QEI_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_QEI_TIM8_IRQ_PRIORITY 7
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if STM32_QEI_USE_TIM1 && !STM32_HAS_TIM1
+#error "TIM1 not present in the selected device"
+#endif
+
+#if STM32_QEI_USE_TIM2 && !STM32_HAS_TIM2
+#error "TIM2 not present in the selected device"
+#endif
+
+#if STM32_QEI_USE_TIM3 && !STM32_HAS_TIM3
+#error "TIM3 not present in the selected device"
+#endif
+
+#if STM32_QEI_USE_TIM4 && !STM32_HAS_TIM4
+#error "TIM4 not present in the selected device"
+#endif
+
+#if STM32_QEI_USE_TIM5 && !STM32_HAS_TIM5
+#error "TIM5 not present in the selected device"
+#endif
+
+#if STM32_QEI_USE_TIM8 && !STM32_HAS_TIM8
+#error "TIM8 not present in the selected device"
+#endif
+
+#if !STM32_QEI_USE_TIM1 && !STM32_QEI_USE_TIM2 && \
+ !STM32_QEI_USE_TIM3 && !STM32_QEI_USE_TIM4 && \
+ !STM32_QEI_USE_TIM5 && !STM32_QEI_USE_TIM8
+#error "QEI driver activated but no TIM peripheral assigned"
+#endif
+
+#if STM32_QEI_USE_TIM1 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM1_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM1"
+#endif
+
+#if STM32_QEI_USE_TIM2 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM2"
+#endif
+
+#if STM32_QEI_USE_TIM3 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM3_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM3"
+#endif
+
+#if STM32_QEI_USE_TIM4 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM4_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM4"
+#endif
+
+#if STM32_QEI_USE_TIM5 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM5_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM5"
+#endif
+
+#if STM32_QEI_USE_TIM8 && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_QEI_TIM8_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM8"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief QEI count mode.
+ */
+typedef enum {
+ QEI_MODE_QUADRATURE = 0, /**< Quadrature encoder mode. */
+ QEI_MODE_DIRCLOCK = 1, /**< Direction/Clock mode. */
+} qeimode_t;
+
+/**
+ * @brief QEI resolution.
+ */
+typedef enum {
+ QEI_SINGLE_EDGE = 0, /**< Count only on edges from first channel. */
+ QEI_BOTH_EDGES = 1, /**< Count on both edges (resolution doubles).*/
+} qeiresolution_t;
+
+/**
+ * @brief QEI direction inversion.
+ */
+typedef enum {
+ QEI_DIRINV_FALSE = 0, /**< Do not invert counter direction. */
+ QEI_DIRINV_TRUE = 1, /**< Invert counter direction. */
+} qeidirinv_t;
+
+/**
+ * @brief QEI counter type.
+ */
+typedef uint16_t qeicnt_t;
+
+/**
+ * @brief QEI delta type.
+ */
+typedef int16_t qeidelta_t;
+
+/**
+ * @brief Driver configuration structure.
+ * @note It could be empty on some architectures.
+ */
+typedef struct {
+ /**
+ * @brief Count mode.
+ */
+ qeimode_t mode;
+ /**
+ * @brief Resolution.
+ */
+ qeiresolution_t resolution;
+ /**
+ * @brief Direction inversion.
+ */
+ qeidirinv_t dirinv;
+ /* End of the mandatory fields.*/
+} QEIConfig;
+
+/**
+ * @brief Structure representing an QEI driver.
+ */
+struct QEIDriver {
+ /**
+ * @brief Driver state.
+ */
+ qeistate_t state;
+ /**
+ * @brief Last count value.
+ */
+ qeicnt_t last;
+ /**
+ * @brief Current configuration data.
+ */
+ const QEIConfig *config;
+#if defined(QEI_DRIVER_EXT_FIELDS)
+ QEI_DRIVER_EXT_FIELDS
+#endif
+ /* End of the mandatory fields.*/
+ /**
+ * @brief Pointer to the TIMx registers block.
+ */
+ stm32_tim_t *tim;
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/**
+ * @brief Returns the counter value.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @return The current counter value.
+ *
+ * @notapi
+ */
+#define qei_lld_get_count(qeip) ((qeip)->tim->CNT)
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if STM32_QEI_USE_TIM1 && !defined(__DOXYGEN__)
+extern QEIDriver QEID1;
+#endif
+
+#if STM32_QEI_USE_TIM2 && !defined(__DOXYGEN__)
+extern QEIDriver QEID2;
+#endif
+
+#if STM32_QEI_USE_TIM3 && !defined(__DOXYGEN__)
+extern QEIDriver QEID3;
+#endif
+
+#if STM32_QEI_USE_TIM4 && !defined(__DOXYGEN__)
+extern QEIDriver QEID4;
+#endif
+
+#if STM32_QEI_USE_TIM5 && !defined(__DOXYGEN__)
+extern QEIDriver QEID5;
+#endif
+
+#if STM32_QEI_USE_TIM8 && !defined(__DOXYGEN__)
+extern QEIDriver QEID8;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void qei_lld_init(void);
+ void qei_lld_start(QEIDriver *qeip);
+ void qei_lld_stop(QEIDriver *qeip);
+ void qei_lld_enable(QEIDriver *qeip);
+ void qei_lld_disable(QEIDriver *qeip);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_QEI */
+
+#endif /* HAL_QEI_LLD_H */
+
+/** @} */
diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk index c796984..377acdf 100644 --- a/os/hal/ports/STM32/STM32F0xx/platform.mk +++ b/os/hal/ports/STM32/STM32F0xx/platform.mk @@ -2,6 +2,7 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F0xx/platform.mk PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ diff --git a/os/hal/ports/STM32/STM32F1xx/platform.mk b/os/hal/ports/STM32/STM32F1xx/platform.mk index d2aeae0..a8f21bc 100644 --- a/os/hal/ports/STM32/STM32F1xx/platform.mk +++ b/os/hal/ports/STM32/STM32F1xx/platform.mk @@ -6,6 +6,7 @@ PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk index baa7578..92f033c 100644 --- a/os/hal/ports/STM32/STM32F3xx/platform.mk +++ b/os/hal/ports/STM32/STM32F3xx/platform.mk @@ -2,7 +2,8 @@ include ${CHIBIOS}/os/hal/ports/STM32/STM32F3xx/platform.mk PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \ - ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \ + ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \ PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \ diff --git a/os/hal/ports/STM32/STM32F4xx/platform.mk b/os/hal/ports/STM32/STM32F4xx/platform.mk index bc18dc6..c312e72 100644 --- a/os/hal/ports/STM32/STM32F4xx/platform.mk +++ b/os/hal/ports/STM32/STM32F4xx/platform.mk @@ -8,6 +8,7 @@ PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \
${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c
diff --git a/os/hal/src/hal_community.c b/os/hal/src/hal_community.c index 981aa25..8a39bf1 100644 --- a/os/hal/src/hal_community.c +++ b/os/hal/src/hal_community.c @@ -76,6 +76,10 @@ void halCommunityInit(void) { #if HAL_USE_TIMCAP || defined(__DOXYGEN__)
timcapInit();
#endif
+
+#if HAL_USE_QEI || defined(__DOXYGEN__)
+ qeiInit();
+#endif
}
#endif /* HAL_USE_COMMUNITY */
diff --git a/os/hal/src/hal_qei.c b/os/hal/src/hal_qei.c new file mode 100644 index 0000000..804e474 --- /dev/null +++ b/os/hal/src/hal_qei.c @@ -0,0 +1,214 @@ +/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file hal_qei.c
+ * @brief QEI Driver code.
+ *
+ * @addtogroup QEI
+ * @{
+ */
+
+#include "hal.h"
+
+#if (HAL_USE_QEI == TRUE) || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief QEI Driver initialization.
+ * @note This function is implicitly invoked by @p halInit(), there is
+ * no need to explicitly initialize the driver.
+ *
+ * @init
+ */
+void qeiInit(void) {
+
+ qei_lld_init();
+}
+
+/**
+ * @brief Initializes the standard part of a @p QEIDriver structure.
+ *
+ * @param[out] qeip pointer to the @p QEIDriver object
+ *
+ * @init
+ */
+void qeiObjectInit(QEIDriver *qeip) {
+
+ qeip->state = QEI_STOP;
+ qeip->last = 0;
+ qeip->config = NULL;
+}
+
+/**
+ * @brief Configures and activates the QEI peripheral.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @param[in] config pointer to the @p QEIConfig object
+ *
+ * @api
+ */
+void qeiStart(QEIDriver *qeip, const QEIConfig *config) {
+
+ osalDbgCheck((qeip != NULL) && (config != NULL));
+
+ osalSysLock();
+ osalDbgAssert((qeip->state == QEI_STOP) || (qeip->state == QEI_READY),
+ "invalid state");
+ qeip->config = config;
+ qei_lld_start(qeip);
+ qeip->state = QEI_READY;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Deactivates the QEI peripheral.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @api
+ */
+void qeiStop(QEIDriver *qeip) {
+
+ osalDbgCheck(qeip != NULL);
+
+ osalSysLock();
+ osalDbgAssert((qeip->state == QEI_STOP) || (qeip->state == QEI_READY),
+ "invalid state");
+ qei_lld_stop(qeip);
+ qeip->state = QEI_STOP;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Enables the quadrature encoder interface.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @api
+ */
+void qeiEnable(QEIDriver *qeip) {
+
+ osalDbgCheck(qeip != NULL);
+
+ osalSysLock();
+ osalDbgAssert(qeip->state == QEI_READY, "invalid state");
+ qei_lld_enable(qeip);
+ qeip->state = QEI_ACTIVE;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Disables the quadrature encoder interface.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ *
+ * @api
+ */
+void qeiDisable(QEIDriver *qeip) {
+
+ osalDbgCheck(qeip != NULL);
+
+ osalSysLock();
+ osalDbgAssert((qeip->state == QEI_READY) || (qeip->state == QEI_ACTIVE),
+ "invalid state");
+ qei_lld_disable(qeip);
+ qeip->state = QEI_READY;
+ osalSysUnlock();
+}
+
+/**
+ * @brief Returns the counter value.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @return The current counter value.
+ *
+ * @api
+ */
+qeicnt_t qeiGetCount(QEIDriver *qeip) {
+ qeicnt_t cnt;
+
+ osalSysLock();
+ cnt = qeiGetCountI(qeip);
+ osalSysUnlock();
+
+ return cnt;
+}
+
+/**
+ * @brief Returns the counter delta from last reading.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @return The delta from last read.
+ *
+ * @api
+ */
+qeidelta_t qeiUpdate(QEIDriver *qeip) {
+ qeicnt_t diff;
+
+ osalSysLock();
+ diff = qeiUpdateI(qeip);
+ osalSysUnlock();
+
+ return diff;
+}
+
+/**
+ * @brief Returns the counter delta from last reading.
+ *
+ * @param[in] qeip pointer to the @p QEIDriver object
+ * @return The delta from last read.
+ *
+ * @iclass
+ */
+qeidelta_t qeiUpdateI(QEIDriver *qeip) {
+ qeicnt_t cnt;
+ qeidelta_t delta;
+
+ osalDbgCheckClassI();
+ osalDbgCheck(qeip != NULL);
+ osalDbgAssert((qeip->state == QEI_READY) || (qeip->state == QEI_ACTIVE),
+ "invalid state");
+
+ cnt = qei_lld_get_count(qeip);
+ delta = cnt - qeip->last;
+ qeip->last = cnt;
+
+ return delta;
+}
+
+#endif /* HAL_USE_QEI == TRUE */
+
+/** @} */
|