Updated spi and udma lld to use TivaWare.

2 files changed, 16 insertions, 16 deletions

diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c
index 9f122b2..4d212b7 100644
--- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c
+++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.c
@@ -75,8 +75,8 @@ OSAL_IRQ_HANDLER(TIVA_UDMA_ERR_HANDLER)
 
   /* TODO Do we need to halt the system on a DMA error?*/
 
-  if (UDMA->ERRCLR) {
-    UDMA->ERRCLR = 1;
+  if (HWREG(UDMA_ERRCLR)) {
+    HWREG(UDMA_ERRCLR) = 1;
   }
 
   OSAL_IRQ_EPILOGUE();
@@ -96,18 +96,18 @@ void udmaInit(void)
   udma_channel_mask = 0;
 
   /* Enable UDMA module.*/
-  SYSCTL->RCGCDMA = 1;
-  while (!(SYSCTL->PRDMA & (1 << 0)))
+  HWREG(SYSCTL_RCGCDMA) = 1;
+  while (!(HWREG(SYSCTL_PRDMA) & (1 << 0)))
     ;
 
   nvicEnableVector(TIVA_UDMA_ERR_NUMBER, TIVA_UDMA_ERR_IRQ_PRIORITY);
   nvicEnableVector(TIVA_UDMA_SW_NUMBER, TIVA_UDMA_SW_IRQ_PRIORITY);
 
   /* Enable UDMA controller.*/
-  UDMA->CFG = 1;
+  HWREG(UDMA_CFG) = 1;
 
   /* Set address of control table.*/
-  UDMA->CTLBASE = (uint32_t)udmaControlTable.primary;
+  HWREG(UDMA_CTLBASE) = (uint32_t)udmaControlTable.primary;
 }
 
 /**
diff --git a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h
index 6479b08..cba9090 100644
--- a/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h
+++ b/os/hal/ports/TIVA/LLD/uDMA/tiva_udma.h
@@ -137,43 +137,43 @@ typedef struct __attribute__((packed, aligned(1024)))
 /*===========================================================================*/
 
 #define dmaChannelEnable(dmach) {\
-  UDMA->ENASET = (1 << dmach);\
+  HWREG(UDMA_ENASET) = (1 << dmach);\
 }
 
 #define dmaChannelDisable(dmach) { \
-  UDMA->ENACLR = (1 << dmach); \
+  HWREG(UDMA_ENACLR) = (1 << dmach); \
 }
 
 #define dmaChannelPrimary(dmach) {\
-  UDMA->ALTCLR = (1 << dmach); \
+  HWREG(UDMA_ALTCLR) = (1 << dmach); \
 }
 
 #define dmaChannelAlternate(dmach) { \
-  UDMA->ALTSET = (1 << dmach); \
+  HWREG(UDMA_ALTSET) = (1 << dmach); \
 }
 
 #define dmaChannelSingleBurst(dmach) { \
-  UDMA->USEBURSTCLR = (1 << dmach); \
+  HWREG(UDMA_USEBURSTCLR) = (1 << dmach); \
 }
 
 #define dmaChannelBurstOnly(dmach) { \
-  UDMA->USEBURSTSET = (1 << dmach); \
+  HWREG(UDMA_USEBURSTSET) = (1 << dmach); \
 }
 
 #define dmaChannelPriorityHigh(dmach) { \
-  UDMA->PRIOSET = (1 << dmach); \
+  HWREG(UDMA_PRIOSET) = (1 << dmach); \
 }
 
 #define dmaChannelPriorityDefault(dmach) { \
-  UDMA->PRIOCLR = (1 << dmach); \
+  HWREG(UDMA_PRIOCLR) = (1 << dmach); \
 }
 
 #define dmaChannelEnableRequest(dmach) {\
-  UDMA->REQMASKCLR = (1 << dmach); \
+  HWREG(UDMA_REQMASKCLR) = (1 << dmach); \
 }
 
 #define dmaChannelDisableRequest(dmach) {\
-  UDMA->REQMASKSET = (1 << dmach); \
+  HWREG(UDMA_REQMASKSET) = (1 << dmach); \
 }
 
 /*===========================================================================*/