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author | Michael Walker <walkerstop@gmail.com> | 2018-05-02 03:33:23 -0700 |
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committer | Michael Walker <walkerstop@gmail.com> | 2018-05-02 03:33:23 -0700 |
commit | 6d879f58f5b56eda3330aa6e7f8382f441adecf4 (patch) | |
tree | dad3f1f3b6ac3927484ee22002a947662a8a0173 /os/hal/ports/STM32/STM32L4xx | |
parent | 4e9f077fb10255dced1da4d5d2ad9f8ae41442a2 (diff) | |
parent | d4d384557df0e8e7a8071553448b0c42849f98c0 (diff) | |
download | ChibiOS-Contrib-6d879f58f5b56eda3330aa6e7f8382f441adecf4.tar.gz ChibiOS-Contrib-6d879f58f5b56eda3330aa6e7f8382f441adecf4.tar.bz2 ChibiOS-Contrib-6d879f58f5b56eda3330aa6e7f8382f441adecf4.zip |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'os/hal/ports/STM32/STM32L4xx')
-rw-r--r-- | os/hal/ports/STM32/STM32L4xx/platform.mk | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk new file mode 100644 index 0000000..b9bbfea --- /dev/null +++ b/os/hal/ports/STM32/STM32L4xx/platform.mk @@ -0,0 +1,21 @@ +include ${CHIBIOS}/os/hal/ports/STM32/STM32L4xx/platform.mk
+
+PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c
+
+PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
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