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author | Stephane D'Alu <sdalu@sdalu.com> | 2016-02-05 23:54:23 +0100 |
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committer | Stephane D'Alu <sdalu@sdalu.com> | 2016-02-05 23:54:23 +0100 |
commit | 8fe62a0f907639db23f14d17a45a7970854f1d22 (patch) | |
tree | 94ed5d7c466003fabd19065fc74906d30dced297 /os/hal/ports/NRF51/NRF51822/st_lld.c | |
parent | 80af295f27f0fc5daaaea04cb249d3ad3704d338 (diff) | |
download | ChibiOS-Contrib-8fe62a0f907639db23f14d17a45a7970854f1d22.tar.gz ChibiOS-Contrib-8fe62a0f907639db23f14d17a45a7970854f1d22.tar.bz2 ChibiOS-Contrib-8fe62a0f907639db23f14d17a45a7970854f1d22.zip |
use mcuconf.h with NRF51_SYSTEM_TICKS to select the timer source (TIMER or RTC)
Diffstat (limited to 'os/hal/ports/NRF51/NRF51822/st_lld.c')
-rw-r--r-- | os/hal/ports/NRF51/NRF51822/st_lld.c | 58 |
1 files changed, 57 insertions, 1 deletions
diff --git a/os/hal/ports/NRF51/NRF51822/st_lld.c b/os/hal/ports/NRF51/NRF51822/st_lld.c index d8c7b6c..a43a679 100644 --- a/os/hal/ports/NRF51/NRF51822/st_lld.c +++ b/os/hal/ports/NRF51/NRF51822/st_lld.c @@ -1,5 +1,6 @@ /*
ChibiOS - Copyright (C) 2015 Fabio Utzig
+ 2016 Stephane D'Alu
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@@ -51,9 +52,12 @@ /*===========================================================================*/
#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)
+
+#if (NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_RTC)
/**
* @brief System Timer vector (RTC0)
- * @details This interrupt is used for system tick in periodic mode.
+ * @details This interrupt is used for system tick in periodic mode
+ * if selected with NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_RTC
*
* @isr
*/
@@ -69,6 +73,32 @@ OSAL_IRQ_HANDLER(Vector6C) { OSAL_IRQ_EPILOGUE();
}
+#endif
+
+#if (NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_TIMER)
+/**
+ * @brief System Timer vector. (TIMER0)
+ * @details This interrupt is used for system tick in periodic mode
+ * if selected with NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_TIMER
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(Vector60) {
+
+ OSAL_IRQ_PROLOGUE();
+
+ /* Clear timer compare event */
+ if (NRF_TIMER0->EVENTS_COMPARE[0] != 0)
+ NRF_TIMER0->EVENTS_COMPARE[0] = 0;
+
+ osalSysLockFromISR();
+ osalOsTimerHandlerI();
+ osalSysUnlockFromISR();
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */
/*===========================================================================*/
@@ -86,6 +116,8 @@ void st_lld_init(void) { #endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */
#if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC
+
+#if (NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_RTC)
/* Using RTC with prescaler */
NRF_RTC0->TASKS_STOP = 1;
NRF_RTC0->PRESCALER = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1;
@@ -96,6 +128,30 @@ void st_lld_init(void) { NRF_RTC0->TASKS_START = 1;
#endif
+#if (NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_TIMER)
+ NRF_TIMER0->TASKS_CLEAR = 1;
+
+ /*
+ * Using 32-bit mode with prescaler 16 configures this
+ * timer with a 1MHz clock.
+ */
+ NRF_TIMER0->BITMODE = 3;
+ NRF_TIMER0->PRESCALER = 4;
+
+ /*
+ * Configure timer 0 compare capture 0 to generate interrupt
+ * and clear timer value when event is generated.
+ */
+ NRF_TIMER0->CC[0] = (1000000 / OSAL_ST_FREQUENCY) - 1;
+ NRF_TIMER0->SHORTS = 1;
+ NRF_TIMER0->INTENSET = 0x10000;
+
+ /* Start timer */
+ nvicEnableVector(TIMER0_IRQn, 8);
+ NRF_TIMER0->TASKS_START = 1;
+#endif
+
+#endif
}
#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */
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