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authorawygle <awygle@gmail.com>2016-05-04 23:47:33 -0700
committerawygle <awygle@gmail.com>2016-05-04 23:47:33 -0700
commitcf02c79b5aa7209542cbf1b0cefe703a2c0c60be (patch)
tree0557b4194870b710411fbddaf1c58eb432e2d0d4 /os/hal/boards
parentfe1d3f21146b1d28bd281b3682a528042b80253c (diff)
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Merge pull request #68 from awygle/msp430x
MSP430X DMA Support, EXP430FR6989 Demo + Makefile Updates
Diffstat (limited to 'os/hal/boards')
-rw-r--r--os/hal/boards/EXP430FR5969/board.h16
-rw-r--r--os/hal/boards/EXP430FR6989/board.c52
-rw-r--r--os/hal/boards/EXP430FR6989/board.h217
-rw-r--r--os/hal/boards/EXP430FR6989/board.mk5
4 files changed, 282 insertions, 8 deletions
diff --git a/os/hal/boards/EXP430FR5969/board.h b/os/hal/boards/EXP430FR5969/board.h
index 6b53f4b..97103d3 100644
--- a/os/hal/boards/EXP430FR5969/board.h
+++ b/os/hal/boards/EXP430FR5969/board.h
@@ -18,7 +18,7 @@
#define _BOARD_H_
/*
- * Setup for the Arduino Uno or board.
+ * Setup for the EXP430FR5969 LaunchPad board
*/
/*
@@ -44,7 +44,7 @@
* Port A setup:
*
* P1.0 - Green LED (output low)
- * P1.1 - Switch S2 (input pullup falling-edge interrupt)
+ * P1.1 - Switch S2 (input pullup)
* P1.2 - BoosterPack BP19 (input pullup)
* P1.3 - BoosterPack BP11 (input pullup)
* P1.4 - BoosterPack BP12 (input pullup)
@@ -65,8 +65,8 @@
#define VAL_IOPORT1_REN 0xFCFE
#define VAL_IOPORT1_SEL0 0x0000
#define VAL_IOPORT1_SEL1 0x0300
-#define VAL_IOPORT1_IES 0x0002
-#define VAL_IOPORT1_IE 0x0002
+#define VAL_IOPORT1_IES 0x0000
+#define VAL_IOPORT1_IE 0x0000
/*
* Port B setup:
@@ -79,12 +79,12 @@
* P3.5 - BoosterPack BP9 (input pullup)
* P3.6 - BoosterPack BP10 (input pullup)
* P3.7 - N/C (input pullup)
- * P4.0 - Application UART CTS (input pullup falling-edge interrupt)
+ * P4.0 - Application UART CTS (input pullup)
* P4.1 - Application UART RTS (output high)
* P4.2 - BoosterPack BP2 (input pullup)
* P4.3 - BoosterPack BP5 (input pullup)
* P4.4 - N/C (input pullup)
- * P4.5 - Switch S1 (input pullup falling-edge interrupt)
+ * P4.5 - Switch S1 (input pullup)
* P4.6 - Red LED (output low)
* P4.7 - N/C (input pullup)
*/
@@ -93,8 +93,8 @@
#define VAL_IOPORT2_REN 0xBDFF
#define VAL_IOPORT2_SEL0 0x0000
#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x2100
-#define VAL_IOPORT2_IE 0x2100
+#define VAL_IOPORT2_IES 0x0000
+#define VAL_IOPORT2_IE 0x0000
/*
* Port J setup:
diff --git a/os/hal/boards/EXP430FR6989/board.c b/os/hal/boards/EXP430FR6989/board.c
new file mode 100644
index 0000000..a6836cf
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.c
@@ -0,0 +1,52 @@
+/*
+ ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "hal.h"
+
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+ {VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
+ VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
+ {VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
+ VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
+ {VAL_IOPORT3_OUT, VAL_IOPORT3_DIR, VAL_IOPORT3_REN, VAL_IOPORT3_SEL0,
+ VAL_IOPORT3_SEL1, VAL_IOPORT3_IES, VAL_IOPORT3_IE},
+ {VAL_IOPORT4_OUT, VAL_IOPORT4_DIR, VAL_IOPORT4_REN, VAL_IOPORT4_SEL0,
+ VAL_IOPORT4_SEL1, VAL_IOPORT4_IES, VAL_IOPORT4_IE},
+ {VAL_IOPORT5_OUT, VAL_IOPORT5_DIR, VAL_IOPORT5_REN, VAL_IOPORT5_SEL0,
+ VAL_IOPORT5_SEL1, VAL_IOPORT5_IES, VAL_IOPORT5_IE},
+ {VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
+ VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
+}; /* Set UART TX pin correctly */
+#endif /* HAL_USE_PAL */
+
+/**
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+ /*
+ * External interrupts setup, all disabled initially.
+ */
+ _disable_interrupts();
+
+}
diff --git a/os/hal/boards/EXP430FR6989/board.h b/os/hal/boards/EXP430FR6989/board.h
new file mode 100644
index 0000000..83b8fbb
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.h
@@ -0,0 +1,217 @@
+/*
+ ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for the EXP430FR6989 LaunchPad board
+ */
+
+/* NOTE: LCD segment pins configured as unused - controlled by LCD driver if
+ * present
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_EXP430FR6989
+#define BOARD_NAME "MSP430FR6989 LaunchPad"
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_LED_R PAL_LINE(IOPORT1, 0U)
+#define LINE_LED_G PAL_LINE(IOPORT5, 7U)
+#define LINE_SW_S1 PAL_LINE(IOPORT1, 1U)
+#define LINE_SW_S2 PAL_LINE(IOPORT1, 2U)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the MSP430X Family Users Guide for details.
+ */
+/*
+ * Port A setup:
+ *
+ * P1.0 - Red LED (output low)
+ * P1.1 - Switch S1 (input pullup falling-edge interrupt)
+ * P1.2 - Switch S2 (input pullup falling-edge interrupt)
+ * P1.3 - BoosterPack BP34 (input pullup)
+ * P1.4 - BoosterPack BP7 (input pullup)
+ * P1.5 - BoosterPack BP18 (input pullup)
+ * P1.6 - BoosterPack BP15 (input pullup)
+ * P1.7 - BoosterPack BP14 (input pullup)
+ * P2.0 - BoosterPack BP8 (input pullup)
+ * P2.1 - BoosterPack BP19 (input pullup)
+ * P2.2 - BoosterPack BP35 (input pullup)
+ * P2.3 - BoosterPack BP31 (input pullup)
+ * P2.4 - BoosterPack BP12 (input pullup)
+ * P2.5 - BoosterPack BP13 (input pullup)
+ * P2.6 - BoosterPack BP39 (input pullup)
+ * P2.7 - BoosterPack BP40 (input pullup)
+ */
+#define VAL_IOPORT1_OUT 0xFFFE
+#define VAL_IOPORT1_DIR 0x0001
+#define VAL_IOPORT1_REN 0xFFFE
+#define VAL_IOPORT1_SEL0 0x0000
+#define VAL_IOPORT1_SEL1 0x0000
+#define VAL_IOPORT1_IES 0x0006
+#define VAL_IOPORT1_IE 0x0006
+
+/*
+ * Port B setup:
+ *
+ * P3.0 - BoosterPack BP33 (input pullup)
+ * P3.1 - BoosterPack BP32 (input pullup)
+ * P3.2 - BoosterPack BP5 (input pullup)
+ * P3.3 - BoosterPack BP38 (input pullup)
+ * P3.4 - Application UART TX (alternate 1)
+ * P3.5 - Application UART RX (alternate 1)
+ * P3.6 - BoosterPack BP37 (input pullup)
+ * P3.7 - BoosterPack BP36 (input pullup)
+ * P4.0 - BoosterPack BP10 (input pullup)
+ * P4.1 - BoosterPack BP9 (input pullup)
+ * P4.2 - BoosterPack BP4 (input pullup)
+ * P4.3 - BoosterPack BP3 (input pullup)
+ * P4.4 - LCD S8 (input pullup)
+ * P4.5 - LCD S7 (input pullup)
+ * P4.6 - LCD S6 (input pullup)
+ * P4.7 - BoosterPack BP11 (input pullup)
+ */
+#define VAL_IOPORT2_OUT 0xFFCF
+#define VAL_IOPORT2_DIR 0x0000
+#define VAL_IOPORT2_REN 0xFFCF
+#define VAL_IOPORT2_SEL0 0x0030
+#define VAL_IOPORT2_SEL1 0x0000
+#define VAL_IOPORT2_IES 0x0000
+#define VAL_IOPORT2_IE 0x0000
+
+/*
+ * Port C setup:
+ *
+ * P5.0 - LCD S38 (input pullup)
+ * P5.1 - LCD S37 (input pullup)
+ * P5.2 - LCD S36 (input pullup)
+ * P5.3 - LCD S35 (input pullup)
+ * P5.4 - LCD S12 (input pullup)
+ * P5.5 - LCD S11 (input pullup)
+ * P5.6 - LCD S10 (input pullup)
+ * P5.7 - LCD S9 (input pullup)
+ * P6.0 - LCD R23 (input pullup)
+ * P6.1 - LCD R13 (input pullup)
+ * P6.2 - LCD R03 (input pullup)
+ * P6.3 - LCD COM0 (input pullup)
+ * P6.4 - LCD COM1 (input pullup)
+ * P6.5 - LCD COM2 (input pullup)
+ * P6.6 - LCD COM3 (input pullup)
+ * P6.7 - LCD S31 (input pullup)
+ */
+#define VAL_IOPORT3_OUT 0xFFFF
+#define VAL_IOPORT3_DIR 0x0000
+#define VAL_IOPORT3_REN 0xFFFF
+#define VAL_IOPORT3_SEL0 0x0000
+#define VAL_IOPORT3_SEL1 0x0000
+#define VAL_IOPORT3_IES 0x0000
+#define VAL_IOPORT3_IE 0x0000
+
+/*
+ * Port D setup:
+ *
+ * P7.0 - LCD S17 (input pullup)
+ * P7.1 - LCD S16 (input pullup)
+ * P7.2 - LCD S15 (input pullup)
+ * P7.3 - LCD S14 (input pullup)
+ * P7.4 - LCD S13 (input pullup)
+ * P7.5 - LCD S30 (input pullup)
+ * P7.6 - LCD S29 (input pullup)
+ * P7.7 - LCD S27 (input pullup)
+ * P8.0 - LCD S21 (input pullup)
+ * P8.1 - LCD S20 (input pullup)
+ * P8.2 - LCD S19 (input pullup)
+ * P8.3 - LCD S18 (input pullup)
+ * P8.4 - BoosterPack BP23 (input pullup)
+ * P8.5 - BoosterPack BP24 (input pullup)
+ * P8.6 - BoosterPack BP25 (input pullup)
+ * P8.7 - BoosterPack BP26 (input pullup)
+ */
+#define VAL_IOPORT4_OUT 0xFFFF
+#define VAL_IOPORT4_DIR 0x0000
+#define VAL_IOPORT4_REN 0xFFFF
+#define VAL_IOPORT4_SEL0 0x0000
+#define VAL_IOPORT4_SEL1 0x0000
+#define VAL_IOPORT4_IES 0x0000
+#define VAL_IOPORT4_IE 0x0000
+
+/*
+ * Port D setup:
+ *
+ * P9.0 - BoosterPack BP27 (input pullup)
+ * P9.1 - BoosterPack BP28 (input pullup)
+ * P9.2 - BoosterPack BP2 (input pullup)
+ * P9.3 - BoosterPack BP6 (input pullup)
+ * P9.4 - BoosterPack BP17 (input pullup)
+ * P9.5 - BoosterPack BP29 (input pullup)
+ * P9.6 - BoosterPack BP30 (input pullup)
+ * P9.7 - Green LED (output low)
+ * P10.0 - LCD S4 (input pullup)
+ * P10.1 - LCD S28 (input pullup)
+ * P10.2 - LCD S39 (input pullup)
+ * P10.3 - N/C Internally (input pullup)
+ * P10.4 - N/C Internally (input pullup)
+ * P10.5 - N/C Internally (input pullup)
+ * P10.6 - N/C Internally (input pullup)
+ * P10.7 - N/C Internally (input pullup)
+ */
+#define VAL_IOPORT5_OUT 0xFF7F
+#define VAL_IOPORT5_DIR 0x0080
+#define VAL_IOPORT5_REN 0xFF7F
+#define VAL_IOPORT5_SEL0 0x0000
+#define VAL_IOPORT5_SEL1 0x0000
+#define VAL_IOPORT5_IES 0x0000
+#define VAL_IOPORT5_IE 0x0000
+
+/*
+ * Port J setup:
+ *
+ * PJ.0 - TDO (input pullup)
+ * PJ.1 - TDI (input pullup)
+ * PJ.2 - TMS (input pullup)
+ * PJ.3 - TCK (input pullup)
+ * PJ.4 - LFXIN (alternate 1)
+ * PJ.5 - LFXOUT (alternate 1)
+ * PJ.6 - HFXIN (N/C) (input pullup)
+ * PJ.7 - HFXOUT (N/C) (input pullup)
+ */
+#define VAL_IOPORT0_OUT 0x00FF
+#define VAL_IOPORT0_DIR 0x0000
+#define VAL_IOPORT0_REN 0x00CF
+#define VAL_IOPORT0_SEL0 0x0030
+#define VAL_IOPORT0_SEL1 0x0000
+#define VAL_IOPORT0_IES 0x0000
+#define VAL_IOPORT0_IE 0x0000
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/os/hal/boards/EXP430FR6989/board.mk b/os/hal/boards/EXP430FR6989/board.mk
new file mode 100644
index 0000000..ea1c237
--- /dev/null
+++ b/os/hal/boards/EXP430FR6989/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989/board.c
+
+# Required include directories
+BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989