diff options
| author | flabbergast <s3+flabbergast@sdfeu.org> | 2016-03-22 16:14:44 +0000 |
|---|---|---|
| committer | flabbergast <s3+flabbergast@sdfeu.org> | 2016-03-22 16:24:28 +0000 |
| commit | ca6f8bd296b55b1fe418b316f778d4c981aba246 (patch) | |
| tree | 9e55d584f9b75e32574dec3a463aa999c36933b8 /os/common/startup | |
| parent | cd24aa965d9429fc02181e8748600746e6fd0588 (diff) | |
| download | ChibiOS-Contrib-ca6f8bd296b55b1fe418b316f778d4c981aba246.tar.gz ChibiOS-Contrib-ca6f8bd296b55b1fe418b316f778d4c981aba246.tar.bz2 ChibiOS-Contrib-ca6f8bd296b55b1fe418b316f778d4c981aba246.zip | |
[KINETIS] Move/add startup files.
Move ports -> startup.
Split k20x to k20x5 and k20x7.
Split off common part of ld scripts.
Add new ld scripts.
Diffstat (limited to 'os/common/startup')
16 files changed, 1434 insertions, 0 deletions
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld new file mode 100644 index 0000000..57678ef --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld @@ -0,0 +1,59 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * MK20DX128 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 0x100
+ flashcfg : org = 0x00000400, len = 0x10
+ flash : org = 0x00000410, len = 128k - 0x410
+ ram0 : org = 0x1FFFE000, len = 16k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld new file mode 100644 index 0000000..af47ac5 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld @@ -0,0 +1,57 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * MK20DX128 memory setup (3k bootloader section).
+ */
+MEMORY
+{
+ flash : org = 0x00000c00, len = 128k - 0xc00
+ ram0 : org = 0x1FFFE000, len = 16k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis_bldr.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld new file mode 100644 index 0000000..28c1033 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld @@ -0,0 +1,57 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * MK20DX128 memory setup (4k bootloader section).
+ */
+MEMORY
+{
+ flash : org = 0x00001000, len = 128k - 0x1000
+ ram0 : org = 0x1FFFE000, len = 16k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis_bldr.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld new file mode 100644 index 0000000..35a63f6 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com + * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org> + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +/* + * MK20DX256 memory setup. + */ +MEMORY +{ + flash0 : org = 0x00000000, len = 0x400 + flashcfg : org = 0x00000400, len = 0x10 + flash : org = 0x00000410, len = 256k - 0x410 + ram0 : org = 0x1FFF8000, len = 64k + ram1 : org = 0x00000000, len = 0 + ram2 : org = 0x00000000, len = 0 + ram3 : org = 0x00000000, len = 0 + ram4 : org = 0x00000000, len = 0 + ram5 : org = 0x00000000, len = 0 + ram6 : org = 0x00000000, len = 0 + ram7 : org = 0x00000000, len = 0 +} + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +INCLUDE rules_kinetis.ld diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld new file mode 100644 index 0000000..d079e2d --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld @@ -0,0 +1,59 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * KL26Z64 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 0x100
+ flashcfg : org = 0x00000400, len = 0x10
+ flash : org = 0x00000410, len = 64k - 0x410
+ ram0 : org = 0x1FFFF800, len = 8k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld new file mode 100644 index 0000000..fc405a8 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld @@ -0,0 +1,59 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * KL27Z256 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 0x100
+ flashcfg : org = 0x00000400, len = 0x10
+ flash : org = 0x00000410, len = 256k - 0x410
+ ram0 : org = 0x1FFFE000, len = 32k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld new file mode 100644 index 0000000..2e04ab3 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld @@ -0,0 +1,59 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * KL26Z128 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 0x100
+ flashcfg : org = 0x00000400, len = 0x10
+ flash : org = 0x00000410, len = 128k - 0x410
+ ram0 : org = 0x1FFFF000, len = 16k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules_kinetis.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld new file mode 100644 index 0000000..1e95c5f --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis.ld @@ -0,0 +1,372 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+__ram0_start__ = ORIGIN(ram0);
+__ram0_size__ = LENGTH(ram0);
+__ram0_end__ = __ram0_start__ + __ram0_size__;
+__ram1_start__ = ORIGIN(ram1);
+__ram1_size__ = LENGTH(ram1);
+__ram1_end__ = __ram1_start__ + __ram1_size__;
+__ram2_start__ = ORIGIN(ram2);
+__ram2_size__ = LENGTH(ram2);
+__ram2_end__ = __ram2_start__ + __ram2_size__;
+__ram3_start__ = ORIGIN(ram3);
+__ram3_size__ = LENGTH(ram3);
+__ram3_end__ = __ram3_start__ + __ram3_size__;
+__ram4_start__ = ORIGIN(ram4);
+__ram4_size__ = LENGTH(ram4);
+__ram4_end__ = __ram4_start__ + __ram4_size__;
+__ram5_start__ = ORIGIN(ram5);
+__ram5_size__ = LENGTH(ram5);
+__ram5_end__ = __ram5_start__ + __ram5_size__;
+__ram6_start__ = ORIGIN(ram6);
+__ram6_size__ = LENGTH(ram6);
+__ram6_end__ = __ram6_start__ + __ram6_size__;
+__ram7_start__ = ORIGIN(ram7);
+__ram7_size__ = LENGTH(ram7);
+__ram7_end__ = __ram7_start__ + __ram7_size__;
+
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ . = 0;
+
+ .isr : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.vectors))
+ } > flash0
+
+ .cfmprotect : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.cfmconfig))
+ } > flashcfg
+
+ _text = .;
+
+ constructors : ALIGN(4) SUBALIGN(4)
+ {
+ __init_array_start = .;
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ __init_array_end = .;
+ } > flash
+
+ destructors : ALIGN(4) SUBALIGN(4)
+ {
+ __fini_array_start = .;
+ KEEP(*(.fini_array))
+ KEEP(*(SORT(.fini_array.*)))
+ __fini_array_end = .;
+ } > flash
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ } > flash
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > flash
+
+ .ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ __exidx_end = .;
+ } > flash
+
+ .eh_frame_hdr :
+ {
+ *(.eh_frame_hdr)
+ } > flash
+
+ .eh_frame : ONLY_IF_RO
+ {
+ *(.eh_frame)
+ } > flash
+
+ .textalign : ONLY_IF_RO
+ {
+ . = ALIGN(8);
+ } > flash
+
+ /* Legacy symbol, not used anywhere.*/
+ . = ALIGN(4);
+ PROVIDE(_etext = .);
+
+ /* Special section for exceptions stack.*/
+ .mstack :
+ {
+ . = ALIGN(8);
+ __main_stack_base__ = .;
+ . += __main_stack_size__;
+ . = ALIGN(8);
+ __main_stack_end__ = .;
+ } > MAIN_STACK_RAM
+
+ /* Special section for process stack.*/
+ .pstack :
+ {
+ __process_stack_base__ = .;
+ __main_thread_stack_base__ = .;
+ . += __process_stack_size__;
+ . = ALIGN(8);
+ __process_stack_end__ = .;
+ __main_thread_stack_end__ = .;
+ } > PROCESS_STACK_RAM
+
+ .data : ALIGN(4)
+ {
+ . = ALIGN(4);
+ PROVIDE(_textdata = LOADADDR(.data));
+ PROVIDE(_data = .);
+ _textdata_start = LOADADDR(.data);
+ _data_start = .;
+ *(.data)
+ *(.data.*)
+ *(.ramtext)
+ . = ALIGN(4);
+ PROVIDE(_edata = .);
+ _data_end = .;
+ } > DATA_RAM AT > flash
+
+ .bss (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ _bss_start = .;
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ PROVIDE(end = .);
+ } > BSS_RAM
+
+ .ram0_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram0_init_text__ = LOADADDR(.ram0_init);
+ __ram0_init__ = .;
+ *(.ram0_init)
+ *(.ram0_init.*)
+ . = ALIGN(4);
+ } > ram0 AT > flash
+
+ .ram0 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram0_clear__ = .;
+ *(.ram0_clear)
+ *(.ram0_clear.*)
+ . = ALIGN(4);
+ __ram0_noinit__ = .;
+ *(.ram0)
+ *(.ram0.*)
+ . = ALIGN(4);
+ __ram0_free__ = .;
+ } > ram0
+
+ .ram1_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram1_init_text__ = LOADADDR(.ram1_init);
+ __ram1_init__ = .;
+ *(.ram1_init)
+ *(.ram1_init.*)
+ . = ALIGN(4);
+ } > ram1 AT > flash
+
+ .ram1 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram1_clear__ = .;
+ *(.ram1_clear)
+ *(.ram1_clear.*)
+ . = ALIGN(4);
+ __ram1_noinit__ = .;
+ *(.ram1)
+ *(.ram1.*)
+ . = ALIGN(4);
+ __ram1_free__ = .;
+ } > ram1
+
+ .ram2_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram2_init_text__ = LOADADDR(.ram2_init);
+ __ram2_init__ = .;
+ *(.ram2_init)
+ *(.ram2_init.*)
+ . = ALIGN(4);
+ } > ram2 AT > flash
+
+ .ram2 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram2_clear__ = .;
+ *(.ram2_clear)
+ *(.ram2_clear.*)
+ . = ALIGN(4);
+ __ram2_noinit__ = .;
+ *(.ram2)
+ *(.ram2.*)
+ . = ALIGN(4);
+ __ram2_free__ = .;
+ } > ram2
+
+ .ram3_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram3_init_text__ = LOADADDR(.ram3_init);
+ __ram3_init__ = .;
+ *(.ram3_init)
+ *(.ram3_init.*)
+ . = ALIGN(4);
+ } > ram3 AT > flash
+
+ .ram3 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram3_clear__ = .;
+ *(.ram3_clear)
+ *(.ram3_clear.*)
+ . = ALIGN(4);
+ __ram3_noinit__ = .;
+ *(.ram3)
+ *(.ram3.*)
+ . = ALIGN(4);
+ __ram3_free__ = .;
+ } > ram3
+
+ .ram4_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram4_init_text__ = LOADADDR(.ram4_init);
+ __ram4_init__ = .;
+ *(.ram4_init)
+ *(.ram4_init.*)
+ . = ALIGN(4);
+ } > ram4 AT > flash
+
+ .ram4 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram4_clear__ = .;
+ *(.ram4_clear)
+ *(.ram4_clear.*)
+ . = ALIGN(4);
+ __ram4_noinit__ = .;
+ *(.ram4)
+ *(.ram4.*)
+ . = ALIGN(4);
+ __ram4_free__ = .;
+ } > ram4
+
+ .ram5_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram5_init_text__ = LOADADDR(.ram5_init);
+ __ram5_init__ = .;
+ *(.ram5_init)
+ *(.ram5_init.*)
+ . = ALIGN(4);
+ } > ram5 AT > flash
+
+ .ram5 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram5_clear__ = .;
+ *(.ram5_clear)
+ *(.ram5_clear.*)
+ . = ALIGN(4);
+ __ram5_noinit__ = .;
+ *(.ram5)
+ *(.ram5.*)
+ . = ALIGN(4);
+ __ram5_free__ = .;
+ } > ram5
+
+ .ram6_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram6_init_text__ = LOADADDR(.ram6_init);
+ __ram6_init__ = .;
+ *(.ram6_init)
+ *(.ram6_init.*)
+ . = ALIGN(4);
+ } > ram6 AT > flash
+
+ .ram6 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram6_clear__ = .;
+ *(.ram6_clear)
+ *(.ram6_clear.*)
+ . = ALIGN(4);
+ __ram6_noinit__ = .;
+ *(.ram6)
+ *(.ram6.*)
+ . = ALIGN(4);
+ __ram6_free__ = .;
+ } > ram6
+
+ .ram7_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram7_init_text__ = LOADADDR(.ram7_init);
+ __ram7_init__ = .;
+ *(.ram7_init)
+ *(.ram7_init.*)
+ . = ALIGN(4);
+ } > ram7 AT > flash
+
+ .ram7 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram7_clear__ = .;
+ *(.ram7_clear)
+ *(.ram7_clear.*)
+ . = ALIGN(4);
+ __ram7_noinit__ = .;
+ *(.ram7)
+ *(.ram7.*)
+ . = ALIGN(4);
+ __ram7_free__ = .;
+ } > ram7
+
+ /* The default heap uses the (statically) unused part of a RAM section.*/
+ .heap (NOLOAD) :
+ {
+ . = ALIGN(8);
+ __heap_base__ = .;
+ . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
+ __heap_end__ = .;
+ } > HEAP_RAM
+}
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld new file mode 100644 index 0000000..4ae8dc1 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/ld/rules_kinetis_bldr.ld @@ -0,0 +1,367 @@ +/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ * (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+__ram0_start__ = ORIGIN(ram0);
+__ram0_size__ = LENGTH(ram0);
+__ram0_end__ = __ram0_start__ + __ram0_size__;
+__ram1_start__ = ORIGIN(ram1);
+__ram1_size__ = LENGTH(ram1);
+__ram1_end__ = __ram1_start__ + __ram1_size__;
+__ram2_start__ = ORIGIN(ram2);
+__ram2_size__ = LENGTH(ram2);
+__ram2_end__ = __ram2_start__ + __ram2_size__;
+__ram3_start__ = ORIGIN(ram3);
+__ram3_size__ = LENGTH(ram3);
+__ram3_end__ = __ram3_start__ + __ram3_size__;
+__ram4_start__ = ORIGIN(ram4);
+__ram4_size__ = LENGTH(ram4);
+__ram4_end__ = __ram4_start__ + __ram4_size__;
+__ram5_start__ = ORIGIN(ram5);
+__ram5_size__ = LENGTH(ram5);
+__ram5_end__ = __ram5_start__ + __ram5_size__;
+__ram6_start__ = ORIGIN(ram6);
+__ram6_size__ = LENGTH(ram6);
+__ram6_end__ = __ram6_start__ + __ram6_size__;
+__ram7_start__ = ORIGIN(ram7);
+__ram7_size__ = LENGTH(ram7);
+__ram7_end__ = __ram7_start__ + __ram7_size__;
+
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+ . = 0;
+
+ .isr : ALIGN(4) SUBALIGN(4)
+ {
+ KEEP(*(.vectors))
+ } > flash
+
+ _text = .;
+
+ constructors : ALIGN(4) SUBALIGN(4)
+ {
+ __init_array_start = .;
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ __init_array_end = .;
+ } > flash
+
+ destructors : ALIGN(4) SUBALIGN(4)
+ {
+ __fini_array_start = .;
+ KEEP(*(.fini_array))
+ KEEP(*(SORT(.fini_array.*)))
+ __fini_array_end = .;
+ } > flash
+
+ .text : ALIGN(16) SUBALIGN(16)
+ {
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.glue_7t)
+ *(.glue_7)
+ *(.gcc*)
+ } > flash
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > flash
+
+ .ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ __exidx_end = .;
+ } > flash
+
+ .eh_frame_hdr :
+ {
+ *(.eh_frame_hdr)
+ } > flash
+
+ .eh_frame : ONLY_IF_RO
+ {
+ *(.eh_frame)
+ } > flash
+
+ .textalign : ONLY_IF_RO
+ {
+ . = ALIGN(8);
+ } > flash
+
+ /* Legacy symbol, not used anywhere.*/
+ . = ALIGN(4);
+ PROVIDE(_etext = .);
+
+ /* Special section for exceptions stack.*/
+ .mstack :
+ {
+ . = ALIGN(8);
+ __main_stack_base__ = .;
+ . += __main_stack_size__;
+ . = ALIGN(8);
+ __main_stack_end__ = .;
+ } > MAIN_STACK_RAM
+
+ /* Special section for process stack.*/
+ .pstack :
+ {
+ __process_stack_base__ = .;
+ __main_thread_stack_base__ = .;
+ . += __process_stack_size__;
+ . = ALIGN(8);
+ __process_stack_end__ = .;
+ __main_thread_stack_end__ = .;
+ } > PROCESS_STACK_RAM
+
+ .data : ALIGN(4)
+ {
+ . = ALIGN(4);
+ PROVIDE(_textdata = LOADADDR(.data));
+ PROVIDE(_data = .);
+ _textdata_start = LOADADDR(.data);
+ _data_start = .;
+ *(.data)
+ *(.data.*)
+ *(.ramtext)
+ . = ALIGN(4);
+ PROVIDE(_edata = .);
+ _data_end = .;
+ } > DATA_RAM AT > flash
+
+ .bss (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ _bss_start = .;
+ *(.bss)
+ *(.bss.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ PROVIDE(end = .);
+ } > BSS_RAM
+
+ .ram0_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram0_init_text__ = LOADADDR(.ram0_init);
+ __ram0_init__ = .;
+ *(.ram0_init)
+ *(.ram0_init.*)
+ . = ALIGN(4);
+ } > ram0 AT > flash
+
+ .ram0 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram0_clear__ = .;
+ *(.ram0_clear)
+ *(.ram0_clear.*)
+ . = ALIGN(4);
+ __ram0_noinit__ = .;
+ *(.ram0)
+ *(.ram0.*)
+ . = ALIGN(4);
+ __ram0_free__ = .;
+ } > ram0
+
+ .ram1_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram1_init_text__ = LOADADDR(.ram1_init);
+ __ram1_init__ = .;
+ *(.ram1_init)
+ *(.ram1_init.*)
+ . = ALIGN(4);
+ } > ram1 AT > flash
+
+ .ram1 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram1_clear__ = .;
+ *(.ram1_clear)
+ *(.ram1_clear.*)
+ . = ALIGN(4);
+ __ram1_noinit__ = .;
+ *(.ram1)
+ *(.ram1.*)
+ . = ALIGN(4);
+ __ram1_free__ = .;
+ } > ram1
+
+ .ram2_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram2_init_text__ = LOADADDR(.ram2_init);
+ __ram2_init__ = .;
+ *(.ram2_init)
+ *(.ram2_init.*)
+ . = ALIGN(4);
+ } > ram2 AT > flash
+
+ .ram2 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram2_clear__ = .;
+ *(.ram2_clear)
+ *(.ram2_clear.*)
+ . = ALIGN(4);
+ __ram2_noinit__ = .;
+ *(.ram2)
+ *(.ram2.*)
+ . = ALIGN(4);
+ __ram2_free__ = .;
+ } > ram2
+
+ .ram3_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram3_init_text__ = LOADADDR(.ram3_init);
+ __ram3_init__ = .;
+ *(.ram3_init)
+ *(.ram3_init.*)
+ . = ALIGN(4);
+ } > ram3 AT > flash
+
+ .ram3 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram3_clear__ = .;
+ *(.ram3_clear)
+ *(.ram3_clear.*)
+ . = ALIGN(4);
+ __ram3_noinit__ = .;
+ *(.ram3)
+ *(.ram3.*)
+ . = ALIGN(4);
+ __ram3_free__ = .;
+ } > ram3
+
+ .ram4_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram4_init_text__ = LOADADDR(.ram4_init);
+ __ram4_init__ = .;
+ *(.ram4_init)
+ *(.ram4_init.*)
+ . = ALIGN(4);
+ } > ram4 AT > flash
+
+ .ram4 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram4_clear__ = .;
+ *(.ram4_clear)
+ *(.ram4_clear.*)
+ . = ALIGN(4);
+ __ram4_noinit__ = .;
+ *(.ram4)
+ *(.ram4.*)
+ . = ALIGN(4);
+ __ram4_free__ = .;
+ } > ram4
+
+ .ram5_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram5_init_text__ = LOADADDR(.ram5_init);
+ __ram5_init__ = .;
+ *(.ram5_init)
+ *(.ram5_init.*)
+ . = ALIGN(4);
+ } > ram5 AT > flash
+
+ .ram5 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram5_clear__ = .;
+ *(.ram5_clear)
+ *(.ram5_clear.*)
+ . = ALIGN(4);
+ __ram5_noinit__ = .;
+ *(.ram5)
+ *(.ram5.*)
+ . = ALIGN(4);
+ __ram5_free__ = .;
+ } > ram5
+
+ .ram6_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram6_init_text__ = LOADADDR(.ram6_init);
+ __ram6_init__ = .;
+ *(.ram6_init)
+ *(.ram6_init.*)
+ . = ALIGN(4);
+ } > ram6 AT > flash
+
+ .ram6 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram6_clear__ = .;
+ *(.ram6_clear)
+ *(.ram6_clear.*)
+ . = ALIGN(4);
+ __ram6_noinit__ = .;
+ *(.ram6)
+ *(.ram6.*)
+ . = ALIGN(4);
+ __ram6_free__ = .;
+ } > ram6
+
+ .ram7_init : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram7_init_text__ = LOADADDR(.ram7_init);
+ __ram7_init__ = .;
+ *(.ram7_init)
+ *(.ram7_init.*)
+ . = ALIGN(4);
+ } > ram7 AT > flash
+
+ .ram7 (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN(4);
+ __ram7_clear__ = .;
+ *(.ram7_clear)
+ *(.ram7_clear.*)
+ . = ALIGN(4);
+ __ram7_noinit__ = .;
+ *(.ram7)
+ *(.ram7.*)
+ . = ALIGN(4);
+ __ram7_free__ = .;
+ } > ram7
+
+ /* The default heap uses the (statically) unused part of a RAM section.*/
+ .heap (NOLOAD) :
+ {
+ . = ALIGN(8);
+ __heap_base__ = .;
+ . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
+ __heap_end__ = .;
+ } > HEAP_RAM
+}
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk new file mode 100644 index 0000000..410e607 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic K20x startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
+ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
+
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s
+
+STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \
+ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x \
+ $(CHIBIOS)/os/common/ext/CMSIS/include \
+ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk new file mode 100644 index 0000000..7ab25de --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk @@ -0,0 +1,3 @@ +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
+
+STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x5
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk new file mode 100644 index 0000000..3c8ea09 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk @@ -0,0 +1,3 @@ +include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
+
+STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x7
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk new file mode 100644 index 0000000..ada23f6 --- /dev/null +++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk @@ -0,0 +1,12 @@ +# List of the ChibiOS generic KL2x startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
+ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
+
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s
+
+STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \
+ $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/KL2x \
+ $(CHIBIOS)/os/common/ext/CMSIS/include \
+ $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld
diff --git a/os/common/startup/ARMCMx/devices/K20x5/cmparams.h b/os/common/startup/ARMCMx/devices/K20x5/cmparams.h new file mode 100644 index 0000000..8aebbc0 --- /dev/null +++ b/os/common/startup/ARMCMx/devices/K20x5/cmparams.h @@ -0,0 +1,84 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio.
+ (C) 2015 RedoX https://github.com/RedoXyde
+ (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file GCC/ARMCMx/K20x5/cmparams.h
+ * @brief ARM Cortex-M4 parameters for the Kinetis K20x5.
+ *
+ * @defgroup ARMCMx_K20x5 Kinetis K20x5 Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * Kinetis K20x5 platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL 4
+
+/**
+ * @brief Systick unit presence.
+ */
+#define CORTEX_HAS_ST TRUE
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 4
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 48
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "k20x5.h"
+
+#if CORTEX_MODEL != __CORTEX_M
+#error "CMSIS __CORTEX_M mismatch"
+#endif
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/common/startup/ARMCMx/devices/K20x7/cmparams.h b/os/common/startup/ARMCMx/devices/K20x7/cmparams.h new file mode 100644 index 0000000..afb3053 --- /dev/null +++ b/os/common/startup/ARMCMx/devices/K20x7/cmparams.h @@ -0,0 +1,80 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio.
+ (C) 2015 RedoX https://github.com/RedoXyde
+ (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file GCC/ARMCMx/K20x7/cmparams.h
+ * @brief ARM Cortex-M4 parameters for the Kinetis K20x7.
+ *
+ * @defgroup ARMCMx_K20x7 Kinetis K20x7 Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * Kinetis K20x7 platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL 4
+
+/**
+ * @brief Systick unit presence.
+ */
+#define CORTEX_HAS_ST TRUE
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 4
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 96
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "k20x7.h"
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
diff --git a/os/common/startup/ARMCMx/devices/KL2x/cmparams.h b/os/common/startup/ARMCMx/devices/KL2x/cmparams.h new file mode 100644 index 0000000..93a7055 --- /dev/null +++ b/os/common/startup/ARMCMx/devices/KL2x/cmparams.h @@ -0,0 +1,92 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio.
+ (C) 2015 RedoX https://github.com/RedoXyde
+ (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file KL2x/cmparams.h
+ * @brief ARM Cortex-M0+ parameters for the Kinetis KL2x family.
+ *
+ * @defgroup ARMCMx_KL2x Kinetis KL2x Specific Parameters
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M0+ specific parameters for the
+ * Kinetis KL2x platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL 0
+
+/**
+ * @brief Systick unit presence.
+ */
+#define CORTEX_HAS_ST TRUE
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU FALSE
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 2
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 32
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* If the device type is not externally defined, for example from the Makefile,
+ then a file named board.h is included. This file must contain a device
+ definition compatible with the vendor include file.*/
+#if !defined (KL25) && !defined (KL26) && \
+ !defined (KL27Zxxx) && !defined (KL27Zxx)
+#include "board.h"
+#endif
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "kl2xz.h"
+
+#if CORTEX_MODEL != __CORTEX_M
+#error "CMSIS __CORTEX_M mismatch"
+#endif
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */
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