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authorflabbergast <s3+flabbergast@sdfeu.org>2016-03-22 16:14:44 +0000
committerflabbergast <s3+flabbergast@sdfeu.org>2016-03-22 16:24:28 +0000
commitca6f8bd296b55b1fe418b316f778d4c981aba246 (patch)
tree9e55d584f9b75e32574dec3a463aa999c36933b8 /os/common/ports
parentcd24aa965d9429fc02181e8748600746e6fd0588 (diff)
downloadChibiOS-Contrib-ca6f8bd296b55b1fe418b316f778d4c981aba246.tar.gz
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[KINETIS] Move/add startup files.
Move ports -> startup. Split k20x to k20x5 and k20x7. Split off common part of ld scripts. Add new ld scripts.
Diffstat (limited to 'os/common/ports')
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/ld/KL25Z128.ld389
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/ld/MK20DX128.ld389
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/mk/startup_k20x.mk11
-rw-r--r--os/common/ports/ARMCMx/compilers/GCC/mk/startup_kl2x.mk11
-rw-r--r--os/common/ports/ARMCMx/devices/K20x/cmparams.h79
-rw-r--r--os/common/ports/ARMCMx/devices/KL2x/cmparams.h79
6 files changed, 0 insertions, 958 deletions
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/KL25Z128.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/KL25Z128.ld
deleted file mode 100644
index d566d82..0000000
--- a/os/common/ports/ARMCMx/compilers/GCC/ld/KL25Z128.ld
+++ /dev/null
@@ -1,389 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * KL25Z128 memory setup.
- */
-MEMORY
-{
- flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 128k - 0x410
- ram0 : org = 0x1FFFF000, len = 16k
- ram1 : org = 0x00000000, len = 0
- ram2 : org = 0x00000000, len = 0
- ram3 : org = 0x00000000, len = 0
- ram4 : org = 0x00000000, len = 0
- ram5 : org = 0x00000000, len = 0
- ram6 : org = 0x00000000, len = 0
- ram7 : org = 0x00000000, len = 0
-}
-
-REGION_ALIAS("MAIN_STACK_RAM", ram0);
-REGION_ALIAS("PROCESS_STACK_RAM", ram0);
-REGION_ALIAS("DATA_RAM", ram0);
-REGION_ALIAS("BSS_RAM", ram0);
-REGION_ALIAS("HEAP_RAM", ram0);
-
-__ram0_start__ = ORIGIN(ram0);
-__ram0_size__ = LENGTH(ram0);
-__ram0_end__ = __ram0_start__ + __ram0_size__;
-__ram1_start__ = ORIGIN(ram1);
-__ram1_size__ = LENGTH(ram1);
-__ram1_end__ = __ram1_start__ + __ram1_size__;
-__ram2_start__ = ORIGIN(ram2);
-__ram2_size__ = LENGTH(ram2);
-__ram2_end__ = __ram2_start__ + __ram2_size__;
-__ram3_start__ = ORIGIN(ram3);
-__ram3_size__ = LENGTH(ram3);
-__ram3_end__ = __ram3_start__ + __ram3_size__;
-__ram4_start__ = ORIGIN(ram4);
-__ram4_size__ = LENGTH(ram4);
-__ram4_end__ = __ram4_start__ + __ram4_size__;
-__ram5_start__ = ORIGIN(ram5);
-__ram5_size__ = LENGTH(ram5);
-__ram5_end__ = __ram5_start__ + __ram5_size__;
-__ram6_start__ = ORIGIN(ram6);
-__ram6_size__ = LENGTH(ram6);
-__ram6_end__ = __ram6_start__ + __ram6_size__;
-__ram7_start__ = ORIGIN(ram7);
-__ram7_size__ = LENGTH(ram7);
-__ram7_end__ = __ram7_start__ + __ram7_size__;
-
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- . = 0;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.vectors))
- } > flash0
-
- .cfmprotect : ALIGN(4) SUBALIGN(4)
- {
- KEEP(*(.cfmconfig))
- } > flashcfg
-
- _text = .;
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- __init_array_start = .;
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- __init_array_end = .;
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- __fini_array_start = .;
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- __fini_array_end = .;
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- __exidx_start = .;
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- __exidx_end = .;
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- /* Legacy symbol, not used anywhere.*/
- . = ALIGN(4);
- PROVIDE(_etext = .);
-
- /* Special section for exceptions stack.*/
- .mstack :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- } > MAIN_STACK_RAM
-
- /* Special section for process stack.*/
- .pstack :
- {
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > PROCESS_STACK_RAM
-
- .data : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_textdata = LOADADDR(.data));
- PROVIDE(_data = .);
- _textdata_start = LOADADDR(.data);
- _data_start = .;
- *(.data)
- *(.data.*)
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- _data_end = .;
- } > DATA_RAM AT > flash
-
- .bss (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- _bss_start = .;
- *(.bss)
- *(.bss.*)
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- PROVIDE(end = .);
- } > BSS_RAM
-
- .ram0_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_init_text__ = LOADADDR(.ram0_init);
- __ram0_init__ = .;
- *(.ram0_init)
- *(.ram0_init.*)
- . = ALIGN(4);
- } > ram0 AT > flash
-
- .ram0 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_clear__ = .;
- *(.ram0_clear)
- *(.ram0_clear.*)
- . = ALIGN(4);
- __ram0_noinit__ = .;
- *(.ram0)
- *(.ram0.*)
- . = ALIGN(4);
- __ram0_free__ = .;
- } > ram0
-
- .ram1_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_init_text__ = LOADADDR(.ram1_init);
- __ram1_init__ = .;
- *(.ram1_init)
- *(.ram1_init.*)
- . = ALIGN(4);
- } > ram1 AT > flash
-
- .ram1 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_clear__ = .;
- *(.ram1_clear)
- *(.ram1_clear.*)
- . = ALIGN(4);
- __ram1_noinit__ = .;
- *(.ram1)
- *(.ram1.*)
- . = ALIGN(4);
- __ram1_free__ = .;
- } > ram1
-
- .ram2_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_init_text__ = LOADADDR(.ram2_init);
- __ram2_init__ = .;
- *(.ram2_init)
- *(.ram2_init.*)
- . = ALIGN(4);
- } > ram2 AT > flash
-
- .ram2 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_clear__ = .;
- *(.ram2_clear)
- *(.ram2_clear.*)
- . = ALIGN(4);
- __ram2_noinit__ = .;
- *(.ram2)
- *(.ram2.*)
- . = ALIGN(4);
- __ram2_free__ = .;
- } > ram2
-
- .ram3_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_init_text__ = LOADADDR(.ram3_init);
- __ram3_init__ = .;
- *(.ram3_init)
- *(.ram3_init.*)
- . = ALIGN(4);
- } > ram3 AT > flash
-
- .ram3 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_clear__ = .;
- *(.ram3_clear)
- *(.ram3_clear.*)
- . = ALIGN(4);
- __ram3_noinit__ = .;
- *(.ram3)
- *(.ram3.*)
- . = ALIGN(4);
- __ram3_free__ = .;
- } > ram3
-
- .ram4_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_init_text__ = LOADADDR(.ram4_init);
- __ram4_init__ = .;
- *(.ram4_init)
- *(.ram4_init.*)
- . = ALIGN(4);
- } > ram4 AT > flash
-
- .ram4 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_clear__ = .;
- *(.ram4_clear)
- *(.ram4_clear.*)
- . = ALIGN(4);
- __ram4_noinit__ = .;
- *(.ram4)
- *(.ram4.*)
- . = ALIGN(4);
- __ram4_free__ = .;
- } > ram4
-
- .ram5_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_init_text__ = LOADADDR(.ram5_init);
- __ram5_init__ = .;
- *(.ram5_init)
- *(.ram5_init.*)
- . = ALIGN(4);
- } > ram5 AT > flash
-
- .ram5 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_clear__ = .;
- *(.ram5_clear)
- *(.ram5_clear.*)
- . = ALIGN(4);
- __ram5_noinit__ = .;
- *(.ram5)
- *(.ram5.*)
- . = ALIGN(4);
- __ram5_free__ = .;
- } > ram5
-
- .ram6_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_init_text__ = LOADADDR(.ram6_init);
- __ram6_init__ = .;
- *(.ram6_init)
- *(.ram6_init.*)
- . = ALIGN(4);
- } > ram6 AT > flash
-
- .ram6 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_clear__ = .;
- *(.ram6_clear)
- *(.ram6_clear.*)
- . = ALIGN(4);
- __ram6_noinit__ = .;
- *(.ram6)
- *(.ram6.*)
- . = ALIGN(4);
- __ram6_free__ = .;
- } > ram6
-
- .ram7_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_init_text__ = LOADADDR(.ram7_init);
- __ram7_init__ = .;
- *(.ram7_init)
- *(.ram7_init.*)
- . = ALIGN(4);
- } > ram7 AT > flash
-
- .ram7 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_clear__ = .;
- *(.ram7_clear)
- *(.ram7_clear.*)
- . = ALIGN(4);
- __ram7_noinit__ = .;
- *(.ram7)
- *(.ram7.*)
- . = ALIGN(4);
- __ram7_free__ = .;
- } > ram7
-
- /* The default heap uses the (statically) unused part of a RAM section.*/
- .heap (NOLOAD) :
- {
- . = ALIGN(8);
- __heap_base__ = .;
- . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
- __heap_end__ = .;
- } > HEAP_RAM
-}
diff --git a/os/common/ports/ARMCMx/compilers/GCC/ld/MK20DX128.ld b/os/common/ports/ARMCMx/compilers/GCC/ld/MK20DX128.ld
deleted file mode 100644
index 9e90549..0000000
--- a/os/common/ports/ARMCMx/compilers/GCC/ld/MK20DX128.ld
+++ /dev/null
@@ -1,389 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * MK20DX128 memory setup.
- */
-MEMORY
-{
- flash0 : org = 0x00000000, len = 0x100
- flashcfg : org = 0x00000400, len = 0x10
- flash : org = 0x00000410, len = 128k - 0x410
- ram0 : org = 0x1fffe000, len = 16k
- ram1 : org = 0x00000000, len = 0
- ram2 : org = 0x00000000, len = 0
- ram3 : org = 0x00000000, len = 0
- ram4 : org = 0x00000000, len = 0
- ram5 : org = 0x00000000, len = 0
- ram6 : org = 0x00000000, len = 0
- ram7 : org = 0x00000000, len = 0
-}
-
-REGION_ALIAS("MAIN_STACK_RAM", ram0);
-REGION_ALIAS("PROCESS_STACK_RAM", ram0);
-REGION_ALIAS("DATA_RAM", ram0);
-REGION_ALIAS("BSS_RAM", ram0);
-REGION_ALIAS("HEAP_RAM", ram0);
-
-__ram0_start__ = ORIGIN(ram0);
-__ram0_size__ = LENGTH(ram0);
-__ram0_end__ = __ram0_start__ + __ram0_size__;
-__ram1_start__ = ORIGIN(ram1);
-__ram1_size__ = LENGTH(ram1);
-__ram1_end__ = __ram1_start__ + __ram1_size__;
-__ram2_start__ = ORIGIN(ram2);
-__ram2_size__ = LENGTH(ram2);
-__ram2_end__ = __ram2_start__ + __ram2_size__;
-__ram3_start__ = ORIGIN(ram3);
-__ram3_size__ = LENGTH(ram3);
-__ram3_end__ = __ram3_start__ + __ram3_size__;
-__ram4_start__ = ORIGIN(ram4);
-__ram4_size__ = LENGTH(ram4);
-__ram4_end__ = __ram4_start__ + __ram4_size__;
-__ram5_start__ = ORIGIN(ram5);
-__ram5_size__ = LENGTH(ram5);
-__ram5_end__ = __ram5_start__ + __ram5_size__;
-__ram6_start__ = ORIGIN(ram6);
-__ram6_size__ = LENGTH(ram6);
-__ram6_end__ = __ram6_start__ + __ram6_size__;
-__ram7_start__ = ORIGIN(ram7);
-__ram7_size__ = LENGTH(ram7);
-__ram7_end__ = __ram7_start__ + __ram7_size__;
-
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
- . = 0;
-
- startup : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.vectors))
- } > flash0
-
- .cfmprotect : ALIGN(4) SUBALIGN(4)
- {
- KEEP(*(.cfmconfig))
- } > flashcfg
-
- _text = .;
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- __init_array_start = .;
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- __init_array_end = .;
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- __fini_array_start = .;
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- __fini_array_end = .;
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- } > flash
-
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > flash
-
- .ARM.exidx : {
- __exidx_start = .;
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- __exidx_end = .;
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .textalign : ONLY_IF_RO
- {
- . = ALIGN(8);
- } > flash
-
- /* Legacy symbol, not used anywhere.*/
- . = ALIGN(4);
- PROVIDE(_etext = .);
-
- /* Special section for exceptions stack.*/
- .mstack :
- {
- . = ALIGN(8);
- __main_stack_base__ = .;
- . += __main_stack_size__;
- . = ALIGN(8);
- __main_stack_end__ = .;
- } > MAIN_STACK_RAM
-
- /* Special section for process stack.*/
- .pstack :
- {
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > PROCESS_STACK_RAM
-
- .data : ALIGN(4)
- {
- . = ALIGN(4);
- PROVIDE(_textdata = LOADADDR(.data));
- PROVIDE(_data = .);
- _textdata_start = LOADADDR(.data);
- _data_start = .;
- *(.data)
- *(.data.*)
- *(.ramtext)
- . = ALIGN(4);
- PROVIDE(_edata = .);
- _data_end = .;
- } > DATA_RAM AT > flash
-
- .bss (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- _bss_start = .;
- *(.bss)
- *(.bss.*)
- *(COMMON)
- . = ALIGN(4);
- _bss_end = .;
- PROVIDE(end = .);
- } > BSS_RAM
-
- .ram0_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_init_text__ = LOADADDR(.ram0_init);
- __ram0_init__ = .;
- *(.ram0_init)
- *(.ram0_init.*)
- . = ALIGN(4);
- } > ram0 AT > flash
-
- .ram0 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram0_clear__ = .;
- *(.ram0_clear)
- *(.ram0_clear.*)
- . = ALIGN(4);
- __ram0_noinit__ = .;
- *(.ram0)
- *(.ram0.*)
- . = ALIGN(4);
- __ram0_free__ = .;
- } > ram0
-
- .ram1_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_init_text__ = LOADADDR(.ram1_init);
- __ram1_init__ = .;
- *(.ram1_init)
- *(.ram1_init.*)
- . = ALIGN(4);
- } > ram1 AT > flash
-
- .ram1 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram1_clear__ = .;
- *(.ram1_clear)
- *(.ram1_clear.*)
- . = ALIGN(4);
- __ram1_noinit__ = .;
- *(.ram1)
- *(.ram1.*)
- . = ALIGN(4);
- __ram1_free__ = .;
- } > ram1
-
- .ram2_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_init_text__ = LOADADDR(.ram2_init);
- __ram2_init__ = .;
- *(.ram2_init)
- *(.ram2_init.*)
- . = ALIGN(4);
- } > ram2 AT > flash
-
- .ram2 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram2_clear__ = .;
- *(.ram2_clear)
- *(.ram2_clear.*)
- . = ALIGN(4);
- __ram2_noinit__ = .;
- *(.ram2)
- *(.ram2.*)
- . = ALIGN(4);
- __ram2_free__ = .;
- } > ram2
-
- .ram3_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_init_text__ = LOADADDR(.ram3_init);
- __ram3_init__ = .;
- *(.ram3_init)
- *(.ram3_init.*)
- . = ALIGN(4);
- } > ram3 AT > flash
-
- .ram3 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram3_clear__ = .;
- *(.ram3_clear)
- *(.ram3_clear.*)
- . = ALIGN(4);
- __ram3_noinit__ = .;
- *(.ram3)
- *(.ram3.*)
- . = ALIGN(4);
- __ram3_free__ = .;
- } > ram3
-
- .ram4_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_init_text__ = LOADADDR(.ram4_init);
- __ram4_init__ = .;
- *(.ram4_init)
- *(.ram4_init.*)
- . = ALIGN(4);
- } > ram4 AT > flash
-
- .ram4 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram4_clear__ = .;
- *(.ram4_clear)
- *(.ram4_clear.*)
- . = ALIGN(4);
- __ram4_noinit__ = .;
- *(.ram4)
- *(.ram4.*)
- . = ALIGN(4);
- __ram4_free__ = .;
- } > ram4
-
- .ram5_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_init_text__ = LOADADDR(.ram5_init);
- __ram5_init__ = .;
- *(.ram5_init)
- *(.ram5_init.*)
- . = ALIGN(4);
- } > ram5 AT > flash
-
- .ram5 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram5_clear__ = .;
- *(.ram5_clear)
- *(.ram5_clear.*)
- . = ALIGN(4);
- __ram5_noinit__ = .;
- *(.ram5)
- *(.ram5.*)
- . = ALIGN(4);
- __ram5_free__ = .;
- } > ram5
-
- .ram6_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_init_text__ = LOADADDR(.ram6_init);
- __ram6_init__ = .;
- *(.ram6_init)
- *(.ram6_init.*)
- . = ALIGN(4);
- } > ram6 AT > flash
-
- .ram6 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram6_clear__ = .;
- *(.ram6_clear)
- *(.ram6_clear.*)
- . = ALIGN(4);
- __ram6_noinit__ = .;
- *(.ram6)
- *(.ram6.*)
- . = ALIGN(4);
- __ram6_free__ = .;
- } > ram6
-
- .ram7_init : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_init_text__ = LOADADDR(.ram7_init);
- __ram7_init__ = .;
- *(.ram7_init)
- *(.ram7_init.*)
- . = ALIGN(4);
- } > ram7 AT > flash
-
- .ram7 (NOLOAD) : ALIGN(4)
- {
- . = ALIGN(4);
- __ram7_clear__ = .;
- *(.ram7_clear)
- *(.ram7_clear.*)
- . = ALIGN(4);
- __ram7_noinit__ = .;
- *(.ram7)
- *(.ram7.*)
- . = ALIGN(4);
- __ram7_free__ = .;
- } > ram7
-
- /* The default heap uses the (statically) unused part of a RAM section.*/
- .heap (NOLOAD) :
- {
- . = ALIGN(8);
- __heap_base__ = .;
- . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM);
- __heap_end__ = .;
- } > HEAP_RAM
-}
diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_k20x.mk
deleted file mode 100644
index b3d6e37..0000000
--- a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_k20x.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-# List of the ChibiOS generic K20x startup and CMSIS files.
-STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
- $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.s
-
-STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/devices/K20x \
- $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x \
- $(CHIBIOS)/os/common/ext/CMSIS/include
-
-STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/ld
diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
deleted file mode 100644
index 363cafe..0000000
--- a/os/common/ports/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-# List of the ChibiOS generic KL2x startup and CMSIS files.
-STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
- $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.s
-
-STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/devices/KL2x \
- $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/KL2x \
- $(CHIBIOS)/os/common/ext/CMSIS/include
-
-STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/ld
diff --git a/os/common/ports/ARMCMx/devices/K20x/cmparams.h b/os/common/ports/ARMCMx/devices/K20x/cmparams.h
deleted file mode 100644
index 8ee9abd..0000000
--- a/os/common/ports/ARMCMx/devices/K20x/cmparams.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file GCC/ARMCMx/MK20Dx/cmparams.h
- * @brief ARM Cortex-M4 parameters for the Kinetis MK20Dx.
- *
- * @defgroup ARMCMx_MK20Dx Kinetis MK20Dx Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M4 specific parameters for the
- * Kinetis MK20Dx platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL 4
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 4
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 48
-
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-/* Including the device CMSIS header. Note, we are not using the definitions
- from this header because we need this file to be usable also from
- assembler source files. We verify that the info matches instead.*/
-#include "mk20d5.h"
-
-#if CORTEX_MODEL != __CORTEX_M
-#error "CMSIS __CORTEX_M mismatch"
-#endif
-
-#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
-#error "CMSIS __NVIC_PRIO_BITS mismatch"
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */
diff --git a/os/common/ports/ARMCMx/devices/KL2x/cmparams.h b/os/common/ports/ARMCMx/devices/KL2x/cmparams.h
deleted file mode 100644
index dd89c75..0000000
--- a/os/common/ports/ARMCMx/devices/KL2x/cmparams.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file KL2x/cmparams.h
- * @brief ARM Cortex-M0+ parameters for the Kinetis KL2x family.
- *
- * @defgroup ARMCMx_KL2x Kinetis KL2x Specific Parameters
- * @ingroup ARMCMx_SPECIFIC
- * @details This file contains the Cortex-M0+ specific parameters for the
- * Kinetis KL2x platform.
- * @{
- */
-
-#ifndef _CMPARAMS_H_
-#define _CMPARAMS_H_
-
-/**
- * @brief Cortex core model.
- */
-#define CORTEX_MODEL 0
-
-/**
- * @brief Systick unit presence.
- */
-#define CORTEX_HAS_ST TRUE
-
-/**
- * @brief Floating Point unit presence.
- */
-#define CORTEX_HAS_FPU FALSE
-
-/**
- * @brief Number of bits in priority masks.
- */
-#define CORTEX_PRIORITY_BITS 2
-
-/**
- * @brief Number of interrupt vectors.
- * @note This number does not include the 16 system vectors and must be
- * rounded to a multiple of 8.
- */
-#define CORTEX_NUM_VECTORS 32
-
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-/* Including the device CMSIS header. Note, we are not using the definitions
- from this header because we need this file to be usable also from
- assembler source files. We verify that the info matches instead.*/
-#include "kl25z.h"
-
-#if CORTEX_MODEL != __CORTEX_M
-#error "CMSIS __CORTEX_M mismatch"
-#endif
-
-#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
-#error "CMSIS __NVIC_PRIO_BITS mismatch"
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-#endif /* _CMPARAMS_H_ */
-
-/** @} */