Merge branch 'master' into rng

Added haltest

Conflicts:
	os/hal/hal.mk
	os/hal/include/hal_community.h
	os/hal/src/hal_community.c

93 files changed, 26717 insertions, 24 deletions

diff --git a/os/hal/boards/NRF51-DK/board.c b/os/hal/boards/NRF51-DK/board.c
index e976e56..c5237d7 100644
--- a/os/hal/boards/NRF51-DK/board.c
+++ b/os/hal/boards/NRF51-DK/board.c
@@ -1,5 +1,6 @@
 /*
     Copyright (C) 2015 Fabio Utzig
+                  2016 Stéphane D'Alu / Bruno Remond
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -17,6 +18,14 @@
 #include "hal.h"
 
 #if HAL_USE_PAL || defined(__DOXYGEN__)
+
+/* RAM Banks
+ *  (Values are defined in Nordic gcc_startup_nrf51.s)
+ */
+#define NRF_POWER_RAMON_ADDRESS 0x40000524
+#define NRF_POWER_RAMONB_ADDRESS 0x40000554
+#define NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 0x3
+
 /**
  * @brief   PAL setup.
  * @details Digital I/O ports static configuration as defined in @p board.h.
@@ -68,6 +77,9 @@ const PALConfig pal_default_config =
  */
 void __early_init(void)
 {
+  /* Make sure ALL RAM banks are powered on */
+  *(uint32_t *)NRF_POWER_RAMON_ADDRESS  |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
+  *(uint32_t *)NRF_POWER_RAMONB_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
 }
 
 /**
diff --git a/os/hal/boards/NRF51-DK/board.h b/os/hal/boards/NRF51-DK/board.h
index 5e0c738..04c8daf 100644
--- a/os/hal/boards/NRF51-DK/board.h
+++ b/os/hal/boards/NRF51-DK/board.h
@@ -22,7 +22,8 @@
 #define BOARD_NAME              "nRF51 DK"
 
 /* Board oscillators-related settings. */
-#define XTAL_VALUE              16000000
+#define NRF51_XTAL_VALUE        16000000
+#define NRF51_LFCLK_SOURCE      1
 
 /* GPIO pins. */
 #define BTN1           17
diff --git a/os/hal/boards/NRF51-DK/board.mk b/os/hal/boards/NRF51-DK/board.mk
index 4d20da3..9619bd4 100644
--- a/os/hal/boards/NRF51-DK/board.mk
+++ b/os/hal/boards/NRF51-DK/board.mk
@@ -3,3 +3,9 @@ BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK/board.c
 
 # Required include directories
 BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK
+
+# Flash
+JLINK_DEVICE    = nrf51422
+JLINK_PRE_FLASH = w4 4001e504 1
+JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100
+
diff --git a/os/hal/boards/WVSHARE_BLE400/board.h b/os/hal/boards/WVSHARE_BLE400/board.h
index 57578b5..536b7f6 100644
--- a/os/hal/boards/WVSHARE_BLE400/board.h
+++ b/os/hal/boards/WVSHARE_BLE400/board.h
@@ -22,7 +22,7 @@
 #define BOARD_NAME              "WvShare BLE400"
 
 /* Board oscillators-related settings. */
-#define XTAL_VALUE              16000000
+#define NRF51_XTAL_VALUE        16000000
 
 /* GPIO pins. */
 #define KEY1           16
diff --git a/os/hal/hal.mk b/os/hal/hal.mk
index 8ac84dd..8dc09f7 100644
--- a/os/hal/hal.mk
+++ b/os/hal/hal.mk
@@ -5,6 +5,17 @@ HALSRC += ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \
           ${CHIBIOS_CONTRIB}/os/hal/src/onewire.c \

           ${CHIBIOS_CONTRIB}/os/hal/src/eicu.c \

           ${CHIBIOS_CONTRIB}/os/hal/src/crc.c \

-          ${CHIBIOS_CONTRIB}/os/hal/src/rng.c

+          ${CHIBIOS_CONTRIB}/os/hal/src/rng.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_debug.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_desciter.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_hub.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_msd.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_ftdi.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/usbh/usbh_uvc.c \

+	      ${CHIBIOS_CONTRIB}/os/hal/src/ee24xx.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/ee25xx.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/eeprom.c \

+          ${CHIBIOS_CONTRIB}/os/hal/src/timcap.c \

 

 HALINC += ${CHIBIOS_CONTRIB}/os/hal/include

diff --git a/os/hal/include/ee24xx.h b/os/hal/include/ee24xx.h
new file mode 100644
index 0000000..ab12fd1
--- /dev/null
+++ b/os/hal/include/ee24xx.h
@@ -0,0 +1,64 @@
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+#ifndef EE24XX_H
+#define EE24XX_H
+
+#include "hal.h"
+
+#if defined(HAL_USE_EEPROM) && HAL_USE_EEPROM && EEPROM_USE_EE24XX
+
+#define EEPROM_DEV_24XX 24
+
+/**
+ * @extends EepromFileConfig
+ */
+typedef struct {
+  _eeprom_file_config_data
+  /**
+   * Driver connected to IC.
+   */
+  I2CDriver     *i2cp;
+  /**
+   * Address of IC on I2C bus.
+   */
+  i2caddr_t     addr;
+  /**
+   * Pointer to write buffer. The safest size is (pagesize + 2)
+   */
+  uint8_t       *write_buf;
+} I2CEepromFileConfig;
+
+/**
+ * @brief   @p I2CEepromFileStream specific data.
+ */
+#define _eeprom_file_stream_data_i2c                                       \
+  _eeprom_file_stream_data
+
+/**
+ * @extends EepromFileStream
+ *
+ * @brief   EEPROM file stream driver class for I2C device.
+ */
+typedef struct {
+  const struct EepromFileStreamVMT *vmt;
+  _eeprom_file_stream_data_i2c
+  /* Overwritten parent data member. */
+  const I2CEepromFileConfig *cfg;
+} I2CEepromFileStream;
+
+
+/**
+ * Open I2C EEPROM IC as file and return pointer to the file stream object
+ * @note      Fucntion allways successfully open file. All checking makes
+ *            in read/write functions.
+ */
+#define I2CEepromFileOpen(efs, eepcfg, eepdev) \
+  EepromFileOpen((EepromFileStream *)efs, (EepromFileConfig *)eepcfg, eepdev);
+
+#endif /* #if defined(EEPROM_USE_EE24XX) && EEPROM_USE_EE24XX */
+
+#endif // EE24XX_H
diff --git a/os/hal/include/ee25xx.h b/os/hal/include/ee25xx.h
new file mode 100644
index 0000000..fc2ad6f
--- /dev/null
+++ b/os/hal/include/ee25xx.h
@@ -0,0 +1,63 @@
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+#ifndef EE25XX_H
+#define EE25XX_H
+
+#include "hal.h"
+
+#if defined(HAL_USE_EEPROM) && HAL_USE_EEPROM && EEPROM_USE_EE25XX
+
+#define EEPROM_DEV_25XX 25
+
+/**
+ * @extends EepromFileConfig
+ */
+typedef struct {
+  _eeprom_file_config_data
+  /**
+   * Driver connected to IC.
+   */
+  SPIDriver       *spip;
+  /**
+   * Config associated with SPI driver.
+   */
+  const SPIConfig *spicfg;
+} SPIEepromFileConfig;
+
+/**
+ * @brief   @p SPIEepromFileStream specific data.
+ */
+#define _eeprom_file_stream_data_spi                                       \
+  _eeprom_file_stream_data
+
+/**
+ * @extends EepromFileStream
+ *
+ * @brief   EEPROM file stream driver class for SPI device.
+ */
+typedef struct {
+  const struct EepromFileStreamVMT *vmt;
+  _eeprom_file_stream_data_spi
+  /* Overwritten parent data member. */
+  const SPIEepromFileConfig *cfg;
+} SPIEepromFileStream;
+
+/**
+ * Open SPI EEPROM IC as file and return pointer to the file stream object
+ * @note      Fucntion allways successfully open file. All checking makes
+ *            in read/write functions.
+ */
+EepromFileStream *SPIEepromFileOpen(SPIEepromFileStream *efs,
+                                    const SPIEepromFileConfig *eepcfg,
+                                    const EepromDevice *eepdev);
+
+#define SPIEepromFileOpen(efs, eepcfg, eepdev) \
+  EepromFileOpen((EepromFileStream *)efs, (EepromFileConfig *)eepcfg, eepdev);
+
+#endif /* #if defined(EEPROM_USE_EE25XX) && EEPROM_USE_EE25XX */
+
+#endif // EE25XX_H
diff --git a/os/hal/include/eeprom.h b/os/hal/include/eeprom.h
new file mode 100644
index 0000000..b0fd360
--- /dev/null
+++ b/os/hal/include/eeprom.h
@@ -0,0 +1,147 @@
+/*
+  Copyright (c) 2013 Timon Wong
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in all
+  copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+#ifndef __EEPROM_H__
+#define __EEPROM_H__
+
+#include "ch.h"
+#include "hal.h"
+
+#ifndef HAL_USE_EEPROM
+#define HAL_USE_EEPROM FALSE
+#endif
+
+#ifndef EEPROM_USE_EE25XX
+#define EEPROM_USE_EE25XX FALSE
+#endif
+
+#ifndef EEPROM_USE_EE24XX
+#define EEPROM_USE_EE24XX FALSE
+#endif
+
+#if HAL_USE_EEPROM
+
+#if EEPROM_USE_EE25XX && EEPROM_USE_EE24XX
+#define EEPROM_TABLE_SIZE 2
+#elif EEPROM_USE_EE25XX || EEPROM_USE_EE24XX
+#define EEPROM_TABLE_SIZE 1
+#else
+#error "No EEPROM device selected!"
+#endif
+
+#if EEPROM_USE_EE25XX && !HAL_USE_SPI
+#error "25xx enabled but SPI driver is disabled!"
+#endif
+
+#if EEPROM_USE_EE24XX && !HAL_USE_I2C
+#error "24xx enabled but I2C driver is disabled!"
+#endif
+
+#define _eeprom_file_config_data                                            \
+  /* Lower barrier of file in EEPROM memory array. */                       \
+  uint32_t        barrier_low;                                              \
+  /* Higher barrier of file in EEPROM memory array. */                      \
+  uint32_t        barrier_hi;                                               \
+  /* Size of memory array in bytes. */                                      \
+  uint32_t        size;                                                     \
+  /* Size of single page in bytes. */                                       \
+  uint16_t        pagesize;                                                 \
+  /* Time needed by IC for single byte/page writing. */                     \
+  systime_t       write_time;
+  
+typedef uint32_t fileoffset_t;
+
+typedef struct {
+  _eeprom_file_config_data
+} EepromFileConfig;
+
+/**
+ * @brief   @p EepromFileStream specific data.
+ */
+#define _eeprom_file_stream_data                                            \
+  _base_sequential_stream_data                                                    \
+  uint32_t                    errors;                                       \
+  uint32_t                    position;                                     \
+
+/**
+ * @extends BaseFileStreamVMT
+ *
+ * @brief   @p EepromFileStream virtual methods table.
+ */
+struct EepromFileStreamVMT {
+  _file_stream_methods
+};
+
+/**
+ * @extends BaseFileStream
+ *
+ * @brief   EEPROM file stream driver class.
+ * @details This class extends @p BaseFileStream by adding some fields.
+ */
+typedef struct {
+  /** @brief Virtual Methods Table.*/
+  const struct EepromFileStreamVMT *vmt;
+  _eeprom_file_stream_data
+  /** pointer to config object, must be overwritten by all derived classes.*/
+  const EepromFileConfig *cfg;
+} EepromFileStream;
+
+/**
+ * @brief   Low level device descriptor.
+ */
+typedef struct {
+  const uint8_t                       id;
+  const struct EepromFileStreamVMT   *efsvmt;
+} EepromDevice;
+
+const EepromDevice *EepromFindDevice(uint8_t id);
+
+EepromFileStream *EepromFileOpen(EepromFileStream *efs,
+                                 const EepromFileConfig *eepcfg,
+                                 const EepromDevice *eepdev);
+
+uint8_t  EepromReadByte(EepromFileStream *efs);
+uint16_t EepromReadHalfword(EepromFileStream *efs);
+uint32_t EepromReadWord(EepromFileStream *efs);
+size_t EepromWriteByte(EepromFileStream *efs, uint8_t data);
+size_t EepromWriteHalfword(EepromFileStream *efs, uint16_t data);
+size_t EepromWriteWord(EepromFileStream *efs, uint32_t data);
+
+msg_t eepfs_getsize(void *ip);
+msg_t eepfs_getposition(void *ip);
+msg_t eepfs_lseek(void *ip, fileoffset_t offset);
+msg_t eepfs_close(void *ip);
+msg_t eepfs_geterror(void *ip);
+msg_t eepfs_put(void *ip, uint8_t b);
+msg_t eepfs_get(void *ip);
+
+#include "ee24xx.h"
+#include "ee25xx.h"
+
+#endif /* #if defined(HAL_USE_EEPROM) && HAL_USE_EEPROM */
+#endif /* __EEPROM_H__ */
diff --git a/os/hal/include/hal_community.h b/os/hal/include/hal_community.h
index d11e4c9..144e495 100644
--- a/os/hal/include/hal_community.h
+++ b/os/hal/include/hal_community.h
@@ -33,10 +33,13 @@
 #include "nand.h"

 #include "eicu.h"

 #include "rng.h"

+#include "usbh.h"

+#include "timcap.h"

 

 /* Complex drivers.*/

 #include "onewire.h"

 #include "crc.h"

+#include "eeprom.h"

 

 /*===========================================================================*/

 /* Driver constants.                                                         */

diff --git a/os/hal/include/timcap.h b/os/hal/include/timcap.h
new file mode 100644
index 0000000..a848783
--- /dev/null
+++ b/os/hal/include/timcap.h
@@ -0,0 +1,210 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+                 2011,2012,2013 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    timcap.h
+ * @brief   TIMCAP Driver macros and structures.
+ *
+ * @addtogroup TIMCAP
+ * @{
+ */
+
+#ifndef _TIMCAP_H_
+#define _TIMCAP_H_
+
+#include "ch.h"
+#include "hal.h"
+
+#ifndef HAL_USE_TIMCAP
+#define HAL_USE_TIMCAP FALSE
+#endif
+
+#if HAL_USE_TIMCAP || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Driver state machine possible states.
+ */
+typedef enum {
+  TIMCAP_UNINIT = 0,                   /**< Not initialized.                   */
+  TIMCAP_STOP = 1,                     /**< Stopped.                           */
+  TIMCAP_READY = 2,                    /**< Ready.                             */
+  TIMCAP_WAITING = 3,                  /**< Waiting first edge.                */
+  TIMCAP_ACTIVE = 4,                   /**< Active cycle phase.                */
+  TIMCAP_IDLE = 5,                     /**< Idle cycle phase.                  */
+} timcapstate_t;
+
+/**
+ * @brief   Type of a structure representing an TIMCAP driver.
+ */
+typedef struct TIMCAPDriver TIMCAPDriver;
+
+
+/**
+ * @brief   TIMCAP notification callback type.
+ *
+ * @param[in] timcapp      pointer to a @p TIMCAPDriver object
+ */
+typedef void (*timcapcallback_t)(TIMCAPDriver *timcapp);
+
+#include "timcap_lld.h"
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+/**
+ * @name    Macro Functions
+ * @{
+ */
+/**
+ * @brief   Enables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @iclass
+ */
+#define timcapEnableI(timcapp) timcap_lld_enable(timcapp)
+
+/**
+ * @brief   Disables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @iclass
+ */
+#define timcapDisableI(timcapp) timcap_lld_disable(timcapp)
+
+
+
+
+/** @} */
+
+/**
+ * @name    Low Level driver helper macros
+ * @{
+ */
+
+
+/**
+ * @brief   Common ISR code, TIMCAP channel 1 event.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+#define _timcap_isr_invoke_channel1_cb(timcapp) {                                   \
+  timcapstate_t previous_state = (timcapp)->state;                                \
+  (timcapp)->state = TIMCAP_ACTIVE;                                               \
+  if (previous_state != TIMCAP_WAITING)                                        \
+    (timcapp)->config->capture_cb_array[0](timcapp);                                        \
+}
+
+/**
+ * @brief   Common ISR code, TIMCAP channel 2 event.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+#define _timcap_isr_invoke_channel2_cb(timcapp) {                                   \
+  timcapstate_t previous_state = (timcapp)->state;                                \
+  (timcapp)->state = TIMCAP_ACTIVE;                                               \
+  if (previous_state != TIMCAP_WAITING)                                        \
+    (timcapp)->config->capture_cb_array[1](timcapp);                                        \
+}
+
+/**
+ * @brief   Common ISR code, TIMCAP channel 3 event.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+#define _timcap_isr_invoke_channel3_cb(timcapp) {                                   \
+  timcapstate_t previous_state = (timcapp)->state;                                \
+  (timcapp)->state = TIMCAP_ACTIVE;                                               \
+  if (previous_state != TIMCAP_WAITING)                                        \
+    (timcapp)->config->capture_cb_array[2](timcapp);                                        \
+}
+
+/**
+ * @brief   Common ISR code, TIMCAP channel 4 event.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+#define _timcap_isr_invoke_channel4_cb(timcapp) {                                   \
+  timcapstate_t previous_state = (timcapp)->state;                                \
+  (timcapp)->state = TIMCAP_ACTIVE;                                               \
+  if (previous_state != TIMCAP_WAITING)                                        \
+    (timcapp)->config->capture_cb_array[3](timcapp);                                        \
+}
+
+/**
+ * @brief   Common ISR code, TIMCAP timer overflow event.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+#define _timcap_isr_invoke_overflow_cb(timcapp) {                                 \
+  (timcapp)->config->overflow_cb(timcapp);                                        \
+}
+/** @} */
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void timcapInit(void);
+  void timcapObjectInit(TIMCAPDriver *timcapp);
+  void timcapStart(TIMCAPDriver *timcapp, const TIMCAPConfig *config);
+  void timcapStop(TIMCAPDriver *timcapp);
+  void timcapEnable(TIMCAPDriver *timcapp);
+  void timcapDisable(TIMCAPDriver *timcapp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_TIMCAP */
+
+#endif /* _TIMCAP_H_ */
+
+/** @} */
diff --git a/os/hal/include/usbh.h b/os/hal/include/usbh.h
new file mode 100644
index 0000000..2f8f3dd
--- /dev/null
+++ b/os/hal/include/usbh.h
@@ -0,0 +1,439 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_H_

+#define USBH_H_

+

+#include "hal.h"

+

+#ifndef HAL_USE_USBH

+#define HAL_USE_USBH FALSE

+#endif

+

+#ifndef HAL_USBH_USE_FTDI

+#define HAL_USBH_USE_FTDI FALSE

+#endif

+

+#ifndef HAL_USBH_USE_HUB

+#define HAL_USBH_USE_HUB FALSE

+#endif

+

+#ifndef HAL_USBH_USE_MSD

+#define HAL_USBH_USE_MSD FALSE

+#endif

+

+#ifndef HAL_USBH_USE_UVC

+#define HAL_USBH_USE_UVC FALSE

+#endif

+

+#if HAL_USE_USBH

+

+#include "osal.h"

+#include "usbh/list.h"

+#include "usbh/defs.h"

+

+/* TODO:

+ *

+ * - Integrate VBUS power switching functionality to the API.

+ *

+ */

+

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+#if !HAL_USBH_USE_HUB

+#define USBH_MAX_ADDRESSES				1

+#else

+#define USBH_MAX_ADDRESSES				(HAL_USBHHUB_MAX_PORTS + 1)

+#endif

+

+enum usbh_status {

+	USBH_STATUS_STOPPED = 0,

+	USBH_STATUS_STARTED,

+	USBH_STATUS_SUSPENDED,

+};

+

+enum usbh_devstatus {

+	USBH_DEVSTATUS_DISCONNECTED = 0,

+	USBH_DEVSTATUS_ATTACHED,

+	USBH_DEVSTATUS_CONNECTED,

+	USBH_DEVSTATUS_DEFAULT,

+	USBH_DEVSTATUS_ADDRESS,

+	USBH_DEVSTATUS_CONFIGURED,

+};

+

+enum usbh_devspeed {

+	USBH_DEVSPEED_LOW = 0,

+	USBH_DEVSPEED_FULL,

+	USBH_DEVSPEED_HIGH,

+};

+

+enum usbh_epdir {

+	USBH_EPDIR_IN		= 0x80,

+	USBH_EPDIR_OUT		= 0

+};

+

+enum usbh_eptype {

+	USBH_EPTYPE_CTRL	= 0,

+	USBH_EPTYPE_ISO		= 1,

+	USBH_EPTYPE_BULK	= 2,

+	USBH_EPTYPE_INT		= 3,

+};

+

+enum usbh_epstatus {

+	USBH_EPSTATUS_UNINITIALIZED = 0,

+	USBH_EPSTATUS_CLOSED,

+	USBH_EPSTATUS_OPEN,

+	USBH_EPSTATUS_HALTED,

+};

+

+enum usbh_urbstatus {

+	USBH_URBSTATUS_UNINITIALIZED = 0,

+	USBH_URBSTATUS_INITIALIZED,

+	USBH_URBSTATUS_PENDING,

+//	USBH_URBSTATUS_QUEUED,

+	USBH_URBSTATUS_ERROR,

+	USBH_URBSTATUS_TIMEOUT,

+	USBH_URBSTATUS_CANCELLED,

+	USBH_URBSTATUS_STALL,

+	USBH_URBSTATUS_DISCONNECTED,

+//	USBH_URBSTATUS_EPCLOSED,

+	USBH_URBSTATUS_OK,

+};

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/* forward declarations */

+typedef struct USBHDriver USBHDriver;

+typedef struct usbh_port usbh_port_t;

+typedef	struct usbh_device usbh_device_t;

+typedef struct usbh_ep usbh_ep_t;

+typedef struct usbh_urb usbh_urb_t;

+typedef struct usbh_baseclassdriver usbh_baseclassdriver_t;

+typedef struct usbh_classdriverinfo usbh_classdriverinfo_t;

+#if HAL_USBH_USE_HUB

+typedef struct USBHHubDriver USBHHubDriver;

+#endif

+

+/* typedefs */

+typedef enum usbh_status usbh_status_t;

+typedef enum usbh_devspeed usbh_devspeed_t;

+typedef enum usbh_devstatus usbh_devstatus_t;

+typedef enum usbh_epdir usbh_epdir_t;

+typedef enum usbh_eptype usbh_eptype_t;

+typedef enum usbh_epstatus usbh_epstatus_t;

+typedef enum usbh_urbstatus usbh_urbstatus_t;

+typedef uint16_t usbh_portstatus_t;

+typedef uint16_t usbh_portcstatus_t;

+typedef void (*usbh_completion_cb)(usbh_urb_t *);

+

+/* include the low level driver; the required definitions are above */

+#include "usbh_lld.h"

+

+#define USBH_DEFINE_BUFFER(type, name)	USBH_LLD_DEFINE_BUFFER(type, name)

+

+struct usbh_urb {

+	usbh_ep_t *ep;

+

+	void *userData;

+	usbh_completion_cb callback;

+

+	const void *setup_buff;

+	void *buff;

+	uint32_t requestedLength;

+	uint32_t actualLength;

+

+	usbh_urbstatus_t status;

+

+	thread_reference_t waitingThread;

+	thread_reference_t abortingThread;

+

+	/* Low level part */

+	_usbh_urb_ll_data

+};

+

+struct usbh_ep {

+	usbh_device_t		*device;

+	usbh_ep_t	 		*next;

+

+	usbh_epstatus_t		status;

+	uint8_t 			address;

+	bool				in;

+	usbh_eptype_t		type;

+	uint16_t			wMaxPacketSize;

+	uint8_t				bInterval;

+

+	/* debug */

+	const char			*name;

+

+	/* Low-level part */

+	_usbh_ep_ll_data

+};

+

+struct usbh_device {

+	USBHDriver *host;	/* shortcut to host */

+

+	usbh_ep_t ctrl;

+	usbh_ep_t *endpoints;

+

+	usbh_baseclassdriver_t *drivers;

+

+	uint16_t langID0;

+

+	usbh_devstatus_t status;

+	usbh_devspeed_t speed;

+

+	USBH_DEFINE_BUFFER(usbh_device_descriptor_t, devDesc);

+	unsigned char align_bytes[2];

+	USBH_DEFINE_BUFFER(usbh_config_descriptor_t, basicConfigDesc);

+

+	uint8_t *fullConfigurationDescriptor;

+	uint8_t keepFullCfgDesc;

+

+	uint8_t address;

+	uint8_t bConfiguration;

+

+	/* Low level part */

+	_usbh_device_ll_data

+};

+

+

+struct usbh_port {

+#if HAL_USBH_USE_HUB

+	USBHHubDriver *hub;

+#endif

+

+	usbh_portstatus_t status;

+	usbh_portcstatus_t c_status;

+

+	usbh_port_t *next;

+

+	uint8_t number;

+

+	usbh_device_t device;

+

+	/* Low level part */

+	_usbh_port_ll_data

+};

+

+struct USBHDriver {

+	usbh_status_t status;

+	uint8_t address_bitmap[(USBH_MAX_ADDRESSES + 7) / 8];

+

+	usbh_port_t rootport;

+

+#if HAL_USBH_USE_HUB

+	struct list_head hubs;

+#endif

+

+	/* Low level part */

+	_usbhdriver_ll_data

+

+#if USBH_DEBUG_ENABLE

+	/* debug */

+	uint8_t dbg_buff[USBH_DEBUG_BUFFER];

+	THD_WORKING_AREA(waDebug, 512);

+	input_queue_t iq;

+#endif

+};

+

+

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#if STM32_USBH_USE_OTG1

+extern USBHDriver USBHD1;

+#endif

+

+#if STM32_USBH_USE_OTG2

+extern USBHDriver USBHD2;

+#endif

+

+

+/*===========================================================================*/

+/* Main driver API.		                                                     */

+/*===========================================================================*/

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+

+	/* Main functions */

+	void usbhObjectInit(USBHDriver *usbh);

+	void usbhInit(void);

+	void usbhStart(USBHDriver *usbh);

+	void usbhStop(USBHDriver *usbh);

+	void usbhSuspend(USBHDriver *usbh);

+	void usbhResume(USBHDriver *usbh);

+

+	/* Device-related */

+#if	USBH_DEBUG_ENABLE && USBH_DEBUG_ENABLE_INFO

+	void usbhDevicePrintInfo(usbh_device_t *dev);

+	void usbhDevicePrintConfiguration(const uint8_t *descriptor, uint16_t rem);

+#else

+#	define usbhDevicePrintInfo(dev) do {} while(0)

+#	define usbhDevicePrintConfiguration(descriptor, rem) do {} while(0)

+#endif

+	bool usbhDeviceReadString(usbh_device_t *dev, char *dest, uint8_t size,

+			uint8_t index, uint16_t langID);

+	static inline usbh_port_t *usbhDeviceGetPort(usbh_device_t *dev) {

+		return container_of(dev, usbh_port_t, device);

+	}

+

+	/* Synchronous API */

+	usbh_urbstatus_t usbhBulkTransfer(usbh_ep_t *ep,

+			void *data,

+			uint32_t len,

+			uint32_t *actual_len,

+			systime_t timeout);

+	usbh_urbstatus_t usbhControlRequest(usbh_device_t *dev,

+			uint8_t bmRequestType,

+			uint8_t bRequest,

+			uint16_t wValue,

+			uint16_t wIndex,

+			uint16_t wLength,

+			uint8_t *buff);

+	usbh_urbstatus_t usbhControlRequestExtended(usbh_device_t *dev,

+			const usbh_control_request_t *req,

+			uint8_t *buff,

+			uint32_t *actual_len,

+			systime_t timeout);

+

+	/* Standard request helpers */

+	bool usbhStdReqGetDeviceDescriptor(usbh_device_t *dev,

+			uint16_t wLength,

+			uint8_t *buf);

+	bool usbhStdReqGetConfigurationDescriptor(usbh_device_t *dev,

+			uint8_t index,

+			uint16_t wLength,

+			uint8_t *buf);

+	bool usbhStdReqGetStringDescriptor(usbh_device_t *dev,

+			uint8_t index,

+			uint16_t langID,

+			uint16_t wLength,

+			uint8_t *buf);

+	bool usbhStdReqSetInterface(usbh_device_t *dev,

+			uint8_t bInterfaceNumber,

+			uint8_t bAlternateSetting);

+	bool usbhStdReqGetInterface(usbh_device_t *dev,

+			uint8_t bInterfaceNumber,

+			uint8_t *bAlternateSetting);

+

+	/* Endpoint/pipe management */

+	void usbhEPObjectInit(usbh_ep_t *ep, usbh_device_t *dev, const usbh_endpoint_descriptor_t *desc);

+	static inline void usbhEPOpen(usbh_ep_t *ep) {

+		osalDbgCheck(ep != 0);

+		osalSysLock();

+		osalDbgAssert(ep->status == USBH_EPSTATUS_CLOSED, "invalid state");

+		usbh_lld_ep_open(ep);

+		ep->next = ep->device->endpoints;

+		ep->device->endpoints = ep;

+		osalSysUnlock();

+	}

+	static inline void usbhEPCloseS(usbh_ep_t *ep) {

+		osalDbgCheck(ep != 0);

+		osalDbgCheckClassS();

+		osalDbgAssert(ep->status != USBH_EPSTATUS_UNINITIALIZED, "invalid state");

+		if (ep->status == USBH_EPSTATUS_CLOSED) {

+			osalOsRescheduleS();

+			return;

+		}

+		usbh_lld_ep_close(ep);

+	}

+	static inline void usbhEPClose(usbh_ep_t *ep) {

+		osalSysLock();

+		usbhEPCloseS(ep);

+		osalSysUnlock();

+	}

+	static inline void usbhEPResetI(usbh_ep_t *ep) {

+		osalDbgCheckClassI();

+		osalDbgCheck(ep != NULL);

+		usbh_lld_epreset(ep);

+	}

+	static inline bool usbhEPIsPeriodic(usbh_ep_t *ep) {

+		osalDbgCheck(ep != NULL);

+		return (ep->type & 1) != 0;

+	}

+	static inline bool usbhURBIsBusy(usbh_urb_t *urb) {

+		osalDbgCheck(urb != NULL);

+		return (urb->status == USBH_URBSTATUS_PENDING);

+	}

+	static inline void usbhEPSetName(usbh_ep_t *ep, const char *name) {

+		ep->name = name;

+	}

+

+	/* URB management */

+	void usbhURBObjectInit(usbh_urb_t *urb, usbh_ep_t *ep, usbh_completion_cb callback,

+			void *user, void *buff, uint32_t len);

+	void usbhURBObjectResetI(usbh_urb_t *urb);

+	void usbhURBSubmitI(usbh_urb_t *urb);

+	bool usbhURBCancelI(usbh_urb_t *urb);

+	msg_t usbhURBSubmitAndWaitS(usbh_urb_t *urb, systime_t timeout);

+	void usbhURBCancelAndWaitS(usbh_urb_t *urb);

+	msg_t usbhURBWaitTimeoutS(usbh_urb_t *urb, systime_t timeout);

+

+	/* Main loop */

+	void usbhMainLoop(USBHDriver *usbh);

+

+#ifdef __cplusplus

+}

+#endif

+

+

+/*===========================================================================*/

+/* Class driver definitions and API.                                         */

+/*===========================================================================*/

+

+typedef struct usbh_classdriver_vmt usbh_classdriver_vmt_t;

+struct usbh_classdriver_vmt {

+	usbh_baseclassdriver_t *(*load)(usbh_device_t *dev,	const uint8_t *descriptor, uint16_t rem);

+	void (*unload)(usbh_baseclassdriver_t *drv);

+};

+

+struct usbh_classdriverinfo {

+	int16_t class;

+	int16_t subclass;

+	int16_t protocol;

+	const char *name;

+	const usbh_classdriver_vmt_t *vmt;

+};

+

+#define _usbh_base_classdriver_data		\

+	const usbh_classdriverinfo_t *info;	\

+	usbh_device_t *dev;					\

+	usbh_baseclassdriver_t *next;

+

+struct usbh_baseclassdriver {

+	_usbh_base_classdriver_data

+};

+

+

+/*===========================================================================*/

+/* Helper functions.				                                         */

+/*===========================================================================*/

+#include <usbh/desciter.h>	/* descriptor iterators */

+#include <usbh/debug.h>		/* debug */

+

+#endif

+

+#endif /* USBH_H_ */

diff --git a/os/hal/include/usbh/debug.h b/os/hal/include/usbh/debug.h
new file mode 100644
index 0000000..219eeb1
--- /dev/null
+++ b/os/hal/include/usbh/debug.h
@@ -0,0 +1,44 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+

+#ifndef USBH_DEBUG_H_

+#define USBH_DEBUG_H_

+

+#include "usbh.h"

+

+#if HAL_USE_USBH

+

+//TODO: Debug is only for USBHD1, make it generic.

+

+#if USBH_DEBUG_ENABLE

+	void usbDbgPrintf(const char *fmt, ...);

+	void usbDbgPuts(const char *s);

+	void usbDbgInit(USBHDriver *host);

+	void usbDbgReset(void);

+	void usbDbgSystemHalted(void);

+#else

+#define usbDbgPrintf(fmt, ...) do {} while(0)

+#define usbDbgPuts(s) do {} while(0)

+#define usbDbgInit(host) do {} while(0)

+#define usbDbgReset() do {} while(0)

+#define usbDbgSystemHalted() do {} while(0)

+#endif

+

+#endif

+

+#endif /* USBH_DEBUG_H_ */

diff --git a/os/hal/include/usbh/defs.h b/os/hal/include/usbh/defs.h
new file mode 100644
index 0000000..c3d8a9a
--- /dev/null
+++ b/os/hal/include/usbh/defs.h
@@ -0,0 +1,160 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_DEFS_H_

+#define USBH_DEFS_H_

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "osal.h"

+

+#ifdef __IAR_SYSTEMS_ICC__

+#define PACKED_STRUCT typedef PACKED_VAR struct

+#else

+#define PACKED_STRUCT typedef struct PACKED_VAR

+#endif

+

+PACKED_STRUCT {

+	uint8_t  bLength;

+	uint8_t  bDescriptorType;

+	uint16_t bcdUSB;

+	uint8_t  bDeviceClass;

+	uint8_t  bDeviceSubClass;

+	uint8_t  bDeviceProtocol;

+	uint8_t  bMaxPacketSize0;

+	uint16_t idVendor;

+	uint16_t idProduct;

+	uint16_t bcdDevice;

+	uint8_t  iManufacturer;

+	uint8_t  iProduct;

+	uint8_t  iSerialNumber;

+	uint8_t  bNumConfigurations;

+} usbh_device_descriptor_t;

+#define USBH_DT_DEVICE                   0x01

+#define USBH_DT_DEVICE_SIZE              18

+

+PACKED_STRUCT {

+	uint8_t  bLength;

+	uint8_t  bDescriptorType;

+	uint16_t wTotalLength;

+	uint8_t  bNumInterfaces;

+	uint8_t  bConfigurationValue;

+	uint8_t  iConfiguration;

+	uint8_t  bmAttributes;

+	uint8_t  bMaxPower;

+} usbh_config_descriptor_t;

+#define USBH_DT_CONFIG                   0x02

+#define USBH_DT_CONFIG_SIZE              9

+

+PACKED_STRUCT {

+	uint8_t  bLength;

+	uint8_t  bDescriptorType;

+	uint16_t wData[1];

+} usbh_string_descriptor_t;

+#define USBH_DT_STRING                   0x03

+#define USBH_DT_STRING_SIZE              2

+

+PACKED_STRUCT {

+	uint8_t  bLength;

+	uint8_t  bDescriptorType;

+	uint8_t  bInterfaceNumber;

+	uint8_t  bAlternateSetting;

+	uint8_t  bNumEndpoints;

+	uint8_t  bInterfaceClass;

+	uint8_t  bInterfaceSubClass;

+	uint8_t  bInterfaceProtocol;

+	uint8_t  iInterface;

+} usbh_interface_descriptor_t;

+#define USBH_DT_INTERFACE                0x04

+#define USBH_DT_INTERFACE_SIZE           9

+

+PACKED_STRUCT {

+	uint8_t	bLength;

+	uint8_t	bDescriptorType;

+	uint8_t	bEndpointAddress;

+	uint8_t	bmAttributes;

+	uint16_t wMaxPacketSize;

+	uint8_t	bInterval;

+} usbh_endpoint_descriptor_t;

+#define USBH_DT_ENDPOINT                 0x05

+#define USBH_DT_ENDPOINT_SIZE            7

+

+PACKED_STRUCT {

+	uint8_t  bLength;

+	uint8_t  bDescriptorType;

+	uint8_t  bFirstInterface;

+	uint8_t  bInterfaceCount;

+	uint8_t  bFunctionClass;

+	uint8_t  bFunctionSubClass;

+	uint8_t  bFunctionProtocol;

+	uint8_t  iFunction;

+} usbh_ia_descriptor_t;

+#define USBH_DT_INTERFACE_ASSOCIATION    	0x0b

+#define USBH_DT_INTERFACE_ASSOCIATION_SIZE	8

+

+PACKED_STRUCT {

+	uint8_t  bDescLength;

+	uint8_t  bDescriptorType;

+	uint8_t  bNbrPorts;

+	uint16_t wHubCharacteristics;

+	uint8_t  bPwrOn2PwrGood;

+	uint8_t  bHubContrCurrent;

+	uint32_t DeviceRemovable;

+} usbh_hub_descriptor_t;

+#define USBH_DT_HUB				    	0x29

+#define USBH_DT_HUB_SIZE		    	(7 + 4)

+

+PACKED_STRUCT {

+	uint8_t  bmRequestType;

+	uint8_t  bRequest;

+	uint16_t wValue;

+	uint16_t wIndex;

+	uint16_t wLength;

+} usbh_control_request_t;

+

+

+#define USBH_REQ_GET_STATUS              0x00

+#define USBH_REQ_CLEAR_FEATURE           0x01

+#define USBH_REQ_SET_FEATURE             0x03

+#define USBH_REQ_SET_ADDRESS             0x05

+#define USBH_REQ_GET_DESCRIPTOR          0x06

+#define USBH_REQ_SET_DESCRIPTOR          0x07

+#define USBH_REQ_GET_CONFIGURATION       0x08

+#define USBH_REQ_SET_CONFIGURATION       0x09

+#define USBH_REQ_GET_INTERFACE           0x0A

+#define USBH_REQ_SET_INTERFACE           0x0B

+#define USBH_REQ_SYNCH_FRAME             0x0C

+

+

+#define USBH_REQTYPE_IN					0x80

+#define USBH_REQTYPE_OUT				0x00

+

+#define USBH_REQTYPE_STANDARD			0x00

+#define USBH_REQTYPE_CLASS				0x20

+#define USBH_REQTYPE_VENDOR				0x40

+

+#define USBH_REQTYPE_DEVICE				0x00

+#define USBH_REQTYPE_INTERFACE			0x01

+#define USBH_REQTYPE_ENDPOINT			0x02

+#define USBH_REQTYPE_OTHER				0x03

+

+#endif

+

+

+#endif /* USBH_DEFS_H_ */

diff --git a/os/hal/include/usbh/desciter.h b/os/hal/include/usbh/desciter.h
new file mode 100644
index 0000000..52b0c98
--- /dev/null
+++ b/os/hal/include/usbh/desciter.h
@@ -0,0 +1,63 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+

+#ifndef USBH_DESCITER_H_

+#define USBH_DESCITER_H_

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "usbh/defs.h"

+

+

+/* DESCRIPTOR PARSING */

+#define _generic_iterator_fields \

+	const uint8_t *curr;	\

+	uint16_t rem;	\

+	bool valid;

+

+typedef struct {

+	_generic_iterator_fields

+} generic_iterator_t;

+

+typedef struct {

+	_generic_iterator_fields

+	const usbh_ia_descriptor_t *iad;

+} if_iterator_t;

+

+void cfg_iter_init(generic_iterator_t *icfg, const uint8_t *buff, uint16_t rem);

+void if_iter_init(if_iterator_t *iif, const generic_iterator_t *icfg);

+void ep_iter_init(generic_iterator_t *iep, const if_iterator_t *iif);

+void cs_iter_init(generic_iterator_t *ics, const generic_iterator_t *iter);

+void if_iter_next(if_iterator_t *iif);

+void ep_iter_next(generic_iterator_t *iep);

+void cs_iter_next(generic_iterator_t *ics);

+static inline const usbh_config_descriptor_t *cfg_get(generic_iterator_t *icfg) {

+	return (const usbh_config_descriptor_t *)icfg->curr;

+}

+static inline const usbh_interface_descriptor_t *if_get(if_iterator_t *iif) {

+	return (const usbh_interface_descriptor_t *)iif->curr;

+}

+static inline const usbh_endpoint_descriptor_t *ep_get(generic_iterator_t *iep) {

+	return (const usbh_endpoint_descriptor_t *)iep->curr;

+}

+

+#endif

+

+#endif /* USBH_DESCITER_H_ */

diff --git a/os/hal/include/usbh/dev/ftdi.h b/os/hal/include/usbh/dev/ftdi.h
new file mode 100644
index 0000000..678a521
--- /dev/null
+++ b/os/hal/include/usbh/dev/ftdi.h
@@ -0,0 +1,154 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_FTDI_H_

+#define USBH_FTDI_H_

+

+#include "usbh.h"

+

+#if HAL_USE_USBH && HAL_USBH_USE_FTDI

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+#define USBHFTDI_FRAMING_DATABITS_7    (0x7 << 0)

+#define USBHFTDI_FRAMING_DATABITS_8    (0x8 << 0)

+#define USBHFTDI_FRAMING_PARITY_NONE   (0x0 << 8)

+#define USBHFTDI_FRAMING_PARITY_NONE   (0x0 << 8)

+#define USBHFTDI_FRAMING_PARITY_ODD    (0x1 << 8)

+#define USBHFTDI_FRAMING_PARITY_EVEN   (0x2 << 8)

+#define USBHFTDI_FRAMING_PARITY_MARK   (0x3 << 8)

+#define USBHFTDI_FRAMING_PARITY_SPACE  (0x4 << 8)

+#define USBHFTDI_FRAMING_STOP_BITS_1   (0x0 << 11)

+#define USBHFTDI_FRAMING_STOP_BITS_15  (0x1 << 11)

+#define USBHFTDI_FRAMING_STOP_BITS_2   (0x2 << 11)

+

+#define USBHFTDI_HANDSHAKE_NONE 		(0x0)

+#define USBHFTDI_HANDSHAKE_RTS_CTS 		(0x1)

+#define USBHFTDI_HANDSHAKE_DTR_DSR 		(0x2)

+#define USBHFTDI_HANDSHAKE_XON_XOFF		(0x4)

+

+

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+typedef struct {

+  uint32_t  speed;

+  uint16_t  framing;

+  uint8_t   handshake;

+  uint8_t   xon_character;

+  uint8_t	xoff_character;

+} USBHFTDIPortConfig;

+

+typedef enum {

+	USBHFTDI_TYPE_A,

+	USBHFTDI_TYPE_B,

+	USBHFTDI_TYPE_H,

+} usbhftdi_type_t;

+

+typedef enum {

+	USBHFTDIP_STATE_UNINIT = 0,

+	USBHFTDIP_STATE_STOP = 1,

+	USBHFTDIP_STATE_ACTIVE = 2,

+	USBHFTDIP_STATE_READY = 3

+} usbhftdip_state_t;

+

+

+#define _ftdi_port_driver_methods                                          \

+  _base_asynchronous_channel_methods

+

+struct FTDIPortDriverVMT {

+	_ftdi_port_driver_methods

+};

+

+typedef struct USBHFTDIPortDriver USBHFTDIPortDriver;

+typedef struct USBHFTDIDriver USBHFTDIDriver;

+

+struct USBHFTDIPortDriver {

+	/* inherited from abstract asyncrhonous channel driver */

+	const struct FTDIPortDriverVMT *vmt;

+	_base_asynchronous_channel_data

+

+	USBHFTDIDriver *ftdip;

+

+	usbhftdip_state_t state;

+

+	usbh_ep_t epin;

+	usbh_urb_t iq_urb;

+	threads_queue_t	iq_waiting;

+	uint32_t iq_counter;

+	USBH_DEFINE_BUFFER(uint8_t, iq_buff[64]);

+	uint8_t *iq_ptr;

+

+

+	usbh_ep_t epout;

+	usbh_urb_t oq_urb;

+	threads_queue_t	oq_waiting;

+	uint32_t oq_counter;

+	USBH_DEFINE_BUFFER(uint8_t, oq_buff[64]);

+	uint8_t *oq_ptr;

+

+	virtual_timer_t vt;

+	uint8_t ifnum;

+

+	USBHFTDIPortDriver *next;

+};

+

+typedef struct USBHFTDIDriver {

+	/* inherited from abstract class driver */

+	_usbh_base_classdriver_data

+

+	usbhftdi_type_t type;

+	USBHFTDIPortDriver *ports;

+

+	mutex_t mtx;

+} USBHFTDIDriver;

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+extern USBHFTDIDriver USBHFTDID[HAL_USBHFTDI_MAX_INSTANCES];

+extern USBHFTDIPortDriver FTDIPD[HAL_USBHFTDI_MAX_PORTS];

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+	/* FTDI device driver */

+	void usbhftdiObjectInit(USBHFTDIDriver *ftdip);

+

+	/* FTDI port driver */

+	void usbhftdipObjectInit(USBHFTDIPortDriver *ftdipp);

+	void usbhftdipStart(USBHFTDIPortDriver *ftdipp, const USBHFTDIPortConfig *config);

+	void usbhftdipStop(USBHFTDIPortDriver *ftdipp);

+#ifdef __cplusplus

+}

+#endif

+

+

+#endif

+

+#endif /* USBH_FTDI_H_ */

diff --git a/os/hal/include/usbh/dev/hub.h b/os/hal/include/usbh/dev/hub.h
new file mode 100644
index 0000000..28a0681
--- /dev/null
+++ b/os/hal/include/usbh/dev/hub.h
@@ -0,0 +1,138 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_HUB_H_

+#define USBH_HUB_H_

+

+#include "usbh.h"

+

+#if HAL_USE_USBH

+#if HAL_USBH_USE_HUB

+

+typedef struct USBHHubDriver {

+	/* inherited from abstract class driver */

+	_usbh_base_classdriver_data

+

+	struct list_head node;

+

+	usbh_ep_t epint;

+	usbh_urb_t urb;

+

+	USBH_DEFINE_BUFFER(uint8_t, scbuff[4]);

+	volatile uint32_t statuschange;

+	uint16_t status;

+	uint16_t c_status;

+

+	usbh_port_t *ports;

+

+	USBH_DEFINE_BUFFER(usbh_hub_descriptor_t, hubDesc);

+

+	/* Low level part */

+	_usbh_hub_ll_data

+

+} USBHHubDriver;

+

+extern USBHHubDriver USBHHUBD[HAL_USBHHUB_MAX_INSTANCES];

+

+

+usbh_urbstatus_t usbhhubControlRequest(USBHDriver *host, USBHHubDriver *hub,

+											uint8_t bmRequestType,

+											uint8_t bRequest,

+											uint16_t wValue,

+											uint16_t wIndex,

+											uint16_t wLength,

+											uint8_t *buf);

+

+

+static inline usbh_urbstatus_t usbhhubClearFeaturePort(usbh_port_t *port, uint8_t feature) {

+	return usbhhubControlRequest(port->device.host, port->hub,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+				USBH_REQ_CLEAR_FEATURE,

+				feature,

+				port->number,

+				0,

+				0);

+}

+

+static inline usbh_urbstatus_t usbhhubClearFeatureHub(USBHDriver *host, USBHHubDriver *hub, uint8_t feature) {

+	return usbhhubControlRequest(host, hub,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE,

+				USBH_REQ_CLEAR_FEATURE,

+				feature,

+				0,

+				0,

+				0);

+}

+

+static inline usbh_urbstatus_t usbhhubSetFeaturePort(usbh_port_t *port, uint8_t feature) {

+	return usbhhubControlRequest(port->device.host, port->hub,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+				USBH_REQ_SET_FEATURE,

+				feature,

+				port->number,

+				0,

+				0);

+}

+

+void usbhhubObjectInit(USBHHubDriver *hubdp);

+#else

+

+static inline usbh_urbstatus_t usbhhubControlRequest(USBHDriver *host,

+											uint8_t bmRequestType,

+											uint8_t bRequest,

+											uint16_t wValue,

+											uint16_t wIndex,

+											uint16_t wLength,

+											uint8_t *buf) {

+		return usbh_lld_root_hub_request(host, bmRequestType, bRequest, wValue, wIndex, wLength, buf);

+}

+

+static inline usbh_urbstatus_t usbhhubClearFeaturePort(usbh_port_t *port, uint8_t feature) {

+	return usbhhubControlRequest(port->device.host,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+				USBH_REQ_CLEAR_FEATURE,

+				feature,

+				port->number,

+				0,

+				0);

+}

+

+static inline usbh_urbstatus_t usbhhubClearFeatureHub(USBHDriver *host, uint8_t feature) {

+	return usbhhubControlRequest(host,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE,

+				USBH_REQ_CLEAR_FEATURE,

+				feature,

+				0,

+				0,

+				0);

+}

+

+static inline usbh_urbstatus_t usbhhubSetFeaturePort(usbh_port_t *port, uint8_t feature) {

+	return usbhhubControlRequest(port->device.host,

+				USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+				USBH_REQ_SET_FEATURE,

+				feature,

+				port->number,

+				0,

+				0);

+}

+

+#endif

+

+#endif

+

+#endif /* USBH_HUB_H_ */

diff --git a/os/hal/include/usbh/dev/msd.h b/os/hal/include/usbh/dev/msd.h
new file mode 100644
index 0000000..2ca8817
--- /dev/null
+++ b/os/hal/include/usbh/dev/msd.h
@@ -0,0 +1,125 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_MSD_H_

+#define USBH_MSD_H_

+

+#include "usbh.h"

+

+#if HAL_USE_USBH && HAL_USBH_USE_MSD

+

+/* TODO:

+ *

+ * - Implement of conditional compilation of multiple-luns per instance.

+ * - Implement error checking and recovery when commands fail.

+ *

+ */

+

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+#define _usbhmsd_driver_methods                                                 \

+	_base_block_device_methods

+

+struct USBHMassStorageDriverVMT {

+	_usbhmsd_driver_methods

+};

+

+typedef struct USBHMassStorageLUNDriver USBHMassStorageLUNDriver;

+typedef struct USBHMassStorageDriver USBHMassStorageDriver;

+

+struct USBHMassStorageLUNDriver {

+	/* inherited from abstract block driver */

+	const struct USBHMassStorageDriverVMT *vmt;

+	_base_block_device_data

+

+	BlockDeviceInfo info;

+	USBHMassStorageDriver *msdp;

+

+	USBHMassStorageLUNDriver *next;

+};

+

+typedef struct USBHMassStorageDriver {

+	/* inherited from abstract class driver */

+	_usbh_base_classdriver_data

+

+	/* for LUN request serialization, can be removed

+	 * if the driver is configured to support only one LUN

+	 * per USBHMassStorageDriver instance */

+	mutex_t mtx;

+

+	usbh_ep_t epin;

+	usbh_ep_t epout;

+	uint8_t ifnum;

+	uint8_t max_lun;

+	uint32_t tag;

+

+	USBHMassStorageLUNDriver *luns;

+} USBHMassStorageDriver;

+

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+extern USBHMassStorageLUNDriver MSBLKD[HAL_USBHMSD_MAX_LUNS];

+extern USBHMassStorageDriver USBHMSD[HAL_USBHMSD_MAX_INSTANCES];

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+	/* Mass Storage Driver */

+	void usbhmsdObjectInit(USBHMassStorageDriver *msdp);

+

+	/* Mass Storage LUN Driver (block driver) */

+	void usbhmsdLUNObjectInit(USBHMassStorageLUNDriver *lunp);

+	void usbhmsdLUNStart(USBHMassStorageLUNDriver *lunp);

+	void usbhmsdLUNStop(USBHMassStorageLUNDriver *lunp);

+	bool usbhmsdLUNConnect(USBHMassStorageLUNDriver *lunp);

+	bool usbhmsdLUNDisconnect(USBHMassStorageLUNDriver *lunp);

+	bool usbhmsdLUNRead(USBHMassStorageLUNDriver *lunp, uint32_t startblk,

+					uint8_t *buffer, uint32_t n);

+	bool usbhmsdLUNWrite(USBHMassStorageLUNDriver *lunp, uint32_t startblk,

+					const uint8_t *buffer, uint32_t n);

+	bool usbhmsdLUNSync(USBHMassStorageLUNDriver *lunp);

+	bool usbhmsdLUNGetInfo(USBHMassStorageLUNDriver *lunp, BlockDeviceInfo *bdip);

+	bool usbhmsdLUNIsInserted(USBHMassStorageLUNDriver *lunp);

+	bool usbhmsdLUNIsProtected(USBHMassStorageLUNDriver *lunp);

+#ifdef __cplusplus

+}

+#endif

+

+#endif

+

+#endif /* USBH_MSD_H_ */

diff --git a/os/hal/include/usbh/internal.h b/os/hal/include/usbh/internal.h
new file mode 100644
index 0000000..6811e20
--- /dev/null
+++ b/os/hal/include/usbh/internal.h
@@ -0,0 +1,148 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_INTERNAL_H_

+#define USBH_INTERNAL_H_

+

+#include "usbh.h"

+

+#if HAL_USE_USBH

+

+/*===========================================================================*/

+/* These declarations are not part of the public API.                        */

+/*===========================================================================*/

+

+#if HAL_USBH_USE_FTDI

+extern const usbh_classdriverinfo_t usbhftdiClassDriverInfo;

+#endif

+#if HAL_USBH_USE_MSD

+extern const usbh_classdriverinfo_t usbhmsdClassDriverInfo;

+#endif

+#if HAL_USBH_USE_UVC

+extern const usbh_classdriverinfo_t usbhuvcClassDriverInfo;

+#endif

+#if HAL_USBH_USE_HUB

+extern const usbh_classdriverinfo_t usbhhubClassDriverInfo;

+void _usbhub_port_object_init(usbh_port_t *port, USBHDriver *usbh,

+		USBHHubDriver *hub, uint8_t number);

+#else

+void _usbhub_port_object_init(usbh_port_t *port, USBHDriver *usbh, uint8_t number);

+#endif

+

+void _usbh_port_disconnected(usbh_port_t *port);

+void _usbh_urb_completeI(usbh_urb_t *urb, usbh_urbstatus_t status);

+bool _usbh_urb_abortI(usbh_urb_t *urb, usbh_urbstatus_t status);

+void _usbh_urb_abort_and_waitS(usbh_urb_t *urb, usbh_urbstatus_t status);

+

+

+#define USBH_CLASSIN(type, req, value, index)	\

+	(USBH_REQTYPE_IN | type | USBH_REQTYPE_CLASS), \

+	req, \

+	value, \

+	index

+

+#define USBH_CLASSOUT(type, req, value, index)	\

+	(USBH_REQTYPE_OUT | type | USBH_REQTYPE_CLASS), \

+	req, \

+	value, \

+	index

+

+#define USBH_STANDARDIN(type, req, value, index)	\

+	(USBH_REQTYPE_IN | type | USBH_REQTYPE_STANDARD), \

+	req, \

+	value, \

+	index

+

+#define USBH_STANDARDOUT(type, req, value, index)	\

+	(USBH_REQTYPE_OUT | type | USBH_REQTYPE_STANDARD), \

+	req, \

+	value, \

+	index

+

+

+#define USBH_PID_DATA0            0

+#define USBH_PID_DATA2            1

+#define USBH_PID_DATA1            2

+#define USBH_PID_MDATA            3

+#define USBH_PID_SETUP            3

+

+

+/* GetBusState and SetHubDescriptor are optional, omitted */

+#define ClearHubFeature   (((USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE) << 8) \

+							| USBH_REQ_CLEAR_FEATURE)

+#define SetHubFeature     (((USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE) << 8) \

+							| USBH_REQ_SET_FEATURE)

+#define ClearPortFeature   (((USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER) << 8) \

+							| USBH_REQ_CLEAR_FEATURE)

+#define SetPortFeature     (((USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER) << 8) \

+							| USBH_REQ_SET_FEATURE)

+#define GetHubDescriptor  (((USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE) << 8) \

+							| USBH_REQ_GET_DESCRIPTOR)

+#define GetHubStatus      (((USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE) << 8) \

+							| USBH_REQ_GET_STATUS)

+#define GetPortStatus     (((USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER) << 8) \

+							| USBH_REQ_GET_STATUS)

+

+

+#define USBH_PORTSTATUS_CONNECTION        0x0001

+#define USBH_PORTSTATUS_ENABLE            0x0002

+#define USBH_PORTSTATUS_SUSPEND           0x0004

+#define USBH_PORTSTATUS_OVERCURRENT       0x0008

+#define USBH_PORTSTATUS_RESET             0x0010

+/* bits 5 to 7 are reserved */

+#define USBH_PORTSTATUS_POWER             0x0100

+#define USBH_PORTSTATUS_LOW_SPEED         0x0200

+#define USBH_PORTSTATUS_HIGH_SPEED        0x0400

+#define USBH_PORTSTATUS_TEST              0x0800

+#define USBH_PORTSTATUS_INDICATOR         0x1000

+/* bits 13 to 15 are reserved */

+

+#define USBH_PORTSTATUS_C_CONNECTION      0x0001

+#define USBH_PORTSTATUS_C_ENABLE          0x0002

+#define USBH_PORTSTATUS_C_SUSPEND         0x0004

+#define USBH_PORTSTATUS_C_OVERCURRENT     0x0008

+#define USBH_PORTSTATUS_C_RESET           0x0010

+

+#define USBH_HUBSTATUS_C_HUB_LOCAL_POWER       0x0001

+#define USBH_HUBSTATUS_C_HUB_OVER_CURRENT      0x0002

+

+/*

+ * Port feature numbers

+ * See USB 2.0 spec Table 11-17

+ */

+#define USBH_HUB_FEAT_C_HUB_LOCAL_POWER  0

+#define USBH_HUB_FEAT_C_HUB_OVER_CURRENT 1

+#define USBH_PORT_FEAT_CONNECTION        0

+#define USBH_PORT_FEAT_ENABLE            1

+#define USBH_PORT_FEAT_SUSPEND           2

+#define USBH_PORT_FEAT_OVERCURRENT     	 3

+#define USBH_PORT_FEAT_RESET             4

+#define USBH_PORT_FEAT_POWER             8

+#define USBH_PORT_FEAT_LOWSPEED          9

+#define USBH_PORT_FEAT_C_CONNECTION      16

+#define USBH_PORT_FEAT_C_ENABLE          17

+#define USBH_PORT_FEAT_C_SUSPEND         18

+#define USBH_PORT_FEAT_C_OVERCURRENT     19

+#define USBH_PORT_FEAT_C_RESET           20

+#define USBH_PORT_FEAT_TEST              21

+#define USBH_PORT_FEAT_INDICATOR         22

+

+#define sizeof_array(x) 	(sizeof(x)/sizeof(*(x)))

+

+#endif

+

+#endif /* USBH_INTERNAL_H_ */

diff --git a/os/hal/include/usbh/list.h b/os/hal/include/usbh/list.h
new file mode 100644
index 0000000..4eceacd
--- /dev/null
+++ b/os/hal/include/usbh/list.h
@@ -0,0 +1,598 @@
+#ifndef USBH_LIST_H_

+#define USBH_LIST_H_

+

+/* TODO: re-write this file; stolen from linux */

+

+#ifndef offsetof

+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)

+#endif

+

+#define container_of(ptr, type, member) ((type *)(void *)((char *)(ptr) - offsetof(type, member)))

+#ifndef container_of

+#define container_of(ptr, type, member) ({                  \

+	const typeof(((type *)0)->member) * __mptr = (ptr);     \

+	(type *)((char *)__mptr - offsetof(type, member)); })

+#endif

+

+/*

+ * Simple doubly linked list implementation.

+ *

+ * Some of the internal functions ("__xxx") are useful when

+ * manipulating whole lists rather than single entries, as

+ * sometimes we already know the next/prev entries and we can

+ * generate better code by using them directly rather than

+ * using the generic single-entry routines.

+ */

+struct list_head {

+        struct list_head *next, *prev;

+};

+

+#define LIST_HEAD_INIT(name) { &(name), &(name) }

+

+#define LIST_HEAD(name) \

+        struct list_head name = LIST_HEAD_INIT(name)

+

+static inline void INIT_LIST_HEAD(struct list_head *list)

+{

+        list->next = list;

+        list->prev = list;

+}

+

+/*

+ * Insert a new entry between two known consecutive entries.

+ *

+ * This is only for internal list manipulation where we know

+ * the prev/next entries already!

+ */

+#ifndef CONFIG_DEBUG_LIST

+static inline void __list_add(struct list_head *new,

+                              struct list_head *prev,

+                              struct list_head *next)

+{

+        next->prev = new;

+        new->next = next;

+        new->prev = prev;

+        prev->next = new;

+}

+#else

+extern void __list_add(struct list_head *new,

+                              struct list_head *prev,

+                              struct list_head *next);

+#endif

+

+/**

+ * list_add - add a new entry

+ * @new: new entry to be added

+ * @head: list head to add it after

+ *

+ * Insert a new entry after the specified head.

+ * This is good for implementing stacks.

+ */

+static inline void list_add(struct list_head *new, struct list_head *head)

+{

+        __list_add(new, head, head->next);

+}

+

+

+/**

+ * list_add_tail - add a new entry

+ * @new: new entry to be added

+ * @head: list head to add it before

+ *

+ * Insert a new entry before the specified head.

+ * This is useful for implementing queues.

+ */

+static inline void list_add_tail(struct list_head *new, struct list_head *head)

+{

+        __list_add(new, head->prev, head);

+}

+

+/*

+ * Delete a list entry by making the prev/next entries

+ * point to each other.

+ *

+ * This is only for internal list manipulation where we know

+ * the prev/next entries already!

+ */

+static inline void __list_del(struct list_head * prev, struct list_head * next)

+{

+        next->prev = prev;

+        prev->next = next;

+}

+

+/**

+ * list_del - deletes entry from list.

+ * @entry: the element to delete from the list.

+ * Note: list_empty() on entry does not return true after this, the entry is

+ * in an undefined state.

+ */

+#ifndef CONFIG_DEBUG_LIST

+static inline void __list_del_entry(struct list_head *entry)

+{

+        __list_del(entry->prev, entry->next);

+}

+

+static inline void list_del(struct list_head *entry)

+{

+        __list_del(entry->prev, entry->next);

+       // entry->next = LIST_POISON1;

+       // entry->prev = LIST_POISON2;

+}

+#else

+extern void __list_del_entry(struct list_head *entry);

+extern void list_del(struct list_head *entry);

+#endif

+

+/**

+ * list_replace - replace old entry by new one

+ * @old : the element to be replaced

+ * @new : the new element to insert

+ *

+ * If @old was empty, it will be overwritten.

+ */

+static inline void list_replace(struct list_head *old,

+                                struct list_head *new)

+{

+        new->next = old->next;

+        new->next->prev = new;

+        new->prev = old->prev;

+        new->prev->next = new;

+}

+

+static inline void list_replace_init(struct list_head *old,

+                                        struct list_head *new)

+{

+        list_replace(old, new);

+        INIT_LIST_HEAD(old);

+}

+

+/**

+ * list_del_init - deletes entry from list and reinitialize it.

+ * @entry: the element to delete from the list.

+ */

+static inline void list_del_init(struct list_head *entry)

+{

+        __list_del_entry(entry);

+        INIT_LIST_HEAD(entry);

+}

+

+/**

+ * list_move - delete from one list and add as another's head

+ * @list: the entry to move

+ * @head: the head that will precede our entry

+ */

+static inline void list_move(struct list_head *list, struct list_head *head)

+{

+        __list_del_entry(list);

+        list_add(list, head);

+}

+

+/**

+ * list_move_tail - delete from one list and add as another's tail

+ * @list: the entry to move

+ * @head: the head that will follow our entry

+ */

+static inline void list_move_tail(struct list_head *list,

+                                  struct list_head *head)

+{

+        __list_del_entry(list);

+        list_add_tail(list, head);

+}

+

+/**

+ * list_is_last - tests whether @list is the last entry in list @head

+ * @list: the entry to test

+ * @head: the head of the list

+ */

+static inline int list_is_last(const struct list_head *list,

+                                const struct list_head *head)

+{

+        return list->next == head;

+}

+

+/**

+ * list_empty - tests whether a list is empty

+ * @head: the list to test.

+ */

+static inline int list_empty(const struct list_head *head)

+{

+        return head->next == head;

+}

+

+/**

+ * list_empty_careful - tests whether a list is empty and not being modified

+ * @head: the list to test

+ *

+ * Description:

+ * tests whether a list is empty _and_ checks that no other CPU might be

+ * in the process of modifying either member (next or prev)

+ *

+ * NOTE: using list_empty_careful() without synchronization

+ * can only be safe if the only activity that can happen

+ * to the list entry is list_del_init(). Eg. it cannot be used

+ * if another CPU could re-list_add() it.

+ */

+static inline int list_empty_careful(const struct list_head *head)

+{

+        struct list_head *next = head->next;

+        return (next == head) && (next == head->prev);

+}

+

+/**

+ * list_rotate_left - rotate the list to the left

+ * @head: the head of the list

+ */

+static inline void list_rotate_left(struct list_head *head)

+{

+        struct list_head *first;

+

+        if (!list_empty(head)) {

+                first = head->next;

+                list_move_tail(first, head);

+        }

+}

+

+/**

+ * list_is_singular - tests whether a list has just one entry.

+ * @head: the list to test.

+ */

+static inline int list_is_singular(const struct list_head *head)

+{

+        return !list_empty(head) && (head->next == head->prev);

+}

+

+static inline void __list_cut_position(struct list_head *list,

+                struct list_head *head, struct list_head *entry)

+{

+        struct list_head *new_first = entry->next;

+        list->next = head->next;

+        list->next->prev = list;

+        list->prev = entry;

+        entry->next = list;

+        head->next = new_first;

+        new_first->prev = head;

+}

+

+/**

+ * list_cut_position - cut a list into two

+ * @list: a new list to add all removed entries

+ * @head: a list with entries

+ * @entry: an entry within head, could be the head itself

+ *      and if so we won't cut the list

+ *

+ * This helper moves the initial part of @head, up to and

+ * including @entry, from @head to @list. You should

+ * pass on @entry an element you know is on @head. @list

+ * should be an empty list or a list you do not care about

+ * losing its data.

+ *

+ */

+static inline void list_cut_position(struct list_head *list,

+                struct list_head *head, struct list_head *entry)

+{

+        if (list_empty(head))

+                return;

+        if (list_is_singular(head) &&

+                (head->next != entry && head != entry))

+                return;

+        if (entry == head)

+                INIT_LIST_HEAD(list);

+        else

+                __list_cut_position(list, head, entry);

+}

+

+static inline void __list_splice(const struct list_head *list,

+                                 struct list_head *prev,

+                                 struct list_head *next)

+{

+        struct list_head *first = list->next;

+        struct list_head *last = list->prev;

+

+        first->prev = prev;

+        prev->next = first;

+

+        last->next = next;

+        next->prev = last;

+}

+

+/**

+ * list_splice - join two lists, this is designed for stacks

+ * @list: the new list to add.

+ * @head: the place to add it in the first list.

+ */

+static inline void list_splice(const struct list_head *list,

+                                struct list_head *head)

+{

+        if (!list_empty(list))

+                __list_splice(list, head, head->next);

+}

+

+/**

+ * list_splice_tail - join two lists, each list being a queue

+ * @list: the new list to add.

+ * @head: the place to add it in the first list.

+ */

+static inline void list_splice_tail(struct list_head *list,

+                                struct list_head *head)

+{

+        if (!list_empty(list))

+                __list_splice(list, head->prev, head);

+}

+

+/**

+ * list_splice_init - join two lists and reinitialise the emptied list.

+ * @list: the new list to add.

+ * @head: the place to add it in the first list.

+ *

+ * The list at @list is reinitialised

+ */

+static inline void list_splice_init(struct list_head *list,

+                                    struct list_head *head)

+{

+        if (!list_empty(list)) {

+                __list_splice(list, head, head->next);

+                INIT_LIST_HEAD(list);

+        }

+}

+

+/**

+ * list_splice_tail_init - join two lists and reinitialise the emptied list

+ * @list: the new list to add.

+ * @head: the place to add it in the first list.

+ *

+ * Each of the lists is a queue.

+ * The list at @list is reinitialised

+ */

+static inline void list_splice_tail_init(struct list_head *list,

+                                         struct list_head *head)

+{

+        if (!list_empty(list)) {

+                __list_splice(list, head->prev, head);

+                INIT_LIST_HEAD(list);

+        }

+}

+

+/**

+ * list_entry - get the struct for this entry

+ * @ptr:        the &struct list_head pointer.

+ * @type:       the type of the struct this is embedded in.

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_entry(ptr, type, member) \

+        container_of(ptr, type, member)

+

+/**

+ * list_first_entry - get the first element from a list

+ * @ptr:        the list head to take the element from.

+ * @type:       the type of the struct this is embedded in.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Note, that list is expected to be not empty.

+ */

+#define list_first_entry(ptr, type, member) \

+        list_entry((ptr)->next, type, member)

+

+/**

+ * list_last_entry - get the last element from a list

+ * @ptr:        the list head to take the element from.

+ * @type:       the type of the struct this is embedded in.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Note, that list is expected to be not empty.

+ */

+#define list_last_entry(ptr, type, member) \

+        list_entry((ptr)->prev, type, member)

+

+/**

+ * list_first_entry_or_null - get the first element from a list

+ * @ptr:        the list head to take the element from.

+ * @type:       the type of the struct this is embedded in.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Note that if the list is empty, it returns NULL.

+ */

+#define list_first_entry_or_null(ptr, type, member) \

+        (!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL)

+

+/**

+ * list_next_entry - get the next element in list

+ * @pos:        the type * to cursor

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_next_entry(pos, type, member) \

+        list_entry((pos)->member.next, type, member)

+

+/**

+ * list_prev_entry - get the prev element in list

+ * @pos:        the type * to cursor

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_prev_entry(pos, type, member) \

+        list_entry((pos)->member.prev, type, member)

+

+/**

+ * list_for_each        -       iterate over a list

+ * @pos:        the &struct list_head to use as a loop cursor.

+ * @head:       the head for your list.

+ */

+#define list_for_each(pos, head) \

+        for (pos = (head)->next; pos != (head); pos = pos->next)

+

+/**

+ * list_for_each_prev   -       iterate over a list backwards

+ * @pos:        the &struct list_head to use as a loop cursor.

+ * @head:       the head for your list.

+ */

+#define list_for_each_prev(pos, head) \

+        for (pos = (head)->prev; pos != (head); pos = pos->prev)

+

+/**

+ * list_for_each_safe - iterate over a list safe against removal of list entry

+ * @pos:        the &struct list_head to use as a loop cursor.

+ * @n:          another &struct list_head to use as temporary storage

+ * @head:       the head for your list.

+ */

+#define list_for_each_safe(pos, n, head) \

+        for (pos = (head)->next, n = pos->next; pos != (head); \

+                pos = n, n = pos->next)

+

+/**

+ * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry

+ * @pos:        the &struct list_head to use as a loop cursor.

+ * @n:          another &struct list_head to use as temporary storage

+ * @head:       the head for your list.

+ */

+#define list_for_each_prev_safe(pos, n, head) \

+        for (pos = (head)->prev, n = pos->prev; \

+             pos != (head); \

+             pos = n, n = pos->prev)

+

+/**

+ * list_for_each_entry  -       iterate over list of given type

+ * @pos:        the type * to use as a loop cursor.

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_for_each_entry(pos, type, head, member)                          \

+        for (pos = list_first_entry(head, type, member);        \

+             &pos->member != (head);                                    \

+             pos = list_next_entry(pos, type, member))

+

+/**

+ * list_for_each_entry_reverse - iterate backwards over list of given type.

+ * @pos:        the type * to use as a loop cursor.

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_for_each_entry_reverse(pos, type, head, member)                  \

+        for (pos = list_last_entry(head, type, member);         \

+             &pos->member != (head);                                    \

+             pos = list_prev_entry(pos, type, member))

+

+/**

+ * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()

+ * @pos:        the type * to use as a start point

+ * @head:       the head of the list

+ * @member:     the name of the list_head within the struct.

+ *

+ * Prepares a pos entry for use as a start point in list_for_each_entry_continue().

+ */

+#define list_prepare_entry(pos, type, head, member) \

+        ((pos) ? : list_entry(head, type, member))

+

+/**

+ * list_for_each_entry_continue - continue iteration over list of given type

+ * @pos:        the type * to use as a loop cursor.

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Continue to iterate over list of given type, continuing after

+ * the current position.

+ */

+#define list_for_each_entry_continue(pos, type, head, member)                 \

+        for (pos = list_next_entry(pos, type, member);                        \

+             &pos->member != (head);                                    \

+             pos = list_next_entry(pos, type, member))

+

+/**

+ * list_for_each_entry_continue_reverse - iterate backwards from the given point

+ * @pos:        the type * to use as a loop cursor.

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Start to iterate over list of given type backwards, continuing after

+ * the current position.

+ */

+#define list_for_each_entry_continue_reverse(pos, type, head, member)         \

+        for (pos = list_prev_entry(pos, type, member);                        \

+             &pos->member != (head);                                    \

+             pos = list_prev_entry(pos, type, member))

+

+/**

+ * list_for_each_entry_from - iterate over list of given type from the current point

+ * @pos:        the type * to use as a loop cursor.

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Iterate over list of given type, continuing from current position.

+ */

+#define list_for_each_entry_from(pos, type, head, member)                     \

+        for (; &pos->member != (head);                                  \

+             pos = list_next_entry(pos, type, member))

+

+/**

+ * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry

+ * @pos:        the type * to use as a loop cursor.

+ * @n:          another type * to use as temporary storage

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ */

+#define list_for_each_entry_safe(pos, type, n, head, member)                  \

+        for (pos = list_first_entry(head, type, member),        \

+                n = list_next_entry(pos, type, member);                       \

+             &pos->member != (head);                                    \

+             pos = n, n = list_next_entry(n, type, member))

+

+/**

+ * list_for_each_entry_safe_continue - continue list iteration safe against removal

+ * @pos:        the type * to use as a loop cursor.

+ * @n:          another type * to use as temporary storage

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Iterate over list of given type, continuing after current point,

+ * safe against removal of list entry.

+ */

+#define list_for_each_entry_safe_continue(pos, type, n, head, member)                 \

+        for (pos = list_next_entry(pos, type, member),                                \

+                n = list_next_entry(pos, type, member);                               \

+             &pos->member != (head);                                            \

+             pos = n, n = list_next_entry(n, type, member))

+

+/**

+ * list_for_each_entry_safe_from - iterate over list from current point safe against removal

+ * @pos:        the type * to use as a loop cursor.

+ * @n:          another type * to use as temporary storage

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Iterate over list of given type from current point, safe against

+ * removal of list entry.

+ */

+#define list_for_each_entry_safe_from(pos, type, n, head, member)                     \

+        for (n = list_next_entry(pos, type, member);                                  \

+             &pos->member != (head);                                            \

+             pos = n, n = list_next_entry(n, type, member))

+

+/**

+ * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal

+ * @pos:        the type * to use as a loop cursor.

+ * @n:          another type * to use as temporary storage

+ * @head:       the head for your list.

+ * @member:     the name of the list_head within the struct.

+ *

+ * Iterate backwards over list of given type, safe against removal

+ * of list entry.

+ */

+#define list_for_each_entry_safe_reverse(pos, type, n, head, member)          \

+        for (pos = list_last_entry(head, type, member),         \

+                n = list_prev_entry(pos, type, member);                       \

+             &pos->member != (head);                                    \

+             pos = n, n = list_prev_entry(n, type, member))

+

+/**

+ * list_safe_reset_next - reset a stale list_for_each_entry_safe loop

+ * @pos:        the loop cursor used in the list_for_each_entry_safe loop

+ * @n:          temporary storage used in list_for_each_entry_safe

+ * @member:     the name of the list_head within the struct.

+ *

+ * list_safe_reset_next is not safe to use in general if the list may be

+ * modified concurrently (eg. the lock is dropped in the loop body). An

+ * exception to this is if the cursor element (pos) is pinned in the list,

+ * and list_safe_reset_next is called after re-taking the lock and before

+ * completing the current iteration of the loop body.

+ */

+#define list_safe_reset_next(pos, type, n, member)                            \

+        n = list_next_entry(pos, type, member)

+

+#endif /* USBH_LIST_H_ */

diff --git a/os/hal/ports/NRF51/NRF51822/gpt_lld.h b/os/hal/ports/NRF51/NRF51822/gpt_lld.h
index d707cda..2c84d6c 100644
--- a/os/hal/ports/NRF51/NRF51822/gpt_lld.h
+++ b/os/hal/ports/NRF51/NRF51822/gpt_lld.h
@@ -94,7 +94,7 @@
 

 #if !NRF51_GPT_USE_TIMER0 && !NRF51_GPT_USE_TIMER1 &&                         \

     !NRF51_GPT_USE_TIMER2

-#error "GPT driver activated but no TIM peripheral assigned"

+#error "GPT driver activated but no TIMER peripheral assigned"

 #endif

 

 #if 0

diff --git a/os/hal/ports/NRF51/NRF51822/hal_lld.c b/os/hal/ports/NRF51/NRF51822/hal_lld.c
index e1d2ed5..af5e377 100644
--- a/os/hal/ports/NRF51/NRF51822/hal_lld.c
+++ b/os/hal/ports/NRF51/NRF51822/hal_lld.c
@@ -55,6 +55,29 @@
  */
 void hal_lld_init(void)
 {
+  /* High frequency clock initialisation
+   *  (If NRF51_XTAL_VALUE is not defined assume its an RC oscillator)
+   */
+  NRF_CLOCK->TASKS_HFCLKSTOP = 1;
+#if defined(NRF51_XTAL_VALUE)
+#if   NRF51_XTAL_VALUE == 16000000
+  NRF_CLOCK->XTALFREQ = 0xFF;
+#elif NRF51_XTAL_VALUE == 32000000
+  NRF_CLOCK->XTALFREQ = 0x00;
+#endif
+#endif
+
+  
+  /* Low frequency clock initialisation
+   * Clock is only started if st driver requires it
+   */
+  NRF_CLOCK->TASKS_LFCLKSTOP = 1;
+  NRF_CLOCK->LFCLKSRC = NRF51_LFCLK_SOURCE;
+  
+#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) &&			\
+    (NRF51_SYSTEM_TICKS == NRF51_SYSTEM_TICKS_AS_RTC)
+  NRF_CLOCK->TASKS_LFCLKSTART = 1;
+#endif
 }
 
 /**
diff --git a/os/hal/ports/NRF51/NRF51822/hal_lld.h b/os/hal/ports/NRF51/NRF51822/hal_lld.h
index 436789c..283c207 100644
--- a/os/hal/ports/NRF51/NRF51822/hal_lld.h
+++ b/os/hal/ports/NRF51/NRF51822/hal_lld.h
@@ -39,14 +39,36 @@
  * @}
  */
 
+/**
+ * @brief  Frequency valuefor the Low Frequency Clock
+ */
+#define NRF51_LFCLK_FREQUENCY  32768
+
 /*===========================================================================*/
 /* Driver pre-compile time settings.                                         */
 /*===========================================================================*/
 
+/**
+ * @brief   Select source of Low Frequency Clock (LFCLK)
+ * @details Possible values for source are:
+ *            0 : RC oscillator
+ *            1 : External cristal
+ *            2 : Synthetized clock from High Frequency Clock (HFCLK)
+ *          When cristal is not available it's preferable to use the
+ *          internal RC oscillator that synthezing the clock.
+ */
+#if !defined(NRF51_LFCLK_SOURCE) || defined(__DOXYGEN__)
+#define NRF51_LFCLK_SOURCE             0
+#endif
+
 /*===========================================================================*/
 /* Derived constants and error checks.                                       */
 /*===========================================================================*/
 
+#if (NRF51_LFCLK_SOURCE < 0) || (NRF51_LFCLK_SOURCE > 2)
+#error "Possible value for NRF51_LFCLK_SOURCE are 0=RC, 1=XTAL, 2=Synth"
+#endif
+
 /*===========================================================================*/
 /* Driver data structures and types.                                         */
 /*===========================================================================*/
diff --git a/os/hal/ports/NRF51/NRF51822/platform.mk b/os/hal/ports/NRF51/NRF51822/platform.mk
index 663ca1f..11259e5 100644
--- a/os/hal/ports/NRF51/NRF51822/platform.mk
+++ b/os/hal/ports/NRF51/NRF51822/platform.mk
@@ -1,5 +1,5 @@
 ifeq ($(USE_SMART_BUILD),yes)
-HALCONF := $(strip $(shell cat halconf.h | egrep -e "define"))
+HALCONF := $(strip $(shell cat halconf.h halconf_community.h | egrep -e "define"))
 
 # List of all the NRF51x platform files.
 PLATFORMSRC  = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
diff --git a/os/hal/ports/NRF51/NRF51822/st_lld.c b/os/hal/ports/NRF51/NRF51822/st_lld.c
index 526db35..f65117b 100644
--- a/os/hal/ports/NRF51/NRF51822/st_lld.c
+++ b/os/hal/ports/NRF51/NRF51822/st_lld.c
@@ -1,5 +1,6 @@
 /*

     ChibiOS - Copyright (C) 2015 Fabio Utzig

+                            2016 Stephane D'Alu

 

     Licensed under the Apache License, Version 2.0 (the "License");

     you may not use this file except in compliance with the License.

@@ -51,9 +52,55 @@
 /*===========================================================================*/

 

 #if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__)

+#if NRF51_ST_USE_RTC0 == TRUE

 /**

- * @brief   System Timer vector.

- * @details This interrupt is used for system tick in periodic mode.

+ * @brief   System Timer vector (RTC0)

+ * @details This interrupt is used for system tick in periodic mode

+ *          if selected with NRF51_ST_USE_RTC0

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector6C) {

+

+  OSAL_IRQ_PROLOGUE();

+

+  NRF_RTC0->EVENTS_TICK = 0;

+      

+  osalSysLockFromISR();

+  osalOsTimerHandlerI();

+  osalSysUnlockFromISR();

+

+  OSAL_IRQ_EPILOGUE();

+}

+#endif

+

+#if NRF51_ST_USE_RTC1 == TRUE

+/**

+ * @brief   System Timer vector (RTC1)

+ * @details This interrupt is used for system tick in periodic mode

+ *          if selected with NRF51_ST_USE_RTC1

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector84) {

+

+  OSAL_IRQ_PROLOGUE();

+

+  NRF_RTC1->EVENTS_TICK = 0;

+      

+  osalSysLockFromISR();

+  osalOsTimerHandlerI();

+  osalSysUnlockFromISR();

+

+  OSAL_IRQ_EPILOGUE();

+}

+#endif

+

+#if NRF51_ST_USE_TIMER0 == TRUE

+/**

+ * @brief   System Timer vector. (TIMER0)

+ * @details This interrupt is used for system tick in periodic mode

+ *          if selected with NRF51_ST_USE_TIMER0

  *

  * @isr

  */

@@ -71,8 +118,73 @@ OSAL_IRQ_HANDLER(Vector60) {
 

   OSAL_IRQ_EPILOGUE();

 }

+#endif

 #endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */

 

+#if (OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) || defined(__DOXYGEN__)

+#if NRF51_ST_USE_RTC0 == TRUE

+/**

+ * @brief   System Timer vector (RTC0)

+ * @details This interrupt is used for freerunning mode (tick-less)

+ *          if selected with NRF51_ST_USE_RTC0 

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector6C) {

+

+  OSAL_IRQ_PROLOGUE();

+

+  if (NRF_RTC0->EVENTS_COMPARE[0]) {

+      NRF_RTC0->EVENTS_COMPARE[0] = 0;

+      

+      osalSysLockFromISR();

+      osalOsTimerHandlerI();

+      osalSysUnlockFromISR();

+  }

+

+#if OSAL_ST_RESOLUTION == 16

+  if (NRF_RTC0->EVENTS_COMPARE[1]) {

+      NRF_RTC0->EVENTS_COMPARE[1] = 0;

+      NRF_RTC0->TASKS_CLEAR = 1;

+  }

+#endif

+  

+  OSAL_IRQ_EPILOGUE();

+}

+#endif

+

+#if NRF51_ST_USE_RTC1 == TRUE

+/**

+ * @brief   System Timer vector (RTC1)

+ * @details This interrupt is used for freerunning mode (tick-less)

+ *          if selected with NRF51_ST_USE_RTC1

+ *

+ * @isr

+ */

+OSAL_IRQ_HANDLER(Vector84) {

+

+  OSAL_IRQ_PROLOGUE();

+

+  if (NRF_RTC1->EVENTS_COMPARE[0]) {

+      NRF_RTC1->EVENTS_COMPARE[0] = 0;

+      

+      osalSysLockFromISR();

+      osalOsTimerHandlerI();

+      osalSysUnlockFromISR();

+  }

+

+#if OSAL_ST_RESOLUTION == 16

+  if (NRF_RTC1->EVENTS_COMPARE[1]) {

+      NRF_RTC1->EVENTS_COMPARE[1] = 0;

+      NRF_RTC1->TASKS_CLEAR = 1;

+  }

+#endif

+  

+  OSAL_IRQ_EPILOGUE();

+}

+#endif

+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */

+

 /*===========================================================================*/

 /* Driver exported functions.                                                */

 /*===========================================================================*/

@@ -83,8 +195,75 @@ OSAL_IRQ_HANDLER(Vector60) {
  * @notapi

  */

 void st_lld_init(void) {

+#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING

+

+#if NRF51_ST_USE_RTC0 == TRUE

+  /* Using RTC with prescaler */

+  NRF_RTC0->TASKS_STOP  = 1;

+  NRF_RTC0->PRESCALER   = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; 

+  NRF_RTC0->EVTENCLR    = RTC_EVTENSET_COMPARE0_Msk;

+  NRF_RTC0->EVENTS_COMPARE[0] = 0;

+  NRF_RTC0->INTENSET    = RTC_INTENSET_COMPARE0_Msk;

+#if OSAL_ST_RESOLUTION == 16

+  NRF_RTC0->CC[1]       = 0x10000; /* 2^16 */

+  NRF_RTC0->EVENTS_COMPARE[1] = 0;

+  NRF_RTC0->EVTENSET    = RTC_EVTENSET_COMPARE0_Msk;

+  NRF_RTC0->INTENSET    = RTC_INTENSET_COMPARE1_Msk;

+#endif

+  NRF_RTC0->TASKS_CLEAR  = 1;

+  

+    /* Start timer */

+  nvicEnableVector(RTC0_IRQn, NRF51_ST_PRIORITY);

+  NRF_RTC0->TASKS_START = 1;

+#endif /* NRF51_ST_USE_RTC0 == TRUE */

+

+#if NRF51_ST_USE_RTC1 == TRUE

+  /* Using RTC with prescaler */

+  NRF_RTC1->TASKS_STOP  = 1;

+  NRF_RTC1->PRESCALER   = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; 

+  NRF_RTC1->EVTENCLR    = RTC_EVTENSET_COMPARE0_Msk;

+  NRF_RTC1->EVENTS_COMPARE[0] = 0;

+  NRF_RTC1->INTENSET    = RTC_INTENSET_COMPARE0_Msk;

+#if OSAL_ST_RESOLUTION == 16

+  NRF_RTC1->CC[1]       = 0x10000; /* 2^16 */

+  NRF_RTC1->EVENTS_COMPARE[1] = 0;

+  NRF_RTC1->EVTENSET    = RTC_EVTENSET_COMPARE0_Msk;

+  NRF_RTC1->INTENSET    = RTC_INTENSET_COMPARE1_Msk;

+#endif

+  NRF_RTC1->TASKS_CLEAR  = 1;

+  

+    /* Start timer */

+  nvicEnableVector(RTC1_IRQn, NRF51_ST_PRIORITY);

+  NRF_RTC1->TASKS_START = 1;

+#endif /* NRF51_ST_USE_RTC1 == TRUE */

+

+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */

 

 #if OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC

+

+#if NRF51_ST_USE_RTC0 == TRUE

+  /* Using RTC with prescaler */

+  NRF_RTC0->TASKS_STOP  = 1;

+  NRF_RTC0->PRESCALER   = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; 

+  NRF_RTC0->INTENSET    = RTC_INTENSET_TICK_Msk;

+

+  /* Start timer */

+  nvicEnableVector(RTC0_IRQn, NRF51_ST_PRIORITY);

+  NRF_RTC0->TASKS_START = 1;

+#endif /* NRF51_ST_USE_RTC0 == TRUE */

+

+#if NRF51_ST_USE_RTC1 == TRUE

+  /* Using RTC with prescaler */

+  NRF_RTC1->TASKS_STOP  = 1;

+  NRF_RTC1->PRESCALER   = (NRF51_LFCLK_FREQUENCY / OSAL_ST_FREQUENCY) - 1; 

+  NRF_RTC1->INTENSET    = RTC_INTENSET_TICK_Msk;

+

+  /* Start timer */

+  nvicEnableVector(RTC1_IRQn, NRF51_ST_PRIORITY);

+  NRF_RTC1->TASKS_START = 1;

+#endif /* NRF51_ST_USE_RTC1 == TRUE */

+

+#if NRF51_ST_USE_TIMER0 == TRUE

   NRF_TIMER0->TASKS_CLEAR = 1;

 

   /*

@@ -102,12 +281,12 @@ void st_lld_init(void) {
   NRF_TIMER0->SHORTS = 1;

   NRF_TIMER0->INTENSET = 0x10000;

 

-  nvicEnableVector(TIMER0_IRQn, 8);

-

   /* Start timer */

+  nvicEnableVector(TIMER0_IRQn, NRF51_ST_PRIORITY);

   NRF_TIMER0->TASKS_START = 1;

-#endif

-

+#endif /* NRF51_ST_USE_TIMER0 == TRUE */

+  

+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC */

 }

 

 #endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */

diff --git a/os/hal/ports/NRF51/NRF51822/st_lld.h b/os/hal/ports/NRF51/NRF51822/st_lld.h
index 2e0672e..ab25dbb 100644
--- a/os/hal/ports/NRF51/NRF51822/st_lld.h
+++ b/os/hal/ports/NRF51/NRF51822/st_lld.h
@@ -27,6 +27,8 @@
 #ifndef _ST_LLD_H_

 #define _ST_LLD_H_

 

+#include "halconf.h"

+

 /*===========================================================================*/

 /* Driver constants.                                                         */

 /*===========================================================================*/

@@ -35,10 +37,92 @@
 /* Driver pre-compile time settings.                                         */

 /*===========================================================================*/

 

+/**

+ * @brief   Use RTC0 to generates system ticks

+ */

+#if !defined(NRF51_ST_USE_RTC0) || defined(__DOXYGEN__)

+#if !defined(SOFTDEVICE_PRESENT)

+#define NRF51_ST_USE_RTC0 		TRUE

+#else

+#define NRF51_ST_USE_RTC0 		FALSE

+#endif

+#endif

+

+/**

+ * @brief   Use RTC1 to generates system ticks

+ */

+#if !defined(NRF51_ST_USE_RTC1) || defined(__DOXYGEN__)

+#if !defined(SOFTDEVICE_PRESENT)

+#define NRF51_ST_USE_RTC1		FALSE

+#else

+#define NRF51_ST_USE_RTC1		TRUE

+#endif

+#endif

+

+/**

+ * @brief   Use TIMER0 to generates system ticks

+ */

+#if !defined(NRF51_ST_USE_TIMER0) || defined(__DOXYGEN__)

+#define NRF51_ST_USE_TIMER0		FALSE

+#endif

+

+/**

+ * @brief   ST interrupt priority level setting.

+ */

+#if !defined(NRF51_ST_PRIORITY) || defined(__DOXYGEN__)

+#if !defined(SOFTDEVICE_PRESENT)

+#define NRF51_ST_PRIORITY        8

+#else

+#define NRF51_ST_PRIORITY        1

+#endif

+#endif

+

 /*===========================================================================*/

 /* Derived constants and error checks.                                       */

 /*===========================================================================*/

 

+#if OSAL_ST_MODE != OSAL_ST_MODE_NONE

+#if (NRF51_ST_USE_TIMER0 == TRUE) && (NRF51_GPT_USE_TIMER0 == TRUE)

+#error "TIMER0 already used by GPT driver"

+#endif

+

+#if (NRF51_ST_USE_RTC0   == FALSE) && \

+    (NRF51_ST_USE_RTC1   == FALSE) && \

+    (NRF51_ST_USE_TIMER0 == FALSE)

+#error "One clock source is needed, enable one (RTC0, RTC1, or TIMER0)"

+#endif

+

+#if ((NRF51_ST_USE_RTC0   == TRUE ? 1 : 0) +	\

+     (NRF51_ST_USE_RTC1   == TRUE ? 1 : 0) +	\

+     (NRF51_ST_USE_TIMER0 == TRUE ? 1 : 0)) > 1

+#error "Only one clock source can be used (RTC0, RTC1, or TIMER0)"

+#endif

+

+#if defined(SOFTDEVICE_PRESENT)

+#if NRF51_ST_USE_RTC0 == TRUE

+#error "RTC0 cannot be used for system ticks when SOFTDEVICE present"

+#endif

+

+#if NRF51_ST_USE_TIMER0 == TRUE

+#error "TIMER0 cannot be used for system ticks when SOFTDEVICE present"

+#endif

+

+#if NRF51_ST_PRIORITY != 1

+#error "ST priority must be 1 when SOFTDEVICE present"

+#endif

+

+#endif /* defined(SOFTDEVICE_PRESENT) */

+#endif /* OSAL_ST_MODE != OSAL_ST_MODE_NONE */

+

+#if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING

+#if defined(CH_CFG_ST_TIMEDELTA) && (CH_CFG_ST_TIMEDELTA < 5)

+#error "CH_CFG_ST_TIMEDELTA is too low"

+#endif

+#if NRF51_ST_USE_TIMER0 == TRUE

+#error "Freeruning (tick-less) mode not supported with TIMER, use RTC"

+#endif

+#endif /* OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING */

+

 /*===========================================================================*/

 /* Driver data structures and types.                                         */

 /*===========================================================================*/

@@ -71,8 +155,12 @@ extern "C" {
  * @notapi

  */

 static inline systime_t st_lld_get_counter(void) {

-

-  return (systime_t)0;

+#if NRF51_ST_USE_RTC0 == TRUE

+    return (systime_t)NRF_RTC0->COUNTER;

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+    return (systime_t)NRF_RTC1->COUNTER;

+#endif

 }

 

 /**

@@ -85,8 +173,16 @@ static inline systime_t st_lld_get_counter(void) {
  * @notapi

  */

 static inline void st_lld_start_alarm(systime_t abstime) {

-

-  (void)abstime;

+#if NRF51_ST_USE_RTC0 == TRUE

+  NRF_RTC0->CC[0]               = abstime;

+  NRF_RTC0->EVENTS_COMPARE[0]   = 0;

+  NRF_RTC0->EVTENSET            = RTC_EVTENSET_COMPARE0_Msk;

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+  NRF_RTC1->CC[0]               = abstime;

+  NRF_RTC1->EVENTS_COMPARE[0]   = 0;

+  NRF_RTC1->EVTENSET            = RTC_EVTENSET_COMPARE0_Msk;

+#endif

 }

 

 /**

@@ -95,7 +191,14 @@ static inline void st_lld_start_alarm(systime_t abstime) {
  * @notapi

  */

 static inline void st_lld_stop_alarm(void) {

-

+#if NRF51_ST_USE_RTC0 == TRUE

+  NRF_RTC0->EVTENCLR            = RTC_EVTENCLR_COMPARE0_Msk;

+  NRF_RTC0->EVENTS_COMPARE[0]   = 0;

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+  NRF_RTC1->EVTENCLR            = RTC_EVTENCLR_COMPARE0_Msk;

+  NRF_RTC1->EVENTS_COMPARE[0]   = 0;

+#endif

 }

 

 /**

@@ -106,8 +209,12 @@ static inline void st_lld_stop_alarm(void) {
  * @notapi

  */

 static inline void st_lld_set_alarm(systime_t abstime) {

-

-  (void)abstime;

+#if NRF51_ST_USE_RTC0 == TRUE

+    NRF_RTC0->CC[0]             = abstime;

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+    NRF_RTC1->CC[0]             = abstime;

+#endif

 }

 

 /**

@@ -118,8 +225,12 @@ static inline void st_lld_set_alarm(systime_t abstime) {
  * @notapi

  */

 static inline systime_t st_lld_get_alarm(void) {

-

-  return (systime_t)0;

+#if NRF51_ST_USE_RTC0 == TRUE

+  return (systime_t)NRF_RTC0->CC[0];

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+  return (systime_t)NRF_RTC1->CC[0];

+#endif

 }

 

 /**

@@ -132,8 +243,12 @@ static inline systime_t st_lld_get_alarm(void) {
  * @notapi

  */

 static inline bool st_lld_is_alarm_active(void) {

-

-  return false;

+#if NRF51_ST_USE_RTC0 == TRUE

+  return NRF_RTC0->EVTEN & RTC_EVTEN_COMPARE0_Msk;

+#endif

+#if NRF51_ST_USE_RTC1 == TRUE

+  return NRF_RTC1->EVTEN & RTC_EVTEN_COMPARE0_Msk;

+#endif

 }

 

 #endif /* _ST_LLD_H_ */

diff --git a/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c b/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c
new file mode 100644
index 0000000..635e9b2
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c
@@ -0,0 +1,818 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+/*
+   This file was derived from the ICU subsystem code, modified to achieve
+   timing measurements on 2 and/or 4 channel STM32 timers by Dave Camarillo.
+ */
+/*
+   Concepts and parts of this file have been contributed by Fabio Utzig and
+   Xo Wang.
+ */
+
+
+/**
+ * @file    STM32/timcap_lld.c
+ * @brief   STM32 TIMCAP subsystem low level driver header.
+ *
+ * @addtogroup TIMCAP
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+#if HAL_USE_TIMCAP || defined(__DOXYGEN__)
+
+#include "stm32_tim.h"
+#include "timcap.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/**
+ * @brief   TIMCAPD1 driver identifier.
+ * @note    The driver TIMCAPD1 allocates the complex timer TIM1 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM1 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD1;
+#endif
+
+/**
+ * @brief   TIMCAPD2 driver identifier.
+ * @note    The driver TIMCAPD1 allocates the timer TIM2 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM2 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD2;
+#endif
+
+/**
+ * @brief   TIMCAPD3 driver identifier.
+ * @note    The driver TIMCAPD1 allocates the timer TIM3 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM3 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD3;
+#endif
+
+/**
+ * @brief   TIMCAPD4 driver identifier.
+ * @note    The driver TIMCAPD4 allocates the timer TIM4 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM4 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD4;
+#endif
+
+/**
+ * @brief   TIMCAPD5 driver identifier.
+ * @note    The driver TIMCAPD5 allocates the timer TIM5 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM5 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD5;
+#endif
+
+/**
+ * @brief   TIMCAPD8 driver identifier.
+ * @note    The driver TIMCAPD8 allocates the timer TIM8 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM8 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD8;
+#endif
+
+/**
+ * @brief   TIMCAPD9 driver identifier.
+ * @note    The driver TIMCAPD9 allocates the timer TIM9 when enabled.
+ */
+#if STM32_TIMCAP_USE_TIM9 || defined(__DOXYGEN__)
+TIMCAPDriver TIMCAPD9;
+#endif
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+
+/**
+ * @brief   Returns the maximum channel number for the respective TIMCAP driver.
+ *          Note: different timer perepherials on the STM32 have between 1 and 4
+ *          CCR registers.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ */
+static timcapchannel_t timcap_get_max_timer_channel(const TIMCAPDriver *timcapp) {
+  //Choose a sane default value
+#if STM32_TIMCAP_USE_TIM1 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD1 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM2 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD2 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM3 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD3 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM4 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD4 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM5 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD5 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM8 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD8 ) {
+    return(TIMCAP_CHANNEL_4);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM9 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD9 ) {
+    return(TIMCAP_CHANNEL_2);
+  }
+#endif
+
+  /*Return a conservative default value.*/
+  return(TIMCAP_CHANNEL_1);
+}
+
+
+/**
+ * @brief   Returns the maximum value for the ARR register of a given timer.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ */
+static uint32_t timcap_get_max_arr(const TIMCAPDriver *timcapp) {
+  //Choose a sane default value
+#if STM32_TIMCAP_USE_TIM1 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD1 ) {
+    return(UINT16_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM2 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD2 ) {
+    return(UINT32_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM3 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD3 ) {
+    return(UINT16_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM4 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD4 ) {
+    return(UINT16_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM5 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD5 ) {
+    return(UINT32_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM8 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD8 ) {
+    return(UINT16_MAX);
+  }
+#endif
+
+#if STM32_TIMCAP_USE_TIM9 || defined(__DOXYGEN__)
+  if( timcapp == &TIMCAPD9 ) {
+    return(UINT16_MAX);
+  }
+#endif
+
+  /*Return a conservative default value.*/
+  return(UINT16_MAX);
+}
+
+/**
+ * @brief   Shared IRQ handler.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ */
+static void timcap_lld_serve_interrupt(TIMCAPDriver *timcapp) {
+  uint16_t sr;
+
+  sr  = timcapp->tim->SR;
+  sr &= timcapp->tim->DIER & STM32_TIM_DIER_IRQ_MASK;
+  timcapp->tim->SR = ~sr;
+
+  if ((sr & STM32_TIM_SR_CC1IF) != 0 && timcapp->config->capture_cb_array[TIMCAP_CHANNEL_1] != NULL )
+    _timcap_isr_invoke_channel1_cb(timcapp);
+
+  if ((sr & STM32_TIM_SR_CC2IF) != 0 && timcapp->config->capture_cb_array[TIMCAP_CHANNEL_2] != NULL )
+    _timcap_isr_invoke_channel2_cb(timcapp);
+
+  if ((sr & STM32_TIM_SR_CC3IF) != 0 && timcapp->config->capture_cb_array[TIMCAP_CHANNEL_3] != NULL )
+    _timcap_isr_invoke_channel3_cb(timcapp);
+
+  if ((sr & STM32_TIM_SR_CC4IF) != 0 && timcapp->config->capture_cb_array[TIMCAP_CHANNEL_4] != NULL )
+    _timcap_isr_invoke_channel4_cb(timcapp);
+
+  if ((sr & STM32_TIM_SR_UIF) != 0 && timcapp->config->overflow_cb != NULL)
+    _timcap_isr_invoke_overflow_cb(timcapp);
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers.                                                */
+/*===========================================================================*/
+
+#if STM32_TIMCAP_USE_TIM1
+#if !defined(STM32_TIM1_UP_HANDLER)
+#error "STM32_TIM1_UP_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM1 compare interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD1);
+
+  CH_IRQ_EPILOGUE();
+}
+
+#if !defined(STM32_TIM1_CC_HANDLER)
+#error "STM32_TIM1_CC_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM1 compare interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD1);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM1 */
+
+#if STM32_TIMCAP_USE_TIM2
+#if !defined(STM32_TIM2_HANDLER)
+#error "STM32_TIM2_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM2 interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD2);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM2 */
+
+#if STM32_TIMCAP_USE_TIM3
+#if !defined(STM32_TIM3_HANDLER)
+#error "STM32_TIM3_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM3 interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD3);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM3 */
+
+#if STM32_TIMCAP_USE_TIM4
+#if !defined(STM32_TIM4_HANDLER)
+#error "STM32_TIM4_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM4 interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD4);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM4 */
+
+#if STM32_TIMCAP_USE_TIM5
+#if !defined(STM32_TIM5_HANDLER)
+#error "STM32_TIM5_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM5 interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD5);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM5 */
+
+#if STM32_TIMCAP_USE_TIM8
+#if !defined(STM32_TIM8_UP_HANDLER)
+#error "STM32_TIM8_UP_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM8 compare interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD8);
+
+  CH_IRQ_EPILOGUE();
+}
+
+#if !defined(STM32_TIM8_CC_HANDLER)
+#error "STM32_TIM8_CC_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM8 compare interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD8);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM8 */
+
+#if STM32_TIMCAP_USE_TIM9
+#if !defined(STM32_TIM9_HANDLER)
+#error "STM32_TIM9_HANDLER not defined"
+#endif
+/**
+ * @brief   TIM9 interrupt handler.
+ * @note    It is assumed that the various sources are only activated if the
+ *          associated callback pointer is not equal to @p NULL in order to not
+ *          perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
+
+  CH_IRQ_PROLOGUE();
+
+  timcap_lld_serve_interrupt(&TIMCAPD9);
+
+  CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_TIMCAP_USE_TIM9 */
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+/**
+ * @brief   Low level TIMCAP driver initialization.
+ *
+ * @notapi
+ */
+void timcap_lld_init(void) {
+
+#if STM32_TIMCAP_USE_TIM1
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD1);
+  TIMCAPD1.tim = STM32_TIM1;
+#endif
+
+#if STM32_TIMCAP_USE_TIM2
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD2);
+  TIMCAPD2.tim = STM32_TIM2;
+#endif
+
+#if STM32_TIMCAP_USE_TIM3
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD3);
+  TIMCAPD3.tim = STM32_TIM3;
+#endif
+
+#if STM32_TIMCAP_USE_TIM4
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD4);
+  TIMCAPD4.tim = STM32_TIM4;
+#endif
+
+#if STM32_TIMCAP_USE_TIM5
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD5);
+  TIMCAPD5.tim = STM32_TIM5;
+#endif
+
+#if STM32_TIMCAP_USE_TIM8
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD8);
+  TIMCAPD8.tim = STM32_TIM8;
+#endif
+
+#if STM32_TIMCAP_USE_TIM9
+  /* Driver initialization.*/
+  timcapObjectInit(&TIMCAPD9);
+  TIMCAPD9.tim = STM32_TIM9;
+#endif
+}
+
+/**
+ * @brief   Configures and activates the TIMCAP peripheral.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+void timcap_lld_start(TIMCAPDriver *timcapp) {
+  uint32_t psc;
+
+  const timcapchannel_t tim_max_channel = timcap_get_max_timer_channel(timcapp);
+
+  if (timcapp->state == TIMCAP_STOP) {
+    /* Clock activation and timer reset.*/
+#if STM32_TIMCAP_USE_TIM1
+    if (&TIMCAPD1 == timcapp) {
+      rccEnableTIM1(FALSE);
+      rccResetTIM1();
+      nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_TIMCAP_TIM1_IRQ_PRIORITY);
+      nvicEnableVector(STM32_TIM1_CC_NUMBER, STM32_TIMCAP_TIM1_IRQ_PRIORITY);
+#if defined(STM32_TIM1CLK)
+      timcapp->clock = STM32_TIM1CLK;
+#else
+      timcapp->clock = STM32_TIMCLK2;
+#endif
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM2
+    if (&TIMCAPD2 == timcapp) {
+      rccEnableTIM2(FALSE);
+      rccResetTIM2();
+      nvicEnableVector(STM32_TIM2_NUMBER, STM32_TIMCAP_TIM2_IRQ_PRIORITY);
+      timcapp->clock = STM32_TIMCLK1;
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM3
+    if (&TIMCAPD3 == timcapp) {
+      rccEnableTIM3(FALSE);
+      rccResetTIM3();
+      nvicEnableVector(STM32_TIM3_NUMBER, STM32_TIMCAP_TIM3_IRQ_PRIORITY);
+      timcapp->clock = STM32_TIMCLK1;
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM4
+    if (&TIMCAPD4 == timcapp) {
+      rccEnableTIM4(FALSE);
+      rccResetTIM4();
+      nvicEnableVector(STM32_TIM4_NUMBER, STM32_TIMCAP_TIM4_IRQ_PRIORITY);
+      timcapp->clock = STM32_TIMCLK1;
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM5
+    if (&TIMCAPD5 == timcapp) {
+      rccEnableTIM5(FALSE);
+      rccResetTIM5();
+      nvicEnableVector(STM32_TIM5_NUMBER, STM32_TIMCAP_TIM5_IRQ_PRIORITY);
+      timcapp->clock = STM32_TIMCLK1;
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM8
+    if (&TIMCAPD8 == timcapp) {
+      rccEnableTIM8(FALSE);
+      rccResetTIM8();
+      nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_TIMCAP_TIM8_IRQ_PRIORITY);
+      nvicEnableVector(STM32_TIM8_CC_NUMBER, STM32_TIMCAP_TIM8_IRQ_PRIORITY);
+#if defined(STM32_TIM8CLK)
+      timcapp->clock = STM32_TIM8CLK;
+#else
+      timcapp->clock = STM32_TIMCLK2;
+#endif
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM9
+    if (&TIMCAPD9 == timcapp) {
+      rccEnableTIM9(FALSE);
+      rccResetTIM9();
+      nvicEnableVector(STM32_TIM9_NUMBER, STM32_TIMCAP_TIM9_IRQ_PRIORITY);
+      timcapp->clock = STM32_TIMCLK1;
+    }
+#endif
+  }
+  else {
+    /* Driver re-configuration scenario, it must be stopped first.*/
+    timcapp->tim->CR1    = 0;                  /* Timer disabled.              */
+    timcapp->tim->DIER   = timcapp->config->dier &/* DMA-related DIER settings.   */
+                        ~STM32_TIM_DIER_IRQ_MASK;
+    timcapp->tim->SR     = 0;                  /* Clear eventual pending IRQs. */
+    timcapp->tim->CCR[0] = 0;                  /* Comparator 1 disabled.       */
+    timcapp->tim->CCR[1] = 0;                  /* Comparator 2 disabled.       */
+    if( tim_max_channel >= TIMCAP_CHANNEL_3 )
+      timcapp->tim->CCR[2] = 0;                /* Comparator 3 disabled.       */
+    if( tim_max_channel >= TIMCAP_CHANNEL_4 )
+      timcapp->tim->CCR[3] = 0;                /* Comparator 4 disabled.       */
+    timcapp->tim->CNT    = 0;                  /* Counter reset to zero.       */
+  }
+
+  /* Timer configuration.*/
+  psc = (timcapp->clock / timcapp->config->frequency) - 1;
+  osalDbgAssert((psc <= 0xFFFF) &&
+              ((psc + 1) * timcapp->config->frequency) == timcapp->clock,
+              "invalid frequency");
+  timcapp->tim->PSC  = (uint16_t)psc;
+  timcapp->tim->ARR = timcap_get_max_arr(timcapp);
+
+  timcapp->tim->CCMR1 = 0;
+  timcapp->tim->CCMR2 = 0;
+  timcapp->tim->CCER = 0;
+
+  timcapchannel_t chan = TIMCAP_CHANNEL_1;
+
+  /*go through each non-NULL callback channel and enable the capture register on rising/falling edge*/
+  for( chan = TIMCAP_CHANNEL_1; chan <= tim_max_channel; chan++ ) {
+    if( timcapp->config->capture_cb_array[chan] == NULL ) {
+      continue;
+    }
+
+    switch (chan) {
+      case TIMCAP_CHANNEL_1:
+        /*CCMR1_CC1S = 01 = CH1 Input on TI1.*/
+        timcapp->tim->CCMR1 |= STM32_TIM_CCMR1_CC1S(1);
+        break;
+      case TIMCAP_CHANNEL_2:
+        /*CCMR1_CC2S = 10 = CH2 Input on TI1.*/
+        timcapp->tim->CCMR1 |= STM32_TIM_CCMR1_CC2S(1);
+        break;
+      case TIMCAP_CHANNEL_3:
+        timcapp->tim->CCMR2 |= STM32_TIM_CCMR2_CC3S(1);
+        break;
+      case TIMCAP_CHANNEL_4:
+        timcapp->tim->CCMR2 |= STM32_TIM_CCMR2_CC4S(1);
+        break;
+    }
+
+    /* The CCER settings depend on the selected trigger mode.
+       TIMCAP_INPUT_DISABLED: Input not used.
+       TIMCAP_INPUT_ACTIVE_HIGH: Active on rising edge, idle on falling edge.
+       TIMCAP_INPUT_ACTIVE_LOW:  Active on falling edge, idle on rising edge.*/
+    if (timcapp->config->modes[chan] == TIMCAP_INPUT_ACTIVE_HIGH) {
+      switch (chan) {
+        case TIMCAP_CHANNEL_1:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC1E;
+          break;
+        case TIMCAP_CHANNEL_2:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC2E;
+          break;
+        case TIMCAP_CHANNEL_3:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC3E;
+          break;
+        case TIMCAP_CHANNEL_4:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC4E;
+          break;
+      }
+    }
+    else if (timcapp->config->modes[chan] == TIMCAP_INPUT_ACTIVE_LOW) {
+      switch (chan) {
+        case TIMCAP_CHANNEL_1:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC1E | STM32_TIM_CCER_CC1P;
+          break;
+        case TIMCAP_CHANNEL_2:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC2E | STM32_TIM_CCER_CC2P;
+          break;
+        case TIMCAP_CHANNEL_3:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC3E | STM32_TIM_CCER_CC3P;
+          break;
+        case TIMCAP_CHANNEL_4:
+          timcapp->tim->CCER |= STM32_TIM_CCER_CC4E | STM32_TIM_CCER_CC4P;
+          break;
+      }
+    }
+    else {
+      switch (chan) {
+        case TIMCAP_CHANNEL_1:
+          timcapp->tim->CCER &= ~STM32_TIM_CCER_CC1E;
+          break;
+        case TIMCAP_CHANNEL_2:
+          timcapp->tim->CCER &= ~STM32_TIM_CCER_CC2E;
+          break;
+        case TIMCAP_CHANNEL_3:
+          timcapp->tim->CCER &= ~STM32_TIM_CCER_CC3E;
+          break;
+        case TIMCAP_CHANNEL_4:
+          timcapp->tim->CCER &= ~STM32_TIM_CCER_CC4E;
+          break;
+      }
+    }
+    /* Direct pointers to the capture registers in order to make reading
+         data faster from within callbacks.*/
+    timcapp->ccr_p[chan] = &timcapp->tim->CCR[chan];
+  }
+
+  /* SMCR_TS  = 101, input is TI1FP1.*/
+  timcapp->tim->SMCR  = STM32_TIM_SMCR_TS(5);
+}
+
+/**
+ * @brief   Deactivates the TIMCAP peripheral.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+void timcap_lld_stop(TIMCAPDriver *timcapp) {
+
+  if (timcapp->state == TIMCAP_READY) {
+    /* Clock deactivation.*/
+    timcapp->tim->CR1  = 0;                    /* Timer disabled.              */
+    timcapp->tim->DIER = 0;                    /* All IRQs disabled.           */
+    timcapp->tim->SR   = 0;                    /* Clear eventual pending IRQs. */
+
+#if STM32_TIMCAP_USE_TIM1
+    if (&TIMCAPD1 == timcapp) {
+      nvicDisableVector(STM32_TIM1_UP_NUMBER);
+      nvicDisableVector(STM32_TIM1_CC_NUMBER);
+      rccDisableTIM1(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM2
+    if (&TIMCAPD2 == timcapp) {
+      nvicDisableVector(STM32_TIM2_NUMBER);
+      rccDisableTIM2(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM3
+    if (&TIMCAPD3 == timcapp) {
+      nvicDisableVector(STM32_TIM3_NUMBER);
+      rccDisableTIM3(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM4
+    if (&TIMCAPD4 == timcapp) {
+      nvicDisableVector(STM32_TIM4_NUMBER);
+      rccDisableTIM4(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM5
+    if (&TIMCAPD5 == timcapp) {
+      nvicDisableVector(STM32_TIM5_NUMBER);
+      rccDisableTIM5(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM8
+    if (&TIMCAPD8 == timcapp) {
+      nvicDisableVector(STM32_TIM8_UP_NUMBER);
+      nvicDisableVector(STM32_TIM8_CC_NUMBER);
+      rccDisableTIM8(FALSE);
+    }
+#endif
+#if STM32_TIMCAP_USE_TIM9
+    if (&TIMCAPD9 == timcapp) {
+      nvicDisableVector(STM32_TIM9_NUMBER);
+      rccDisableTIM9(FALSE);
+    }
+#endif
+  }
+}
+
+/**
+ * @brief   Enables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+void timcap_lld_enable(TIMCAPDriver *timcapp) {
+
+  timcapp->tim->EGR |= STM32_TIM_EGR_UG;
+  timcapp->tim->SR = 0;                        /* Clear pending IRQs (if any). */
+
+  timcapchannel_t chan = TIMCAP_CHANNEL_1;
+  const timcapchannel_t tim_max_channel = timcap_get_max_timer_channel(timcapp);
+  for( chan = TIMCAP_CHANNEL_1; chan <= tim_max_channel; chan++ ) {
+    if( timcapp->config->capture_cb_array[chan] != NULL 
+      && timcapp->config->modes[chan] != TIMCAP_INPUT_DISABLED ) {
+      switch (chan) {
+        case TIMCAP_CHANNEL_1:
+          timcapp->tim->DIER |= STM32_TIM_DIER_CC1IE;
+          break;
+        case TIMCAP_CHANNEL_2:
+          timcapp->tim->DIER |= STM32_TIM_DIER_CC2IE;
+          break;
+        case TIMCAP_CHANNEL_3:
+          timcapp->tim->DIER |= STM32_TIM_DIER_CC3IE;
+          break;
+        case TIMCAP_CHANNEL_4:
+          timcapp->tim->DIER |= STM32_TIM_DIER_CC4IE;
+          break;
+      }
+    }
+  }
+
+  if (timcapp->config->overflow_cb != NULL)
+    timcapp->tim->DIER |= STM32_TIM_DIER_UIE;
+  
+  timcapp->tim->CR1 = STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN | timcapp->config->cr1;
+}
+
+/**
+ * @brief   Disables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @notapi
+ */
+void timcap_lld_disable(TIMCAPDriver *timcapp) {
+
+  timcapp->tim->CR1   = 0;                     /* Initially stopped.           */
+  timcapp->tim->SR    = 0;                     /* Clear pending IRQs (if any). */
+
+  /* All interrupts disabled.*/
+  timcapp->tim->DIER &= ~STM32_TIM_DIER_IRQ_MASK;
+}
+
+#endif /* HAL_USE_TIMCAP */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.h b/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.h
new file mode 100644
index 0000000..d39c438
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.h
@@ -0,0 +1,390 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    STM32/timcap_lld.h
+ * @brief   STM32 TIMCAP subsystem low level driver header.
+ *
+ * @addtogroup TIMCAP
+ * @{
+ */
+
+#ifndef _TIMCAP_LLD_H_
+#define _TIMCAP_LLD_H_
+
+#include "ch.h"
+#include "hal.h"
+#include "stm32_tim.h"
+
+
+#if HAL_USE_TIMCAP || defined(__DOXYGEN__)
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/**
+ * @name    Configuration options
+ * @{
+ */
+/**
+ * @brief   TIMCAPD1 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD1 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM1) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM1                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD2 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD2 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM2) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM2                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD3 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD3 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM3) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM3                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD4 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD4 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM4) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM4                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD5 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD5 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM5) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM5                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD8 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD8 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM8) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM8                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD9 driver enable switch.
+ * @details If set to @p TRUE the support for TIMCAPD9 is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(STM32_TIMCAP_USE_TIM9) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_USE_TIM9                  FALSE
+#endif
+
+/**
+ * @brief   TIMCAPD1 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM1_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD2 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM2_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD3 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM3_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD4 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM4_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD5 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM5_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM5_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD8 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM8_IRQ_PRIORITY         7
+#endif
+
+/**
+ * @brief   TIMCAPD9 interrupt priority level setting.
+ */
+#if !defined(STM32_TIMCAP_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_TIMCAP_TIM9_IRQ_PRIORITY         7
+#endif
+/** @} */
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+#if STM32_TIMCAP_USE_TIM1 && !STM32_HAS_TIM1
+#error "TIM1 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM2 && !STM32_HAS_TIM2
+#error "TIM2 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM3 && !STM32_HAS_TIM3
+#error "TIM3 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM4 && !STM32_HAS_TIM4
+#error "TIM4 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM5 && !STM32_HAS_TIM5
+#error "TIM5 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM8 && !STM32_HAS_TIM8
+#error "TIM8 not present in the selected device"
+#endif
+
+#if STM32_TIMCAP_USE_TIM9 && !STM32_HAS_TIM9
+#error "TIM9 not present in the selected device"
+#endif
+
+#if !STM32_TIMCAP_USE_TIM1 && !STM32_TIMCAP_USE_TIM2 &&                           \
+    !STM32_TIMCAP_USE_TIM3 && !STM32_TIMCAP_USE_TIM4 &&                           \
+    !STM32_TIMCAP_USE_TIM5 && !STM32_TIMCAP_USE_TIM8 &&                           \
+    !STM32_TIMCAP_USE_TIM9
+#error "TIMCAP driver activated but no TIM peripheral assigned"
+#endif
+
+#if STM32_TIMCAP_USE_TIM1 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM1_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM1"
+#endif
+
+#if STM32_TIMCAP_USE_TIM2 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM2_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM2"
+#endif
+
+#if STM32_TIMCAP_USE_TIM3 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM3_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM3"
+#endif
+
+#if STM32_TIMCAP_USE_TIM4 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM4_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM4"
+#endif
+
+#if STM32_TIMCAP_USE_TIM5 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM5_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM5"
+#endif
+
+#if STM32_TIMCAP_USE_TIM8 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM8_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM8"
+#endif
+
+#if STM32_TIMCAP_USE_TIM9 &&                                                   \
+    !OSAL_IRQ_IS_VALID_PRIORITY(STM32_TIMCAP_TIM9_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM9"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   TIMCAP driver mode.
+ */
+typedef enum {
+  TIMCAP_INPUT_DISABLED = 0,
+  TIMCAP_INPUT_ACTIVE_HIGH = 1,        /**< Trigger on rising edge.            */
+  TIMCAP_INPUT_ACTIVE_LOW = 2,         /**< Trigger on falling edge.           */
+} timcapmode_t;
+
+/**
+ * @brief   TIMCAP frequency type.
+ */
+typedef uint32_t timcapfreq_t;
+
+/**
+ * @brief   TIMCAP channel type.
+ */
+typedef enum {
+  TIMCAP_CHANNEL_1 = 0,              /**< Use TIMxCH1.      */
+  TIMCAP_CHANNEL_2 = 1,              /**< Use TIMxCH2.      */
+  TIMCAP_CHANNEL_3 = 2,              /**< Use TIMxCH3.      */
+  TIMCAP_CHANNEL_4 = 3,              /**< Use TIMxCH4.      */
+} timcapchannel_t;
+
+
+/**
+ * @brief   Driver configuration structure.
+ * @note    It could be empty on some architectures.
+ */
+typedef struct {
+  /**
+   * @brief   Driver mode.
+   */
+  timcapmode_t                 modes[4];
+  /**
+   * @brief   Timer clock in Hz.
+   * @note    The low level can use assertions in order to catch invalid
+   *          frequency specifications.
+   */
+  timcapfreq_t                 frequency;
+
+  /**
+   * @brief   Callback when a capture occurs
+   */
+  timcapcallback_t             capture_cb_array[4];
+
+  /**
+   * @brief   Callback for timer overflow.
+   */
+  timcapcallback_t             overflow_cb;
+
+  /* End of the mandatory fields.*/
+
+  /**
+   * @brief TIM DIER register initialization data.
+   * @note  The value of this field should normally be equal to zero.
+   * @note  Only the DMA-related bits can be specified in this field.
+   */
+  uint32_t                  dier;
+  
+  /**
+   * @brief TIM CR1 register initialization data.
+   * @note  The value of this field should normally be equal to zero.
+   */
+  uint32_t                  cr1;
+} TIMCAPConfig;
+
+/**
+ * @brief   Structure representing an TIMCAP driver.
+ */
+struct TIMCAPDriver {
+  /**
+   * @brief Driver state.
+   */
+  timcapstate_t                state;
+  /**
+   * @brief Current configuration data.
+   */
+  const TIMCAPConfig           *config;
+#if defined(TIMCAP_DRIVER_EXT_FIELDS)
+  TIMCAP_DRIVER_EXT_FIELDS
+#endif
+  /* End of the mandatory fields.*/
+  /**
+   * @brief Timer base clock.
+   */
+  uint32_t                  clock;
+  /**
+   * @brief Pointer to the TIMx registers block.
+   */
+  stm32_tim_t               *tim;
+  /**
+   * @brief CCR register used for capture.
+   */
+  volatile uint32_t         *ccr_p[4];
+};
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+//FIXME document this
+#define timcap_lld_get_ccr(timcapp, channel) (*((timcapp)->ccr_p[channel]) + 1)
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+#if STM32_TIMCAP_USE_TIM1 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD1;
+#endif
+
+#if STM32_TIMCAP_USE_TIM2 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD2;
+#endif
+
+#if STM32_TIMCAP_USE_TIM3 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD3;
+#endif
+
+#if STM32_TIMCAP_USE_TIM4 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD4;
+#endif
+
+#if STM32_TIMCAP_USE_TIM5 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD5;
+#endif
+
+#if STM32_TIMCAP_USE_TIM8 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD8;
+#endif
+
+#if STM32_TIMCAP_USE_TIM9 && !defined(__DOXYGEN__)
+extern TIMCAPDriver TIMCAPD9;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void timcap_lld_init(void);
+  void timcap_lld_start(TIMCAPDriver *timcapp);
+  void timcap_lld_stop(TIMCAPDriver *timcapp);
+  void timcap_lld_enable(TIMCAPDriver *timcapp);
+  void timcap_lld_disable(TIMCAPDriver *timcapp);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_TIMCAP */
+
+#endif /* _TIMCAP_LLD_H_ */
+
+/** @} */
diff --git a/os/hal/ports/STM32/LLD/USBHv1/stm32_otg.h b/os/hal/ports/STM32/LLD/USBHv1/stm32_otg.h
new file mode 100644
index 0000000..268c9bf
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/USBHv1/stm32_otg.h
@@ -0,0 +1,929 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    stm32_otg.h

+ * @brief   STM32 OTG registers layout header.

+ *

+ * @addtogroup USB

+ * @{

+ */

+

+

+#ifndef _STM32_OTG_H_

+#define _STM32_OTG_H_

+

+/**

+ * @brief   Number of the implemented endpoints in OTG_FS.

+ * @details This value does not include the endpoint 0 that is always present.

+ */

+#define STM32_OTG1_ENDOPOINTS_NUMBER    3

+

+/**

+ * @brief   Number of the implemented endpoints in OTG_HS.

+ * @details This value does not include the endpoint 0 that is always present.

+ */

+#define STM32_OTG2_ENDOPOINTS_NUMBER    5

+

+/**

+ * @brief   OTG_FS FIFO memory size in words.

+ */

+#define STM32_OTG1_FIFO_MEM_SIZE        320

+

+/**

+ * @brief   OTG_HS FIFO memory size in words.

+ */

+#define STM32_OTG2_FIFO_MEM_SIZE        1024

+

+/**

+ * @brief   Host channel registers group.

+ */

+typedef struct {

+  volatile uint32_t HCCHAR;     /**< @brief Host channel characteristics

+                                            register.                       */

+  volatile uint32_t resvd8;

+  volatile uint32_t HCINT;      /**< @brief Host channel interrupt register.*/

+  volatile uint32_t HCINTMSK;   /**< @brief Host channel interrupt mask

+                                            register.                       */

+  volatile uint32_t HCTSIZ;     /**< @brief Host channel transfer size

+                                            register.                       */

+  volatile uint32_t resvd14;

+  volatile uint32_t resvd18;

+  volatile uint32_t resvd1c;

+} stm32_otg_host_chn_t;

+

+/**

+ * @brief   Device input endpoint registers group.

+ */

+typedef struct {

+  volatile uint32_t DIEPCTL;    /**< @brief Device control IN endpoint

+                                            control register.               */

+  volatile uint32_t resvd4;

+  volatile uint32_t DIEPINT;    /**< @brief Device IN endpoint interrupt

+                                            register.                       */

+  volatile uint32_t resvdC;

+  volatile uint32_t DIEPTSIZ;   /**< @brief Device IN endpoint transfer size

+                                            register.                       */

+  volatile uint32_t resvd14;

+  volatile uint32_t DTXFSTS;    /**< @brief Device IN endpoint transmit FIFO

+                                            status register.                */

+  volatile uint32_t resvd1C;

+} stm32_otg_in_ep_t;

+

+/**

+ * @brief   Device output endpoint registers group.

+ */

+typedef struct {

+  volatile uint32_t DOEPCTL;    /**< @brief Device control OUT endpoint

+                                            control register.               */

+  volatile uint32_t resvd4;

+  volatile uint32_t DOEPINT;    /**< @brief Device OUT endpoint interrupt

+                                            register.                       */

+  volatile uint32_t resvdC;

+  volatile uint32_t DOEPTSIZ;   /**< @brief Device OUT endpoint transfer

+                                            size register.                  */

+  volatile uint32_t resvd14;

+  volatile uint32_t resvd18;

+  volatile uint32_t resvd1C;

+} stm32_otg_out_ep_t;

+

+/**

+ * @brief   USB registers memory map.

+ */

+typedef struct {

+  volatile uint32_t GOTGCTL;    /**< @brief OTG control and status register.*/

+  volatile uint32_t GOTGINT;    /**< @brief OTG interrupt register.         */

+  volatile uint32_t GAHBCFG;    /**< @brief AHB configuration register.     */

+  volatile uint32_t GUSBCFG;    /**< @brief USB configuration register.     */

+  volatile uint32_t GRSTCTL;    /**< @brief Reset register size.            */

+  volatile uint32_t GINTSTS;    /**< @brief Interrupt register.             */

+  volatile uint32_t GINTMSK;    /**< @brief Interrupt mask register.        */

+  volatile uint32_t GRXSTSR;    /**< @brief Receive status debug read

+                                            register.                       */

+  volatile uint32_t GRXSTSP;    /**< @brief Receive status read/pop

+                                            register.                       */

+  volatile uint32_t GRXFSIZ;    /**< @brief Receive FIFO size register.     */

+  volatile uint32_t DIEPTXF0;   /**< @brief Endpoint 0 transmit FIFO size

+                                            register.                       */

+  volatile uint32_t HNPTXSTS;   /**< @brief Non-periodic transmit FIFO/queue

+                                            status register.                */

+  volatile uint32_t resvd30;

+  volatile uint32_t resvd34;

+  volatile uint32_t GCCFG;      /**< @brief General core configuration.     */

+  volatile uint32_t CID;        /**< @brief Core ID register.               */

+  volatile uint32_t resvd58[48];

+  volatile uint32_t HPTXFSIZ;   /**< @brief Host periodic transmit FIFO size

+                                            register.                       */

+  volatile uint32_t DIEPTXF[15];/**< @brief Device IN endpoint transmit FIFO

+                                            size registers.                 */

+  volatile uint32_t resvd140[176];

+  volatile uint32_t HCFG;       /**< @brief Host configuration register.    */

+  volatile uint32_t HFIR;       /**< @brief Host frame interval register.   */

+  volatile uint32_t HFNUM;      /**< @brief Host frame number/frame time

+                                            Remaining register.             */

+  volatile uint32_t resvd40C;

+  volatile uint32_t HPTXSTS;    /**< @brief Host periodic transmit FIFO/queue

+                                            status register.                */

+  volatile uint32_t HAINT;      /**< @brief Host all channels interrupt

+                                            register.                       */

+  volatile uint32_t HAINTMSK;   /**< @brief Host all channels interrupt mask

+                                            register.                       */

+  volatile uint32_t resvd41C[9];

+  volatile uint32_t HPRT;       /**< @brief Host port control and status

+                                            register.                       */

+  volatile uint32_t resvd444[47];

+  stm32_otg_host_chn_t hc[16];  /**< @brief Host channels array.            */

+  volatile uint32_t resvd700[64];

+  volatile uint32_t DCFG;       /**< @brief Device configuration register.  */

+  volatile uint32_t DCTL;       /**< @brief Device control register.        */

+  volatile uint32_t DSTS;       /**< @brief Device status register.         */

+  volatile uint32_t resvd80C;

+  volatile uint32_t DIEPMSK;    /**< @brief Device IN endpoint common

+                                            interrupt mask register.        */

+  volatile uint32_t DOEPMSK;    /**< @brief Device OUT endpoint common

+                                            interrupt mask register.        */

+  volatile uint32_t DAINT;      /**< @brief Device all endpoints interrupt

+                                            register.                       */

+  volatile uint32_t DAINTMSK;   /**< @brief Device all endpoints interrupt

+                                            mask register.                  */

+  volatile uint32_t resvd820;

+  volatile uint32_t resvd824;

+  volatile uint32_t DVBUSDIS;   /**< @brief Device VBUS discharge time

+                                            register.                       */

+  volatile uint32_t DVBUSPULSE; /**< @brief Device VBUS pulsing time

+                                            register.                       */

+  volatile uint32_t resvd830;

+  volatile uint32_t DIEPEMPMSK; /**< @brief Device IN endpoint FIFO empty

+                                            interrupt mask register.        */

+  volatile uint32_t resvd838;

+  volatile uint32_t resvd83C;

+  volatile uint32_t resvd840[16];

+  volatile uint32_t resvd880[16];

+  volatile uint32_t resvd8C0[16];

+  stm32_otg_in_ep_t ie[16];     /**< @brief Input endpoints.                */

+  stm32_otg_out_ep_t oe[16];    /**< @brief Output endpoints.               */

+  volatile uint32_t resvdD00[64];

+  volatile uint32_t PCGCCTL;    /**< @brief Power and clock gating control

+                                            register.                       */

+  volatile uint32_t resvdE04[127];

+  volatile uint32_t FIFO[16][1024];

+} stm32_otg_t;

+

+/**

+ * @name GOTGCTL register bit definitions

+ * @{

+ */

+#define GOTGCTL_BSVLD           (1U<<19)    /**< B-Session Valid.           */

+#define GOTGCTL_ASVLD           (1U<<18)    /**< A-Session Valid.           */

+#define GOTGCTL_DBCT            (1U<<17)    /**< Long/Short debounce time.  */

+#define GOTGCTL_CIDSTS          (1U<<16)    /**< Connector ID status.       */

+#define GOTGCTL_EHEN            (1U<<12)

+#define GOTGCTL_DHNPEN          (1U<<11)    /**< Device HNP enabled.        */

+#define GOTGCTL_HSHNPEN         (1U<<10)    /**< Host Set HNP enable.       */

+#define GOTGCTL_HNPRQ           (1U<<9)     /**< HNP request.               */

+#define GOTGCTL_HNGSCS          (1U<<8)     /**< Host negotiation success.  */

+#define GOTGCTL_BVALOVAL        (1U<<7)

+#define GOTGCTL_BVALOEN         (1U<<6)

+#define GOTGCTL_AVALOVAL        (1U<<5)

+#define GOTGCTL_AVALOEN         (1U<<4)

+#define GOTGCTL_VBVALOVAL       (1U<<3)

+#define GOTGCTL_VBVALOEN        (1U<<2)

+#define GOTGCTL_SRQ             (1U<<1)     /**< Session request.           */

+#define GOTGCTL_SRQSCS          (1U<<0)     /**< Session request success.   */

+/** @} */

+

+/**

+ * @name GOTGINT register bit definitions

+ * @{

+ */

+#define GOTGINT_DBCDNE          (1U<<19)    /**< Debounce done.             */

+#define GOTGINT_ADTOCHG         (1U<<18)    /**< A-Device timeout change.   */

+#define GOTGINT_HNGDET          (1U<<17)    /**< Host negotiation detected. */

+#define GOTGINT_HNSSCHG         (1U<<9)     /**< Host negotiation success

+                                                 status change.             */

+#define GOTGINT_SRSSCHG         (1U<<8)     /**< Session request success

+                                                 status change.             */

+#define GOTGINT_SEDET           (1U<<2)     /**< Session end detected.      */

+/** @} */

+

+/**

+ * @name GAHBCFG register bit definitions

+ * @{

+ */

+#define GAHBCFG_PTXFELVL        (1U<<8)     /**< Periodic TxFIFO empty

+                                                 level.                     */

+#define GAHBCFG_TXFELVL         (1U<<7)     /**< Non-periodic TxFIFO empty

+                                                 level.                     */

+#define GAHBCFG_DMAEN           (1U<<5)     /**< DMA enable (HS only).      */

+#define GAHBCFG_HBSTLEN_MASK    (15U<<1)    /**< Burst length/type mask (HS

+                                                 only).                     */

+#define GAHBCFG_HBSTLEN(n)      ((n)<<1)    /**< Burst length/type (HS

+                                                 only).                     */

+#define GAHBCFG_GINTMSK         (1U<<0)     /**< Global interrupt mask.     */

+/** @} */

+

+/**

+ * @name GUSBCFG register bit definitions

+ * @{

+ */

+#define GUSBCFG_CTXPKT          (1U<<31)    /**< Corrupt Tx packet.         */

+#define GUSBCFG_FDMOD           (1U<<30)    /**< Force Device Mode.         */

+#define GUSBCFG_FHMOD           (1U<<29)    /**< Force Host Mode.           */

+#define GUSBCFG_TRDT_MASK       (15U<<10)   /**< USB Turnaround time field

+                                                 mask.                      */

+#define GUSBCFG_TRDT(n)         ((n)<<10)   /**< USB Turnaround time field

+                                                 value.                     */

+#define GUSBCFG_HNPCAP          (1U<<9)     /**< HNP-Capable.               */

+#define GUSBCFG_SRPCAP          (1U<<8)     /**< SRP-Capable.               */

+#define GUSBCFG_PHYSEL          (1U<<6)     /**< USB 2.0 High-Speed PHY or

+                                                 USB 1.1 Full-Speed serial

+                                                 transceiver Select.        */

+#define GUSBCFG_TOCAL_MASK      (7U<<0)     /**< HS/FS timeout calibration

+                                                 field mask.                */

+#define GUSBCFG_TOCAL(n)        ((n)<<0)    /**< HS/FS timeout calibration

+                                                 field value.               */

+/** @} */

+

+/**

+ * @name GRSTCTL register bit definitions

+ * @{

+ */

+#define GRSTCTL_AHBIDL          (1U<<31)    /**< AHB Master Idle.           */

+#define GRSTCTL_TXFNUM_MASK     (31U<<6)    /**< TxFIFO number field mask.  */

+#define GRSTCTL_TXFNUM(n)       ((n)<<6)    /**< TxFIFO number field value. */

+#define GRSTCTL_TXFFLSH         (1U<<5)     /**< TxFIFO flush.              */

+#define GRSTCTL_RXFFLSH         (1U<<4)     /**< RxFIFO flush.              */

+#define GRSTCTL_FCRST           (1U<<2)     /**< Host frame counter reset.  */

+#define GRSTCTL_HSRST           (1U<<1)     /**< HClk soft reset.           */

+#define GRSTCTL_CSRST           (1U<<0)     /**< Core soft reset.           */

+/** @} */

+

+/**

+ * @name GINTSTS register bit definitions

+ * @{

+ */

+#define GINTSTS_WKUPINT         (1U<<31)    /**< Resume/Remote wakeup

+                                                 detected interrupt.        */

+#define GINTSTS_SRQINT          (1U<<30)    /**< Session request/New session

+                                                 detected interrupt.        */

+#define GINTSTS_DISCINT         (1U<<29)    /**< Disconnect detected

+                                                 interrupt.                 */

+#define GINTSTS_CIDSCHG         (1U<<28)    /**< Connector ID status change.*/

+#define GINTSTS_PTXFE           (1U<<26)    /**< Periodic TxFIFO empty.     */

+#define GINTSTS_HCINT           (1U<<25)    /**< Host channels interrupt.   */

+#define GINTSTS_HPRTINT         (1U<<24)    /**< Host port interrupt.       */

+#define GINTSTS_IPXFR           (1U<<21)    /**< Incomplete periodic

+                                                 transfer.                  */

+#define GINTSTS_IISOOXFR        (1U<<21)    /**< Incomplete isochronous OUT

+                                                 transfer.                  */

+#define GINTSTS_IISOIXFR        (1U<<20)    /**< Incomplete isochronous IN

+                                                 transfer.                  */

+#define GINTSTS_OEPINT          (1U<<19)    /**< OUT endpoints interrupt.   */

+#define GINTSTS_IEPINT          (1U<<18)    /**< IN endpoints interrupt.    */

+#define GINTSTS_EOPF            (1U<<15)    /**< End of periodic frame

+                                                 interrupt.                 */

+#define GINTSTS_ISOODRP         (1U<<14)    /**< Isochronous OUT packet

+                                                 dropped interrupt.         */

+#define GINTSTS_ENUMDNE         (1U<<13)    /**< Enumeration done.          */

+#define GINTSTS_USBRST          (1U<<12)    /**< USB reset.                 */

+#define GINTSTS_USBSUSP         (1U<<11)    /**< USB suspend.               */

+#define GINTSTS_ESUSP           (1U<<10)    /**< Early suspend.             */

+#define GINTSTS_GONAKEFF        (1U<<7)     /**< Global OUT NAK effective.  */

+#define GINTSTS_GINAKEFF        (1U<<6)     /**< Global IN non-periodic NAK

+                                                 effective.                 */

+#define GINTSTS_NPTXFE          (1U<<5)     /**< Non-periodic TxFIFO empty. */

+#define GINTSTS_RXFLVL          (1U<<4)     /**< RxFIFO non-empty.          */

+#define GINTSTS_SOF             (1U<<3)     /**< Start of frame.            */

+#define GINTSTS_OTGINT          (1U<<2)     /**< OTG interrupt.             */

+#define GINTSTS_MMIS            (1U<<1)     /**< Mode Mismatch interrupt.   */

+#define GINTSTS_CMOD            (1U<<0)     /**< Current mode of operation. */

+/** @} */

+

+/**

+ * @name GINTMSK register bit definitions

+ * @{

+ */

+#define GINTMSK_WKUM            (1U<<31)    /**< Resume/remote wakeup

+                                                 detected interrupt mask.   */

+#define GINTMSK_SRQM            (1U<<30)    /**< Session request/New session

+                                                 detected interrupt mask.   */

+#define GINTMSK_DISCM           (1U<<29)    /**< Disconnect detected

+                                                 interrupt mask.            */

+#define GINTMSK_CIDSCHGM        (1U<<28)    /**< Connector ID status change

+                                                 mask.                      */

+#define GINTMSK_PTXFEM          (1U<<26)    /**< Periodic TxFIFO empty mask.*/

+#define GINTMSK_HCM             (1U<<25)    /**< Host channels interrupt

+                                                 mask.                      */

+#define GINTMSK_HPRTM           (1U<<24)    /**< Host port interrupt mask.  */

+#define GINTMSK_IPXFRM          (1U<<21)    /**< Incomplete periodic

+                                                 transfer mask.             */

+#define GINTMSK_IISOOXFRM       (1U<<21)    /**< Incomplete isochronous OUT

+                                                 transfer mask.             */

+#define GINTMSK_IISOIXFRM       (1U<<20)    /**< Incomplete isochronous IN

+                                                 transfer mask.             */

+#define GINTMSK_OEPM            (1U<<19)    /**< OUT endpoints interrupt

+                                                 mask.                      */

+#define GINTMSK_IEPM            (1U<<18)    /**< IN endpoints interrupt

+                                                 mask.                      */

+#define GINTMSK_EOPFM           (1U<<15)    /**< End of periodic frame

+                                                 interrupt mask.            */

+#define GINTMSK_ISOODRPM        (1U<<14)    /**< Isochronous OUT packet

+                                                 dropped interrupt mask.    */

+#define GINTMSK_ENUMDNEM        (1U<<13)    /**< Enumeration done mask.     */

+#define GINTMSK_USBRSTM         (1U<<12)    /**< USB reset mask.            */

+#define GINTMSK_USBSUSPM        (1U<<11)    /**< USB suspend mask.          */

+#define GINTMSK_ESUSPM          (1U<<10)    /**< Early suspend mask.        */

+#define GINTMSK_GONAKEFFM       (1U<<7)     /**< Global OUT NAK effective

+                                                 mask.                      */

+#define GINTMSK_GINAKEFFM       (1U<<6)     /**< Global non-periodic IN NAK

+                                                 effective mask.            */

+#define GINTMSK_NPTXFEM         (1U<<5)     /**< Non-periodic TxFIFO empty

+                                                 mask.                      */

+#define GINTMSK_RXFLVLM         (1U<<4)     /**< Receive FIFO non-empty

+                                                 mask.                      */

+#define GINTMSK_SOFM            (1U<<3)     /**< Start of (micro)frame mask.*/

+#define GINTMSK_OTGM            (1U<<2)     /**< OTG interrupt mask.        */

+#define GINTMSK_MMISM           (1U<<1)     /**< Mode Mismatch interrupt

+                                                 mask.                      */

+/** @} */

+

+/**

+ * @name GRXSTSR register bit definitions

+ * @{

+ */

+#define GRXSTSR_PKTSTS_MASK     (15U<<17)   /**< Packet status mask.        */

+#define GRXSTSR_PKTSTS(n)       ((n)<<17)   /**< Packet status value.       */

+#define GRXSTSR_OUT_GLOBAL_NAK  GRXSTSR_PKTSTS(1)

+#define GRXSTSR_OUT_DATA        GRXSTSR_PKTSTS(2)

+#define GRXSTSR_OUT_COMP        GRXSTSR_PKTSTS(3)

+#define GRXSTSR_SETUP_COMP      GRXSTSR_PKTSTS(4)

+#define GRXSTSR_SETUP_DATA      GRXSTSR_PKTSTS(6)

+#define GRXSTSR_DPID_MASK       (3U<<15)    /**< Data PID mask.             */

+#define GRXSTSR_DPID(n)         ((n)<<15)   /**< Data PID value.            */

+#define GRXSTSR_BCNT_MASK       (0x7FF<<4)  /**< Byte count mask.           */

+#define GRXSTSR_BCNT(n)         ((n)<<4)    /**< Byte count value.          */

+#define GRXSTSR_CHNUM_MASK      (15U<<0)    /**< Channel number mask.       */

+#define GRXSTSR_CHNUM(n)        ((n)<<0)    /**< Channel number value.      */

+#define GRXSTSR_EPNUM_MASK      (15U<<0)    /**< Endpoint number mask.      */

+#define GRXSTSR_EPNUM(n)        ((n)<<0)    /**< Endpoint number value.     */

+/** @} */

+

+/**

+ * @name GRXSTSP register bit definitions

+ * @{

+ */

+#define GRXSTSP_PKTSTS_MASK     (15<<17)    /**< Packet status mask.        */

+#define GRXSTSP_PKTSTS(n)       ((n)<<17)   /**< Packet status value.       */

+#define GRXSTSP_OUT_GLOBAL_NAK  GRXSTSP_PKTSTS(1)

+#define GRXSTSP_OUT_DATA        GRXSTSP_PKTSTS(2)

+#define GRXSTSP_OUT_COMP        GRXSTSP_PKTSTS(3)

+#define GRXSTSP_SETUP_COMP      GRXSTSP_PKTSTS(4)

+#define GRXSTSP_SETUP_DATA      GRXSTSP_PKTSTS(6)

+#define GRXSTSP_DPID_MASK       (3U<<15)    /**< Data PID mask.             */

+#define GRXSTSP_DPID(n)         ((n)<<15)   /**< Data PID value.            */

+#define GRXSTSP_BCNT_MASK       (0x7FF<<4)  /**< Byte count mask.           */

+#define GRXSTSP_BCNT_OFF        4           /**< Byte count offset.         */

+#define GRXSTSP_BCNT(n)         ((n)<<4)    /**< Byte count value.          */

+#define GRXSTSP_CHNUM_MASK      (15U<<0)    /**< Channel number mask.       */

+#define GRXSTSP_CHNUM(n)        ((n)<<0)    /**< Channel number value.      */

+#define GRXSTSP_EPNUM_MASK      (15U<<0)    /**< Endpoint number mask.      */

+#define GRXSTSP_EPNUM_OFF       0           /**< Endpoint number offset.    */

+#define GRXSTSP_EPNUM(n)        ((n)<<0)    /**< Endpoint number value.     */

+/** @} */

+

+/**

+ * @name GRXFSIZ register bit definitions

+ * @{

+ */

+#define GRXFSIZ_RXFD_MASK       (0xFFFF<<0) /**< RxFIFO depth mask.         */

+#define GRXFSIZ_RXFD(n)         ((n)<<0)    /**< RxFIFO depth value.        */

+/** @} */

+

+/**

+ * @name DIEPTXFx register bit definitions

+ * @{

+ */

+#define DIEPTXF_INEPTXFD_MASK   (0xFFFFU<<16)/**< IN endpoint TxFIFO depth

+                                                 mask.                      */

+#define DIEPTXF_INEPTXFD(n)     ((n)<<16)   /**< IN endpoint TxFIFO depth

+                                                 value.                     */

+#define DIEPTXF_INEPTXSA_MASK   (0xFFFF<<0) /**< IN endpoint FIFOx transmit

+                                                 RAM start address mask.    */

+#define DIEPTXF_INEPTXSA(n)     ((n)<<0)    /**< IN endpoint FIFOx transmit

+                                                 RAM start address value.   */

+/** @} */

+

+/**

+ * @name GCCFG register bit definitions

+ * @{

+ */

+#define GCCFG_NOVBUSSENS        (1U<<21)    /**< VBUS sensing disable.      */

+#define GCCFG_SOFOUTEN          (1U<<20)    /**< SOF output enable.         */

+#define GCCFG_VBUSBSEN          (1U<<19)    /**< Enable the VBUS sensing "B"

+                                                 device.                    */

+#define GCCFG_VBUSASEN          (1U<<18)    /**< Enable the VBUS sensing "A"

+                                                 device.                    */

+#define GCCFG_PWRDWN            (1U<<16)    /**< Power down.                */

+/** @} */

+

+/**

+ * @name HPTXFSIZ register bit definitions

+ * @{

+ */

+#define HPTXFSIZ_PTXFD_MASK     (0xFFFFU<<16)/**< Host periodic TxFIFO

+                                                 depth mask.                */

+#define HPTXFSIZ_PTXFD(n)       ((n)<<16)   /**< Host periodic TxFIFO

+                                                 depth value.               */

+#define HPTXFSIZ_PTXSA_MASK     (0xFFFFU<<0)/**< Host periodic TxFIFO

+                                                 Start address mask.        */

+#define HPTXFSIZ_PTXSA(n)       ((n)<<0)    /**< Host periodic TxFIFO

+                                                 start address value.       */

+/** @} */

+

+/**

+ * @name HCFG register bit definitions

+ * @{

+ */

+#define HCFG_FSLSS              (1U<<2)     /**< FS- and LS-only support.   */

+#define HCFG_FSLSPCS_MASK       (3U<<0)     /**< FS/LS PHY clock select

+                                                 mask.                      */

+#define HCFG_FSLSPCS_48         (1U<<0)     /**< PHY clock is running at

+                                                 48 MHz.                    */

+#define HCFG_FSLSPCS_6          (2U<<0)     /**< PHY clock is running at

+                                                 6 MHz.                     */

+/** @} */

+

+/**

+ * @name HFIR register bit definitions

+ * @{

+ */

+#define HFIR_FRIVL_MASK         (0xFFFFU<<0)/**< Frame interval mask.       */

+#define HFIR_FRIVL(n)           ((n)<<0)    /**< Frame interval value.      */

+/** @} */

+

+/**

+ * @name HFNUM register bit definitions

+ * @{

+ */

+#define HFNUM_FTREM_MASK        (0xFFFFU<<16)/**< Frame time Remaining mask.*/

+#define HFNUM_FTREM(n)          ((n)<<16)   /**< Frame time Remaining value.*/

+#define HFNUM_FRNUM_MASK        (0xFFFFU<<0)/**< Frame number mask.         */

+#define HFNUM_FRNUM(n)          ((n)<<0)    /**< Frame number value.        */

+/** @} */

+

+/**

+ * @name HPTXSTS register bit definitions

+ * @{

+ */

+#define HPTXSTS_PTXQTOP_MASK    (0xFFU<<24) /**< Top of the periodic

+                                                 transmit request queue

+                                                 mask.                      */

+#define HPTXSTS_PTXQTOP(n)      ((n)<<24)   /**< Top of the periodic

+                                                 transmit request queue

+                                                 value.                     */

+#define HPTXSTS_PTXQSAV_MASK    (0xFF<<16)  /**< Periodic transmit request

+                                                 queue Space Available

+                                                 mask.                      */

+#define HPTXSTS_PTXQSAV(n)      ((n)<<16)   /**< Periodic transmit request

+                                                 queue Space Available

+                                                 value.                     */

+#define HPTXSTS_PTXFSAVL_MASK   (0xFFFF<<0) /**< Periodic transmit Data

+                                                 FIFO Space Available

+                                                 mask.                      */

+#define HPTXSTS_PTXFSAVL(n)     ((n)<<0)    /**< Periodic transmit Data

+                                                 FIFO Space Available

+                                                 value.                     */

+/** @} */

+

+/**

+ * @name HAINT register bit definitions

+ * @{

+ */

+#define HAINT_HAINT_MASK        (0xFFFFU<<0)/**< Channel interrupts mask.   */

+#define HAINT_HAINT(n)          ((n)<<0)    /**< Channel interrupts value.  */

+/** @} */

+

+/**

+ * @name HAINTMSK register bit definitions

+ * @{

+ */

+#define HAINTMSK_HAINTM_MASK    (0xFFFFU<<0)/**< Channel interrupt mask

+                                                 mask.                      */

+#define HAINTMSK_HAINTM(n)      ((n)<<0)    /**< Channel interrupt mask

+                                                 value.                     */

+/** @} */

+

+/**

+ * @name HPRT register bit definitions

+ * @{

+ */

+#define HPRT_PSPD_MASK          (3U<<17)    /**< Port speed mask.           */

+#define HPRT_PSPD_FS            (1U<<17)    /**< Full speed value.          */

+#define HPRT_PSPD_LS            (2U<<17)    /**< Low speed value.           */

+#define HPRT_PTCTL_MASK         (15<<13)    /**< Port Test control mask.    */

+#define HPRT_PTCTL(n)           ((n)<<13)   /**< Port Test control value.   */

+#define HPRT_PPWR               (1U<<12)    /**< Port power.                */

+#define HPRT_PLSTS_MASK         (3U<<11)    /**< Port Line status mask.     */

+#define HPRT_PLSTS_DM           (1U<<11)    /**< Logic level of D-.         */

+#define HPRT_PLSTS_DP           (1U<<10)    /**< Logic level of D+.         */

+#define HPRT_PRST               (1U<<8)     /**< Port reset.                */

+#define HPRT_PSUSP              (1U<<7)     /**< Port suspend.              */

+#define HPRT_PRES               (1U<<6)     /**< Port Resume.               */

+#define HPRT_POCCHNG            (1U<<5)     /**< Port overcurrent change.   */

+#define HPRT_POCA               (1U<<4)     /**< Port overcurrent active.   */

+#define HPRT_PENCHNG            (1U<<3)     /**< Port enable/disable change.*/

+#define HPRT_PENA               (1U<<2)     /**< Port enable.               */

+#define HPRT_PCDET              (1U<<1)     /**< Port Connect detected.     */

+#define HPRT_PCSTS              (1U<<0)     /**< Port connect status.       */

+/** @} */

+

+/**

+ * @name HCCHAR register bit definitions

+ * @{

+ */

+#define HCCHAR_CHENA            (1U<<31)    /**< Channel enable.            */

+#define HCCHAR_CHDIS            (1U<<30)    /**< Channel Disable.           */

+#define HCCHAR_ODDFRM           (1U<<29)    /**< Odd frame.                 */

+#define HCCHAR_DAD_MASK         (0x7FU<<22) /**< Device Address mask.       */

+#define HCCHAR_DAD(n)           ((n)<<22)   /**< Device Address value.      */

+#define HCCHAR_MCNT_MASK        (3U<<20)    /**< Multicount mask.           */

+#define HCCHAR_MCNT(n)          ((n)<<20)   /**< Multicount value.          */

+#define HCCHAR_EPTYP_MASK       (3U<<18)    /**< Endpoint type mask.        */

+#define HCCHAR_EPTYP(n)         ((n)<<18)   /**< Endpoint type value.       */

+#define HCCHAR_EPTYP_CTL        (0U<<18)    /**< Control endpoint value.    */

+#define HCCHAR_EPTYP_ISO        (1U<<18)    /**< Isochronous endpoint value.*/

+#define HCCHAR_EPTYP_BULK       (2U<<18)    /**< Bulk endpoint value.       */

+#define HCCHAR_EPTYP_INTR       (3U<<18)    /**< Interrupt endpoint value.  */

+#define HCCHAR_LSDEV            (1U<<17)    /**< Low-Speed device.          */

+#define HCCHAR_EPDIR            (1U<<15)    /**< Endpoint direction.        */

+#define HCCHAR_EPNUM_MASK       (15U<<11)   /**< Endpoint number mask.      */

+#define HCCHAR_EPNUM(n)         ((n)<<11)   /**< Endpoint number value.     */

+#define HCCHAR_MPS_MASK         (0x7FFU<<0)    /**< Maximum packet size mask.  */

+#define HCCHAR_MPS(n)           ((n)<<0)    /**< Maximum packet size value. */

+/** @} */

+

+/**

+ * @name HCINT register bit definitions

+ * @{

+ */

+#define HCINT_DTERR             (1U<<10)    /**< Data toggle error.         */

+#define HCINT_FRMOR             (1U<<9)     /**< Frame overrun.             */

+#define HCINT_BBERR             (1U<<8)     /**< Babble error.              */

+#define HCINT_TRERR             (1U<<7)     /**< Transaction Error.         */

+#define HCINT_ACK               (1U<<5)     /**< ACK response

+                                                 received/transmitted

+                                                 interrupt.                 */

+#define HCINT_NAK               (1U<<4)     /**< NAK response received

+                                                 interrupt.                 */

+#define HCINT_STALL             (1U<<3)     /**< STALL response received

+                                                 interrupt.                 */

+#define HCINT_CHH               (1U<<1)     /**< Channel halted.            */

+#define HCINT_XFRC              (1U<<0)     /**< Transfer completed.        */

+/** @} */

+

+/**

+ * @name HCINTMSK register bit definitions

+ * @{

+ */

+#define HCINTMSK_DTERRM         (1U<<10)    /**< Data toggle error mask.    */

+#define HCINTMSK_FRMORM         (1U<<9)     /**< Frame overrun mask.        */

+#define HCINTMSK_BBERRM         (1U<<8)     /**< Babble error mask.         */

+#define HCINTMSK_TRERRM         (1U<<7)     /**< Transaction error mask.    */

+#define HCINTMSK_NYET           (1U<<6)     /**< NYET response received

+                                                 interrupt mask.            */

+#define HCINTMSK_ACKM           (1U<<5)     /**< ACK Response

+                                                 received/transmitted

+                                                 interrupt mask.            */

+#define HCINTMSK_NAKM           (1U<<4)     /**< NAK response received

+                                                 interrupt mask.            */

+#define HCINTMSK_STALLM         (1U<<3)     /**< STALL response received

+                                                 interrupt mask.            */

+#define HCINTMSK_AHBERRM        (1U<<2)

+#define HCINTMSK_CHHM           (1U<<1)     /**< Channel halted mask.       */

+#define HCINTMSK_XFRCM          (1U<<0)     /**< Transfer completed mask.   */

+/** @} */

+

+/**

+ * @name HCTSIZ register bit definitions

+ * @{

+ */

+#define HCTSIZ_DPID_MASK        (3U<<29)    /**< PID mask.                  */

+#define HCTSIZ_DPID_DATA0       (0U<<29)    /**< DATA0.                     */

+#define HCTSIZ_DPID_DATA2       (1U<<29)    /**< DATA2.                     */

+#define HCTSIZ_DPID_DATA1       (2U<<29)    /**< DATA1.                     */

+#define HCTSIZ_DPID_MDATA       (3U<<29)    /**< MDATA.                     */

+#define HCTSIZ_DPID_SETUP       (3U<<29)    /**< SETUP.                     */

+#define HCTSIZ_PKTCNT_MASK      (0x3FFU<<19)/**< Packet count mask.         */

+#define HCTSIZ_PKTCNT(n)        ((n)<<19)   /**< Packet count value.        */

+#define HCTSIZ_XFRSIZ_MASK      (0x7FFFF<<0)/**< Transfer size mask.        */

+#define HCTSIZ_XFRSIZ(n)        ((n)<<0)    /**< Transfer size value.       */

+/** @} */

+

+/**

+ * @name DCFG register bit definitions

+ * @{

+ */

+#define DCFG_PFIVL_MASK         (3U<<11)    /**< Periodic frame interval

+                                                 mask.                      */

+#define DCFG_PFIVL(n)           ((n)<<11)   /**< Periodic frame interval

+                                                 value.                     */

+#define DCFG_DAD_MASK           (0x7FU<<4)  /**< Device address mask.       */

+#define DCFG_DAD(n)             ((n)<<4)    /**< Device address value.      */

+#define DCFG_NZLSOHSK           (1U<<2)     /**< Non-Zero-Length status

+                                                 OUT handshake.             */

+#define DCFG_DSPD_MASK          (3U<<0)     /**< Device speed mask.         */

+#define DCFG_DSPD_HS            (0U<<0)     /**< High speed (USB 2.0).      */

+#define DCFG_DSPD_HS_FS         (1U<<0)     /**< High speed (USB 2.0) in FS

+                                                 mode.                      */

+#define DCFG_DSPD_FS11          (3U<<0)     /**< Full speed (USB 1.1

+                                                 transceiver clock is 48

+                                                 MHz).                      */

+/** @} */

+

+/**

+ * @name DCTL register bit definitions

+ * @{

+ */

+#define DCTL_POPRGDNE           (1U<<11)    /**< Power-on programming done. */

+#define DCTL_CGONAK             (1U<<10)    /**< Clear global OUT NAK.      */

+#define DCTL_SGONAK             (1U<<9)     /**< Set global OUT NAK.        */

+#define DCTL_CGINAK             (1U<<8)     /**< Clear global non-periodic

+                                                 IN NAK.                    */

+#define DCTL_SGINAK             (1U<<7)     /**< Set global non-periodic

+                                                 IN NAK.                    */

+#define DCTL_TCTL_MASK          (7U<<4)     /**< Test control mask.         */

+#define DCTL_TCTL(n)            ((n)<<4     /**< Test control value.        */

+#define DCTL_GONSTS             (1U<<3)     /**< Global OUT NAK status.     */

+#define DCTL_GINSTS             (1U<<2)     /**< Global non-periodic IN

+                                                 NAK status.                */

+#define DCTL_SDIS               (1U<<1)     /**< Soft disconnect.           */

+#define DCTL_RWUSIG             (1U<<0)     /**< Remote wakeup signaling.   */

+/** @} */

+

+/**

+ * @name DSTS register bit definitions

+ * @{

+ */

+#define DSTS_FNSOF_MASK         (0x3FFU<<8) /**< Frame number of the received

+                                                 SOF mask.                  */

+#define DSTS_FNSOF(n)           ((n)<<8)    /**< Frame number of the received

+                                                 SOF value.                 */

+#define DSTS_FNSOF_ODD          (1U<<8)     /**< Frame parity of the received

+                                                 SOF value.                 */

+#define DSTS_EERR               (1U<<3)     /**< Erratic error.             */

+#define DSTS_ENUMSPD_MASK       (3U<<1)     /**< Enumerated speed mask.     */

+#define DSTS_ENUMSPD_FS_48      (3U<<1)     /**< Full speed (PHY clock is

+                                                 running at 48 MHz).        */

+#define DSTS_ENUMSPD_HS_480     (0U<<1)     /**< High speed.                */

+#define DSTS_SUSPSTS            (1U<<0)     /**< Suspend status.            */

+/** @} */

+

+/**

+ * @name DIEPMSK register bit definitions

+ * @{

+ */

+#define DIEPMSK_TXFEM           (1U<<6)     /**< Transmit FIFO empty mask.  */

+#define DIEPMSK_INEPNEM         (1U<<6)     /**< IN endpoint NAK effective

+                                                 mask.                      */

+#define DIEPMSK_ITTXFEMSK       (1U<<4)     /**< IN token received when

+                                                 TxFIFO empty mask.         */

+#define DIEPMSK_TOCM            (1U<<3)     /**< Timeout condition mask.    */

+#define DIEPMSK_EPDM            (1U<<1)     /**< Endpoint disabled

+                                                 interrupt mask.            */

+#define DIEPMSK_XFRCM           (1U<<0)     /**< Transfer completed

+                                                 interrupt mask.            */

+/** @} */

+

+/**

+ * @name DOEPMSK register bit definitions

+ * @{

+ */

+#define DOEPMSK_OTEPDM          (1U<<4)     /**< OUT token received when

+                                                 endpoint disabled mask.    */

+#define DOEPMSK_STUPM           (1U<<3)     /**< SETUP phase done mask.     */

+#define DOEPMSK_EPDM            (1U<<1)     /**< Endpoint disabled

+                                                 interrupt mask.            */

+#define DOEPMSK_XFRCM           (1U<<0)     /**< Transfer completed

+                                                 interrupt mask.            */

+/** @} */

+

+/**

+ * @name DAINT register bit definitions

+ * @{

+ */

+#define DAINT_OEPINT_MASK       (0xFFFFU<<16)/**< OUT endpoint interrupt

+                                                 bits mask.                 */

+#define DAINT_OEPINT(n)         ((n)<<16)   /**< OUT endpoint interrupt

+                                                 bits value.                */

+#define DAINT_IEPINT_MASK       (0xFFFFU<<0)/**< IN endpoint interrupt

+                                                 bits mask.                 */

+#define DAINT_IEPINT(n)         ((n)<<0)    /**< IN endpoint interrupt

+                                                 bits value.                */

+/** @} */

+

+/**

+ * @name DAINTMSK register bit definitions

+ * @{

+ */

+#define DAINTMSK_OEPM_MASK      (0xFFFFU<<16)/**< OUT EP interrupt mask

+                                                 bits mask.                 */

+#define DAINTMSK_OEPM(n)        (1U<<(16+(n)))/**< OUT EP interrupt mask

+                                                 bits value.                */

+#define DAINTMSK_IEPM_MASK      (0xFFFFU<<0)/**< IN EP interrupt mask

+                                                 bits mask.                 */

+#define DAINTMSK_IEPM(n)        (1U<<(n))   /**< IN EP interrupt mask

+                                                 bits value.                */

+/** @} */

+

+/**

+ * @name DVBUSDIS register bit definitions

+ * @{

+ */

+#define DVBUSDIS_VBUSDT_MASK    (0xFFFFU<<0)/**< Device VBUS discharge

+                                                 time mask.                 */

+#define DVBUSDIS_VBUSDT(n)      ((n)<<0)    /**< Device VBUS discharge

+                                                 time value.                */

+/** @} */

+

+/**

+ * @name DVBUSPULSE register bit definitions

+ * @{

+ */

+#define DVBUSPULSE_DVBUSP_MASK  (0xFFFU<<0) /**< Device VBUSpulsing time

+                                                 mask.                      */

+#define DVBUSPULSE_DVBUSP(n)    ((n)<<0)    /**< Device VBUS pulsing time

+                                                 value.                     */

+/** @} */

+

+/**

+ * @name DIEPEMPMSK register bit definitions

+ * @{

+ */

+#define DIEPEMPMSK_INEPTXFEM(n) (1U<<(n))   /**< IN EP Tx FIFO empty

+                                                 interrupt mask bit.        */

+/** @} */

+

+/**

+ * @name DIEPCTL register bit definitions

+ * @{

+ */

+#define DIEPCTL_EPENA           (1U<<31)    /**< Endpoint enable.           */

+#define DIEPCTL_EPDIS           (1U<<30)    /**< Endpoint disable.          */

+#define DIEPCTL_SD1PID          (1U<<29)    /**< Set DATA1 PID.             */

+#define DIEPCTL_SODDFRM         (1U<<29)    /**< Set odd frame.             */

+#define DIEPCTL_SD0PID          (1U<<28)    /**< Set DATA0 PID.             */

+#define DIEPCTL_SEVNFRM         (1U<<28)    /**< Set even frame.            */

+#define DIEPCTL_SNAK            (1U<<27)    /**< Set NAK.                   */

+#define DIEPCTL_CNAK            (1U<<26)    /**< Clear NAK.                 */

+#define DIEPCTL_TXFNUM_MASK     (15U<<22)   /**< TxFIFO number mask.        */

+#define DIEPCTL_TXFNUM(n)       ((n)<<22)   /**< TxFIFO number value.       */

+#define DIEPCTL_STALL           (1U<<21)    /**< STALL handshake.           */

+#define DIEPCTL_SNPM            (1U<<20)    /**< Snoop mode.                */

+#define DIEPCTL_EPTYP_MASK      (3<<18)     /**< Endpoint type mask.        */

+#define DIEPCTL_EPTYP_CTRL      (0U<<18)    /**< Control.                   */

+#define DIEPCTL_EPTYP_ISO       (1U<<18)    /**< Isochronous.               */

+#define DIEPCTL_EPTYP_BULK      (2U<<18)    /**< Bulk.                      */

+#define DIEPCTL_EPTYP_INTR      (3U<<18)    /**< Interrupt.                 */

+#define DIEPCTL_NAKSTS          (1U<<17)    /**< NAK status.                */

+#define DIEPCTL_EONUM           (1U<<16)    /**< Even/odd frame.            */

+#define DIEPCTL_DPID            (1U<<16)    /**< Endpoint data PID.         */

+#define DIEPCTL_USBAEP          (1U<<15)    /**< USB active endpoint.       */

+#define DIEPCTL_MPSIZ_MASK      (0x3FFU<<0) /**< Maximum Packet size mask.  */

+#define DIEPCTL_MPSIZ(n)        ((n)<<0)    /**< Maximum Packet size value. */

+/** @} */

+

+/**

+ * @name DIEPINT register bit definitions

+ * @{

+ */

+#define DIEPINT_TXFE            (1U<<7)     /**< Transmit FIFO empty.       */

+#define DIEPINT_INEPNE          (1U<<6)     /**< IN endpoint NAK effective. */

+#define DIEPINT_ITTXFE          (1U<<4)     /**< IN Token received when

+                                                 TxFIFO is empty.           */

+#define DIEPINT_TOC             (1U<<3)     /**< Timeout condition.         */

+#define DIEPINT_EPDISD          (1U<<1)     /**< Endpoint disabled

+                                                 interrupt.                 */

+#define DIEPINT_XFRC            (1U<<0)     /**< Transfer completed.        */

+/** @} */

+

+/**

+ * @name DIEPTSIZ register bit definitions

+ * @{

+ */

+#define DIEPTSIZ_MCNT_MASK      (3U<<29)    /**< Multi count mask.          */

+#define DIEPTSIZ_MCNT(n)        ((n)<<29)   /**< Multi count value.         */

+#define DIEPTSIZ_PKTCNT_MASK    (0x3FF<<19) /**< Packet count mask.         */

+#define DIEPTSIZ_PKTCNT(n)      ((n)<<19)   /**< Packet count value.        */

+#define DIEPTSIZ_XFRSIZ_MASK    (0x7FFFFU<<0)/**< Transfer size mask.       */

+#define DIEPTSIZ_XFRSIZ(n)      ((n)<<0)    /**< Transfer size value.       */

+/** @} */

+

+/**

+ * @name DTXFSTS register bit definitions.

+ * @{

+ */

+#define DTXFSTS_INEPTFSAV_MASK  (0xFFFF<<0) /**< IN endpoint TxFIFO space

+                                                 available.                 */

+/** @} */

+

+/**

+ * @name DOEPCTL register bit definitions.

+ * @{

+ */

+#define DOEPCTL_EPENA           (1U<<31)    /**< Endpoint enable.           */

+#define DOEPCTL_EPDIS           (1U<<30)    /**< Endpoint disable.          */

+#define DOEPCTL_SD1PID          (1U<<29)    /**< Set DATA1 PID.             */

+#define DOEPCTL_SODDFRM         (1U<<29)    /**< Set odd frame.             */

+#define DOEPCTL_SD0PID          (1U<<28)    /**< Set DATA0 PID.             */

+#define DOEPCTL_SEVNFRM         (1U<<28)    /**< Set even frame.            */

+#define DOEPCTL_SNAK            (1U<<27)    /**< Set NAK.                   */

+#define DOEPCTL_CNAK            (1U<<26)    /**< Clear NAK.                 */

+#define DOEPCTL_STALL           (1U<<21)    /**< STALL handshake.           */

+#define DOEPCTL_SNPM            (1U<<20)    /**< Snoop mode.                */

+#define DOEPCTL_EPTYP_MASK      (3U<<18)    /**< Endpoint type mask.        */

+#define DOEPCTL_EPTYP_CTRL      (0U<<18)    /**< Control.                   */

+#define DOEPCTL_EPTYP_ISO       (1U<<18)    /**< Isochronous.               */

+#define DOEPCTL_EPTYP_BULK      (2U<<18)    /**< Bulk.                      */

+#define DOEPCTL_EPTYP_INTR      (3U<<18)    /**< Interrupt.                 */

+#define DOEPCTL_NAKSTS          (1U<<17)    /**< NAK status.                */

+#define DOEPCTL_EONUM           (1U<<16)    /**< Even/odd frame.            */

+#define DOEPCTL_DPID            (1U<<16)    /**< Endpoint data PID.         */

+#define DOEPCTL_USBAEP          (1U<<15)    /**< USB active endpoint.       */

+#define DOEPCTL_MPSIZ_MASK      (0x3FFU<<0) /**< Maximum Packet size mask.  */

+#define DOEPCTL_MPSIZ(n)        ((n)<<0)    /**< Maximum Packet size value. */

+/** @} */

+

+/**

+ * @name DOEPINT register bit definitions

+ * @{

+ */

+#define DOEPINT_B2BSTUP         (1U<<6)     /**< Back-to-back SETUP packets

+                                                 received.                  */

+#define DOEPINT_OTEPDIS         (1U<<4)     /**< OUT token received when

+                                                 endpoint disabled.         */

+#define DOEPINT_STUP            (1U<<3)     /**< SETUP phase done.          */

+#define DOEPINT_EPDISD          (1U<<1)     /**< Endpoint disabled

+                                                 interrupt.                 */

+#define DOEPINT_XFRC            (1U<<0)     /**< Transfer completed

+                                                 interrupt.                 */

+/** @} */

+

+/**

+ * @name DOEPTSIZ register bit definitions

+ * @{

+ */

+#define DOEPTSIZ_RXDPID_MASK    (3U<<29)    /**< Received data PID mask.    */

+#define DOEPTSIZ_RXDPID(n)      ((n)<<29)   /**< Received data PID value.   */

+#define DOEPTSIZ_STUPCNT_MASK   (3U<<29)    /**< SETUP packet count mask.   */

+#define DOEPTSIZ_STUPCNT(n)     ((n)<<29)   /**< SETUP packet count value.  */

+#define DOEPTSIZ_PKTCNT_MASK    (0x3FFU<<19)/**< Packet count mask.         */

+#define DOEPTSIZ_PKTCNT(n)      ((n)<<19)   /**< Packet count value.        */

+#define DOEPTSIZ_XFRSIZ_MASK    (0x7FFFFU<<0)/**< Transfer size mask.       */

+#define DOEPTSIZ_XFRSIZ(n)      ((n)<<0)    /**< Transfer size value.       */

+/** @} */

+

+/**

+ * @name PCGCCTL register bit definitions

+ * @{

+ */

+#define PCGCCTL_PHYSUSP         (1U<<4)     /**< PHY Suspended.             */

+#define PCGCCTL_GATEHCLK        (1U<<1)     /**< Gate HCLK.                 */

+#define PCGCCTL_STPPCLK         (1U<<0)     /**< Stop PCLK.                 */

+/** @} */

+

+/**

+ * @brief   OTG_FS registers block memory address.

+ */

+#define OTG_FS_ADDR                 0x50000000

+

+/**

+ * @brief   OTG_HS registers block memory address.

+ */

+#define OTG_HS_ADDR                 0x40040000

+

+/**

+ * @brief   Accesses to the OTG_FS registers block.

+ */

+#define OTG_FS                      ((stm32_otg_t *)OTG_FS_ADDR)

+

+/**

+ * @brief   Accesses to the OTG_HS registers block.

+ */

+#define OTG_HS                      ((stm32_otg_t *)OTG_HS_ADDR)

+

+#endif /* _STM32_OTG_H_ */

+

+/** @} */

diff --git a/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.c
new file mode 100644
index 0000000..5455f52
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.c
@@ -0,0 +1,1604 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+#include "usbh/internal.h"

+#include <string.h>

+

+#if USBH_LLD_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBH_LLD_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBH_LLD_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBH_LLD_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+static void _transfer_completedI(usbh_ep_t *ep, usbh_urb_t *urb, usbh_urbstatus_t status);

+static void _try_commit_np(USBHDriver *host);

+static void otg_rxfifo_flush(USBHDriver *usbp);

+static void otg_txfifo_flush(USBHDriver *usbp, uint32_t fifo);

+

+/*===========================================================================*/

+/* Little helper functions.	    	                                 		 */

+/*===========================================================================*/

+static inline void _move_to_pending_queue(usbh_ep_t *ep) {

+	list_move_tail(&ep->node, ep->pending_list);

+}

+

+static inline usbh_urb_t *_active_urb(usbh_ep_t *ep) {

+	return list_first_entry(&ep->urb_list, usbh_urb_t, node);

+}

+

+static inline void _save_dt_mask(usbh_ep_t *ep, uint32_t hctsiz) {

+	ep->dt_mask = hctsiz & HCTSIZ_DPID_MASK;

+}

+

+#if 1

+#define _transfer_completed _transfer_completedI

+#else

+static inline void _transfer_completed(usbh_ep_t *ep, usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalSysLockFromISR();

+	_transfer_completedI(ep, urb, status);

+	osalSysUnlockFromISR();

+}

+#endif

+

+/*===========================================================================*/

+/* Functions called from many places.                                 		 */

+/*===========================================================================*/

+static void _transfer_completedI(usbh_ep_t *ep, usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalDbgCheckClassI();

+

+	urb->queued = FALSE;

+

+	/* remove URB from EP's queue */

+	list_del_init(&urb->node);

+

+	/* Call the callback function now, so that if it calls usbhURBSubmitI,

+	 * the list_empty check below will be false. Also, note that the

+	 *   if (list_empty(&ep->node)) {

+	 *     ...

+	 *   }

+	 * in usbh_lld_urb_submit will be false, since the endpoint is

+	 * still in the active queue.

+	 */

+	_usbh_urb_completeI(urb, status);

+

+	if (list_empty(&ep->urb_list)) {

+		/* no more URBs to process in this EP, remove EP from the host's queue */

+		list_del_init(&ep->node);

+	} else {

+		/* more URBs to process */

+		_move_to_pending_queue(ep);

+	}

+}

+

+static void _halt_channel(USBHDriver *host, stm32_hc_management_t *hcm, usbh_lld_halt_reason_t reason) {

+	(void)host;

+

+	if (hcm->halt_reason != USBH_LLD_HALTREASON_NONE) {

+		uwarnf("\t%s: Repeated halt (original=%d, new=%d)", hcm->ep->name, hcm->halt_reason, reason);

+		return;

+	}

+

+#if CH_DBG_ENABLE_CHECKS

+	if (usbhEPIsPeriodic(hcm->ep)) {

+		osalDbgCheck(host->otg->HPTXSTS & HPTXSTS_PTXQSAV_MASK);

+	} else {

+		osalDbgCheck(host->otg->HNPTXSTS & HPTXSTS_PTXQSAV_MASK);

+	}

+#endif

+

+	hcm->halt_reason = reason;

+	hcm->hc->HCCHAR |= HCCHAR_CHENA | HCCHAR_CHDIS;

+}

+

+static void _release_channel(USBHDriver *host, stm32_hc_management_t *hcm) {

+//	static const char *reason[] =  {"XFRC",	"XFRC",	"NAK", "STALL",	"ERROR", "ABORT"};

+//	udbgf("\t%s: release (%s)", hcm->ep->name, reason[hcm->halt_reason]);

+	hcm->hc->HCINTMSK = 0;

+	host->otg->HAINTMSK &= ~hcm->haintmsk;

+	hcm->halt_reason = USBH_LLD_HALTREASON_NONE;

+	if (usbhEPIsPeriodic(hcm->ep)) {

+		list_add(&hcm->node, &host->ch_free[0]);

+	} else {

+		list_add(&hcm->node, &host->ch_free[1]);

+	}

+	hcm->ep->xfer.hcm = 0;

+	hcm->ep = 0;

+}

+

+static bool _activate_ep(USBHDriver *host, usbh_ep_t *ep) {

+	struct list_head *list;

+	uint16_t spc;

+

+	osalDbgCheck(ep->xfer.hcm == NULL);

+

+	if (usbhEPIsPeriodic(ep)) {

+		list = &host->ch_free[0];

+		spc = (host->otg->HPTXSTS >> 16) & 0xff;

+	} else {

+		list = &host->ch_free[1];

+		spc = (host->otg->HNPTXSTS >> 16) & 0xff;

+	}

+

+	if (list_empty(list)) {

+		uwarnf("\t%s: No free %s channels", ep->name, usbhEPIsPeriodic(ep) ? "P" : "NP");

+		return FALSE;

+	}

+

+	if (spc <= STM32_USBH_MIN_QSPACE) {

+		uwarnf("\t%s: No space in %s Queue (spc=%d)", ep->name, usbhEPIsPeriodic(ep) ? "P" : "NP", spc);

+		return FALSE;

+	}

+

+	/* get the first channel */

+	stm32_hc_management_t *hcm = list_first_entry(list, stm32_hc_management_t, node);

+	osalDbgCheck((hcm->halt_reason == USBH_LLD_HALTREASON_NONE) && (hcm->ep == NULL));

+

+	usbh_urb_t *const urb = _active_urb(ep);

+	uint32_t hcintmsk = ep->hcintmsk;

+	uint32_t hcchar = ep->hcchar;

+	uint16_t mps = ep->wMaxPacketSize;

+

+	uint32_t xfer_packets;

+	uint32_t xfer_len = 0;	//Initialize just to shut up a compiler warning

+

+	osalDbgCheck(urb->status == USBH_URBSTATUS_PENDING);

+

+	/* check if the URB is a new one, or we must continue a previously started URB */

+	if (urb->queued == FALSE) {

+		/* prepare EP for a new URB */

+		if (ep->type == USBH_EPTYPE_CTRL) {

+			xfer_len = 8;

+			ep->xfer.buf = (uint8_t *)urb->setup_buff;

+			ep->dt_mask = HCTSIZ_DPID_SETUP;

+			ep->in = FALSE;

+			ep->xfer.u.ctrl_phase = USBH_LLD_CTRLPHASE_SETUP;

+		} else {

+			xfer_len = urb->requestedLength;

+			ep->xfer.buf = urb->buff;

+		}

+		ep->xfer.error_count = 0;

+		//urb->status = USBH_URBSTATUS_QUEUED;

+	} else {

+		osalDbgCheck(urb->requestedLength >= urb->actualLength);

+

+		if (ep->type == USBH_EPTYPE_CTRL) {

+			switch (ep->xfer.u.ctrl_phase) {

+			case USBH_LLD_CTRLPHASE_SETUP:

+				xfer_len = 8;

+				ep->xfer.buf = (uint8_t *)urb->setup_buff;

+				ep->dt_mask = HCTSIZ_DPID_SETUP;

+				break;

+			case USBH_LLD_CTRLPHASE_DATA:

+				xfer_len = urb->requestedLength - urb->actualLength;

+				ep->xfer.buf = (uint8_t *) urb->buff + urb->actualLength;

+				break;

+			case USBH_LLD_CTRLPHASE_STATUS:

+				xfer_len = 0;

+				ep->dt_mask = HCTSIZ_DPID_DATA1;

+				ep->xfer.error_count = 0;

+				break;

+			default:

+				osalDbgCheck(0);

+			}

+			if (ep->in) {

+				hcintmsk |= HCINTMSK_DTERRM | HCINTMSK_BBERRM;

+				hcchar |= HCCHAR_EPDIR;

+			}

+		} else {

+			xfer_len = urb->requestedLength - urb->actualLength;

+			ep->xfer.buf = (uint8_t *) urb->buff + urb->actualLength;

+		}

+

+		if (ep->xfer.error_count)

+			hcintmsk |= HCINTMSK_ACKM;

+

+	}

+	ep->xfer.partial = 0;

+

+	if (ep->type == USBH_EPTYPE_ISO) {

+		ep->dt_mask = HCTSIZ_DPID_DATA0;

+

+		/* [USB 2.0 spec, 5.6.4]: A host must not issue more than 1

+		 * transaction in a (micro)frame for an isochronous endpoint

+		 * unless the endpoint is high-speed, high-bandwidth.

+		 */

+		if (xfer_len > mps)

+			xfer_len = mps;

+	} else if (xfer_len > 0x7FFFF) {

+		xfer_len = 0x7FFFF - mps + 1;

+	}

+

+	/* calculate required packets */

+	if (xfer_len) {

+		xfer_packets = (xfer_len + mps - 1) / mps;

+

+		if (xfer_packets > 0x3FF) {

+			xfer_packets = 0x3FF;

+			xfer_len = xfer_packets * mps;

+		}

+	} else {

+		xfer_packets = 1;	/* Need 1 packet for transfer length of 0 */

+	}

+

+	if (ep->in)

+		xfer_len = xfer_packets * mps;

+

+	/* Clear old interrupt conditions,

+	 * configure transfer size,

+	 * enable required interrupts */

+	stm32_otg_host_chn_t *const hc = hcm->hc;

+	hc->HCINT = 0xffffffff;

+	hc->HCTSIZ = ep->dt_mask

+					| HCTSIZ_PKTCNT(xfer_packets)

+					| HCTSIZ_XFRSIZ(xfer_len);

+	hc->HCINTMSK = hcintmsk;

+

+	/* Queue the transfer for the next frame (no effect for non-periodic transfers) */

+	if (!(host->otg->HFNUM & 1))

+		hcchar |= HCCHAR_ODDFRM;

+

+	/* configure channel characteristics and queue a request */

+	hc->HCCHAR = hcchar;

+	if (ep->in && (xfer_packets > 1)) {

+		/* For IN transfers, try to queue two back-to-back packets.

+		 * This results in a 1% performance gain for Full Speed transfers

+		 */

+		if (--spc > STM32_USBH_MIN_QSPACE) {

+			hc->HCCHAR |= HCCHAR_CHENA;

+		} else {

+			uwarnf("\t%s: Could not queue back-to-back packets", ep->name);

+		}

+	}

+

+	if (urb->queued == FALSE) {

+		urb->queued = TRUE;

+		udbgf("\t%s: Start (%dB)", ep->name, xfer_len);

+	} else {

+		udbgf("\t%s: Restart (%dB)", ep->name, xfer_len);

+	}

+

+	ep->xfer.len = xfer_len;

+	ep->xfer.packets = (uint16_t)xfer_packets;

+

+	/* remove the channel from the free list, link endpoint <-> channel and move to the active queue*/

+	list_del(&hcm->node);

+	ep->xfer.hcm = hcm;

+	hcm->ep = ep;

+	list_move_tail(&ep->node, ep->active_list);

+

+

+	stm32_otg_t *const otg = host->otg;

+

+	/* enable this channel's interrupt and global channel interrupt */

+	otg->HAINTMSK |= hcm->haintmsk;

+	if (ep->in) {

+		otg->GINTMSK |= GINTMSK_HCM;

+	} else if (usbhEPIsPeriodic(ep)) {

+		otg->GINTMSK |= GINTMSK_HCM | GINTMSK_PTXFEM;

+	} else {

+		//TODO: write to the FIFO now

+		otg->GINTMSK |= GINTMSK_HCM | GINTMSK_NPTXFEM;

+	}

+

+	return TRUE;

+}

+

+static bool _update_urb(usbh_ep_t *ep, uint32_t hctsiz, usbh_urb_t *urb, bool completed) {

+	uint32_t len;

+

+	if (!completed) {

+		len = ep->wMaxPacketSize * (ep->xfer.packets - ((hctsiz & HCTSIZ_PKTCNT_MASK) >> 19));

+	} else {

+		if (ep->in) {

+			len = ep->xfer.len - ((hctsiz & HCTSIZ_XFRSIZ_MASK) >> 0);

+		} else {

+			len = ep->xfer.len;

+		}

+		osalDbgCheck(len == ep->xfer.partial);	//TODO: if len == ep->xfer.partial, use this instead of the above code

+	}

+

+#if 1

+	osalDbgAssert(urb->actualLength + len <= urb->requestedLength, "what happened?");

+#else

+	if (urb->actualLength + len > urb->requestedLength) {

+		uerrf("\t%s: Trimming actualLength %u -> %u", ep->name, urb->actualLength + len, urb->requestedLength);

+		urb->actualLength = urb->requestedLength;

+		return TRUE;

+	}

+#endif

+

+	urb->actualLength += len;

+	if ((urb->actualLength == urb->requestedLength)

+			|| (ep->in && completed && (hctsiz & HCTSIZ_XFRSIZ_MASK)))

+		return TRUE;

+

+	return FALSE;

+}

+

+static void _try_commit_np(USBHDriver *host) {

+	usbh_ep_t *item, *tmp;

+

+	list_for_each_entry_safe(item, usbh_ep_t, tmp, &host->ep_pending_lists[USBH_EPTYPE_CTRL], node) {

+		if (!_activate_ep(host, item))

+			return;

+	}

+

+	list_for_each_entry_safe(item, usbh_ep_t, tmp, &host->ep_pending_lists[USBH_EPTYPE_BULK], node) {

+		if (!_activate_ep(host, item))

+			return;

+	}

+}

+

+static void _try_commit_p(USBHDriver *host, bool sof) {

+	usbh_ep_t *item, *tmp;

+

+	list_for_each_entry_safe(item, usbh_ep_t, tmp, &host->ep_pending_lists[USBH_EPTYPE_ISO], node) {

+		if (!_activate_ep(host, item))

+			return;

+	}

+

+	list_for_each_entry_safe(item, usbh_ep_t, tmp, &host->ep_pending_lists[USBH_EPTYPE_INT], node) {

+		osalDbgCheck(item);

+		/* TODO: improve this */

+		if (sof && item->xfer.u.frame_counter)

+			--item->xfer.u.frame_counter;

+

+		if (item->xfer.u.frame_counter == 0) {

+			if (!_activate_ep(host, item))

+				return;

+			item->xfer.u.frame_counter = item->bInterval;

+		}

+	}

+

+	if (list_empty(&host->ep_pending_lists[USBH_EPTYPE_ISO])

+		&& list_empty(&host->ep_pending_lists[USBH_EPTYPE_INT])) {

+		host->otg->GINTMSK &= ~GINTMSK_SOFM;

+	} else {

+		host->otg->GINTMSK |= GINTMSK_SOFM;

+	}

+}

+

+static void _purge_queue(USBHDriver *host, struct list_head *list) {

+	usbh_ep_t *ep, *tmp;

+	list_for_each_entry_safe(ep, usbh_ep_t, tmp, list, node) {

+		usbh_urb_t *const urb = _active_urb(ep);

+		stm32_hc_management_t *const hcm = ep->xfer.hcm;

+		uwarnf("\t%s: Abort URB, USBH_URBSTATUS_DISCONNECTED", ep->name);

+		if (hcm) {

+			uwarnf("\t%s: URB had channel %d assigned, halt_reason = %d", ep->name, hcm - host->channels, hcm->halt_reason);

+			_release_channel(host, hcm);

+			_update_urb(ep, hcm->hc->HCTSIZ, urb, FALSE);

+		}

+		_transfer_completed(ep, urb, USBH_URBSTATUS_DISCONNECTED);

+	}

+}

+

+static void _purge_active(USBHDriver *host) {

+	_purge_queue(host, &host->ep_active_lists[0]);

+	_purge_queue(host, &host->ep_active_lists[1]);

+	_purge_queue(host, &host->ep_active_lists[2]);

+	_purge_queue(host, &host->ep_active_lists[3]);

+}

+

+static void _purge_pending(USBHDriver *host) {

+	_purge_queue(host, &host->ep_pending_lists[0]);

+	_purge_queue(host, &host->ep_pending_lists[1]);

+	_purge_queue(host, &host->ep_pending_lists[2]);

+	_purge_queue(host, &host->ep_pending_lists[3]);

+}

+

+static uint32_t _write_packet(struct list_head *list, uint32_t space_available) {

+	usbh_ep_t *ep;

+

+	uint32_t remaining = 0;

+

+	list_for_each_entry(ep, usbh_ep_t, list, node) {

+		if (ep->in || (ep->xfer.hcm->halt_reason != USBH_LLD_HALTREASON_NONE))

+			continue;

+

+		int32_t rem = ep->xfer.len - ep->xfer.partial;

+		osalDbgCheck(rem >= 0);

+		if (rem <= 0)

+			continue;

+

+		remaining += rem;

+

+		if (!space_available) {

+			if (remaining)

+				break;

+

+			continue;

+		}

+

+		/* write one packet only */

+		if (rem > ep->wMaxPacketSize)

+			rem = ep->wMaxPacketSize;

+

+		/* round up to dwords */

+		uint32_t words = (rem + 3) / 4;

+

+		if (words > space_available)

+			words = space_available;

+

+		space_available -= words;

+

+		uint32_t written = words * 4;

+		if ((int32_t)written > rem)

+			written = rem;

+

+		volatile uint32_t *dest = ep->xfer.hcm->fifo;

+		uint32_t *src = (uint32_t *)ep->xfer.buf;

+		udbgf("\t%s: write %d words (%dB), partial=%d", ep->name, words, written, ep->xfer.partial);

+		while (words--) {

+			*dest = *src++;

+		}

+

+		ep->xfer.buf += written;

+		ep->xfer.partial += written;

+

+		remaining -= written;

+	}

+

+	return remaining;

+}

+

+

+/*===========================================================================*/

+/* API.					   	    	                                 		 */

+/*===========================================================================*/

+

+void usbh_lld_ep_object_init(usbh_ep_t *ep) {

+/*			CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+ * STALL		si		sólo DAT/STAT	si			si			si			si			no			no		ep->type != ISO && (ep->type != CTRL || ctrlphase != SETUP)

+ * ACK			si			si			si			si			si			si			no			no		ep->type != ISO

+ * NAK			si			si			si			si			si			si			no			no		ep->type != ISO

+ * BBERR		si			no			si			no			si			no			si			no		ep->in

+ * TRERR		si			si			si			si			si			si			si			no		ep->type != ISO || ep->in

+ * DTERR		si			no			si			no			si			no			no			no		ep->type != ISO && ep->in

+ * FRMOR		no			no			si			si			no			no			si			si		ep->type = PERIODIC

+ */

+	USBHDriver *host = ep->device->host;

+	uint32_t hcintmsk = HCINTMSK_CHHM | HCINTMSK_XFRCM | HCINTMSK_AHBERRM;

+

+	switch (ep->type) {

+	case USBH_EPTYPE_ISO:

+		hcintmsk |= HCINTMSK_FRMORM;

+		if (ep->in) {

+			hcintmsk |= HCINTMSK_TRERRM | HCINTMSK_BBERRM;

+		}

+		break;

+	case USBH_EPTYPE_INT:

+		hcintmsk |= HCINTMSK_TRERRM | HCINTMSK_FRMORM | HCINTMSK_STALLM | HCINTMSK_NAKM;

+		if (ep->in) {

+			hcintmsk |= HCINTMSK_DTERRM | HCINTMSK_BBERRM;

+		}

+		ep->xfer.u.frame_counter = 1;

+		break;

+	case USBH_EPTYPE_CTRL:

+		hcintmsk |= HCINTMSK_TRERRM | HCINTMSK_STALLM | HCINTMSK_NAKM;

+		break;

+	case USBH_EPTYPE_BULK:

+		hcintmsk |= HCINTMSK_TRERRM | HCINTMSK_STALLM | HCINTMSK_NAKM;

+		if (ep->in) {

+			hcintmsk |= HCINTMSK_DTERRM | HCINTMSK_BBERRM;

+		}

+		break;

+	default:

+		chDbgCheck(0);

+	}

+	ep->active_list = &host->ep_active_lists[ep->type];

+	ep->pending_list = &host->ep_pending_lists[ep->type];

+	INIT_LIST_HEAD(&ep->urb_list);

+	INIT_LIST_HEAD(&ep->node);

+

+	ep->hcintmsk = hcintmsk;

+	ep->hcchar = HCCHAR_CHENA

+			| HCCHAR_DAD(ep->device->address)

+			| HCCHAR_MCNT(1)

+			| HCCHAR_EPTYP(ep->type)

+			| ((ep->device->speed == USBH_DEVSPEED_LOW) ? HCCHAR_LSDEV : 0)

+			| (ep->in ? HCCHAR_EPDIR : 0)

+			| HCCHAR_EPNUM(ep->address)

+			| HCCHAR_MPS(ep->wMaxPacketSize);

+}

+

+void usbh_lld_ep_open(usbh_ep_t *ep) {

+	uinfof("\t%s: Open EP", ep->name);

+	ep->status = USBH_EPSTATUS_OPEN;

+	osalOsRescheduleS();

+}

+

+void usbh_lld_ep_close(usbh_ep_t *ep) {

+	usbh_urb_t *urb, *tmp;

+	uinfof("\t%s: Closing EP...", ep->name);

+	list_for_each_entry_safe(urb, usbh_urb_t, tmp, &ep->urb_list, node) {

+		uinfof("\t%s: Abort URB, USBH_URBSTATUS_DISCONNECTED", ep->name);

+		_usbh_urb_abort_and_waitS(urb, USBH_URBSTATUS_DISCONNECTED);

+	}

+	uinfof("\t%s: Closed", ep->name);

+	ep->status = USBH_EPSTATUS_CLOSED;

+	osalOsRescheduleS();

+}

+

+void usbh_lld_urb_submit(usbh_urb_t *urb) {

+	usbh_ep_t *const ep = urb->ep;

+

+	/* add the URB to the EP's queue */

+	list_add_tail(&urb->node, &ep->urb_list);

+

+	/* check if the EP wasn't in any queue (pending nor active) */

+	if (list_empty(&ep->node)) {

+

+		/* add the EP to the pending queue */

+		_move_to_pending_queue(ep);

+

+		if (usbhEPIsPeriodic(ep)) {

+			ep->device->host->otg->GINTMSK |= GINTMSK_SOFM;

+		} else {

+			/* try to queue non-periodic transfers */

+			_try_commit_np(ep->device->host);

+		}

+	}

+}

+

+bool usbh_lld_urb_abort(usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalDbgCheck(usbhURBIsBusy(urb));

+

+	usbh_ep_t *const ep = urb->ep;

+	osalDbgCheck(ep);

+	stm32_hc_management_t *const hcm = ep->xfer.hcm;

+

+	if ((hcm != NULL) && (urb == _active_urb(ep))) {

+		/* This URB is active (channel assigned, top of the EP's URB list) */

+

+		if (hcm->halt_reason == USBH_LLD_HALTREASON_NONE) {

+			/* The channel is not being halted */

+			urb->status = status;

+			_halt_channel(ep->device->host, hcm, USBH_LLD_HALTREASON_ABORT);

+		} else {

+			/* The channel is being halted, so we can't re-halt it. The CHH interrupt will

+			 * be in charge of completing the transfer, but the URB will not have the specified status.

+			 */

+		}

+		return FALSE;

+	}

+

+	/* This URB is active, we can cancel it now */

+	_transfer_completedI(ep, urb, status);

+

+	return TRUE;

+}

+

+

+/*===========================================================================*/

+/* Channel Interrupts.   	    	                                 		 */

+/*===========================================================================*/

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si			si			si			si			si			si			no			no		ep->type != ISO && !ep->in

+static inline void _ack_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	(void)host;

+	osalDbgAssert(hcm->ep->type != USBH_EPTYPE_ISO, "ACK should not happen in ISO endpoints");

+	hcm->ep->xfer.error_count = 0;

+	hc->HCINTMSK &= ~HCINTMSK_ACKM;

+	udbgf("\t%s: ACK", hcm->ep->name);

+}

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si			no			si			no			si			no			no			no		ep->type != ISO && ep->in

+static inline void _dterr_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	(void)host;

+	osalDbgAssert(hcm->ep->in && (hcm->ep->type != USBH_EPTYPE_ISO), "DTERR should not happen in OUT or ISO endpoints");

+#if 0

+	hc->HCINTMSK &= ~(HCINTMSK_DTERRM | HCINTMSK_ACKM);

+	hcm->ep->xfer.error_count = 0;

+	_halt_channel(host, hcm, USBH_LLD_HALTREASON_ERROR);

+#else

+	/* restart directly, no need to halt it in this case */

+	hcm->ep->xfer.error_count = 0;

+	hc->HCINTMSK &= ~HCINTMSK_ACKM;

+	hc->HCCHAR |= HCCHAR_CHENA;

+#endif

+	uerrf("\t%s: DTERR", hcm->ep->name);

+}

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si			no			si			no			si			no			si			no		ep->in

+static inline void _bberr_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	osalDbgAssert(hcm->ep->in, "BBERR should not happen in OUT endpoints");

+	hc->HCINTMSK &= ~HCINTMSK_BBERRM;

+	hcm->ep->xfer.error_count = 3;

+	_halt_channel(host, hcm, USBH_LLD_HALTREASON_ERROR);

+	uerrf("\t%s: BBERR", hcm->ep->name);

+}

+

+///CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si			si			si			si			si			si			si			no		ep->type != ISO || ep->in

+static inline void _trerr_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	osalDbgAssert(hcm->ep->in || (hcm->ep->type != USBH_EPTYPE_ISO), "TRERR should not happen in ISO OUT endpoints");

+	hc->HCINTMSK &= ~HCINTMSK_TRERRM;

+	++hcm->ep->xfer.error_count;

+	_halt_channel(host, hcm, USBH_LLD_HALTREASON_ERROR);

+	uerrf("\t%s: TRERR", hcm->ep->name);

+}

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	no			no			si			si			no			no			si			si		ep->type = PERIODIC

+static inline void _frmor_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	osalDbgAssert(usbhEPIsPeriodic(hcm->ep), "FRMOR should not happen in non-periodic endpoints");

+	hc->HCINTMSK &= ~HCINTMSK_FRMORM;

+	hcm->ep->xfer.error_count = 3;

+	_halt_channel(host, hcm, USBH_LLD_HALTREASON_ERROR);

+	uerrf("\t%s: FRMOR", hcm->ep->name);

+}

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si			si			si			si			si			si			no			no		ep->type != ISO

+static inline void _nak_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	osalDbgAssert(hcm->ep->type != USBH_EPTYPE_ISO, "NAK should not happen in ISO endpoints");

+	if (!hcm->ep->in || (hcm->ep->type == USBH_EPTYPE_INT)) {

+		hc->HCINTMSK &= ~HCINTMSK_NAKM;

+		_halt_channel(host, hcm, USBH_LLD_HALTREASON_NAK);

+	} else {

+		/* restart directly, no need to halt it in this case */

+		hcm->ep->xfer.error_count = 0;

+		hc->HCINTMSK &= ~HCINTMSK_ACKM;

+		hc->HCCHAR |= HCCHAR_CHENA;

+	}

+	udbgf("\t%s: NAK", hcm->ep->name);

+}

+

+//CTRL(IN)	CTRL(OUT)	INT(IN)		INT(OUT)	BULK(IN)	BULK(OUT)	ISO(IN)		ISO(OUT)

+//	si		sólo DAT/STAT	si			si			si			si			no			no		ep->type != ISO && (ep->type != CTRL || ctrlphase != SETUP)

+static inline void _stall_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	osalDbgAssert(hcm->ep->type != USBH_EPTYPE_ISO, "STALL should not happen in ISO endpoints");

+	hc->HCINTMSK &= ~HCINTMSK_STALLM;

+	_halt_channel(host, hcm, USBH_LLD_HALTREASON_STALL);

+	uwarnf("\t%s: STALL", hcm->ep->name);

+}

+

+static void _complete_bulk_int(USBHDriver *host, stm32_hc_management_t *hcm, usbh_ep_t *ep, usbh_urb_t *urb, uint32_t hctsiz) {

+	_release_channel(host, hcm);

+	_save_dt_mask(ep, hctsiz);

+	if (_update_urb(ep, hctsiz, urb, TRUE)) {

+		udbgf("\t%s: done", ep->name);

+		_transfer_completed(ep, urb, USBH_URBSTATUS_OK);

+	} else {

+		osalDbgCheck(urb->requestedLength > 0x7FFFF);

+		uwarnf("\t%s: incomplete", ep->name);

+		_move_to_pending_queue(ep);

+	}

+	if (usbhEPIsPeriodic(ep)) {

+		_try_commit_p(host, FALSE);

+	} else {

+		_try_commit_np(host);

+	}

+}

+

+static void _complete_control(USBHDriver *host, stm32_hc_management_t *hcm, usbh_ep_t *ep, usbh_urb_t *urb, uint32_t hctsiz) {

+	osalDbgCheck(ep->xfer.u.ctrl_phase != USBH_LLD_CTRLPHASE_SETUP);

+

+	_release_channel(host, hcm);

+	if (ep->xfer.u.ctrl_phase == USBH_LLD_CTRLPHASE_DATA) {

+		if (_update_urb(ep, hctsiz, urb, TRUE)) {

+			udbgf("\t%s: DATA done", ep->name);

+			ep->xfer.u.ctrl_phase = USBH_LLD_CTRLPHASE_STATUS;

+			ep->in = !ep->in;

+		} else {

+			osalDbgCheck(urb->requestedLength > 0x7FFFF);

+			uwarnf("\t%s: DATA incomplete", ep->name);

+			_save_dt_mask(ep, hctsiz);

+		}

+		_move_to_pending_queue(ep);

+	} else {

+		osalDbgCheck(ep->xfer.u.ctrl_phase == USBH_LLD_CTRLPHASE_STATUS);

+		udbgf("\t%s: STATUS done", ep->name);

+		_transfer_completed(ep, urb, USBH_URBSTATUS_OK);

+	}

+	_try_commit_np(host);

+}

+

+static void _complete_control_setup(USBHDriver *host, stm32_hc_management_t *hcm, usbh_ep_t *ep, usbh_urb_t *urb) {

+	_release_channel(host, hcm);

+	if (urb->requestedLength) {

+		udbgf("\t%s: SETUP done -> DATA", ep->name);

+		ep->xfer.u.ctrl_phase = USBH_LLD_CTRLPHASE_DATA;

+		ep->in = *((uint8_t *)urb->setup_buff) & 0x80 ? TRUE : FALSE;

+		ep->dt_mask = HCTSIZ_DPID_DATA1;

+		ep->xfer.error_count = 0;

+	} else {

+		udbgf("\t%s: SETUP done -> STATUS", ep->name);

+		ep->in = TRUE;

+		ep->xfer.u.ctrl_phase = USBH_LLD_CTRLPHASE_STATUS;

+	}

+	_move_to_pending_queue(ep);

+	_try_commit_np(host);

+}

+

+static void _complete_iso(USBHDriver *host, stm32_hc_management_t *hcm, usbh_ep_t *ep, usbh_urb_t *urb, uint32_t hctsiz) {

+	udbgf("\t%s: done", hcm->ep->name);

+	_release_channel(host, hcm);

+	_update_urb(ep, hctsiz, urb, TRUE);

+	_transfer_completed(ep, urb, USBH_URBSTATUS_OK);

+	_try_commit_p(host, FALSE);

+}

+

+static inline void _xfrc_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+	usbh_ep_t *const ep = hcm->ep;

+	usbh_urb_t *const urb = _active_urb(ep);

+	osalDbgCheck(urb);

+	uint32_t hctsiz = hc->HCTSIZ;

+

+	hc->HCINTMSK &= ~HCINTMSK_XFRCM;

+

+	switch (ep->type) {

+	case USBH_EPTYPE_CTRL:

+		if (ep->xfer.u.ctrl_phase == USBH_LLD_CTRLPHASE_SETUP) {

+			_complete_control_setup(host, hcm, ep, urb);

+		} else if (ep->in) {

+			_halt_channel(host, hcm, USBH_LLD_HALTREASON_XFRC);

+		} else {

+			_complete_control(host, hcm, ep, urb, hctsiz);

+		}

+		break;

+

+	case USBH_EPTYPE_BULK:

+		if (ep->in) {

+			_halt_channel(host, hcm, USBH_LLD_HALTREASON_XFRC);

+		} else {

+			_complete_bulk_int(host, hcm, ep, urb, hctsiz);

+		}

+		break;

+

+	case USBH_EPTYPE_INT:

+		if (ep->in && (hctsiz & HCTSIZ_PKTCNT_MASK)) {

+			_halt_channel(host, hcm, USBH_LLD_HALTREASON_XFRC);

+		} else {

+			_complete_bulk_int(host, hcm, ep, urb, hctsiz);

+		}

+		break;

+

+	case USBH_EPTYPE_ISO:

+		if (ep->in && (hctsiz & HCTSIZ_PKTCNT_MASK)) {

+			_halt_channel(host, hcm, USBH_LLD_HALTREASON_XFRC);

+		} else {

+			_complete_iso(host, hcm, ep, urb, hctsiz);

+		}

+		break;

+	}

+}

+

+static inline void _chh_int(USBHDriver *host, stm32_hc_management_t *hcm, stm32_otg_host_chn_t *hc) {

+

+	usbh_ep_t *const ep = hcm->ep;

+	usbh_urb_t *const urb = _active_urb(ep);

+	osalDbgCheck(urb);

+	uint32_t hctsiz = hc->HCTSIZ;

+	usbh_lld_halt_reason_t reason = hcm->halt_reason;

+

+	//osalDbgCheck(reason != USBH_LLD_HALTREASON_NONE);

+	if (reason == USBH_LLD_HALTREASON_NONE) {

+		uwarnf("\tCHH: ch=%d, USBH_LLD_HALTREASON_NONE", hcm - host->channels);

+		return;

+	}

+

+	if (reason == USBH_LLD_HALTREASON_XFRC) {

+		osalDbgCheck(ep->in);

+		switch (ep->type) {

+		case USBH_EPTYPE_CTRL:

+			_complete_control(host, hcm, ep, urb, hctsiz);

+			break;

+		case USBH_EPTYPE_BULK:

+		case USBH_EPTYPE_INT:

+			_complete_bulk_int(host, hcm, ep, urb, hctsiz);

+			break;

+		case USBH_EPTYPE_ISO:

+			_complete_iso(host, hcm, ep, urb, hctsiz);

+			break;

+		}

+	} else {

+		_release_channel(host, hcm);

+		_save_dt_mask(ep, hctsiz);

+		bool done = _update_urb(ep, hctsiz, urb, FALSE);

+

+		switch (reason) {

+		case USBH_LLD_HALTREASON_NAK:

+			if ((ep->type == USBH_EPTYPE_INT) && ep->in) {

+				_transfer_completed(ep, urb, USBH_URBSTATUS_TIMEOUT);

+			} else {

+				ep->xfer.error_count = 0;

+				_move_to_pending_queue(ep);

+			}

+			break;

+

+		case USBH_LLD_HALTREASON_STALL:

+			if ((ep->type == USBH_EPTYPE_CTRL) && (ep->xfer.u.ctrl_phase == USBH_LLD_CTRLPHASE_SETUP)) {

+				uerrf("\t%s: Faulty device: STALLed SETUP phase", ep->name);

+			}

+			_transfer_completed(ep, urb, USBH_URBSTATUS_STALL);

+			break;

+

+		case USBH_LLD_HALTREASON_ERROR:

+			if ((ep->type == USBH_EPTYPE_ISO) || done || (ep->xfer.error_count >= 3)) {

+				_transfer_completed(ep, urb, USBH_URBSTATUS_ERROR);

+			} else {

+				uerrf("\t%s: err=%d, done=%d, retry", ep->name, ep->xfer.error_count, done);

+				_move_to_pending_queue(ep);

+			}

+			break;

+

+		case USBH_LLD_HALTREASON_ABORT:

+			uwarnf("\t%s: Abort", ep->name);

+			_transfer_completed(ep, urb, urb->status);

+			break;

+

+		default:

+			osalDbgCheck(0);

+			break;

+		}

+

+		if (usbhEPIsPeriodic(ep)) {

+			_try_commit_p(host, FALSE);

+		} else {

+			_try_commit_np(host);

+		}

+	}

+}

+

+static void _hcint_n_int(USBHDriver *host, uint8_t chn) {

+

+	stm32_hc_management_t *const hcm = &host->channels[chn];

+	stm32_otg_host_chn_t *const hc = hcm->hc;

+

+	uint32_t hcint = hc->HCINT;

+	hcint &= hc->HCINTMSK;

+	hc->HCINT = hcint;

+

+	osalDbgCheck((hcint & HCINTMSK_AHBERRM) == 0);

+	osalDbgCheck(hcm->ep);

+

+	if (hcint & HCINTMSK_STALLM)

+		_stall_int(host, hcm, hc);

+	if (hcint & HCINTMSK_NAKM)

+		_nak_int(host, hcm, hc);

+	if (hcint & HCINTMSK_ACKM)

+		_ack_int(host, hcm, hc);

+	if (hcint & HCINTMSK_TRERRM)

+		_trerr_int(host, hcm, hc);

+	if (hcint & HCINTMSK_BBERRM)

+		_bberr_int(host, hcm, hc);

+	if (hcint & HCINTMSK_FRMORM)

+		_frmor_int(host, hcm, hc);

+	if (hcint & HCINTMSK_DTERRM)

+		_dterr_int(host, hcm, hc);

+	if (hcint & HCINTMSK_XFRCM)

+		_xfrc_int(host, hcm, hc);

+	if (hcint & HCINTMSK_CHHM)

+		_chh_int(host, hcm, hc);

+}

+

+static inline void _hcint_int(USBHDriver *host) {

+	uint32_t haint;

+

+	haint = host->otg->HAINT;

+	haint &= host->otg->HAINTMSK;

+

+	if (!haint) {

+		uerrf("HAINT=%08x, HAINTMSK=%08x", host->otg->HAINT, host->otg->HAINTMSK);

+		return;

+	}

+

+#if 1	//channel lookup loop

+	uint8_t i;

+	for (i = 0; haint && (i < host->channels_number); i++) {

+		if (haint & (1 << i)) {

+			_hcint_n_int(host, i);

+			haint &= ~(1 << i);

+		}

+	}

+#else	//faster calculation, with __CLZ (count leading zeroes)

+	while (haint) {

+		uint8_t chn = (uint8_t)(31 - __CLZ(haint));

+		osalDbgAssert(chn < host->channels_number, "what?");

+		haint &= ~host->channels[chn].haintmsk;

+		_hcint_n_int(host, chn);

+	}

+#endif

+}

+

+

+/*===========================================================================*/

+/* Host interrupts.			   	                                     		 */

+/*===========================================================================*/

+static inline void _sof_int(USBHDriver *host) {

+	udbg("SOF");

+	_try_commit_p(host, TRUE);

+}

+

+static inline void _rxflvl_int(USBHDriver *host) {

+

+	stm32_otg_t *const otg = host->otg;

+

+	otg->GINTMSK &= ~GINTMSK_RXFLVLM;

+	while (otg->GINTSTS & GINTSTS_RXFLVL) {

+		uint32_t grxstsp = otg->GRXSTSP;

+		osalDbgCheck((grxstsp & GRXSTSP_CHNUM_MASK) < host->channels_number);

+		stm32_hc_management_t *const hcm = &host->channels[grxstsp & GRXSTSP_CHNUM_MASK];

+		uint32_t hctsiz = hcm->hc->HCTSIZ;

+

+		if ((grxstsp & GRXSTSP_PKTSTS_MASK) == GRXSTSP_PKTSTS(2)) {

+			/* 0010: IN data packet received */

+			usbh_ep_t *const ep = hcm->ep;

+			osalDbgCheck(ep);

+

+			/* restart the channel ASAP */

+			if (hctsiz & HCTSIZ_PKTCNT_MASK) {

+#if CH_DBG_ENABLE_CHECKS

+				if (usbhEPIsPeriodic(ep)) {

+					osalDbgCheck(host->otg->HPTXSTS & HPTXSTS_PTXQSAV_MASK);

+				} else {

+					osalDbgCheck(host->otg->HNPTXSTS & HPTXSTS_PTXQSAV_MASK);

+				}

+#endif

+				hcm->hc->HCCHAR |= HCCHAR_CHENA;

+			}

+

+			udbgf("\t%s: RXFLVL rx=%dB, rem=%dB (%dpkts)",

+					ep->name,

+					(grxstsp & GRXSTSP_BCNT_MASK) >> 4,

+					(hctsiz & HCTSIZ_XFRSIZ_MASK),

+					(hctsiz & HCTSIZ_PKTCNT_MASK) >> 19);

+

+			/* Read */

+			uint32_t *dest = (uint32_t *)ep->xfer.buf;

+			volatile uint32_t *const src = hcm->fifo;

+

+			uint32_t bcnt = (grxstsp & GRXSTSP_BCNT_MASK) >> GRXSTSP_BCNT_OFF;

+			osalDbgCheck(bcnt + ep->xfer.partial <= ep->xfer.len);

+

+			//TODO: optimize this

+			uint32_t words = bcnt / 4;

+			uint8_t bytes = bcnt & 3;

+			while (words--) {

+				*dest++ = *src;

+			}

+			if (bytes) {

+				uint32_t r = *src;

+				uint8_t *bsrc = (uint8_t *)&r;

+				uint8_t *bdest = (uint8_t *)dest;

+				do {

+					*bdest++ = *bsrc++;

+				} while (--bytes);

+			}

+

+			ep->xfer.buf += bcnt;

+			ep->xfer.partial += bcnt;

+

+#if 0 //STM32_USBH_CHANNELS_NP > 1

+			/* check bug */

+			if (hctsiz & HCTSIZ_PKTCNT_MASK) {

+				uint32_t pkt = (hctsiz & HCTSIZ_PKTCNT_MASK) >> 19;

+				uint32_t siz = (hctsiz & HCTSIZ_XFRSIZ_MASK);

+				if (pkt * ep->wMaxPacketSize != siz) {

+					uerrf("\t%s: whatttt???", ep->name);

+				}

+			}

+#endif

+

+#if USBH_DEBUG_ENABLE && USBH_LLD_DEBUG_ENABLE_ERRORS

+		} else {

+			/* 0011: IN transfer completed (triggers an interrupt)

+			 * 0101: Data toggle error (triggers an interrupt)

+			 * 0111: Channel halted (triggers an interrupt)

+			 */

+			switch (grxstsp & GRXSTSP_PKTSTS_MASK) {

+			case GRXSTSP_PKTSTS(3):

+			case GRXSTSP_PKTSTS(5):

+			case GRXSTSP_PKTSTS(7):

+				break;

+			default:

+				uerrf("\tRXFLVL: ch=%d, UNK=%d", grxstsp & GRXSTSP_CHNUM_MASK, (grxstsp & GRXSTSP_PKTSTS_MASK) >> 17);

+				break;

+			}

+#endif

+		}

+	}

+	otg->GINTMSK |= GINTMSK_RXFLVLM;

+}

+

+static inline void _nptxfe_int(USBHDriver *host) {

+	uint32_t rem;

+	stm32_otg_t *const otg = host->otg;

+

+	rem = _write_packet(&host->ep_active_lists[USBH_EPTYPE_CTRL],

+			otg->HNPTXSTS & HPTXSTS_PTXFSAVL_MASK);

+

+	rem += _write_packet(&host->ep_active_lists[USBH_EPTYPE_BULK],

+			otg->HNPTXSTS & HPTXSTS_PTXFSAVL_MASK);

+

+//	if (rem)

+//		otg->GINTMSK |= GINTMSK_NPTXFEM;

+

+	if (!rem)

+		otg->GINTMSK &= ~GINTMSK_NPTXFEM;

+

+}

+

+static inline void _ptxfe_int(USBHDriver *host) {

+	//TODO: implement

+	(void)host;

+	uinfo("PTXFE");

+}

+

+static inline void _discint_int(USBHDriver *host) {

+	uint32_t hprt = host->otg->HPRT;

+

+	uwarn("\tDISCINT");

+

+	if (!(hprt & HPRT_PCSTS)) {

+		host->rootport.lld_status &= ~(USBH_PORTSTATUS_CONNECTION | USBH_PORTSTATUS_ENABLE);

+		host->rootport.lld_c_status |= USBH_PORTSTATUS_C_CONNECTION | USBH_PORTSTATUS_C_ENABLE;

+	}

+	_purge_active(host);

+	_purge_pending(host);

+}

+

+static inline void _hprtint_int(USBHDriver *host) {

+	stm32_otg_t *const otg = host->otg;

+	uint32_t hprt = otg->HPRT;

+

+	/* note: writing PENA = 1 actually disables the port */

+	uint32_t hprt_clr = hprt & ~(HPRT_PENA | HPRT_PCDET | HPRT_PENCHNG | HPRT_POCCHNG);

+

+	if (hprt & HPRT_PCDET) {

+		hprt_clr |= HPRT_PCDET;

+		if (hprt & HPRT_PCSTS) {

+			uinfo("\tHPRT: Port connection detected");

+			host->rootport.lld_status |= USBH_PORTSTATUS_CONNECTION;

+			host->rootport.lld_c_status |= USBH_PORTSTATUS_C_CONNECTION;

+		} else {

+			uinfo("\tHPRT: Port disconnection detected");

+		}

+	}

+

+	if (hprt & HPRT_PENCHNG) {

+		hprt_clr |= HPRT_PENCHNG;

+		if (hprt & HPRT_PENA) {

+			uinfo("\tHPRT: Port enabled");

+			host->rootport.lld_status |= USBH_PORTSTATUS_ENABLE;

+			host->rootport.lld_status &= ~(USBH_PORTSTATUS_HIGH_SPEED | USBH_PORTSTATUS_LOW_SPEED);

+

+			/* Make sure the FIFOs are flushed. */

+		    otg_txfifo_flush(host, 0x10);

+		    otg_rxfifo_flush(host);

+

+		    /* Clear all pending HC Interrupts */

+			uint8_t i;

+			for (i = 0; i < host->channels_number; i++) {

+				otg->hc[i].HCINTMSK = 0;

+				otg->hc[i].HCINT = 0xFFFFFFFF;

+			}

+

+			/* configure speed */

+			if ((hprt & HPRT_PSPD_MASK) == HPRT_PSPD_LS) {

+				host->rootport.lld_status |= USBH_PORTSTATUS_LOW_SPEED;

+				otg->HFIR = 6000;

+				otg->HCFG = (otg->HCFG & ~HCFG_FSLSPCS_MASK) | HCFG_FSLSPCS_6;

+			} else {

+				otg->HFIR = 48000;

+				otg->HCFG = (otg->HCFG & ~HCFG_FSLSPCS_MASK) | HCFG_FSLSPCS_48;

+			}

+		} else {

+			if (hprt & HPRT_PCSTS) {

+				if (hprt & HPRT_POCA) {

+					uerr("\tHPRT: Port disabled due to overcurrent");

+				} else {

+					uerr("\tHPRT: Port disabled due to port babble");

+				}

+			} else {

+				uerr("\tHPRT: Port disabled due to disconnect");

+			}

+

+			_purge_active(host);

+			_purge_pending(host);

+

+			host->rootport.lld_status &= ~USBH_PORTSTATUS_ENABLE;

+		}

+		host->rootport.lld_c_status |= USBH_PORTSTATUS_C_ENABLE;

+	}

+

+	if (hprt & HPRT_POCCHNG) {

+		hprt_clr |= HPRT_POCCHNG;

+		if (hprt & HPRT_POCA) {

+			uerr("\tHPRT: Overcurrent");

+			host->rootport.lld_status |= USBH_PORTSTATUS_OVERCURRENT;

+		} else {

+			udbg("\tHPRT: Clear overcurrent");

+			host->rootport.lld_status &= ~USBH_PORTSTATUS_OVERCURRENT;

+		}

+		host->rootport.lld_c_status |= USBH_PORTSTATUS_C_OVERCURRENT;

+	}

+

+	otg->HPRT = hprt_clr;

+}

+

+static void usb_lld_serve_interrupt(USBHDriver *host) {

+	osalDbgCheck(host && (host->status != USBH_STATUS_STOPPED));

+

+	stm32_otg_t *const otg = host->otg;

+	uint32_t gintsts = otg->GINTSTS;

+

+	/* check host mode */

+	if (!(gintsts & GINTSTS_CMOD)) {

+		uerr("Device mode");

+		otg->GINTSTS = gintsts;

+		return;

+	}

+

+	/* check mismatch */

+	if (gintsts & GINTSTS_MMIS) {

+		uerr("Mode Mismatch");

+		otg->GINTSTS = gintsts;

+		return;

+	}

+

+	gintsts &= otg->GINTMSK;

+	if (!gintsts) {

+		uwarnf("GINTSTS=%08x, GINTMSK=%08x", otg->GINTSTS, otg->GINTMSK);

+		return;

+	}

+//	otg->GINTMSK &= ~(GINTMSK_NPTXFEM | GINTMSK_PTXFEM);

+	otg->GINTSTS = gintsts;

+

+	if (gintsts & GINTSTS_SOF)

+		_sof_int(host);

+	if (gintsts & GINTSTS_RXFLVL)

+		_rxflvl_int(host);

+	if (gintsts & GINTSTS_HPRTINT)

+		_hprtint_int(host);

+	if (gintsts & GINTSTS_DISCINT)

+		_discint_int(host);

+	if (gintsts & GINTSTS_HCINT)

+		_hcint_int(host);

+	if (gintsts & GINTSTS_NPTXFE)

+		_nptxfe_int(host);

+	if (gintsts & GINTSTS_PTXFE)

+		_ptxfe_int(host);

+	if (gintsts & GINTSTS_IPXFR) {

+		uerr("IPXFRM");

+	}

+}

+

+

+/*===========================================================================*/

+/* Interrupt handlers.   	    	                                 		 */

+/*===========================================================================*/

+

+#if STM32_USBH_USE_OTG1

+OSAL_IRQ_HANDLER(STM32_OTG1_HANDLER) {

+	OSAL_IRQ_PROLOGUE();

+	osalSysLockFromISR();

+	usb_lld_serve_interrupt(&USBHD1);

+	osalSysUnlockFromISR();

+	OSAL_IRQ_EPILOGUE();

+}

+#endif

+

+#if STM32_USBH_USE_OTG2

+OSAL_IRQ_HANDLER(STM32_OTG2_HANDLER) {

+	OSAL_IRQ_PROLOGUE();

+	osalSysLockFromISR();

+	usb_lld_serve_interrupt(&USBHD2);

+	osalSysUnlockFromISR();

+	OSAL_IRQ_EPILOGUE();

+}

+#endif

+

+

+/*===========================================================================*/

+/* Initialization functions.   	                                     		 */

+/*===========================================================================*/

+static void otg_core_reset(USBHDriver *usbp) {

+  stm32_otg_t *const otgp = usbp->otg;

+

+  /* Wait AHB idle condition.*/

+  while ((otgp->GRSTCTL & GRSTCTL_AHBIDL) == 0)

+	;

+

+  osalSysPolledDelayX(64);

+

+  /* Core reset and delay of at least 3 PHY cycles.*/

+  otgp->GRSTCTL = GRSTCTL_CSRST;

+  while ((otgp->GRSTCTL & GRSTCTL_CSRST) != 0)

+	;

+

+  osalSysPolledDelayX(24);

+

+  /* Wait AHB idle condition.*/

+  while ((otgp->GRSTCTL & GRSTCTL_AHBIDL) == 0)

+	;

+}

+

+static void otg_rxfifo_flush(USBHDriver *usbp) {

+  stm32_otg_t *const otgp = usbp->otg;

+

+  otgp->GRSTCTL = GRSTCTL_RXFFLSH;

+  while ((otgp->GRSTCTL & GRSTCTL_RXFFLSH) != 0)

+	;

+  /* Wait for 3 PHY Clocks.*/

+  osalSysPolledDelayX(24);

+}

+

+static void otg_txfifo_flush(USBHDriver *usbp, uint32_t fifo) {

+  stm32_otg_t *const otgp = usbp->otg;

+

+  otgp->GRSTCTL = GRSTCTL_TXFNUM(fifo) | GRSTCTL_TXFFLSH;

+  while ((otgp->GRSTCTL & GRSTCTL_TXFFLSH) != 0)

+	;

+  /* Wait for 3 PHY Clocks.*/

+  osalSysPolledDelayX(24);

+}

+

+static void _init(USBHDriver *host) {

+	int i;

+

+	usbhObjectInit(host);

+

+#if STM32_USBH_USE_OTG1

+#if STM32_USBH_USE_OTG2

+	if (&USBHD1 == host) {

+#endif

+		host->otg = OTG_FS;

+		host->channels_number = STM32_OTG1_CHANNELS_NUMBER;

+#if STM32_USBH_USE_OTG2

+	}

+#endif

+#endif

+

+#if STM32_USBH_USE_OTG2

+#if STM32_USBH_USE_OTG1

+	if (&USBHD2 == host) {

+#endif

+		host->otg = OTG_HS;

+		host->channels_number = STM32_OTG2_CHANNELS_NUMBER;

+#if STM32_USBH_USE_OTG1

+	}

+#endif

+#endif

+	INIT_LIST_HEAD(&host->ch_free[0]);

+	INIT_LIST_HEAD(&host->ch_free[1]);

+	for (i = 0; i < host->channels_number; i++) {

+		host->channels[i].haintmsk = 1 << i;

+		host->channels[i].hc = &host->otg->hc[i];

+		host->channels[i].fifo = host->otg->FIFO[i];

+		if (i < STM32_USBH_CHANNELS_NP) {

+			list_add_tail(&host->channels[i].node, &host->ch_free[1]);

+		} else {

+			list_add_tail(&host->channels[i].node, &host->ch_free[0]);

+		}

+	}

+	for (i = 0; i < 4; i++) {

+		INIT_LIST_HEAD(&host->ep_active_lists[i]);

+		INIT_LIST_HEAD(&host->ep_pending_lists[i]);

+	}

+}

+

+void usbh_lld_init(void) {

+#if STM32_USBH_USE_OTG1

+	_init(&USBHD1);

+#endif

+#if STM32_USBH_USE_OTG2

+	_init(&USBHD2);

+#endif

+}

+

+static void _usbh_start(USBHDriver *usbh) {

+	stm32_otg_t *const otgp = usbh->otg;

+

+	/* Clock activation.*/

+#if STM32_USBH_USE_OTG1

+#if STM32_USBH_USE_OTG2

+	if (&USBHD1 == usbh) {

+#endif

+		/* OTG FS clock enable and reset.*/

+		rccEnableOTG_FS(FALSE);

+		rccResetOTG_FS();

+

+		otgp->GINTMSK = 0;

+

+		/* Enables IRQ vector.*/

+		nvicEnableVector(STM32_OTG1_NUMBER, STM32_USB_OTG1_IRQ_PRIORITY);

+#if STM32_USBH_USE_OTG2

+	}

+#endif

+#endif

+

+#if STM32_USBH_USE_OTG2

+#if STM32_USBH_USE_OTG1

+	if (&USBHD2 == usbh) {

+#endif

+		/* OTG HS clock enable and reset.*/

+		rccEnableOTG_HS(FALSE);

+		rccResetOTG_HS();

+

+		otgp->GINTMSK = 0;

+

+		/* Enables IRQ vector.*/

+		nvicEnableVector(STM32_OTG2_NUMBER, STM32_USB_OTG2_IRQ_PRIORITY);

+#if STM32_USBH_USE_OTG1

+	}

+#endif

+#endif

+

+	otgp->GUSBCFG = GUSBCFG_PHYSEL | GUSBCFG_TRDT(5);

+

+	otg_core_reset(usbh);

+

+	otgp->GCCFG = GCCFG_PWRDWN;

+

+	/* Forced host mode. */

+	otgp->GUSBCFG = GUSBCFG_FHMOD | GUSBCFG_PHYSEL | GUSBCFG_TRDT(5);

+

+	/* PHY enabled.*/

+	otgp->PCGCCTL = 0;

+

+	/* Internal FS PHY activation.*/

+#if defined(BOARD_OTG_NOVBUSSENS)

+	otgp->GCCFG = GCCFG_NOVBUSSENS | GCCFG_PWRDWN;

+#else

+	otgp->GCCFG = GCCFG_PWRDWN;

+#endif

+

+	/* 48MHz 1.1 PHY.*/

+	otgp->HCFG = HCFG_FSLSS | HCFG_FSLSPCS_48;

+

+	/* Interrupts on FIFOs half empty.*/

+	otgp->GAHBCFG = 0;

+

+	otgp->GOTGINT = 0xFFFFFFFF;

+

+	otgp->HPRT |= HPRT_PPWR;

+

+	/* without this delay, the FIFO sizes are set INcorrectly */

+	osalThreadSleepS(MS2ST(200));

+

+#define HNPTXFSIZ						DIEPTXF0

+#if STM32_USBH_USE_OTG1

+#if STM32_USBH_USE_OTG2

+	if (&USBHD1 == usbh) {

+#endif

+		otgp->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG1_RXFIFO_SIZE / 4);

+		otgp->HNPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG1_RXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG1_NPTXFIFO_SIZE / 4);

+		otgp->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG1_RXFIFO_SIZE / 4) + (STM32_OTG1_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG1_PTXFIFO_SIZE / 4);

+#if STM32_USBH_USE_OTG2

+	}

+#endif

+#endif

+#if STM32_USBH_USE_OTG2

+#if STM32_USBH_USE_OTG1

+	if (&USBHD2 == usbh) {

+#endif

+		otgp->GRXFSIZ = GRXFSIZ_RXFD(STM32_OTG2_RXFIFO_SIZE / 4);

+		otgp->HNPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG2_RXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG2_NPTXFIFO_SIZE / 4);

+		otgp->HPTXFSIZ = HPTXFSIZ_PTXSA((STM32_OTG2_RXFIFO_SIZE / 4) + (STM32_OTG2_NPTXFIFO_SIZE / 4)) | HPTXFSIZ_PTXFD(STM32_OTG2_PTXFIFO_SIZE / 4);

+#if STM32_USBH_USE_OTG1

+	}

+#endif

+#endif

+

+	otg_txfifo_flush(usbh, 0x10);

+	otg_rxfifo_flush(usbh);

+

+	otgp->GINTSTS = 0xffffffff;

+	otgp->GINTMSK = GINTMSK_DISCM /*| GINTMSK_PTXFEM*/ | GINTMSK_HCM | GINTMSK_HPRTM

+					/*| GINTMSK_IPXFRM | GINTMSK_NPTXFEM*/ | GINTMSK_RXFLVLM

+					/*| GINTMSK_SOFM */ | GINTMSK_MMISM;

+

+	usbh->rootport.lld_status = USBH_PORTSTATUS_POWER;

+	usbh->rootport.lld_c_status = 0;

+

+	/* Global interrupts enable.*/

+	otgp->GAHBCFG |= GAHBCFG_GINTMSK;

+}

+

+void usbh_lld_start(USBHDriver *usbh) {

+	if (usbh->status != USBH_STATUS_STOPPED) return;

+	_usbh_start(usbh);

+}

+

+/*===========================================================================*/

+/* Root Hub request handler.   	                                     		 */

+/*===========================================================================*/

+usbh_urbstatus_t usbh_lld_root_hub_request(USBHDriver *usbh, uint8_t bmRequestType, uint8_t bRequest,

+		uint16_t wvalue, uint16_t windex, uint16_t wlength, uint8_t *buf) {

+

+	uint16_t typereq = (bmRequestType << 8) | bRequest;

+

+	switch (typereq) {

+	case ClearHubFeature:

+		switch (wvalue) {

+		case USBH_HUB_FEAT_C_HUB_LOCAL_POWER:

+		case USBH_HUB_FEAT_C_HUB_OVER_CURRENT:

+			break;

+		default:

+			osalDbgAssert(0, "invalid wvalue");

+		}

+		break;

+

+	case ClearPortFeature:

+		chDbgAssert(windex == 1, "invalid windex");

+

+		osalSysLock();

+		switch (wvalue) {

+		case USBH_PORT_FEAT_ENABLE:

+		case USBH_PORT_FEAT_SUSPEND:

+		case USBH_PORT_FEAT_POWER:

+			chDbgAssert(0, "unimplemented");	/* TODO */

+			break;

+

+		case USBH_PORT_FEAT_INDICATOR:

+			chDbgAssert(0, "unsupported");

+			break;

+

+		case USBH_PORT_FEAT_C_CONNECTION:

+			usbh->rootport.lld_c_status &= ~USBH_PORTSTATUS_C_CONNECTION;

+			break;

+

+		case USBH_PORT_FEAT_C_RESET:

+			usbh->rootport.lld_c_status &= ~USBH_PORTSTATUS_C_RESET;

+			break;

+

+		case USBH_PORT_FEAT_C_ENABLE:

+			usbh->rootport.lld_c_status &= ~USBH_PORTSTATUS_C_ENABLE;

+			break;

+

+		case USBH_PORT_FEAT_C_SUSPEND:

+			usbh->rootport.lld_c_status &= ~USBH_PORTSTATUS_C_SUSPEND;

+			break;

+

+		case USBH_PORT_FEAT_C_OVERCURRENT:

+			usbh->rootport.lld_c_status &= USBH_PORTSTATUS_C_OVERCURRENT;

+			break;

+

+		default:

+			osalDbgAssert(0, "invalid wvalue");

+			break;

+		}

+		osalOsRescheduleS();

+		osalSysUnlock();

+		break;

+

+	case GetHubDescriptor:

+		/*dev_dbg(hsotg->dev, "GetHubDescriptor\n");

+		hub_desc = (struct usb_hub_descriptor *)buf;

+		hub_desc->bDescLength = 9;

+		hub_desc->bDescriptorType = USB_DT_HUB;

+		hub_desc->bNbrPorts = 1;

+		hub_desc->wHubCharacteristics =

+			cpu_to_le16(HUB_CHAR_COMMON_LPSM |

+					HUB_CHAR_INDV_PORT_OCPM);

+		hub_desc->bPwrOn2PwrGood = 1;

+		hub_desc->bHubContrCurrent = 0;

+		hub_desc->u.hs.DeviceRemovable[0] = 0;

+		hub_desc->u.hs.DeviceRemovable[1] = 0xff;*/

+		break;

+

+	case GetHubStatus:

+		osalDbgCheck(wlength >= 4);

+		*(uint32_t *)buf = 0;

+		break;

+

+	case GetPortStatus:

+		chDbgAssert(windex == 1, "invalid windex");

+		osalDbgCheck(wlength >= 4);

+		osalSysLock();

+		*(uint32_t *)buf = usbh->rootport.lld_status | (usbh->rootport.lld_c_status << 16);

+		osalOsRescheduleS();

+		osalSysUnlock();

+		break;

+

+	case SetHubFeature:

+		chDbgAssert(0, "unsupported");

+		break;

+

+	case SetPortFeature:

+		chDbgAssert(windex == 1, "invalid windex");

+

+		switch (wvalue) {

+		case USBH_PORT_FEAT_TEST:

+		case USBH_PORT_FEAT_SUSPEND:

+		case USBH_PORT_FEAT_POWER:

+			chDbgAssert(0, "unimplemented");	/* TODO */

+			break;

+

+		case USBH_PORT_FEAT_RESET: {

+			osalSysLock();

+			stm32_otg_t *const otg = usbh->otg;

+			uint32_t hprt;

+			otg->PCGCCTL = 0;

+			hprt = otg->HPRT;

+			/* note: writing PENA = 1 actually disables the port */

+			hprt &= ~(HPRT_PSUSP | HPRT_PENA | HPRT_PCDET | HPRT_PENCHNG | HPRT_POCCHNG );

+			otg->HPRT = hprt | HPRT_PRST;

+			osalThreadSleepS(MS2ST(60));

+			otg->HPRT = hprt;

+			usbh->rootport.lld_c_status |= USBH_PORTSTATUS_C_RESET;

+			osalOsRescheduleS();

+			osalSysUnlock();

+		} 	break;

+

+		case USBH_PORT_FEAT_INDICATOR:

+			chDbgAssert(0, "unsupported");

+			break;

+

+		default:

+			osalDbgAssert(0, "invalid wvalue");

+			break;

+		}

+		break;

+

+	default:

+		osalDbgAssert(0, "invalid typereq");

+		break;

+	}

+

+	return USBH_URBSTATUS_OK;

+}

+

+uint8_t usbh_lld_roothub_get_statuschange_bitmap(USBHDriver *usbh) {

+	osalSysLock();

+	if (usbh->rootport.lld_c_status) {

+		osalOsRescheduleS();

+		osalSysUnlock();

+		return 1 << 1;

+	}

+	osalOsRescheduleS();

+	osalSysUnlock();

+	return 0;

+}

+

+

+#endif

diff --git a/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.h b/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.h
new file mode 100644
index 0000000..e8da2ac
--- /dev/null
+++ b/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.h
@@ -0,0 +1,153 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef USBH_LLD_H_

+#define USBH_LLD_H_

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "osal.h"

+#include "stm32_otg.h"

+

+/* TODO:

+ *

+ * - Implement ISO/INT OUT and test

+ * - Consider DMA mode for OTG_HS, consider external PHY for HS.

+ * - Implement a data pump thread, so we don't have to copy data from the ISR

+ * 		This might be a bad idea for small endpoint packet sizes (the context switch

+ * 		could be longer than the copy)

+ */

+

+typedef enum {

+	USBH_LLD_CTRLPHASE_SETUP,

+	USBH_LLD_CTRLPHASE_DATA,

+	USBH_LLD_CTRLPHASE_STATUS

+} usbh_lld_ctrlphase_t;

+

+typedef enum {

+	USBH_LLD_HALTREASON_NONE,

+	USBH_LLD_HALTREASON_XFRC,

+	USBH_LLD_HALTREASON_NAK,

+	USBH_LLD_HALTREASON_STALL,

+	USBH_LLD_HALTREASON_ERROR,

+	USBH_LLD_HALTREASON_ABORT

+} usbh_lld_halt_reason_t;

+

+

+typedef struct stm32_hc_management {

+	struct list_head node;

+

+	stm32_otg_host_chn_t *hc;

+	volatile uint32_t	*fifo;

+	usbh_ep_t 			*ep;

+	uint16_t			haintmsk;

+	usbh_lld_halt_reason_t halt_reason;

+} stm32_hc_management_t;

+

+

+#define _usbhdriver_ll_data											\

+	stm32_otg_t *otg;												\

+	/* channels */													\

+	uint8_t channels_number;										\

+	stm32_hc_management_t channels[STM32_OTG2_CHANNELS_NUMBER];		\

+	struct list_head ch_free[2];									\

+	/* Enpoints being processed */									\

+	struct list_head ep_active_lists[4];							\

+	/* Pending endpoints */											\

+	struct list_head ep_pending_lists[4];

+

+

+#define _usbh_ep_ll_data																\

+		struct list_head	*active_list;		/* shortcut to ep list */				\

+		struct list_head	*pending_list;		/* shortcut to ep list */				\

+		struct list_head	urb_list;			/* list of URBs queued in this EP */	\

+		struct list_head	node;				/* this EP */							\

+		uint32_t 			hcintmsk;													\

+		uint32_t			hcchar;														\

+		uint32_t 			dt_mask;			/* data-toggle mask */					\

+		/* current transfer */															\

+		struct {																		\

+			stm32_hc_management_t *hcm;				/* assigned channel */				\

+			uint32_t			len;				/* this transfer's total length */	\

+			uint8_t				*buf;				/* this transfer's buffer */		\

+			uint32_t			partial;			/* this transfer's partial length */\

+			uint16_t			packets;			/* packets allocated */				\

+			union {																		\

+				uint32_t			frame_counter;		/* frame counter (for INT) */	\

+				usbh_lld_ctrlphase_t	ctrl_phase;		/* control phase (for CTRL) */	\

+			} u;																		\

+			uint8_t				error_count;		/* error count */					\

+		} xfer;

+

+

+

+

+

+#define _usbh_port_ll_data		\

+	uint16_t lld_c_status;		\

+	uint16_t lld_status;

+

+#define _usbh_device_ll_data

+

+#define _usbh_hub_ll_data

+

+#define _usbh_urb_ll_data		\

+	struct list_head node;		\

+	bool queued;

+

+

+#define usbh_lld_urb_object_init(urb) 									\

+		do {															\

+			osalDbgAssert(((uint32_t)urb->buff & 3) == 0, 				\

+				"use USBH_DEFINE_BUFFER() to declare the IO buffers"); 	\

+				urb->queued = FALSE;									\

+		} while (0)

+

+

+#define usbh_lld_urb_object_reset(urb) 									\

+		do {															\

+			osalDbgAssert(urb->queued == FALSE, "wrong state");			\

+			osalDbgAssert(((uint32_t)urb->buff & 3) == 0, 				\

+				"use USBH_DEFINE_BUFFER() to declare the IO buffers"); 	\

+		} while (0)

+

+

+

+void usbh_lld_init(void);

+void usbh_lld_start(USBHDriver *usbh);

+void usbh_lld_ep_object_init(usbh_ep_t *ep);

+void usbh_lld_ep_open(usbh_ep_t *ep);

+void usbh_lld_ep_close(usbh_ep_t *ep);

+void usbh_lld_urb_submit(usbh_urb_t *urb);

+bool usbh_lld_urb_abort(usbh_urb_t *urb, usbh_urbstatus_t status);

+usbh_urbstatus_t usbh_lld_root_hub_request(USBHDriver *usbh, uint8_t bmRequestType, uint8_t bRequest,

+		uint16_t wvalue, uint16_t windex, uint16_t wlength, uint8_t *buf);

+uint8_t usbh_lld_roothub_get_statuschange_bitmap(USBHDriver *usbh);

+

+#define usbh_lld_epreset(ep) do {(ep)->dt_mask = HCTSIZ_DPID_DATA0;} while (0);

+

+#ifdef __IAR_SYSTEMS_ICC__

+#define USBH_LLD_DEFINE_BUFFER(type, name) type name

+#else

+#define USBH_LLD_DEFINE_BUFFER(type, name) type name __attribute__((aligned(4)))

+#endif

+

+#endif

+

+#endif /* USBH_LLD_H_ */

diff --git a/os/hal/ports/STM32/STM32F0xx/platform.mk b/os/hal/ports/STM32/STM32F0xx/platform.mk
index f7464ff..1dff83a 100644
--- a/os/hal/ports/STM32/STM32F0xx/platform.mk
+++ b/os/hal/ports/STM32/STM32F0xx/platform.mk
@@ -1,6 +1,8 @@
 include ${CHIBIOS}/os/hal/ports/STM32/STM32F0xx/platform.mk
 
-PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c
+PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c \
 
 PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk
new file mode 100644
index 0000000..e98de86
--- /dev/null
+++ b/os/hal/ports/STM32/STM32F3xx/platform.mk
@@ -0,0 +1,9 @@
+include ${CHIBIOS}/os/hal/ports/STM32/STM32F3xx/platform.mk
+
+PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c
+
+PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
diff --git a/os/hal/ports/STM32/STM32F4xx/platform.mk b/os/hal/ports/STM32/STM32F4xx/platform.mk
index eed262e..5ffc9dd 100644
--- a/os/hal/ports/STM32/STM32F4xx/platform.mk
+++ b/os/hal/ports/STM32/STM32F4xx/platform.mk
@@ -6,10 +6,15 @@ PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/stm32_dma2d.c \
                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/fsmc_sram.c \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/stm32_ltdc.c \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/eicu_lld.c \

-               ${CHIBIOS_CONTRIB}/os/hal/src/fsmc_sdram.c

+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/timcap_lld.c \

+	           ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/usbh_lld.c \

+               ${CHIBIOS_CONTRIB}/os/hal/src/fsmc_sdram.c \

+               ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/crc_lld.c

 

 PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \

+	           ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \

+	           ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \

                ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD

diff --git a/os/hal/src/ee24xx.c b/os/hal/src/ee24xx.c
new file mode 100644
index 0000000..c89635f
--- /dev/null
+++ b/os/hal/src/ee24xx.c
@@ -0,0 +1,353 @@
+/*
+  Copyright (c) 2013 Timon Wong
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in all
+  copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+/*****************************************************************************
+ * DATASHEET NOTES
+ *****************************************************************************
+Write cycle time (byte or page) - 5 ms
+
+Note:
+  Page write operations are limited to writing bytes within a single physical
+  page, regardless of the number of bytes actually being written. Physical page
+  boundaries start at addresses that are integer multiples of the page buffer
+  size (or page size and end at addresses that are integer multiples of
+  [page size]. If a Page Write command attempts to write across a physical
+  page boundary, the result is that the data wraps around to the beginning of
+  the current page (overwriting data previously stored there), instead of
+  being written to the next page as might be expected.
+*********************************************************************/
+
+#include "ee24xx.h"
+#include <string.h>
+
+#if (defined(HAL_USE_EEPROM) && HAL_USE_EEPROM && EEPROM_USE_EE24XX) || defined(__DOXYGEN__)
+
+/*
+ ******************************************************************************
+ * DEFINES
+ ******************************************************************************
+ */
+/*
+#if defined(SAM7_PLATFORM)
+#define EEPROM_I2C_CLOCK (MCK / (((i2cp->config->cwgr & 0xFF) + ((i2cp->config->cwgr >> 8) & 0xFF)) * (1 << ((i2cp->config->cwgr >> 16) & 7)) + 6))
+#else
+#define EEPROM_I2C_CLOCK (i2cp->config->clock_speed)
+#endif
+*/
+#define EEPROM_I2C_CLOCK 400000
+
+/*
+ ******************************************************************************
+ * EXTERNS
+ ******************************************************************************
+ */
+
+/*
+ ******************************************************************************
+ * GLOBAL VARIABLES
+ ******************************************************************************
+ */
+
+/*
+ *******************************************************************************
+ * LOCAL FUNCTIONS
+ *******************************************************************************
+ */
+/**
+ * @brief   Split one uint16_t address to two uint8_t.
+ *
+ * @param[in] txbuf pointer to driver transmit buffer
+ * @param[in] addr  uint16_t address
+ */
+#define eeprom_split_addr(txbuf, addr){                                       \
+    (txbuf)[0] = ((uint8_t)((addr >> 8) & 0xFF));                              \
+    (txbuf)[1] = ((uint8_t)(addr & 0xFF));                                     \
+  }
+
+/*
+ *******************************************************************************
+ * EXPORTED FUNCTIONS
+ *******************************************************************************
+ */
+
+/**
+ * @brief     Calculates requred timeout.
+ */
+static systime_t calc_timeout(I2CDriver *i2cp, size_t txbytes, size_t rxbytes) {
+  (void)i2cp;
+  const uint32_t bitsinbyte = 10;
+  uint32_t tmo;
+  tmo = ((txbytes + rxbytes + 1) * bitsinbyte * 1000);
+  tmo /= EEPROM_I2C_CLOCK;
+  tmo += 10; /* some additional milliseconds to be safer */
+  return MS2ST(tmo);
+}
+
+/**
+ * @brief   EEPROM read routine.
+ *
+ * @param[in] eepcfg    pointer to configuration structure of eeprom file
+ * @param[in] offset    addres of 1-st byte to be read
+ * @param[in] data      pointer to buffer with data to be written
+ * @param[in] len       number of bytes to be red
+ */
+static msg_t eeprom_read(const I2CEepromFileConfig *eepcfg,
+                         uint32_t offset, uint8_t *data, size_t len) {
+
+  msg_t status = MSG_RESET;
+  systime_t tmo = calc_timeout(eepcfg->i2cp, 2, len);
+
+  osalDbgAssert(((len <= eepcfg->size) && ((offset + len) <= eepcfg->size)),
+             "out of device bounds");
+
+  eeprom_split_addr(eepcfg->write_buf, (offset + eepcfg->barrier_low));
+
+#if I2C_USE_MUTUAL_EXCLUSION
+  i2cAcquireBus(eepcfg->i2cp);
+#endif
+
+  status = i2cMasterTransmitTimeout(eepcfg->i2cp, eepcfg->addr,
+                                    eepcfg->write_buf, 2, data, len, tmo);
+
+#if I2C_USE_MUTUAL_EXCLUSION
+  i2cReleaseBus(eepcfg->i2cp);
+#endif
+
+  return status;
+}
+
+/**
+ * @brief   EEPROM write routine.
+ * @details Function writes data to EEPROM.
+ * @pre     Data must be fit to single EEPROM page.
+ *
+ * @param[in] eepcfg  pointer to configuration structure of eeprom file
+ * @param[in] offset  addres of 1-st byte to be write
+ * @param[in] data    pointer to buffer with data to be written
+ * @param[in] len     number of bytes to be written
+ */
+static msg_t eeprom_write(const I2CEepromFileConfig *eepcfg, uint32_t offset,
+                          const uint8_t *data, size_t len) {
+  msg_t status = MSG_RESET;
+  systime_t tmo = calc_timeout(eepcfg->i2cp, (len + 2), 0);
+
+  osalDbgAssert(((len <= eepcfg->size) && ((offset + len) <= eepcfg->size)),
+             "out of device bounds");
+  osalDbgAssert((((offset + eepcfg->barrier_low) / eepcfg->pagesize) ==
+              (((offset + eepcfg->barrier_low) + len - 1) / eepcfg->pagesize)),
+             "data can not be fitted in single page");
+
+  /* write address bytes */
+  eeprom_split_addr(eepcfg->write_buf, (offset + eepcfg->barrier_low));
+  /* write data bytes */
+  memcpy(&(eepcfg->write_buf[2]), data, len);
+
+#if I2C_USE_MUTUAL_EXCLUSION
+  i2cAcquireBus(eepcfg->i2cp);
+#endif
+
+  status = i2cMasterTransmitTimeout(eepcfg->i2cp, eepcfg->addr,
+                                    eepcfg->write_buf, (len + 2), NULL, 0, tmo);
+
+#if I2C_USE_MUTUAL_EXCLUSION
+  i2cReleaseBus(eepcfg->i2cp);
+#endif
+
+  /* wait until EEPROM process data */
+  chThdSleep(eepcfg->write_time);
+
+  return status;
+}
+
+/**
+ * @brief   Determines and returns size of data that can be processed
+ */
+static size_t __clamp_size(void *ip, size_t n) {
+
+  if (((size_t)eepfs_getposition(ip) + n) > (size_t)eepfs_getsize(ip))
+    return eepfs_getsize(ip) - eepfs_getposition(ip);
+  else
+    return n;
+}
+
+/**
+ * @brief   Write data that can be fitted in one page boundary
+ */
+static void __fitted_write(void *ip, const uint8_t *data, size_t len, uint32_t *written) {
+
+  msg_t status = MSG_RESET;
+
+  osalDbgAssert(len != 0, "something broken in hi level part");
+
+  status = eeprom_write(((I2CEepromFileStream *)ip)->cfg,
+                        eepfs_getposition(ip), data, len);
+  if (status == MSG_OK) {
+    *written += len;
+    eepfs_lseek(ip, eepfs_getposition(ip) + len);
+  }
+}
+
+/**
+ * @brief     Write data to EEPROM.
+ * @details   Only one EEPROM page can be written at once. So fucntion
+ *            splits large data chunks in small EEPROM transactions if needed.
+ * @note      To achieve the maximum effectivity use write operations
+ *            aligned to EEPROM page boundaries.
+ */
+static size_t write(void *ip, const uint8_t *bp, size_t n) {
+
+  size_t   len = 0;     /* bytes to be written at one trasaction */
+  uint32_t written; /* total bytes successfully written */
+  uint16_t pagesize;
+  uint32_t firstpage;
+  uint32_t lastpage;
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  if (n == 0)
+    return 0;
+
+  n = __clamp_size(ip, n);
+  if (n == 0)
+    return 0;
+
+  pagesize  =  ((EepromFileStream *)ip)->cfg->pagesize;
+  firstpage = (((EepromFileStream *)ip)->cfg->barrier_low +
+               eepfs_getposition(ip)) / pagesize;
+  lastpage  = (((EepromFileStream *)ip)->cfg->barrier_low +
+               eepfs_getposition(ip) + n - 1) / pagesize;
+
+  written = 0;
+  /* data fitted in single page */
+  if (firstpage == lastpage) {
+    len = n;
+    __fitted_write(ip, bp, len, &written);
+    bp += len;
+    return written;
+  }
+
+  else {
+    /* write first piece of data to first page boundary */
+    len =  ((firstpage + 1) * pagesize) - eepfs_getposition(ip);
+    len -= ((EepromFileStream *)ip)->cfg->barrier_low;
+    __fitted_write(ip, bp, len, &written);
+    bp += len;
+
+    /* now writes blocks at a size of pages (may be no one) */
+    while ((n - written) > pagesize) {
+      len = pagesize;
+      __fitted_write(ip, bp, len, &written);
+      bp += len;
+    }
+
+    /* wrtie tail */
+    len = n - written;
+    if (len == 0)
+      return written;
+    else {
+      __fitted_write(ip, bp, len, &written);
+    }
+  }
+
+  return written;
+}
+
+/**
+ * Read some bytes from current position in file. After successful
+ * read operation the position pointer will be increased by the number
+ * of read bytes.
+ */
+static size_t read(void *ip, uint8_t *bp, size_t n) {
+  msg_t status = MSG_OK;
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  if (n == 0)
+    return 0;
+
+  n = __clamp_size(ip, n);
+  if (n == 0)
+    return 0;
+
+  /* Stupid I2C cell in STM32F1x does not allow to read single byte.
+     So we must read 2 bytes and return needed one. */
+#if defined(STM32F1XX_I2C)
+  if (n == 1) {
+    uint8_t __buf[2];
+    /* if NOT last byte of file requested */
+    if ((eepfs_getposition(ip) + 1) < eepfs_getsize(ip)) {
+      if (read(ip, __buf, 2) == 2) {
+        eepfs_lseek(ip, (eepfs_getposition(ip) + 1));
+        bp[0] = __buf[0];
+        return 1;
+      }
+      else
+        return 0;
+    }
+    else {
+      eepfs_lseek(ip, (eepfs_getposition(ip) - 1));
+      if (read(ip, __buf, 2) == 2) {
+        eepfs_lseek(ip, (eepfs_getposition(ip) + 2));
+        bp[0] = __buf[1];
+        return 1;
+      }
+      else
+        return 0;
+    }
+  }
+#endif /* defined(STM32F1XX_I2C) */
+
+  /* call low level function */
+  status  = eeprom_read(((I2CEepromFileStream *)ip)->cfg,
+                        eepfs_getposition(ip), bp, n);
+  if (status != MSG_OK)
+    return 0;
+  else {
+    eepfs_lseek(ip, (eepfs_getposition(ip) + n));
+    return n;
+  }
+}
+
+static const struct EepromFileStreamVMT vmt = {
+  write,
+  read,
+  eepfs_put,
+  eepfs_get,
+  eepfs_close,
+  eepfs_geterror,
+  eepfs_getsize,
+  eepfs_getposition,
+  eepfs_lseek,
+};
+
+EepromDevice eepdev_24xx = {
+  EEPROM_DEV_24XX,
+  &vmt
+};
+
+#endif /* EEPROM_USE_EE24XX */
diff --git a/os/hal/src/ee25xx.c b/os/hal/src/ee25xx.c
new file mode 100644
index 0000000..07f4373
--- /dev/null
+++ b/os/hal/src/ee25xx.c
@@ -0,0 +1,404 @@
+/*
+  Copyright (c) 2013 Timon Wong
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in all
+  copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+/*****************************************************************************
+ * DATASHEET NOTES
+ *****************************************************************************
+Write cycle time (byte or page) - 5 ms
+
+Note:
+  Page write operations are limited to writing bytes within a single physical
+  page, regardless of the number of bytes actually being written. Physical page
+  boundaries start at addresses that are integer multiples of the page buffer
+  size (or page size and end at addresses that are integer multiples of
+  [page size]. If a Page Write command attempts to write across a physical
+  page boundary, the result is that the data wraps around to the beginning of
+  the current page (overwriting data previously stored there), instead of
+  being written to the next page as might be expected.
+*********************************************************************/
+
+#include "ee25xx.h"
+#include <string.h>
+
+#if (defined(HAL_USE_EEPROM) && HAL_USE_EEPROM && EEPROM_USE_EE25XX) || defined(__DOXYGEN__)
+
+/**
+ * @name Commands of 25XX chip.
+ * @{
+ */
+#define CMD_READ    0x03  /**< @brief Read data from memory array beginning at
+                               selected address. */
+#define CMD_WRITE   0x02  /**< @brief Write data to memory array beginning at
+                               selected address. */
+#define CMD_WRDI    0x04  /**< Reset the write enable latch (disable write
+                               operations). */
+#define CMD_WREN    0x06  /**< Set the write enable latch (enable write
+                               operations). */
+#define CMD_RDSR    0x05  /**< Read STATUS register. */
+#define CMD_WRSR    0x01  /**< Write STATUS register. */
+
+/** @} */
+
+/**
+ * @name Status of 25XX chip.
+ * @{}
+ */
+#define STAT_BP1    0x08  /**< @brief Block protection (high). */
+#define STAT_BP0    0x04  /**< @brief Block protection (low). */
+#define STAT_WEL    0x02  /**< @brief Write enable latch. */
+#define STAT_WIP    0x01  /**< @brief Write-In-Progress. */
+
+/** @} */
+
+/**
+ * @brief 25XX low level write then read rountine.
+ *
+ * @param[in]  eepcfg pointer to configuration structure of eeprom file.
+ * @param[in]  txbuf  pointer to buffer to be transfered.
+ * @param[in]  txlen  number of bytes to be transfered.
+ * @param[out] rxbuf  pointer to buffer to be received.
+ * @param[in]  rxlen  number of bytes to be received.
+ */
+static void ll_25xx_transmit_receive(const SPIEepromFileConfig *eepcfg,
+                                     const uint8_t *txbuf, size_t txlen,
+                                     uint8_t *rxbuf, size_t rxlen) {
+
+#if SPI_USE_MUTUAL_EXCLUSION
+  spiAcquireBus(eepcfg->spip);
+#endif
+  spiSelect(eepcfg->spip);
+  spiSend(eepcfg->spip, txlen, txbuf);
+  if (rxlen) /* Check if receive is needed. */
+      spiReceive(eepcfg->spip, rxlen, rxbuf);
+  spiUnselect(eepcfg->spip);
+
+#if SPI_USE_MUTUAL_EXCLUSION
+  spiReleaseBus(eepcfg->spip);
+#endif
+}
+
+/**
+ * @brief Check whether the device is busy (writing in progress).
+ *
+ * @param[in] eepcfg   pointer to configuration structure of eeprom file.
+ * @return @p true on busy.
+ */
+static bool ll_eeprom_is_busy(const SPIEepromFileConfig *eepcfg) {
+
+  uint8_t cmd = CMD_RDSR;
+  uint8_t stat;
+  ll_25xx_transmit_receive(eepcfg, &cmd, 1, &stat, 1);
+  if (stat & STAT_WIP)
+    return TRUE;
+  return FALSE;
+}
+
+/**
+ * @brief Lock device.
+ *
+ * @param[in] eepcfg  pointer to configuration structure of eeprom file.
+ */
+static void ll_eeprom_lock(const SPIEepromFileConfig *eepcfg) {
+
+  uint8_t cmd = CMD_WRDI;
+  ll_25xx_transmit_receive(eepcfg, &cmd, 1, NULL, 0);
+}
+
+/**
+ * @brief Unlock device.
+ *
+ * @param[in] eepcfg  pointer to configuration structure of eeprom file.
+ */
+static void ll_eeprom_unlock(const SPIEepromFileConfig *eepcfg) {
+
+  uint8_t cmd = CMD_WREN;
+  ll_25xx_transmit_receive(eepcfg, &cmd, 1, NULL, 0);
+}
+
+/**
+ * @brief   Prepare byte sequence for command and address
+ *
+ * @param[in] seq   pointer to first 3byte sequence
+ * @param[in] size  size of the eeprom device
+ * @param[in] cmd   command
+ * @param[in] addr  address
+ * @return number of bytes of this sequence
+ */
+static uint8_t ll_eeprom_prepare_seq(uint8_t *seq, uint32_t size, uint8_t cmd,
+                                     uint32_t addr) {
+
+  seq[0] = ((uint8_t)cmd & 0xff);
+
+  if (size > 0xffffUL) {
+    /* High density, 24bit address. */
+    seq[1] = (uint8_t)((addr >> 16) & 0xff);
+    seq[2] = (uint8_t)((addr >> 8) & 0xff);
+    seq[3] = (uint8_t)(addr & 0xff);
+    return 4;
+  }
+  else if (size > 0x00ffUL) {
+    /* Medium density, 16bit address. */
+    seq[1] = (uint8_t)((addr >> 8) & 0xff);
+    seq[2] = (uint8_t)(addr & 0xff);
+    return 3;
+  }
+
+  /* Low density, 8bit address. */
+  seq[1] = (uint8_t)(addr & 0xff);
+  return 2;
+}
+
+/**
+ * @brief   EEPROM read routine.
+ *
+ * @param[in]  eepcfg   pointer to configuration structure of eeprom file.
+ * @param[in]  offset   addres of 1-st byte to be read.
+ * @param[out] data     pointer to buffer with data to be written.
+ * @param[in]  len      number of bytes to be red.
+ */
+static msg_t ll_eeprom_read(const SPIEepromFileConfig *eepcfg, uint32_t offset,
+                            uint8_t *data, size_t len) {
+
+  uint8_t txbuff[4];
+  uint8_t txlen;
+
+  osalDbgAssert(((len <= eepcfg->size) && ((offset + len) <= eepcfg->size)),
+             "out of device bounds");
+
+  if (eepcfg->spip->state != SPI_READY)
+      return MSG_RESET;
+
+  txlen = ll_eeprom_prepare_seq(txbuff, eepcfg->size, CMD_READ,
+                                (offset + eepcfg->barrier_low));
+  ll_25xx_transmit_receive(eepcfg, txbuff, txlen, data, len);
+
+  return MSG_OK;
+}
+
+/**
+ * @brief   EEPROM write routine.
+ * @details Function writes data to EEPROM.
+ * @pre     Data must be fit to single EEPROM page.
+ *
+ * @param[in] eepcfg  pointer to configuration structure of eeprom file.
+ * @param[in] offset  addres of 1-st byte to be writen.
+ * @param[in] data    pointer to buffer with data to be written.
+ * @param[in] len     number of bytes to be written.
+ */
+static msg_t ll_eeprom_write(const SPIEepromFileConfig *eepcfg, uint32_t offset,
+                             const uint8_t *data, size_t len) {
+
+  uint8_t txbuff[4];
+  uint8_t txlen;
+  systime_t now;
+
+  osalDbgAssert(((len <= eepcfg->size) && ((offset + len) <= eepcfg->size)),
+             "out of device bounds");
+  osalDbgAssert((((offset + eepcfg->barrier_low) / eepcfg->pagesize) ==
+              (((offset + eepcfg->barrier_low) + len - 1) / eepcfg->pagesize)),
+             "data can not be fitted in single page");
+
+  if (eepcfg->spip->state != SPI_READY)
+      return MSG_RESET;
+
+  /* Unlock array for writting. */
+  ll_eeprom_unlock(eepcfg);
+
+#if SPI_USE_MUTUAL_EXCLUSION
+  spiAcquireBus(eepcfg->spip);
+#endif
+
+  spiSelect(eepcfg->spip);
+  txlen = ll_eeprom_prepare_seq(txbuff, eepcfg->size, CMD_WRITE,
+                                (offset + eepcfg->barrier_low));
+  spiSend(eepcfg->spip, txlen, txbuff);
+  spiSend(eepcfg->spip, len, data);
+  spiUnselect(eepcfg->spip);
+
+#if SPI_USE_MUTUAL_EXCLUSION
+  spiReleaseBus(eepcfg->spip);
+#endif
+
+  /* Wait until EEPROM process data. */
+  now = chVTGetSystemTimeX();
+  while (ll_eeprom_is_busy(eepcfg)) {
+    if ((chVTGetSystemTimeX() - now) > eepcfg->write_time) {
+      return MSG_TIMEOUT;
+    }
+
+    chThdYield();
+  }
+
+  /* Lock array preventing unexpected access */
+  ll_eeprom_lock(eepcfg);
+  return MSG_OK;
+}
+
+/**
+ * @brief   Determines and returns size of data that can be processed
+ */
+static size_t __clamp_size(void *ip, size_t n) {
+
+  if (((size_t)eepfs_getposition(ip) + n) > (size_t)eepfs_getsize(ip))
+    return eepfs_getsize(ip) - eepfs_getposition(ip);
+  else
+    return n;
+}
+
+/**
+ * @brief   Write data that can be fitted in one page boundary
+ */
+static msg_t __fitted_write(void *ip, const uint8_t *data, size_t len, uint32_t *written) {
+
+  msg_t status = MSG_RESET;
+
+  osalDbgAssert(len != 0, "something broken in hi level part");
+
+  status = ll_eeprom_write(((SPIEepromFileStream *)ip)->cfg,
+                           eepfs_getposition(ip), data, len);
+  if (status == MSG_OK) {
+    *written += len;
+    eepfs_lseek(ip, eepfs_getposition(ip) + len);
+  }
+  return status;
+}
+
+/**
+ * @brief     Write data to EEPROM.
+ * @details   Only one EEPROM page can be written at once. So fucntion
+ *            splits large data chunks in small EEPROM transactions if needed.
+ * @note      To achieve the maximum effectivity use write operations
+ *            aligned to EEPROM page boundaries.
+ */
+static size_t write(void *ip, const uint8_t *bp, size_t n) {
+
+  size_t   len = 0;     /* bytes to be written at one trasaction */
+  uint32_t written; /* total bytes successfully written */
+  uint16_t pagesize;
+  uint32_t firstpage;
+  uint32_t lastpage;
+
+  volatile const SPIEepromFileConfig *cfg = ((SPIEepromFileStream *)ip)->cfg;
+
+  osalDbgCheck((ip != NULL) && (((SPIEepromFileStream *)ip)->vmt != NULL));
+
+  if (n == 0)
+    return 0;
+
+  n = __clamp_size(ip, n);
+  if (n == 0)
+    return 0;
+
+  pagesize  = cfg->pagesize;
+  firstpage = (cfg->barrier_low + eepfs_getposition(ip)) / pagesize;
+  lastpage  = ((cfg->barrier_low + eepfs_getposition(ip) + n) - 1) / pagesize;
+
+  written = 0;
+  /* data fitted in single page */
+  if (firstpage == lastpage) {
+    len = n;
+    __fitted_write(ip, bp, len, &written);
+    bp += len;
+    return written;
+  }
+  else {
+    /* write first piece of data to first page boundary */
+    len =  ((firstpage + 1) * pagesize) - eepfs_getposition(ip);
+    len -= cfg->barrier_low;
+    __fitted_write(ip, bp, len, &written);
+    bp += len;
+
+    /* now writes blocks at a size of pages (may be no one) */
+    while ((n - written) > pagesize) {
+      len = pagesize;
+      if (__fitted_write(ip, bp, len, &written) != MSG_OK) // Fixed: Would increase bp forever and crash in case of timeouts...
+        return written;
+
+      bp += len;
+    }
+
+
+    /* wrtie tail */
+    len = n - written;
+    if (len == 0)
+      return written;
+    else {
+      __fitted_write(ip, bp, len, &written);
+    }
+  }
+
+  return written;
+}
+
+/**
+ * Read some bytes from current position in file. After successful
+ * read operation the position pointer will be increased by the number
+ * of read bytes.
+ */
+static size_t read(void *ip, uint8_t *bp, size_t n) {
+
+  msg_t status = MSG_OK;
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  if (n == 0)
+    return 0;
+
+  n = __clamp_size(ip, n);
+  if (n == 0)
+    return 0;
+
+  /* call low level function */
+  status = ll_eeprom_read(((SPIEepromFileStream *)ip)->cfg,
+                          eepfs_getposition(ip), bp, n);
+  if (status != MSG_OK)
+    return 0;
+  else {
+    eepfs_lseek(ip, (eepfs_getposition(ip) + n));
+    return n;
+  }
+}
+
+static const struct EepromFileStreamVMT vmt = {
+  write,
+  read,
+  eepfs_put,
+  eepfs_get,
+  eepfs_close,
+  eepfs_geterror,
+  eepfs_getsize,
+  eepfs_getposition,
+  eepfs_lseek,
+};
+
+EepromDevice eepdev_25xx = {
+  EEPROM_DEV_25XX,
+  &vmt
+};
+
+#endif /* EEPROM_USE_EE25XX */
diff --git a/os/hal/src/eeprom.c b/os/hal/src/eeprom.c
new file mode 100644
index 0000000..60d90ed
--- /dev/null
+++ b/os/hal/src/eeprom.c
@@ -0,0 +1,197 @@
+/*
+  Copyright (c) 2013 Timon Wong
+
+  Permission is hereby granted, free of charge, to any person obtaining a copy
+  of this software and associated documentation files (the "Software"), to deal
+  in the Software without restriction, including without limitation the rights
+  to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+  copies of the Software, and to permit persons to whom the Software is
+  furnished to do so, subject to the following conditions:
+
+  The above copyright notice and this permission notice shall be included in all
+  copies or substantial portions of the Software.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+  THE SOFTWARE.
+*/
+
+/*
+  Copyright 2012 Uladzimir Pylinski aka barthess.
+  You may use this work without restrictions, as long as this notice is included.
+  The work is provided "as is" without warranty of any kind, neither express nor implied.
+*/
+
+#include "eeprom.h"
+#include <string.h>
+
+#if defined(HAL_USE_EEPROM) && HAL_USE_EEPROM
+
+extern EepromDevice eepdev_24xx;
+extern EepromDevice eepdev_25xx;
+
+EepromDevice *__eeprom_drv_table[] = {
+  /* I2C related. */
+#if HAL_USE_I2C
+
+# if EEPROM_USE_EE24XX
+  &eepdev_24xx,
+# endif
+
+#endif /* HAL_USE_I2C */
+
+  /* SPI related. */
+#if HAL_USE_SPI
+
+# if EEPROM_USE_EE25XX
+  &eepdev_25xx,
+# endif
+
+#endif /* HAL_USE_SPI */
+};
+
+
+/**
+ * @breif  Find low level EEPROM device by id.
+ */
+const EepromDevice *EepromFindDevice(uint8_t id) {
+
+  uint8_t i;
+  const EepromDevice *drv;
+
+  for (i = 0; i < EEPROM_TABLE_SIZE; i++) {
+    drv = __eeprom_drv_table[i];
+    if (drv->id == id) {
+      return drv;
+    }
+  }
+
+  return NULL;
+}
+
+/**
+ * Open EEPROM IC as file and return pointer to the file stream object
+ * @note      Fucntion allways successfully open file. All checking makes
+ *            in read/write functions.
+ */
+EepromFileStream *EepromFileOpen(EepromFileStream *efs,
+                                 const EepromFileConfig *eepcfg,
+                                 const EepromDevice *eepdev) {
+
+  osalDbgAssert((efs != NULL) && (eepcfg != NULL) && (eepdev != NULL) &&
+             (eepdev->efsvmt != NULL), "EepromFileOpen");
+  osalDbgAssert(efs->vmt != eepdev->efsvmt, "File allready opened");
+  osalDbgAssert(eepcfg->barrier_hi > eepcfg->barrier_low, "Low barrier exceeds High barrier");
+  osalDbgAssert(eepcfg->pagesize < eepcfg->size, "Pagesize cannot be lager than EEPROM size");
+  osalDbgAssert(eepcfg->barrier_hi <= eepcfg->size, "Barrier exceeds EEPROM size");
+
+  efs->vmt      = eepdev->efsvmt;
+  efs->cfg      = eepcfg;
+  efs->errors   = FILE_OK;
+  efs->position = 0;
+  return (EepromFileStream *)efs;
+}
+
+uint8_t EepromReadByte(EepromFileStream *efs) {
+
+  uint8_t buf;
+  fileStreamRead(efs, &buf, sizeof(buf));
+  return buf;
+}
+
+uint16_t EepromReadHalfword(EepromFileStream *efs) {
+
+  uint16_t buf;
+  fileStreamRead(efs, (uint8_t *)&buf, sizeof(buf));
+  return buf;
+}
+
+uint32_t EepromReadWord(EepromFileStream *efs) {
+
+  uint32_t buf;
+  fileStreamRead(efs, (uint8_t *)&buf, sizeof(buf));
+  return buf;
+}
+
+size_t EepromWriteByte(EepromFileStream *efs, uint8_t data) {
+
+  return fileStreamWrite(efs, &data, sizeof(data));
+}
+
+size_t EepromWriteHalfword(EepromFileStream *efs, uint16_t data) {
+
+  return fileStreamWrite(efs, (uint8_t *)&data, sizeof(data));
+}
+
+size_t EepromWriteWord(EepromFileStream *efs, uint32_t data) {
+
+  return fileStreamWrite(efs, (uint8_t *)&data, sizeof(data));
+}
+
+msg_t eepfs_getsize(void *ip) {
+
+  uint32_t h, l;
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL) &&
+             (((EepromFileStream *)ip)->cfg != NULL));
+
+  h = ((EepromFileStream *)ip)->cfg->barrier_hi;
+  l = ((EepromFileStream *)ip)->cfg->barrier_low;
+  return  h - l;
+}
+
+msg_t eepfs_getposition(void *ip) {
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  return ((EepromFileStream *)ip)->position;
+}
+
+msg_t eepfs_lseek(void *ip, fileoffset_t offset) {
+
+  uint32_t size;
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  size = eepfs_getsize(ip);
+  if (offset > size)
+    offset = size;
+  ((EepromFileStream *)ip)->position = offset;
+  return offset;
+}
+
+msg_t eepfs_close(void *ip) {
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+
+  ((EepromFileStream *)ip)->errors   = FILE_OK;
+  ((EepromFileStream *)ip)->position = 0;
+  ((EepromFileStream *)ip)->vmt      = NULL;
+  ((EepromFileStream *)ip)->cfg      = NULL;
+  return FILE_OK;
+}
+
+msg_t eepfs_geterror(void *ip) {
+
+  osalDbgCheck((ip != NULL) && (((EepromFileStream *)ip)->vmt != NULL));
+  return ((EepromFileStream *)ip)->errors;
+}
+
+msg_t eepfs_put(void *ip, uint8_t b) {
+
+  (void)ip;
+  (void)b;
+  return 0;
+}
+
+msg_t eepfs_get(void *ip) {
+
+  (void)ip;
+  return 0;
+}
+
+#endif /* #if defined(HAL_USE_EEPROM) && HAL_USE_EEPROM */
diff --git a/os/hal/src/hal_community.c b/os/hal/src/hal_community.c
index 210df69..4c48113 100644
--- a/os/hal/src/hal_community.c
+++ b/os/hal/src/hal_community.c
@@ -68,6 +68,14 @@ void halCommunityInit(void) {
 #if HAL_USE_RNG || defined(__DOXYGEN__)

   rngInit();

 #endif

+

+#if HAL_USE_USBH || defined(__DOXYGEN__)

+  usbhInit();

+#endif

+

+#if HAL_USE_TIMCAP || defined(__DOXYGEN__)

+  timcapInit();

+#endif

 }

 

 #endif /* HAL_USE_COMMUNITY */

diff --git a/os/hal/src/timcap.c b/os/hal/src/timcap.c
new file mode 100644
index 0000000..6ee97ad
--- /dev/null
+++ b/os/hal/src/timcap.c
@@ -0,0 +1,159 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+                 2011,2012,2013 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    timcap.c
+ * @brief   TIMCAP Driver code.
+ *
+ * @addtogroup TIMCAP
+ * @{
+ */
+
+#include "timcap.h"
+
+#if HAL_USE_TIMCAP || defined(__DOXYGEN__)
+
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+/**
+ * @brief   TIMCAP Driver initialization.
+ * @note    This function is implicitly invoked by @p halInit(), there is
+ *          no need to explicitly initialize the driver.
+ *
+ * @init
+ */
+void timcapInit(void) {
+
+  timcap_lld_init();
+}
+
+/**
+ * @brief   Initializes the standard part of a @p TIMCAPDriver structure.
+ *
+ * @param[out] timcapp     pointer to the @p TIMCAPDriver object
+ *
+ * @init
+ */
+void timcapObjectInit(TIMCAPDriver *timcapp) {
+
+  timcapp->state  = TIMCAP_STOP;
+  timcapp->config = NULL;
+}
+
+/**
+ * @brief   Configures and activates the TIMCAP peripheral.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ * @param[in] config    pointer to the @p TIMCAPConfig object
+ *
+ * @api
+ */
+void timcapStart(TIMCAPDriver *timcapp, const TIMCAPConfig *config) {
+
+  osalDbgCheck((timcapp != NULL) && (config != NULL));
+
+  osalSysLock();
+  osalDbgAssert((timcapp->state == TIMCAP_STOP) || (timcapp->state == TIMCAP_READY),
+              "invalid state");
+  timcapp->config = config;
+  timcap_lld_start(timcapp);
+  timcapp->state = TIMCAP_READY;
+  osalSysUnlock();
+}
+
+/**
+ * @brief   Deactivates the TIMCAP peripheral.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @api
+ */
+void timcapStop(TIMCAPDriver *timcapp) {
+
+  osalDbgCheck(timcapp != NULL);
+
+  osalSysLock();
+  osalDbgAssert((timcapp->state == TIMCAP_STOP) || (timcapp->state == TIMCAP_READY),
+              "invalid state");
+  timcap_lld_stop(timcapp);
+  timcapp->state = TIMCAP_STOP;
+  osalSysUnlock();
+}
+
+/**
+ * @brief   Enables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @api
+ */
+void timcapEnable(TIMCAPDriver *timcapp) {
+
+  osalDbgCheck(timcapp != NULL);
+
+  osalSysLock();
+  osalDbgAssert(timcapp->state == TIMCAP_READY, "invalid state");
+  timcap_lld_enable(timcapp);
+  timcapp->state = TIMCAP_WAITING;
+  osalSysUnlock();
+}
+
+/**
+ * @brief   Disables the input capture.
+ *
+ * @param[in] timcapp      pointer to the @p TIMCAPDriver object
+ *
+ * @api
+ */
+void timcapDisable(TIMCAPDriver *timcapp) {
+
+  osalDbgCheck(timcapp != NULL);
+
+  osalSysLock();
+  osalDbgAssert((timcapp->state == TIMCAP_READY) || (timcapp->state == TIMCAP_WAITING) ||
+              (timcapp->state == TIMCAP_ACTIVE) || (timcapp->state == TIMCAP_IDLE),
+             "invalid state");
+  timcap_lld_disable(timcapp);
+  timcapp->state = TIMCAP_READY;
+  osalSysUnlock();
+}
+
+#endif /* HAL_USE_TIMCAP */
+
+/** @} */
diff --git a/os/hal/src/usbh.c b/os/hal/src/usbh.c
new file mode 100644
index 0000000..3bdbac3
--- /dev/null
+++ b/os/hal/src/usbh.c
@@ -0,0 +1,1395 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "usbh/dev/hub.h"

+#include "usbh/internal.h"

+#include <string.h>

+

+#if USBH_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBH_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBH_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBH_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+#if STM32_USBH_USE_OTG1

+USBHDriver USBHD1;

+#endif

+#if STM32_USBH_USE_OTG2

+USBHDriver USBHD2;

+#endif

+

+

+static void _classdriver_process_device(usbh_device_t *dev);

+static bool _classdriver_load(usbh_device_t *dev, uint8_t class,

+		uint8_t subclass, uint8_t protocol, uint8_t *descbuff, uint16_t rem);

+

+

+/*===========================================================================*/

+/* Checks.								                                     */

+/*===========================================================================*/

+

+static inline void _check_dev(usbh_device_t *dev) {

+	osalDbgCheck(dev);

+	//TODO: add more checks.

+}

+

+static inline void _check_ep(usbh_ep_t *ep) {

+	osalDbgCheck(ep != 0);

+	_check_dev(ep->device);

+	osalDbgCheck(ep->type <= 3);

+	//TODO: add more checks.

+}

+

+static inline void _check_urb(usbh_urb_t *urb) {

+	osalDbgCheck(urb != 0);

+	_check_ep(urb->ep);

+	osalDbgCheck((urb->buff != NULL) || (urb->requestedLength == 0));

+	//TODO: add more checks.

+}

+

+/*===========================================================================*/

+/* Main driver API.						                                     */

+/*===========================================================================*/

+

+void usbhObjectInit(USBHDriver *usbh) {

+	memset(usbh, 0, sizeof(*usbh));

+	usbh->status = USBH_STATUS_STOPPED;

+#if HAL_USBH_USE_HUB

+	INIT_LIST_HEAD(&usbh->hubs);

+	_usbhub_port_object_init(&usbh->rootport, usbh, 0, 1);

+#else

+	_usbhub_port_object_init(&usbh->rootport, usbh, 1);

+#endif

+}

+

+void usbhInit(void) {

+#if HAL_USBH_USE_HUB

+	uint8_t i;

+	for (i = 0; i < HAL_USBHHUB_MAX_INSTANCES; i++) {

+		usbhhubObjectInit(&USBHHUBD[i]);

+	}

+#endif

+	usbh_lld_init();

+}

+

+void usbhStart(USBHDriver *usbh) {

+	usbDbgInit(usbh);

+

+	osalSysLock();

+	osalDbgAssert((usbh->status == USBH_STATUS_STOPPED) || (usbh->status == USBH_STATUS_STARTED),

+				"invalid state");

+	usbh_lld_start(usbh);

+	usbh->status = USBH_STATUS_STARTED;

+	osalOsRescheduleS();

+	osalSysUnlock();

+}

+

+

+void usbhStop(USBHDriver *usbh) {

+	//TODO: implement

+	(void)usbh;

+}

+void usbhSuspend(USBHDriver *usbh) {

+	//TODO: implement

+	(void)usbh;

+}

+void usbhResume(USBHDriver *usbh) {

+	//TODO: implement

+	(void)usbh;

+}

+

+/*===========================================================================*/

+/* Endpoint API.						                                     */

+/*===========================================================================*/

+

+void usbhEPObjectInit(usbh_ep_t *ep, usbh_device_t *dev, const usbh_endpoint_descriptor_t *desc) {

+	osalDbgCheck(ep);

+	_check_dev(dev);

+	osalDbgCheck(desc);

+

+	memset(ep, 0, sizeof(*ep));

+	ep->device = dev;

+	ep->wMaxPacketSize = desc->wMaxPacketSize;

+	ep->address = desc->bEndpointAddress & 0x0F;

+	ep->type = (usbh_eptype_t) (desc->bmAttributes & 0x03);

+	if (ep->type != USBH_EPTYPE_CTRL) {

+		ep->in = (desc->bEndpointAddress & 0x80) ? TRUE : FALSE;

+	}

+	ep->bInterval = desc->bInterval;

+

+	/* low-level part */

+	usbh_lld_ep_object_init(ep);

+

+	ep->status = USBH_EPSTATUS_CLOSED;

+}

+

+

+static void _ep0_object_init(usbh_device_t *dev, uint16_t wMaxPacketSize) {

+	const usbh_endpoint_descriptor_t ep0_descriptor = {

+		7,	//bLength

+		5,	//bDescriptorType

+		0,	//bEndpointAddress

+		0,	//bmAttributes

+		wMaxPacketSize,

+		0,	//bInterval

+	};

+	usbhEPObjectInit(&dev->ctrl, dev, &ep0_descriptor);

+	usbhEPSetName(&dev->ctrl, "DEV[CTRL]");

+}

+

+

+/*===========================================================================*/

+/* URB API.				    	                                     		 */

+/*===========================================================================*/

+

+void usbhURBObjectInit(usbh_urb_t *urb, usbh_ep_t *ep, usbh_completion_cb callback,

+		void *user, void *buff, uint32_t len) {

+

+	osalDbgCheck(urb != 0);

+	_check_ep(ep);

+

+	/* initialize the common part: */

+	urb->ep = ep;

+	urb->callback = callback;

+	urb->userData = user;

+	urb->buff = buff;

+	urb->requestedLength = len;

+	urb->actualLength = 0;

+	urb->status = USBH_URBSTATUS_INITIALIZED;

+	urb->waitingThread = 0;

+	urb->abortingThread = 0;

+

+	/* initialize the ll part: */

+	usbh_lld_urb_object_init(urb);

+}

+

+void usbhURBObjectResetI(usbh_urb_t *urb) {

+	osalDbgAssert(!usbhURBIsBusy(urb), "invalid status");

+

+	osalDbgCheck((urb->waitingThread == 0) && (urb->abortingThread == 0));

+

+	urb->actualLength = 0;

+	urb->status = USBH_URBSTATUS_INITIALIZED;

+

+	/* reset the ll part: */

+	usbh_lld_urb_object_reset(urb);

+}

+

+void usbhURBSubmitI(usbh_urb_t *urb) {

+	osalDbgCheckClassI();

+	_check_urb(urb);

+	osalDbgAssert(urb->status == USBH_URBSTATUS_INITIALIZED, "invalid status");

+	usbh_ep_t *const ep = urb->ep;

+	if (ep->status == USBH_EPSTATUS_HALTED) {

+		_usbh_urb_completeI(urb, USBH_URBSTATUS_STALL);

+		return;

+	}

+	if (ep->status != USBH_EPSTATUS_OPEN) {

+		_usbh_urb_completeI(urb, USBH_URBSTATUS_DISCONNECTED);

+		return;

+	}

+	if (!(usbhDeviceGetPort(ep->device)->status & USBH_PORTSTATUS_ENABLE)) {

+		_usbh_urb_completeI(urb, USBH_URBSTATUS_DISCONNECTED);

+		return;

+	}

+	urb->status = USBH_URBSTATUS_PENDING;

+	usbh_lld_urb_submit(urb);

+}

+

+bool _usbh_urb_abortI(usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalDbgCheckClassI();

+	_check_urb(urb);

+

+	switch (urb->status) {

+/*	case USBH_URBSTATUS_UNINITIALIZED:

+ * 	case USBH_URBSTATUS_INITIALIZED:

+ *	case USBH_URBSTATUS_ERROR:

+ *	case USBH_URBSTATUS_TIMEOUT:

+ *	case USBH_URBSTATUS_CANCELLED:

+ *	case USBH_URBSTATUS_STALL:

+ *	case USBH_URBSTATUS_DISCONNECTED:

+ *	case USBH_URBSTATUS_OK: */

+	default:

+		/* already finished */

+		_usbh_urb_completeI(urb, status);

+		return TRUE;

+

+//	case USBH_URBSTATUS_QUEUED:

+	case USBH_URBSTATUS_PENDING:

+		return usbh_lld_urb_abort(urb, status);

+	}

+}

+

+void _usbh_urb_abort_and_waitS(usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalDbgCheckClassS();

+	_check_urb(urb);

+

+	if (_usbh_urb_abortI(urb, status) == FALSE) {

+		uwarn("URB wasn't aborted immediately, suspend");

+		osalThreadSuspendS(&urb->abortingThread);

+		urb->abortingThread = 0;

+	} else {

+		osalOsRescheduleS();

+	}

+	uwarn("URB aborted");

+}

+

+bool usbhURBCancelI(usbh_urb_t *urb) {

+	return _usbh_urb_abortI(urb, USBH_URBSTATUS_CANCELLED);

+}

+

+void usbhURBCancelAndWaitS(usbh_urb_t *urb) {

+	_usbh_urb_abort_and_waitS(urb, USBH_URBSTATUS_CANCELLED);

+}

+

+msg_t usbhURBWaitTimeoutS(usbh_urb_t *urb, systime_t timeout) {

+	msg_t ret;

+

+	osalDbgCheckClassS();

+	_check_urb(urb);

+

+	switch (urb->status) {

+	case USBH_URBSTATUS_INITIALIZED:

+	case USBH_URBSTATUS_PENDING:

+//	case USBH_URBSTATUS_QUEUED:

+		ret = osalThreadSuspendTimeoutS(&urb->waitingThread, timeout);

+		urb->waitingThread = 0;

+		break;

+

+	case USBH_URBSTATUS_OK:

+		ret = MSG_OK;

+		osalOsRescheduleS();

+		break;

+

+/*	case USBH_URBSTATUS_UNINITIALIZED:

+ *	case USBH_URBSTATUS_ERROR:

+ *	case USBH_URBSTATUS_TIMEOUT:

+ *	case USBH_URBSTATUS_CANCELLED:

+ *	case USBH_URBSTATUS_STALL:

+ *	case USBH_URBSTATUS_DISCONNECTED: */

+	default:

+		ret = MSG_RESET;

+		osalOsRescheduleS();

+		break;

+	}

+	return ret;

+}

+

+msg_t usbhURBSubmitAndWaitS(usbh_urb_t *urb, systime_t timeout) {

+	msg_t ret;

+

+	osalDbgCheckClassS();

+	_check_urb(urb);

+

+	usbhURBSubmitI(urb);

+	ret = usbhURBWaitTimeoutS(urb, timeout);

+	if (ret == MSG_TIMEOUT)

+		_usbh_urb_abort_and_waitS(urb, USBH_URBSTATUS_TIMEOUT);

+

+	return ret;

+}

+

+static inline msg_t _wakeup_message(usbh_urbstatus_t status) {

+	if (status == USBH_URBSTATUS_OK) return MSG_OK;

+	if (status == USBH_URBSTATUS_TIMEOUT) return MSG_TIMEOUT;

+	return MSG_RESET;

+}

+

+void _usbh_urb_completeI(usbh_urb_t *urb, usbh_urbstatus_t status) {

+	osalDbgCheckClassI();

+	_check_urb(urb);

+	urb->status = status;

+	osalThreadResumeI(&urb->waitingThread, _wakeup_message(status));

+	osalThreadResumeI(&urb->abortingThread, MSG_RESET);

+	if (urb->callback)

+		urb->callback(urb);

+}

+

+/*===========================================================================*/

+/* Synchronous API.		    	                                     		 */

+/*===========================================================================*/

+

+usbh_urbstatus_t usbhBulkTransfer(usbh_ep_t *ep,

+		void *data,

+		uint32_t len,

+		uint32_t *actual_len,

+		systime_t timeout) {

+

+	osalDbgCheck(ep != NULL);

+	osalDbgCheck((data != NULL) || (len == 0));

+	osalDbgAssert(ep->type == USBH_EPTYPE_BULK, "wrong ep");

+

+	usbh_urb_t urb;

+	usbhURBObjectInit(&urb, ep, 0, 0, data, len);

+

+	osalSysLock();

+	usbhURBSubmitAndWaitS(&urb, timeout);

+	osalSysUnlock();

+

+	if (actual_len != NULL)

+		*actual_len = urb.actualLength;

+

+	return urb.status;

+}

+

+usbh_urbstatus_t usbhControlRequestExtended(usbh_device_t *dev,

+		const usbh_control_request_t *req,

+		uint8_t *buff,

+		uint32_t *actual_len,

+		systime_t timeout) {

+

+	_check_dev(dev);

+	osalDbgCheck(req != NULL);

+

+	usbh_urb_t urb;

+

+	usbhURBObjectInit(&urb, &dev->ctrl, 0, 0, buff, req->wLength);

+	urb.setup_buff = req;

+

+	osalSysLock();

+	usbhURBSubmitAndWaitS(&urb, timeout);

+	osalSysUnlock();

+

+	if (actual_len != NULL)

+		*actual_len = urb.actualLength;

+

+	return urb.status;

+}

+

+usbh_urbstatus_t usbhControlRequest(usbh_device_t *dev,

+		uint8_t bmRequestType,

+		uint8_t bRequest,

+		uint16_t wValue,

+		uint16_t wIndex,

+		uint16_t wLength,

+		uint8_t *buff) {

+

+	const USBH_DEFINE_BUFFER(usbh_control_request_t, req) = {

+			bmRequestType,

+			bRequest,

+			wValue,

+			wIndex,

+			wLength

+	};

+	return usbhControlRequestExtended(dev, &req, buff, NULL, MS2ST(1000));

+}

+

+/*===========================================================================*/

+/* Standard request helpers.   	                                     		 */

+/*===========================================================================*/

+

+#define USBH_GET_DESCRIPTOR(type, value, index)	\

+	USBH_STANDARDIN(type, \

+	USBH_REQ_GET_DESCRIPTOR, \

+	value, \

+	index) \

+

+#define USBH_GETDEVICEDESCRIPTOR \

+	USBH_GET_DESCRIPTOR(USBH_REQTYPE_DEVICE, (USBH_DT_DEVICE << 8) | 0, 0)

+

+#define USBH_GETCONFIGURATIONDESCRIPTOR(index) \

+	USBH_GET_DESCRIPTOR(USBH_REQTYPE_DEVICE, (USBH_DT_CONFIG << 8) | index, 0)

+

+#define USBH_GETSTRINGDESCRIPTOR(index, langID) \

+	USBH_GET_DESCRIPTOR(USBH_REQTYPE_DEVICE, (USBH_DT_STRING << 8) | index, langID)

+

+bool usbhStdReqGetDeviceDescriptor(usbh_device_t *dev,

+		uint16_t wLength,

+		uint8_t *buf) {

+	usbh_device_descriptor_t *desc;

+	usbh_urbstatus_t ret = usbhControlRequest(dev, USBH_GETDEVICEDESCRIPTOR, wLength, buf);

+	desc = (usbh_device_descriptor_t *)buf;

+	if ((ret != USBH_URBSTATUS_OK)

+			|| (desc->bLength != USBH_DT_DEVICE_SIZE)

+			|| (desc->bDescriptorType != USBH_DT_DEVICE)) {

+		return HAL_FAILED;

+	}

+	return HAL_SUCCESS;

+}

+

+bool usbhStdReqGetConfigurationDescriptor(usbh_device_t *dev,

+		uint8_t index,

+		uint16_t wLength,

+		uint8_t *buf) {

+	usbh_urbstatus_t ret = usbhControlRequest(dev, USBH_GETCONFIGURATIONDESCRIPTOR(index), wLength, buf);

+	usbh_config_descriptor_t *const desc = (usbh_config_descriptor_t *)buf;

+	if ((ret != USBH_URBSTATUS_OK)

+			|| (desc->bLength < USBH_DT_CONFIG_SIZE)

+			|| (desc->bDescriptorType != USBH_DT_CONFIG)) {

+		return HAL_FAILED;

+	}

+	return HAL_SUCCESS;

+}

+

+bool usbhStdReqGetStringDescriptor(usbh_device_t *dev,

+		uint8_t index,

+		uint16_t langID,

+		uint16_t wLength,

+		uint8_t *buf) {

+

+	osalDbgAssert(wLength >= USBH_DT_STRING_SIZE, "wrong size");

+	usbh_string_descriptor_t *desc = (usbh_string_descriptor_t *)buf;

+	usbh_urbstatus_t ret = usbhControlRequest(dev, USBH_GETSTRINGDESCRIPTOR(index, langID), wLength, buf);

+	if ((ret != USBH_URBSTATUS_OK)

+			|| (desc->bLength < USBH_DT_STRING_SIZE)

+			|| (desc->bDescriptorType != USBH_DT_STRING)) {

+		return HAL_FAILED;

+	}

+	return HAL_SUCCESS;

+}

+

+

+

+#define USBH_SET_INTERFACE(interface, alt)	\

+	USBH_STANDARDOUT(USBH_REQTYPE_INTERFACE, \

+	USBH_REQ_SET_INTERFACE, \

+	alt, \

+	interface) \

+

+#define USBH_GET_INTERFACE(interface)	\

+	USBH_STANDARDIN(USBH_REQTYPE_INTERFACE, \

+	USBH_REQ_GET_INTERFACE, \

+	0, \

+	interface) \

+

+bool usbhStdReqSetInterface(usbh_device_t *dev,

+		uint8_t bInterfaceNumber,

+		uint8_t bAlternateSetting) {

+

+	usbh_urbstatus_t ret = usbhControlRequest(dev, USBH_SET_INTERFACE(bInterfaceNumber, bAlternateSetting), 0, NULL);

+	if (ret != USBH_URBSTATUS_OK)

+		return HAL_FAILED;

+

+	return HAL_SUCCESS;

+}

+

+bool usbhStdReqGetInterface(usbh_device_t *dev,

+		uint8_t bInterfaceNumber,

+		uint8_t *bAlternateSetting) {

+

+	USBH_DEFINE_BUFFER(uint8_t, alt);

+

+	usbh_urbstatus_t ret = usbhControlRequest(dev, USBH_GET_INTERFACE(bInterfaceNumber), 1, &alt);

+	if (ret != USBH_URBSTATUS_OK)

+		return HAL_FAILED;

+

+	*bAlternateSetting = alt;

+	return HAL_SUCCESS;

+}

+

+

+/*===========================================================================*/

+/* Device-related functions.   	                                     		 */

+/*===========================================================================*/

+

+static uint8_t _find_address(USBHDriver *host) {

+	uint8_t addr, i, j;

+	for (i = 0; i < sizeof_array(host->address_bitmap); i++) {

+		addr = host->address_bitmap[i];

+		for (j = 0; j < 8; j++) {

+			if ((addr & (1 << j)) == 0) {

+				//found:

+				addr = i * 8 + j + 1;

+				host->address_bitmap[i] |= (1 << j);

+				return addr;

+			}

+		}

+	}

+	return 0;

+}

+

+static void _free_address(USBHDriver *host, uint8_t addr) {

+	uinfof("Free address %d", addr);

+	host->address_bitmap[addr / 8] &= ~(1 << ((addr - 1) & 7));

+}

+

+static void _device_initialize(usbh_device_t *dev, usbh_devspeed_t speed) {

+	dev->address = 0;

+	dev->speed = speed;

+	dev->status = USBH_DEVSTATUS_DEFAULT;

+	dev->langID0 = 0;

+	dev->keepFullCfgDesc = 0;

+	_ep0_object_init(dev, 64);

+}

+

+static bool _device_setaddress(usbh_device_t *dev, uint8_t address) {

+	usbh_urbstatus_t ret = usbhControlRequest(dev,

+			USBH_STANDARDOUT(USBH_REQTYPE_DEVICE, USBH_REQ_SET_ADDRESS, address, 0),

+			0,

+			0);

+	if (ret != USBH_URBSTATUS_OK)

+		return HAL_FAILED;

+

+	dev->address = address;

+	return HAL_SUCCESS;

+}

+

+static inline bool _device_read_basic_cfgdesc(usbh_device_t *dev, uint8_t bConfiguration) {

+	/* get configuration descriptor */

+	return usbhStdReqGetConfigurationDescriptor(dev, bConfiguration,

+			sizeof(dev->basicConfigDesc), (uint8_t *)&dev->basicConfigDesc);

+}

+

+static void _device_read_full_cfgdesc(usbh_device_t *dev, uint8_t bConfiguration) {

+	_check_dev(dev);

+

+	uint8_t i;

+

+	if (dev->fullConfigurationDescriptor != NULL) {

+		chHeapFree(dev->fullConfigurationDescriptor);

+	}

+

+	dev->fullConfigurationDescriptor =

+			(uint8_t *)chHeapAlloc(0, dev->basicConfigDesc.wTotalLength);

+

+	if (!dev->fullConfigurationDescriptor)

+		return;

+

+	for (i = 0; i < 3; i++) {

+		if (usbhStdReqGetConfigurationDescriptor(dev, bConfiguration,

+				dev->basicConfigDesc.wTotalLength,

+				dev->fullConfigurationDescriptor) == HAL_SUCCESS) {

+			return;

+		}

+		osalThreadSleepMilliseconds(200);

+	}

+

+	/* error */

+	chHeapFree(dev->fullConfigurationDescriptor);

+	dev->fullConfigurationDescriptor = NULL;

+}

+

+static void _device_free_full_cfgdesc(usbh_device_t *dev) {

+	osalDbgCheck(dev);

+	if (dev->fullConfigurationDescriptor != NULL) {

+		chHeapFree(dev->fullConfigurationDescriptor);

+		dev->fullConfigurationDescriptor = NULL;

+	}

+}

+

+

+#define USBH_SET_CONFIGURATION(type, value, index)	\

+	USBH_STANDARDOUT(type, \

+	USBH_REQ_SET_CONFIGURATION, \

+	value, \

+	index) \

+

+#define USBH_SETDEVICECONFIGURATION(index) \

+	USBH_SET_CONFIGURATION(USBH_REQTYPE_DEVICE, index, 0)

+

+

+static bool _device_set_configuration(usbh_device_t *dev, uint8_t configuration) {

+	usbh_urbstatus_t ret = usbhControlRequest(dev,

+			USBH_SETDEVICECONFIGURATION(configuration),

+			0,

+			0);

+	if (ret != USBH_URBSTATUS_OK)

+		return HAL_FAILED;

+	return HAL_SUCCESS;

+}

+

+static bool _device_configure(usbh_device_t *dev, uint8_t bConfiguration) {

+	uint8_t i;

+

+	uinfof("Reading basic configuration descriptor %d", bConfiguration);

+	for (i = 0; i < 3; i++) {

+		if (!_device_read_basic_cfgdesc(dev, bConfiguration))

+			break;

+	}

+

+	if (i == 3) {

+		uerrf("Could not read basic configuration descriptor %d; "

+					"won't configure device", bConfiguration);

+		return HAL_FAILED;

+	}

+

+	uinfof("Selecting configuration %d", bConfiguration);

+	for (i = 0; i < 3; i++) {

+		if (!_device_set_configuration(dev, dev->basicConfigDesc.bConfigurationValue)) {

+			/* TODO: check if correctly configured using GET_CONFIGURATION */

+			dev->status = USBH_DEVSTATUS_CONFIGURED;

+			dev->bConfiguration = bConfiguration;

+

+			uinfo("Device configured.");

+			return HAL_SUCCESS;

+		}

+	}

+

+	return HAL_FAILED;

+}

+

+static bool _device_enumerate(usbh_device_t *dev) {

+

+	uinfo("Enumerate.");

+	uinfo("Get first 8 bytes of device descriptor");

+

+	/* get first 8 bytes of device descriptor */

+	if (usbhStdReqGetDeviceDescriptor(dev, 8, (uint8_t *)&dev->devDesc)) {

+		uerr("Error");

+		return HAL_FAILED;

+	}

+

+	uinfof("Configure bMaxPacketSize0 = %d", dev->devDesc.bMaxPacketSize0);

+	/* configure EP0 wMaxPacketSize */

+	usbhEPClose(&dev->ctrl);

+	_ep0_object_init(dev, dev->devDesc.bMaxPacketSize0);

+	usbhEPOpen(&dev->ctrl);

+

+	uint8_t addr = _find_address(dev->host);

+	if (addr == 0) {

+		uerr("No free addresses found");

+		return HAL_FAILED;

+	}

+

+	/* set device address */

+	uinfof("Set device address: %d", addr);

+	if (_device_setaddress(dev, addr)) {

+		uerr("Error");

+		_free_address(dev->host, addr);

+		return HAL_FAILED;

+	}

+

+	/* update EP because of the address change */

+	usbhEPClose(&dev->ctrl);

+	_ep0_object_init(dev, dev->devDesc.bMaxPacketSize0);

+	usbhEPOpen(&dev->ctrl);

+

+	uinfof("Wait stabilization...");

+	osalThreadSleepMilliseconds(HAL_USBH_DEVICE_ADDRESS_STABILIZATION);

+

+	/* address is set */

+	dev->status = USBH_DEVSTATUS_ADDRESS;

+

+	uinfof("Get full device desc");

+	/* get full device descriptor */

+	if (usbhStdReqGetDeviceDescriptor(dev, sizeof(dev->devDesc),

+			(uint8_t *)&dev->devDesc)) {

+		uerr("Error");

+		_device_setaddress(dev, 0);

+		_free_address(dev->host, addr);

+		return HAL_FAILED;

+	}

+

+	uinfof("Enumeration finished.");

+	return HAL_SUCCESS;

+}

+

+#if USBH_DEBUG_ENABLE && USBH_DEBUG_ENABLE_INFO

+void usbhDevicePrintInfo(usbh_device_t *dev) {

+	USBH_DEFINE_BUFFER(char, str[64]);

+	usbh_device_descriptor_t *const desc = &dev->devDesc;

+

+	uinfo("----- Device info -----");

+	uinfo("Device descriptor:");

+	uinfof("\tUSBSpec=%04x, #configurations=%d, langID0=%04x",

+			desc->bcdUSB,

+			desc->bNumConfigurations,

+			dev->langID0);

+

+	uinfof("\tClass=%02x, Subclass=%02x, Protocol=%02x",

+			desc->bDeviceClass,

+			desc->bDeviceSubClass,

+			desc->bDeviceProtocol);

+

+	uinfof("\tVID=%04x, PID=%04x, Release=%04x",

+			desc->idVendor,

+			desc->idProduct,

+			desc->bcdDevice);

+

+	if (dev->langID0) {

+		usbhDeviceReadString(dev, str, sizeof(str), desc->iManufacturer, dev->langID0);

+		uinfof("\tManufacturer: %s", str);

+		usbhDeviceReadString(dev, str, sizeof(str), desc->iProduct, dev->langID0);

+		uinfof("\tProduct: %s", str);

+		usbhDeviceReadString(dev, str, sizeof(str), desc->iSerialNumber, dev->langID0);

+		uinfof("\tSerial Number: %s", str);

+	}

+

+	if (dev->status == USBH_DEVSTATUS_CONFIGURED) {

+		uinfo("Configuration descriptor (partial):");

+		usbh_config_descriptor_t *const cfg = &dev->basicConfigDesc;

+		uinfof("\tbConfigurationValue=%d, Length=%d, #interfaces=%d",

+				cfg->bConfigurationValue,

+				cfg->wTotalLength,

+				cfg->bNumInterfaces);

+

+		uinfof("\tCurrent=%dmA", cfg->bMaxPower * 2);

+		uinfof("\tSelfPowered=%d, RemoteWakeup=%d",

+				cfg->bmAttributes & 0x40 ? 1 : 0,

+				cfg->bmAttributes & 0x20 ? 1 : 0);

+		if (dev->langID0) {

+			usbhDeviceReadString(dev, str, sizeof(str), cfg->iConfiguration, dev->langID0);

+			uinfof("\tName: %s", str);

+		}

+	}

+

+	uinfo("----- End Device info -----");

+

+}

+

+void usbhDevicePrintConfiguration(const uint8_t *descriptor, uint16_t rem) {

+	generic_iterator_t iep, icfg, ics;

+	if_iterator_t iif;

+

+	uinfo("----- Configuration info -----");

+	uinfo("Configuration descriptor:");

+	cfg_iter_init(&icfg, descriptor, rem);

+	const usbh_config_descriptor_t *const cfgdesc = cfg_get(&icfg);

+	uinfof("Configuration %d, #IFs=%d", cfgdesc->bConfigurationValue, cfgdesc->bNumInterfaces);

+

+	for (if_iter_init(&iif, &icfg); iif.valid; if_iter_next(&iif)) {

+		const usbh_interface_descriptor_t *const ifdesc = if_get(&iif);

+

+		uinfof("  Interface %d, alt=%d, #EPs=%d, "

+				"Class=%02x, Subclass=%02x, Protocol=%02x",

+				ifdesc->bInterfaceNumber, ifdesc->bAlternateSetting, ifdesc->bNumEndpoints,

+				ifdesc->bInterfaceClass, ifdesc->bInterfaceSubClass, ifdesc->bInterfaceProtocol);

+

+		for (cs_iter_init(&ics, (generic_iterator_t *)&iif); ics.valid; cs_iter_next(&ics)) {

+			uinfof("    Class-Specific descriptor, Length=%d, Type=%02x",

+					ics.curr[0], ics.curr[1]);

+		}

+

+		for (ep_iter_init(&iep, &iif); iep.valid; ep_iter_next(&iep)) {

+			const usbh_endpoint_descriptor_t *const epdesc = ep_get(&iep);

+

+			uinfof("    Endpoint descriptor, Address=%02x, Type=%d, MaxPacket=%d, Interval=%d",

+					epdesc->bEndpointAddress,

+					epdesc->bmAttributes & 3,

+					epdesc->wMaxPacketSize,

+					epdesc->bInterval);

+

+			for (cs_iter_init(&ics, &iep); ics.valid; cs_iter_next(&ics)) {

+				uinfof("    Class-Specific descriptor, Length=%d, Type=%02x",

+						ics.curr[0], ics.curr[1]);

+			}

+		}

+	}

+	uinfo("----- End Configuration info -----");

+}

+#endif

+

+bool usbhDeviceReadString(usbh_device_t *dev, char *dest, uint8_t size,

+		uint8_t index, uint16_t langID) {

+

+	usbh_string_descriptor_t *const desc = (usbh_string_descriptor_t *)dest;

+	osalDbgAssert(size >= 2, "wrong size");

+

+	*dest = 0;

+	if (index == 0)

+		return HAL_SUCCESS;

+	if (usbhStdReqGetStringDescriptor(dev, index, langID, size, (uint8_t *)dest))

+		return HAL_FAILED;

+	if (desc->bLength & 1)

+		return HAL_FAILED;

+	if (desc->bLength <= 2)

+		return HAL_SUCCESS;

+

+	uint8_t nchars = desc->bLength / 2;		/* including the trailing 0 */

+	if (size < nchars)

+		nchars = size;

+

+	char *src = (char *)&desc->wData[0];

+	while (--nchars) {

+		*dest++ = *src;

+		src += 2;

+	}

+	*dest = 0;

+	return HAL_SUCCESS;

+}

+

+

+

+

+/*===========================================================================*/

+/* Port processing functions.  	                                     		 */

+/*===========================================================================*/

+

+static void _port_connected(usbh_port_t *port);

+

+static void _port_reset(usbh_port_t *port) {

+	usbhhubControlRequest(port->device.host,

+#if HAL_USBH_USE_HUB

+			port->hub,

+#endif

+			USBH_REQTYPE_OUT | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+			USBH_REQ_SET_FEATURE,

+			USBH_PORT_FEAT_RESET,

+			port->number,

+			0,

+			0);

+}

+

+static void _port_update_status(usbh_port_t *port) {

+	uint32_t stat;

+	if (usbhhubControlRequest(port->device.host,

+#if HAL_USBH_USE_HUB

+			port->hub,

+#endif

+			USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_OTHER,

+			USBH_REQ_GET_STATUS,

+			0,

+			port->number,

+			4,

+			(uint8_t *)&stat) != USBH_URBSTATUS_OK) {

+		return;

+	}

+	port->status = stat & 0xffff;

+	port->c_status |= stat >> 16;

+}

+

+static void _port_process_status_change(usbh_port_t *port) {

+

+	_port_update_status(port);

+

+	if (port->c_status & USBH_PORTSTATUS_C_CONNECTION) {

+		/* port connected status changed */

+		port->c_status &= ~USBH_PORTSTATUS_C_CONNECTION;

+		usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_CONNECTION);

+		if ((port->status & (USBH_PORTSTATUS_CONNECTION | USBH_PORTSTATUS_ENABLE))

+				== USBH_PORTSTATUS_CONNECTION) {

+			if (port->device.status != USBH_DEVSTATUS_DISCONNECTED) {

+				_usbh_port_disconnected(port);

+			}

+

+			/* connected, disabled */

+			_port_connected(port);

+		} else {

+			/* disconnected */

+			_usbh_port_disconnected(port);

+		}

+	}

+

+	if (port->c_status & USBH_PORTSTATUS_C_RESET) {

+		port->c_status &= ~USBH_PORTSTATUS_C_RESET;

+		usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_RESET);

+	}

+

+	if (port->c_status & USBH_PORTSTATUS_C_ENABLE) {

+		port->c_status &= ~USBH_PORTSTATUS_C_ENABLE;

+		usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_ENABLE);

+	}

+

+	if (port->c_status & USBH_PORTSTATUS_C_OVERCURRENT) {

+		port->c_status &= ~USBH_PORTSTATUS_C_OVERCURRENT;

+		usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_OVERCURRENT);

+	}

+

+	if (port->c_status & USBH_PORTSTATUS_C_SUSPEND) {

+		port->c_status &= ~USBH_PORTSTATUS_C_SUSPEND;

+		usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_SUSPEND);

+	}

+

+}

+

+

+static void _port_connected(usbh_port_t *port) {

+	/* connected */

+

+	systime_t start;

+	uint8_t i;

+	uint8_t retries;

+	usbh_devspeed_t speed;

+	USBH_DEFINE_BUFFER(usbh_string_descriptor_t, strdesc);

+

+	uinfof("Port %d connected, wait debounce...", port->number);

+

+	port->device.status = USBH_DEVSTATUS_ATTACHED;

+

+	/* wait for attach de-bounce */

+	osalThreadSleepMilliseconds(HAL_USBH_PORT_DEBOUNCE_TIME);

+

+	/* check disconnection */

+	_port_update_status(port);

+	if (port->c_status & USBH_PORTSTATUS_C_CONNECTION) {

+		/* connection state changed; abort */

+		goto abort;

+	}

+

+	port->device.status = USBH_DEVSTATUS_CONNECTED;

+	retries = 3;

+

+reset:

+	for (i = 0; i < 3; i++) {

+		uinfo("Try reset...");

+		port->c_status &= ~(USBH_PORTSTATUS_C_RESET | USBH_PORTSTATUS_C_ENABLE);

+		_port_reset(port);

+		osalThreadSleepMilliseconds(20);	/* give it some time to reset (min. 10ms) */

+		start = osalOsGetSystemTimeX();

+		while (TRUE) {

+			_port_update_status(port);

+

+			/* check for disconnection */

+			if (port->c_status & USBH_PORTSTATUS_C_CONNECTION)

+				goto abort;

+

+			/* check for reset completion */

+			if (port->c_status & USBH_PORTSTATUS_C_RESET) {

+				port->c_status &= ~USBH_PORTSTATUS_C_RESET;

+				usbhhubClearFeaturePort(port, USBH_PORT_FEAT_C_RESET);

+

+				if ((port->status & (USBH_PORTSTATUS_ENABLE | USBH_PORTSTATUS_CONNECTION))

+						== (USBH_PORTSTATUS_ENABLE | USBH_PORTSTATUS_CONNECTION)) {

+					goto reset_success;

+				}

+			}

+

+			/* check for timeout */

+			if (osalOsGetSystemTimeX() - start > HAL_USBH_PORT_RESET_TIMEOUT) break;

+		}

+	}

+

+	/* reset procedure failed; abort */

+	goto abort;

+

+reset_success:

+

+	uinfo("Reset OK, recovery...");

+

+	/* reset recovery */

+	osalThreadSleepMilliseconds(100);

+

+	/* initialize object */

+	if (port->status & USBH_PORTSTATUS_LOW_SPEED) {

+		speed = USBH_DEVSPEED_LOW;

+	} else if (port->status & USBH_PORTSTATUS_HIGH_SPEED) {

+		speed = USBH_DEVSPEED_HIGH;

+	} else {

+		speed = USBH_DEVSPEED_FULL;

+	}

+	_device_initialize(&port->device, speed);

+	usbhEPOpen(&port->device.ctrl);

+

+	/* device with default address (0), try enumeration */

+	if (_device_enumerate(&port->device)) {

+		/* enumeration failed */

+		usbhEPClose(&port->device.ctrl);

+

+		if (!--retries)

+			goto abort;

+

+		/* retry reset & enumeration */

+		goto reset;

+	}

+

+	/* load the default language ID */

+	uinfo("Loading langID0...");

+	if (!usbhStdReqGetStringDescriptor(&port->device, 0, 0,

+			USBH_DT_STRING_SIZE, (uint8_t *)&strdesc)

+		&& (strdesc.bLength >= 4)

+		&& !usbhStdReqGetStringDescriptor(&port->device, 0, 0,

+			4, (uint8_t *)&strdesc)) {

+

+		port->device.langID0 = strdesc.wData[0];

+		uinfof("langID0=%04x", port->device.langID0);

+	}

+

+	/* check if the device has only one configuration */

+	if (port->device.devDesc.bNumConfigurations == 1) {

+		uinfo("Device has only one configuration");

+		_device_configure(&port->device, 0);

+	}

+

+	_classdriver_process_device(&port->device);

+	return;

+

+abort:

+	uerr("Abort");

+	port->device.status = USBH_DEVSTATUS_DISCONNECTED;

+}

+

+void _usbh_port_disconnected(usbh_port_t *port) {

+	if (port->device.status == USBH_DEVSTATUS_DISCONNECTED)

+		return;

+

+	uinfo("Port disconnected");

+

+	/* unload drivers */

+	while (port->device.drivers) {

+		usbh_baseclassdriver_t *drv = port->device.drivers;

+

+		/* unload */

+		uinfof("Unload driver %s", drv->info->name);

+		drv->info->vmt->unload(drv);

+

+		/* unlink */

+		drv->dev = 0;

+		port->device.drivers = drv->next;

+	}

+

+	/* close control endpoint */

+	osalSysLock();

+	usbhEPCloseS(&port->device.ctrl);

+	osalSysUnlock();

+

+	/* free address */

+	if (port->device.address)

+		_free_address(port->device.host, port->device.address);

+

+	_device_free_full_cfgdesc(&port->device);

+

+	port->device.status = USBH_DEVSTATUS_DISCONNECTED;

+}

+

+

+

+/*===========================================================================*/

+/* Hub processing functions.  	                                     		 */

+/*===========================================================================*/

+

+#if HAL_USBH_USE_HUB

+static void _hub_update_status(USBHDriver *host, USBHHubDriver *hub) {

+	uint32_t stat;

+	if (usbhhubControlRequest(host,

+			hub,

+			USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE,

+			USBH_REQ_GET_STATUS,

+			0,

+			0,

+			4,

+			(uint8_t *)&stat) != USBH_URBSTATUS_OK) {

+		return;

+	}

+	if (hub) {

+		hub->status = stat & 0xffff;

+		hub->c_status |= stat >> 16;

+	}

+}

+

+static void _hub_process_status_change(USBHDriver *host, USBHHubDriver *hub) {

+	uinfo("Hub status change. GET_STATUS.");

+	_hub_update_status(host, hub);

+

+	if (hub->c_status & USBH_HUBSTATUS_C_HUB_LOCAL_POWER) {

+		hub->c_status &= ~USBH_HUBSTATUS_C_HUB_LOCAL_POWER;

+		uinfo("Clear USBH_HUB_FEAT_C_HUB_LOCAL_POWER");

+		usbhhubClearFeatureHub(host, hub, USBH_HUB_FEAT_C_HUB_LOCAL_POWER);

+	}

+

+	if (hub->c_status & USBH_HUBSTATUS_C_HUB_OVER_CURRENT) {

+		hub->c_status &= ~USBH_HUBSTATUS_C_HUB_OVER_CURRENT;

+		uinfo("Clear USBH_HUB_FEAT_C_HUB_OVER_CURRENT");

+		usbhhubClearFeatureHub(host, hub, USBH_HUB_FEAT_C_HUB_OVER_CURRENT);

+	}

+}

+

+static uint32_t _hub_get_status_change_bitmap(USBHDriver *host, USBHHubDriver *hub) {

+	if (hub != NULL) {

+		osalSysLock();

+		uint32_t ret = hub->statuschange;

+		hub->statuschange = 0;

+		osalOsRescheduleS();

+		osalSysUnlock();

+		return ret;

+	}

+	return usbh_lld_roothub_get_statuschange_bitmap(host);

+}

+

+#else

+//TODO: replace the functions above

+#endif

+

+#if HAL_USBH_USE_HUB

+static void _hub_process(USBHDriver *host, USBHHubDriver *hub) {

+	uint32_t bitmap = _hub_get_status_change_bitmap(host, hub);

+	if (!bitmap)

+		return;

+

+	if (bitmap & 1) {

+		_hub_process_status_change(host, hub);

+		bitmap &= ~1;

+	}

+

+	usbh_port_t *port = (hub == NULL) ? &host->rootport : hub->ports;

+	uint8_t i;

+	for (i = 1; i < 32; i++) {

+		if (!bitmap || !port)

+			break;

+		if (bitmap & (1 << i)) {

+			bitmap &= ~(1 << i);

+			_port_process_status_change(port);

+		}

+		port = port->next;

+	}

+

+}

+#else

+static void _hub_process(USBHDriver *host) {

+	uint32_t bitmap = usbh_lld_roothub_get_statuschange_bitmap(host);

+

+#if 0	//TODO: complete _hub_process_status_change for root hub

+	if (bitmap & 1) {

+		_hub_process_status_change(host, hub);

+		bitmap &= ~1;

+	}

+#endif

+

+	if (!bitmap)

+		return;

+

+	_port_process_status_change(&host->rootport);

+}

+#endif

+

+/*===========================================================================*/

+/* Main processing loop (enumeration, loading/unloading drivers, etc). 		 */

+/*===========================================================================*/

+void usbhMainLoop(USBHDriver *usbh) {

+

+	if (usbh->status == USBH_STATUS_STOPPED)

+		return;

+

+#if HAL_USBH_USE_HUB

+	/* process root hub */

+	_hub_process(usbh, NULL);

+

+	/* process connected hubs */

+	USBHHubDriver *hub;

+    list_for_each_entry(hub, USBHHubDriver, &usbh->hubs, node) {

+		_hub_process(usbh, hub);

+	}

+#else

+	/* process root hub */

+	_hub_process(usbh);

+#endif

+}

+

+

+/*===========================================================================*/

+/* IAD class driver.											 		 	 */

+/*===========================================================================*/

+#if HAL_USBH_USE_IAD

+static usbh_baseclassdriver_t *iad_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem);

+static void iad_unload(usbh_baseclassdriver_t *drv);

+static const usbh_classdriver_vmt_t usbhiadClassDriverVMT = {

+	iad_load,

+	iad_unload

+};

+static const usbh_classdriverinfo_t usbhiadClassDriverInfo = {

+	0xef, 0x02, 0x01, "IAD", &usbhiadClassDriverVMT

+};

+

+static usbh_baseclassdriver_t *iad_load(usbh_device_t *dev,

+		const uint8_t *descriptor, uint16_t rem) {

+	(void)rem;

+

+	if (descriptor[1] != USBH_DT_DEVICE)

+		return 0;

+

+	uinfo("Load a driver for each IF collection.");

+

+	generic_iterator_t icfg;

+	if_iterator_t iif;

+	const usbh_ia_descriptor_t *last_iad = 0;

+

+	cfg_iter_init(&icfg, dev->fullConfigurationDescriptor,

+			dev->basicConfigDesc.wTotalLength);

+	if (!icfg.valid) {

+		uerr("Invalid configuration descriptor.");

+		return 0;

+	}

+

+	for (if_iter_init(&iif, &icfg); iif.valid; if_iter_next(&iif)) {

+		if (iif.iad && (iif.iad != last_iad)) {

+			last_iad = iif.iad;

+			if (_classdriver_load(dev, iif.iad->bFunctionClass,

+					iif.iad->bFunctionSubClass,

+					iif.iad->bFunctionProtocol,

+					(uint8_t *)iif.iad,

+					(uint8_t *)iif.curr - (uint8_t *)iif.iad + iif.rem) != HAL_SUCCESS) {

+				uwarnf("No drivers found for IF collection #%d:%d",

+						iif.iad->bFirstInterface,

+						iif.iad->bFirstInterface + iif.iad->bInterfaceCount - 1);

+			}

+		}

+	}

+

+	return 0;

+}

+

+static void iad_unload(usbh_baseclassdriver_t *drv) {

+	(void)drv;

+}

+#endif

+

+

+/*===========================================================================*/

+/* Class driver loader.											 		 	 */

+/*===========================================================================*/

+

+static const usbh_classdriverinfo_t *usbh_classdrivers_lookup[] = {

+#if HAL_USBH_USE_FTDI

+	&usbhftdiClassDriverInfo,

+#endif

+#if HAL_USBH_USE_IAD

+	&usbhiadClassDriverInfo,

+#endif

+#if HAL_USBH_USE_UVC

+	&usbhuvcClassDriverInfo,

+#endif

+#if HAL_USBH_USE_MSD

+	&usbhmsdClassDriverInfo,

+#endif

+#if HAL_USBH_USE_HUB

+	&usbhhubClassDriverInfo

+#endif

+};

+

+static bool _classdriver_load(usbh_device_t *dev, uint8_t class,

+		uint8_t subclass, uint8_t protocol, uint8_t *descbuff, uint16_t rem) {

+	uint8_t i;

+	usbh_baseclassdriver_t *drv = NULL;

+	for (i = 0; i < sizeof_array(usbh_classdrivers_lookup); i++) {

+		const usbh_classdriverinfo_t *const info = usbh_classdrivers_lookup[i];

+		if (class == 0xff) {

+			/* vendor specific */

+			if (info->class == 0xff) {

+				uinfof("Try load vendor-specific driver %s", info->name);

+				drv = info->vmt->load(dev, descbuff, rem);

+				if (drv != NULL)

+					goto success;

+			}

+		} else if ((info->class < 0) || ((info->class == class)

+			&& ((info->subclass < 0) || ((info->subclass == subclass)

+			&& ((info->protocol < 0) || (info->protocol == protocol)))))) {

+			uinfof("Try load driver %s", info->name);

+			drv = info->vmt->load(dev, descbuff, rem);

+

+#if HAL_USBH_USE_IAD

+			/* special case: */

+			if (info == &usbhiadClassDriverInfo)

+				return HAL_SUCCESS;

+#endif

+

+			if (drv != NULL)

+				goto success;

+		}

+	}

+	return HAL_FAILED;

+

+success:

+	/* Link this driver to the device */

+	drv->next = dev->drivers;

+	dev->drivers = drv;

+	drv->dev = dev;

+	return HAL_SUCCESS;

+}

+

+static void _classdriver_process_device(usbh_device_t *dev) {

+	uinfo("New device found.");

+	const usbh_device_descriptor_t *const devdesc = &dev->devDesc;

+

+	usbhDevicePrintInfo(dev);

+

+	/* TODO: Support multiple configurations

+	 *

+	 * Windows doesn't support them, so it's unlikely that any commercial USB device

+	 * will have multiple configurations.

+	 */

+	if (dev->status != USBH_DEVSTATUS_CONFIGURED) {

+		uwarn("Multiple configurations not supported, selecting configuration #0");

+		if (_device_configure(dev, 0) != HAL_SUCCESS) {

+			uerr("Couldn't configure device; abort.");

+			return;

+		}

+	}

+

+	_device_read_full_cfgdesc(dev, dev->bConfiguration);

+	if (dev->fullConfigurationDescriptor == NULL) {

+		uerr("Couldn't read full configuration descriptor; abort.");

+		return;

+	}

+

+	usbhDevicePrintConfiguration(dev->fullConfigurationDescriptor,

+			dev->basicConfigDesc.wTotalLength);

+

+	if (devdesc->bDeviceClass == 0) {

+		/* each interface defines its own device class/subclass/protocol */

+		uinfo("Load a driver for each IF.");

+

+		generic_iterator_t icfg;

+		if_iterator_t iif;

+		uint8_t last_if = 0xff;

+

+		cfg_iter_init(&icfg, dev->fullConfigurationDescriptor,

+				dev->basicConfigDesc.wTotalLength);

+		if (!icfg.valid) {

+			uerr("Invalid configuration descriptor.");

+			goto exit;

+		}

+

+		for (if_iter_init(&iif, &icfg); iif.valid; if_iter_next(&iif)) {

+			const usbh_interface_descriptor_t *const ifdesc = if_get(&iif);

+			if (ifdesc->bInterfaceNumber != last_if) {

+				last_if = ifdesc->bInterfaceNumber;

+				if (_classdriver_load(dev, ifdesc->bInterfaceClass,

+						ifdesc->bInterfaceSubClass,

+						ifdesc->bInterfaceProtocol,

+						(uint8_t *)ifdesc, iif.rem) != HAL_SUCCESS) {

+					uwarnf("No drivers found for IF #%d", ifdesc->bInterfaceNumber);

+				}

+			}

+		}

+

+	} else {

+		if (_classdriver_load(dev, devdesc->bDeviceClass,

+				devdesc->bDeviceSubClass,

+				devdesc->bDeviceProtocol,

+				(uint8_t *)devdesc, USBH_DT_DEVICE_SIZE) != HAL_SUCCESS) {

+			uwarn("No drivers found.");

+		}

+	}

+

+exit:

+	if (dev->keepFullCfgDesc == 0) {

+		_device_free_full_cfgdesc(dev);

+	}

+}

+

+

+#endif

+

diff --git a/os/hal/src/usbh/usbh_debug.c b/os/hal/src/usbh/usbh_debug.c
new file mode 100644
index 0000000..63505aa
--- /dev/null
+++ b/os/hal/src/usbh/usbh_debug.c
@@ -0,0 +1,536 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "ch.h"

+#include "usbh/debug.h"

+#include <stdarg.h>

+#include "chprintf.h"

+

+#if USBH_DEBUG_ENABLE

+

+#define MAX_FILLER 11

+#define FLOAT_PRECISION 9

+#define MPRINTF_USE_FLOAT 0

+

+static char *long_to_string_with_divisor(char *p, long num, unsigned radix, long divisor) 

+{

+	int i;

+	char *q;

+	long l, ll;

+

+	l = num;

+	if (divisor == 0) {

+		ll = num;

+	} else {

+		ll = divisor;

+	}

+

+	q = p + MAX_FILLER;

+	do {

+		i = (int)(l % radix);

+		i += '0';

+		if (i > '9') {

+			i += 'A' - '0' - 10;

+		}

+		*--q = i;

+		l /= radix;

+	} while ((ll /= radix) != 0);

+

+	i = (int)(p + MAX_FILLER - q);

+	do {

+		*p++ = *q++;

+	} while (--i);

+

+	return p;

+}

+

+static char *ltoa(char *p, long num, unsigned radix) {

+

+	return long_to_string_with_divisor(p, num, radix, 0);

+}

+

+#if MPRINTF_USE_FLOAT

+static const long _pow10[FLOAT_PRECISION] = {10, 100, 1000, 10000, 100000, 1000000,

+	10000000, 100000000, 1000000000};

+static const double m10[FLOAT_PRECISION] = {5.0/100, 5.0/1000, 5.0/10000, 5.0/100000, 5.0/1000000,

+	5.0/10000000, 5.0/100000000, 5.0/1000000000, 5.0/10000000000};

+

+static char *ftoa(char *p, double num, unsigned long precision, bool dot) {

+	long l;

+	char *q;

+	double r;

+

+

+	if (precision == 0) {

+		l = (long)(num + 0.5);

+		return long_to_string_with_divisor(p, l, 10, 0);

+	} else {

+		if (precision > FLOAT_PRECISION) precision = FLOAT_PRECISION;

+		r = m10[precision - 1];

+		precision = _pow10[precision - 1];

+

+		l = (long)num;

+		p = long_to_string_with_divisor(p, l, 10, 0);

+		if (dot) *p++ = '.';

+		l = (long)((num - l + r) * precision);

+		q = long_to_string_with_divisor(p, l, 10, precision / 10) - 1;

+

+		while (q > p) {

+			if (*q != '0') {

+				break;

+			}

+			--q;

+		}

+		return ++q;

+	}

+

+	

+

+

+}

+#endif

+

+static inline void _put(char c) {

+	input_queue_t *iqp = &USBH_DEBUG_USBHD.iq;

+

+	if (chIQIsFullI(iqp))

+		return;

+

+	iqp->q_counter++;

+	*iqp->q_wrptr++ = c;

+	if (iqp->q_wrptr >= iqp->q_top)

+		iqp->q_wrptr = iqp->q_buffer;

+

+}

+

+int _dbg_printf(const char *fmt, va_list ap) {

+	char *p, *s, c, filler;

+	int i, precision, width;

+	int n = 0;

+	bool is_long, left_align, sign;

+	long l;

+#if MPRINTF_USE_FLOAT

+	double f;

+	char tmpbuf[2*MAX_FILLER + 1];

+#else

+	char tmpbuf[MAX_FILLER + 1];

+#endif

+

+	for (;;) {

+

+		//agarrar nuevo caracter de formato

+		c = *fmt++;

+

+		//chequeo eos

+		if (c == 0) return n;

+

+		//copio los caracteres comunes

+		if (c != '%') {

+			_put(c);

+			n++;

+			continue;

+		}

+

+		//encontré un '%'

+		p = tmpbuf;

+		s = tmpbuf;

+

+		//left align

+		left_align = FALSE;

+		if (*fmt == '-') {

+			fmt++;

+			left_align = TRUE;

+		}

+		

+		sign = FALSE;

+		if (*fmt == '+') {

+			fmt++;

+			sign = TRUE;

+		}

+

+		//filler

+		filler = ' ';

+		if (*fmt == '0') {

+			fmt++;

+			filler = '0';

+		}

+

+		//width

+		width = 0;

+		while (TRUE) {

+			c = *fmt++;

+			if (c >= '0' && c <= '9')

+				c -= '0';

+			else if (c == '*')

+				c = va_arg(ap, int);

+			else

+				break;

+			width = width * 10 + c;

+		}

+

+		//precision

+		precision = 0;

+		if (c == '.') {

+

+			if (*fmt == 'n') {

+				fmt++;

+

+			}

+			while (TRUE) {

+				c = *fmt++;

+				if (c >= '0' && c <= '9')

+					c -= '0';

+				else if (c == '*')

+					c = va_arg(ap, int);

+				else

+					break;

+				precision = precision * 10 + c;

+			}

+		}

+

+		//long modifier

+		if (c == 'l' || c == 'L') {

+			is_long = TRUE;

+			if (*fmt)

+				c = *fmt++;

+		}

+		else

+			is_long = (c >= 'A') && (c <= 'Z');

+

+		/* Command decoding.*/

+		switch (c) {

+		//char

+		case 'c':

+			filler = ' ';

+			*p++ = va_arg(ap, int);

+			break;

+

+		//string

+		case 's':

+			filler = ' ';

+			if ((s = va_arg(ap, char *)) == 0)

+				s = (char *)"(null)";

+			if (precision == 0)

+				precision = 32767;

+

+			//strlen con límite hasta precision

+			for (p = s; *p && (--precision >= 0); p++)

+				;

+			break;

+

+

+

+		case 'D':

+		case 'd':

+		case 'I':

+		case 'i':

+			if (is_long)

+				l = va_arg(ap, long);

+			else

+				l = va_arg(ap, int);

+			if (l < 0) {

+				*p++ = '-';

+				l = -l;

+				sign = TRUE;

+			} else if (sign) {

+				*p++ = '+';

+			}

+			p = ltoa(p, l, 10);

+			break;

+

+#if MPRINTF_USE_FLOAT

+		case 'f':

+			f = va_arg(ap, double);

+			if (f < 0) {

+				*p++ = '-';

+				f = -f;

+				sign = TRUE;

+			} else if (sign) {

+				*p++ = '+';

+			}

+			if (prec == FALSE) precision = 6;

+			p = ftoa(p, f, precision, dot);

+			break;

+#endif

+

+

+		case 'X':

+		case 'x':

+			c = 16;

+			goto unsigned_common;

+		case 'U':

+		case 'u':

+			c = 10;

+			goto unsigned_common;

+		case 'O':

+		case 'o':

+			c = 8;

+

+unsigned_common:

+			if (is_long)

+				l = va_arg(ap, unsigned long);

+			else

+				l = va_arg(ap, unsigned int);

+			p = ltoa(p, l, c);

+			break;

+

+		//copiar

+		default:

+			*p++ = c;

+			break;

+		}

+

+		//longitud

+		i = (int)(p - s);

+

+		//calculo cuántos caracteres de filler debo poner

+		if ((width -= i) < 0)

+			width = 0;

+

+		if (left_align == FALSE)

+			width = -width;

+

+		if (width < 0) {

+			//alineado a la derecha

+

+			//poner el signo adelante

+			if (sign && filler == '0') {

+				_put(*s++);

+				n++;

+				i--;

+			}

+

+			//fill a la izquierda

+			do {

+				_put(filler);

+				n++;

+			} while (++width != 0);

+		}

+

+		//copiar los caracteres

+		while (--i >= 0) {

+			_put(*s++);

+			n++;

+		}

+

+		//fill a la derecha

+		while (width) {

+			_put(filler);

+			n++;

+			width--;

+		}

+	}

+

+	//return n; // can raise 'code is unreachable' warning

+

+}

+

+static void _print_hdr(void)

+{

+	uint32_t hfnum = USBH_DEBUG_USBHD.otg->HFNUM;

+	uint16_t hfir = USBH_DEBUG_USBHD.otg->HFIR;

+

+	_put(0xff);

+	_put(0xff);

+	_put(hfir & 0xff);

+	_put(hfir >> 8);

+	_put(hfnum & 0xff);

+	_put((hfnum >> 8) & 0xff);

+	_put((hfnum >> 16) & 0xff);

+	_put((hfnum >> 24) & 0xff);

+}

+

+void usbDbgPrintf(const char *fmt, ...)

+{

+	va_list ap;

+	va_start(ap, fmt);

+	syssts_t sts = chSysGetStatusAndLockX();

+	_print_hdr();

+	_dbg_printf(fmt, ap);

+	_put(0);

+	chThdDequeueNextI(&USBH_DEBUG_USBHD.iq.q_waiting, Q_OK);

+	chSysRestoreStatusX(sts);

+	va_end(ap);

+}

+

+

+void usbDbgPuts(const char *s)

+{

+	uint32_t buff[2] = {

+		0xffff | (USBH_DEBUG_USBHD.otg->HFIR << 16),

+		USBH_DEBUG_USBHD.otg->HFNUM

+	};

+	uint8_t *p = (uint8_t *)buff;

+	uint8_t *top = p + 8;

+

+	syssts_t sts = chSysGetStatusAndLockX();

+	input_queue_t *iqp = &USBH_DEBUG_USBHD.iq;

+	int rem = sizeof(USBH_DEBUG_USBHD.dbg_buff) - iqp->q_counter;

+	while (rem) {

+		*iqp->q_wrptr++ = *p;

+		if (iqp->q_wrptr >= iqp->q_top)

+			iqp->q_wrptr = iqp->q_buffer;

+		rem--;

+		if (++p == top) break;

+	}

+	while (rem) {

+		*iqp->q_wrptr++ = *s;

+		if (iqp->q_wrptr >= iqp->q_top)

+			iqp->q_wrptr = iqp->q_buffer;

+		rem--;

+		if (!*s++) break;

+	}

+	iqp->q_counter = sizeof(USBH_DEBUG_USBHD.dbg_buff) - rem;

+	chThdDequeueNextI(&USBH_DEBUG_USBHD.iq.q_waiting, Q_OK);

+	chSysRestoreStatusX(sts);

+}

+

+void usbDbgReset(void) {

+	const char *msg = "\r\n\r\n==== DEBUG OUTPUT RESET ====\r\n";

+

+	syssts_t sts = chSysGetStatusAndLockX();

+	chIQResetI(&USBH_DEBUG_USBHD.iq);

+	chOQResetI(&USBH_DEBUG_SD.oqueue);

+	while (*msg) {

+		*USBH_DEBUG_SD.oqueue.q_wrptr++ = *msg++;

+		USBH_DEBUG_SD.oqueue.q_counter--;

+	}

+	chSysRestoreStatusX(sts);

+}

+

+static int _get(void) {

+	if (!USBH_DEBUG_USBHD.iq.q_counter) return -1;

+	USBH_DEBUG_USBHD.iq.q_counter--;

+	uint8_t b = *USBH_DEBUG_USBHD.iq.q_rdptr++;

+	if (USBH_DEBUG_USBHD.iq.q_rdptr >= USBH_DEBUG_USBHD.iq.q_top) {

+		USBH_DEBUG_USBHD.iq.q_rdptr = USBH_DEBUG_USBHD.iq.q_buffer;

+	}

+	return b;

+}

+

+void usbDbgSystemHalted(void) {

+	while (true) {

+		if (!((bool)((USBH_DEBUG_SD.oqueue.q_wrptr == USBH_DEBUG_SD.oqueue.q_rdptr) && (USBH_DEBUG_SD.oqueue.q_counter != 0U))))

+			break;

+		USBH_DEBUG_SD.oqueue.q_counter++;

+		while (!(USART1->SR & USART_SR_TXE));

+		USART1->DR = *USBH_DEBUG_SD.oqueue.q_rdptr++;

+		if (USBH_DEBUG_SD.oqueue.q_rdptr >= USBH_DEBUG_SD.oqueue.q_top) {

+			USBH_DEBUG_SD.oqueue.q_rdptr = USBH_DEBUG_SD.oqueue.q_buffer;

+		}

+	}

+

+	int c;

+	int state = 0;

+	for (;;) {

+		c = _get(); if (c < 0) break;

+

+		if (state == 0) {

+			if (c == 0xff) state = 1;

+		} else if (state == 1) {

+			if (c == 0xff) state = 2;

+			else (state = 0);

+		} else {

+			c = _get(); if (c < 0) return;

+			c = _get(); if (c < 0) return;

+			c = _get(); if (c < 0) return;

+			c = _get(); if (c < 0) return;

+			c = _get(); if (c < 0) return;

+

+			while (true) {

+				c = _get(); if (c < 0) return;

+				if (!c) {

+					while (!(USART1->SR & USART_SR_TXE));

+					USART1->DR = '\r';

+					while (!(USART1->SR & USART_SR_TXE));

+					USART1->DR = '\n';

+					state = 0;

+					break;

+				}

+				while (!(USART1->SR & USART_SR_TXE));

+				USART1->DR = c;

+			}

+		}

+	}

+}

+

+static void usb_debug_thread(void *p) {

+	USBHDriver *host = (USBHDriver *)p;

+	uint8_t state = 0;

+

+	chRegSetThreadName("USBH_DBG");

+	while (true) {

+		msg_t c = chIQGet(&host->iq);

+		if (c < 0) goto reset;

+

+		if (state == 0) {

+			if (c == 0xff) state = 1;

+		} else if (state == 1) {

+			if (c == 0xff) state = 2;

+			else (state = 0);

+		} else {

+			uint16_t hfir;

+			uint32_t hfnum;

+

+			hfir = c;

+			c = chIQGet(&host->iq); if (c < 0) goto reset;

+			hfir |= c << 8;

+

+			c = chIQGet(&host->iq); if (c < 0) goto reset;

+			hfnum = c;

+			c = chIQGet(&host->iq); if (c < 0) goto reset;

+			hfnum |= c << 8;

+			c = chIQGet(&host->iq); if (c < 0) goto reset;

+			hfnum |= c << 16;

+			c = chIQGet(&host->iq); if (c < 0) goto reset;

+			hfnum |= c << 24;

+

+			uint32_t f = hfnum & 0xffff;

+			uint32_t p = 1000 - ((hfnum >> 16) / (hfir / 1000));

+			chprintf((BaseSequentialStream *)&USBH_DEBUG_SD, "%05d.%03d  ", f, p);

+

+			while (true) {

+				c = chIQGet(&host->iq); if (c < 0) goto reset;

+				if (!c) {

+					sdPut(&USBH_DEBUG_SD, '\r');

+					sdPut(&USBH_DEBUG_SD, '\n');

+					state = 0;

+					break;

+				}

+				sdPut(&USBH_DEBUG_SD, (uint8_t)c);

+			}

+		}

+

+		continue;

+reset:

+		state = 0;

+	}

+}

+

+void usbDbgInit(USBHDriver *host) {

+	if (host != &USBH_DEBUG_USBHD)

+		return;

+	chIQObjectInit(&USBH_DEBUG_USBHD.iq, USBH_DEBUG_USBHD.dbg_buff, sizeof(USBH_DEBUG_USBHD.dbg_buff), 0, 0);

+	chThdCreateStatic(USBH_DEBUG_USBHD.waDebug, sizeof(USBH_DEBUG_USBHD.waDebug), NORMALPRIO, usb_debug_thread, &USBH_DEBUG_USBHD);

+}

+#endif

+

+#endif

diff --git a/os/hal/src/usbh/usbh_desciter.c b/os/hal/src/usbh/usbh_desciter.c
new file mode 100644
index 0000000..80e4728
--- /dev/null
+++ b/os/hal/src/usbh/usbh_desciter.c
@@ -0,0 +1,165 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+

+#if HAL_USE_USBH

+

+#include "usbh/defs.h"

+#include "usbh/desciter.h"

+

+void cfg_iter_init(generic_iterator_t *icfg, const uint8_t *buff, uint16_t rem) {

+	icfg->valid = 0;

+

+	if ((buff[0] < 2) || (rem < 2) || (rem < buff[0])

+			|| (buff[0] < USBH_DT_CONFIG_SIZE)

+			|| (buff[1] != USBH_DT_CONFIG))

+		return;

+

+	if (rem > ((usbh_config_descriptor_t *)buff)->wTotalLength) {

+		rem = ((usbh_config_descriptor_t *)buff)->wTotalLength;

+	}

+

+	icfg->valid = 1;

+	icfg->rem = rem;

+	icfg->curr = buff;

+}

+

+void if_iter_next(if_iterator_t *iif) {

+	const uint8_t *curr = iif->curr;

+	uint16_t rem = iif->rem;

+

+	iif->valid = 0;

+

+	if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+		return;

+

+	for (;;) {

+		rem -= curr[0];

+		curr += curr[0];

+

+		if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+			return;

+

+		if (curr[1] == USBH_DT_INTERFACE_ASSOCIATION) {

+			if (curr[0] < USBH_DT_INTERFACE_ASSOCIATION_SIZE)

+				return;

+

+			iif->iad = (usbh_ia_descriptor_t *)curr;

+

+		} else if (curr[1] == USBH_DT_INTERFACE) {

+			if (curr[0] < USBH_DT_INTERFACE_SIZE)

+				return;

+

+			if (iif->iad) {

+				if ((curr[2] < iif->iad->bFirstInterface)

+					|| (curr[2] >= (iif->iad->bFirstInterface + iif->iad->bInterfaceCount)))

+					iif->iad = 0;

+			}

+			break;

+		}

+	}

+

+	iif->valid = 1;

+	iif->rem = rem;

+	iif->curr = curr;

+}

+

+void if_iter_init(if_iterator_t *iif, const generic_iterator_t *icfg) {

+	iif->iad = 0;

+	iif->curr = icfg->curr;

+	iif->rem = icfg->rem;

+	if_iter_next(iif);

+}

+

+void ep_iter_next(generic_iterator_t *iep) {

+	const uint8_t *curr = iep->curr;

+	uint16_t rem = iep->rem;

+

+	iep->valid = 0;

+

+	if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+		return;

+

+	for (;;) {

+		rem -= curr[0];

+		curr += curr[0];

+

+		if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+			return;

+

+		if ((curr[1] == USBH_DT_INTERFACE_ASSOCIATION)

+				|| (curr[1] == USBH_DT_INTERFACE)

+				|| (curr[1] == USBH_DT_CONFIG)) {

+			return;

+		} else if (curr[1] == USBH_DT_ENDPOINT) {

+			if (curr[0] < USBH_DT_ENDPOINT_SIZE)

+				return;

+

+			break;

+		}

+	}

+

+	iep->valid = 1;

+	iep->rem = rem;

+	iep->curr = curr;

+}

+

+void ep_iter_init(generic_iterator_t *iep, const if_iterator_t *iif) {

+	iep->curr = iif->curr;

+	iep->rem = iif->rem;

+	ep_iter_next(iep);

+}

+

+void cs_iter_next(generic_iterator_t *ics) {

+	const uint8_t *curr = ics->curr;

+	uint16_t rem = ics->rem;

+

+	ics->valid = 0;

+

+	if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+		return;

+

+	//for (;;) {

+		rem -= curr[0];

+		curr += curr[0];

+

+		if ((curr[0] < 2) || (rem < 2) || (rem < curr[0]))

+			return;

+

+		if ((curr[1] == USBH_DT_INTERFACE_ASSOCIATION)

+				|| (curr[1] == USBH_DT_INTERFACE)

+				|| (curr[1] == USBH_DT_CONFIG)

+				|| (curr[1] == USBH_DT_ENDPOINT)) {

+			return;

+		}

+

+	//	break;

+	//}

+

+	ics->valid = 1;

+	ics->rem = rem;

+	ics->curr = curr;

+}

+

+void cs_iter_init(generic_iterator_t *ics, const generic_iterator_t *iter) {

+	ics->curr = iter->curr;

+	ics->rem = iter->rem;

+	cs_iter_next(ics);

+}

+

+#endif

diff --git a/os/hal/src/usbh/usbh_ftdi.c b/os/hal/src/usbh/usbh_ftdi.c
new file mode 100644
index 0000000..cdf3410
--- /dev/null
+++ b/os/hal/src/usbh/usbh_ftdi.c
@@ -0,0 +1,717 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+#include "usbh.h"

+

+#if HAL_USBH_USE_FTDI

+

+#if !HAL_USE_USBH

+#error "USBHFTDI needs USBH"

+#endif

+

+#include <string.h>

+#include "usbh/dev/ftdi.h"

+#include "usbh/internal.h"

+

+//#pragma GCC optimize("Og")

+

+

+#if USBHFTDI_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBHFTDI_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBHFTDI_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBHFTDI_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+

+/*===========================================================================*/

+/* USB Class driver loader for FTDI								 		 	 */

+/*===========================================================================*/

+USBHFTDIDriver USBHFTDID[HAL_USBHFTDI_MAX_INSTANCES];

+

+static usbh_baseclassdriver_t *_ftdi_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem);

+static void _ftdi_unload(usbh_baseclassdriver_t *drv);

+

+static const usbh_classdriver_vmt_t class_driver_vmt = {

+	_ftdi_load,

+	_ftdi_unload

+};

+

+const usbh_classdriverinfo_t usbhftdiClassDriverInfo = {

+	0xff, 0xff, 0xff, "FTDI", &class_driver_vmt

+};

+

+static USBHFTDIPortDriver *_find_port(void) {

+	uint8_t i;

+	for (i = 0; i < HAL_USBHFTDI_MAX_PORTS; i++) {

+		if (FTDIPD[i].ftdip == NULL)

+			return &FTDIPD[i];

+	}

+	return NULL;

+}

+

+static usbh_baseclassdriver_t *_ftdi_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem) {

+	int i;

+	USBHFTDIDriver *ftdip;

+

+	if (dev->devDesc.idVendor != 0x0403) {

+		uerr("FTDI: Unrecognized VID");

+		return NULL;

+	}

+

+	switch (dev->devDesc.idProduct) {

+	case 0x6001:

+	case 0x6010:

+	case 0x6011:

+	case 0x6014:

+	case 0x6015:

+		break;

+	default:

+		uerr("FTDI: Unrecognized PID");

+		return NULL;

+	}

+

+	if ((rem < descriptor[0]) || (descriptor[1] != USBH_DT_INTERFACE))

+		return NULL;

+

+	const usbh_interface_descriptor_t * const ifdesc = (const usbh_interface_descriptor_t * const)descriptor;

+	if (ifdesc->bInterfaceNumber != 0) {

+		uwarn("FTDI: Will allocate driver along with IF #0");

+	}

+

+	/* alloc driver */

+	for (i = 0; i < HAL_USBHFTDI_MAX_INSTANCES; i++) {

+		if (USBHFTDID[i].dev == NULL) {

+			ftdip = &USBHFTDID[i];

+			goto alloc_ok;

+		}

+	}

+

+	uwarn("FTDI: Can't alloc driver");

+

+	/* can't alloc */

+	return NULL;

+

+alloc_ok:

+	/* initialize the driver's variables */

+	ftdip->ports = 0;

+	switch (dev->devDesc.bcdDevice) {

+	case 0x200:		//AM

+		uinfo("FTDI: Type A chip");

+		ftdip->type = USBHFTDI_TYPE_A;

+		break;

+	case 0x400:		//BM

+	case 0x500:		//2232C

+	case 0x600:		//R

+	case 0x1000:	//230X

+		uinfo("FTDI: Type B chip");

+		ftdip->type = USBHFTDI_TYPE_B;

+		break;

+	case 0x700:		//2232H;

+	case 0x800:		//4232H;

+	case 0x900:		//232H;

+		uinfo("FTDI: Type H chip");

+		ftdip->type = USBHFTDI_TYPE_H;

+	default:

+		uerr("FTDI: Unrecognized chip type");

+		return NULL;

+	}

+	usbhEPSetName(&dev->ctrl, "FTD[CTRL]");

+

+	/* parse the configuration descriptor */

+	generic_iterator_t iep, icfg;

+	if_iterator_t iif;

+	cfg_iter_init(&icfg, dev->fullConfigurationDescriptor, dev->basicConfigDesc.wTotalLength);

+	for (if_iter_init(&iif, &icfg); iif.valid; if_iter_next(&iif)) {

+		const usbh_interface_descriptor_t *const ifdesc = if_get(&iif);

+		uinfof("FTDI: Interface #%d", ifdesc->bInterfaceNumber);

+

+		USBHFTDIPortDriver *const prt = _find_port();

+		if (prt == NULL) {

+			uwarn("\tCan't alloc port for this interface");

+			break;

+		}

+

+		prt->ifnum = ifdesc->bInterfaceNumber;

+		prt->epin.status = USBH_EPSTATUS_UNINITIALIZED;

+		prt->epout.status = USBH_EPSTATUS_UNINITIALIZED;

+

+		for (ep_iter_init(&iep, &iif); iep.valid; ep_iter_next(&iep)) {

+			const usbh_endpoint_descriptor_t *const epdesc = ep_get(&iep);

+			if ((epdesc->bEndpointAddress & 0x80) && (epdesc->bmAttributes == USBH_EPTYPE_BULK)) {

+				uinfof("BULK IN endpoint found: bEndpointAddress=%02x", epdesc->bEndpointAddress);

+				usbhEPObjectInit(&prt->epin, dev, epdesc);

+				usbhEPSetName(&prt->epin, "FTD[BIN ]");

+			} else if (((epdesc->bEndpointAddress & 0x80) == 0)

+					&& (epdesc->bmAttributes == USBH_EPTYPE_BULK)) {

+				uinfof("BULK OUT endpoint found: bEndpointAddress=%02x", epdesc->bEndpointAddress);

+				usbhEPObjectInit(&prt->epout, dev, epdesc);

+				usbhEPSetName(&prt->epout, "FTD[BOUT]");

+			} else {

+				uinfof("unsupported endpoint found: bEndpointAddress=%02x, bmAttributes=%02x",

+						epdesc->bEndpointAddress, epdesc->bmAttributes);

+			}

+		}

+

+		if ((prt->epin.status != USBH_EPSTATUS_CLOSED)

+				|| (prt->epout.status != USBH_EPSTATUS_CLOSED)) {

+			uwarn("\tCouldn't find endpoints; can't alloc port for this interface");

+			continue;

+		}

+

+		/* link the new block driver to the list */

+		prt->next = ftdip->ports;

+		ftdip->ports = prt;

+		prt->ftdip = ftdip;

+

+		prt->state = USBHFTDIP_STATE_ACTIVE;

+	}

+

+	return (usbh_baseclassdriver_t *)ftdip;

+

+}

+

+static void _stop(USBHFTDIPortDriver *ftdipp);

+static void _ftdi_unload(usbh_baseclassdriver_t *drv) {

+	osalDbgCheck(drv != NULL);

+	USBHFTDIDriver *const ftdip = (USBHFTDIDriver *)drv;

+	USBHFTDIPortDriver *ftdipp = ftdip->ports;

+

+	osalMutexLock(&ftdip->mtx);

+	while (ftdipp) {

+		_stop(ftdipp);

+		ftdipp = ftdipp->next;

+	}

+

+	ftdipp = ftdip->ports;

+	osalSysLock();

+	while (ftdipp) {

+		USBHFTDIPortDriver *next = ftdipp->next;

+		usbhftdipObjectInit(ftdipp);

+		ftdipp = next;

+	}

+	osalSysUnlock();

+	osalMutexUnlock(&ftdip->mtx);

+}

+

+

+USBHFTDIPortDriver FTDIPD[HAL_USBHFTDI_MAX_PORTS];

+

+

+#define FTDI_COMMAND_RESET		0

+#define FTDI_RESET_ALL 			0

+#define FTDI_RESET_PURGE_RX 	1

+#define FTDI_RESET_PURGE_TX 	2

+

+#define FTDI_COMMAND_SETFLOW    2

+

+#define FTDI_COMMAND_SETBAUD    3

+

+#define FTDI_COMMAND_SETDATA    4

+#define FTDI_SETDATA_BREAK      (0x1 << 14)

+

+#if 0

+#define FTDI_COMMAND_MODEMCTRL  	1

+#define FTDI_COMMAND_GETMODEMSTATUS       5 /* Retrieve current value of modem status register */

+#define FTDI_COMMAND_SETEVENTCHAR         6 /* Set the event character */

+#define FTDI_COMMAND_SETERRORCHAR         7 /* Set the error character */

+#define FTDI_COMMAND_SETLATENCYTIMER      9 /* Set the latency timer */

+#define FTDI_COMMAND_GETLATENCYTIMER      10 /* Get the latency timer */

+#endif

+

+/*

+ * DATA FORMAT

+ *

+ * IN Endpoint

+ *

+ * The device reserves the first two bytes of data on this endpoint to contain

+ * the current values of the modem and line status registers. In the absence of

+ * data, the device generates a message consisting of these two status bytes

+ * every 40 ms

+ *

+ * Byte 0: Modem Status

+ *

+ * Offset       Description

+ * B0   Reserved - must be 1

+ * B1   Reserved - must be 0

+ * B2   Reserved - must be 0

+ * B3   Reserved - must be 0

+ * B4   Clear to Send (CTS)

+ * B5   Data Set Ready (DSR)

+ * B6   Ring Indicator (RI)

+ * B7   Receive Line Signal Detect (RLSD)

+ *

+ * Byte 1: Line Status

+ *

+ * Offset       Description

+ * B0   Data Ready (DR)

+ * B1   Overrun Error (OE)

+ * B2   Parity Error (PE)

+ * B3   Framing Error (FE)

+ * B4   Break Interrupt (BI)

+ * B5   Transmitter Holding Register (THRE)

+ * B6   Transmitter Empty (TEMT)

+ * B7   Error in RCVR FIFO

+ *

+ */

+#define FTDI_RS0_CTS    (1 << 4)

+#define FTDI_RS0_DSR    (1 << 5)

+#define FTDI_RS0_RI     (1 << 6)

+#define FTDI_RS0_RLSD   (1 << 7)

+

+#define FTDI_RS_DR      1

+#define FTDI_RS_OE      (1<<1)

+#define FTDI_RS_PE      (1<<2)

+#define FTDI_RS_FE      (1<<3)

+#define FTDI_RS_BI      (1<<4)

+#define FTDI_RS_THRE    (1<<5)

+#define FTDI_RS_TEMT    (1<<6)

+#define FTDI_RS_FIFO    (1<<7)

+

+

+static usbh_urbstatus_t _ftdi_port_control(USBHFTDIPortDriver *ftdipp,

+		uint8_t bRequest, uint8_t wValue, uint8_t bHIndex, uint16_t wLength,

+		uint8_t *buff) {

+

+	static const uint8_t bmRequestType[] = {

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE, //0 FTDI_COMMAND_RESET

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE, //1 FTDI_COMMAND_MODEMCTRL

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE, //2 FTDI_COMMAND_SETFLOW

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE, //3 FTDI_COMMAND_SETBAUD

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE, //4 FTDI_COMMAND_SETDATA

+	};

+

+	osalDbgCheck(bRequest < sizeof_array(bmRequestType));

+	osalDbgCheck(bRequest != 1);

+

+	const USBH_DEFINE_BUFFER(usbh_control_request_t, req) = {

+			bmRequestType[bRequest],

+			bRequest,

+			wValue,

+			(bHIndex << 8) | (ftdipp->ifnum + 1),

+			wLength

+	};

+

+	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, buff, NULL, MS2ST(1000));

+}

+

+static uint32_t _get_divisor(uint32_t baud, usbhftdi_type_t type) {

+	static const uint8_t divfrac[8] = {0, 3, 2, 4, 1, 5, 6, 7};

+	uint32_t divisor;

+

+	if (type == USBHFTDI_TYPE_A) {

+		uint32_t divisor3 = ((48000000UL / 2) + baud / 2) / baud;

+		uinfof("FTDI: desired=%dbps, real=%dbps", baud, (48000000UL / 2) / divisor3);

+		if ((divisor3 & 0x7) == 7)

+			divisor3++; /* round x.7/8 up to x+1 */

+

+		divisor = divisor3 >> 3;

+	    divisor3 &= 0x7;

+		if (divisor3 == 1)

+			divisor |= 0xc000;

+		else if (divisor3 >= 4)

+			divisor |= 0x4000;

+		else if (divisor3 != 0)

+			divisor |= 0x8000;

+		else if (divisor == 1)

+			divisor = 0;    /* special case for maximum baud rate */

+	} else {

+		if (type == USBHFTDI_TYPE_B) {

+			divisor = ((48000000UL / 2) + baud / 2) / baud;

+			uinfof("FTDI: desired=%dbps, real=%dbps", baud, (48000000UL / 2) / divisor);

+		} else {

+			/* hi-speed baud rate is 10-bit sampling instead of 16-bit */

+			if (baud < 1200)

+				baud = 1200;

+			divisor = (120000000UL * 8 + baud * 5) / (baud * 10);

+			uinfof("FTDI: desired=%dbps, real=%dbps", baud, (120000000UL * 8) / divisor / 10);

+		}

+		divisor = (divisor >> 3) | (divfrac[divisor & 0x7] << 14);

+

+		/* Deal with special cases for highest baud rates. */

+		if (divisor == 1)

+			divisor = 0;

+		else if (divisor == 0x4001)

+			divisor = 1;

+

+		if (type == USBHFTDI_TYPE_H)

+			divisor |= 0x00020000;

+	}

+	return divisor;

+}

+

+static usbh_urbstatus_t _set_baudrate(USBHFTDIPortDriver *ftdipp, uint32_t baudrate) {

+	uint32_t divisor = _get_divisor(baudrate, ftdipp->ftdip->type);

+	uint16_t wValue = (uint16_t)divisor;

+	uint16_t wIndex = (uint16_t)(divisor >> 16);

+	if (ftdipp->ftdip->dev->basicConfigDesc.bNumInterfaces > 1)

+		wIndex = (wIndex << 8) | (ftdipp->ifnum + 1);

+

+	const USBH_DEFINE_BUFFER(usbh_control_request_t, req) = {

+		USBH_REQTYPE_VENDOR | USBH_REQTYPE_OUT | USBH_REQTYPE_DEVICE,

+		FTDI_COMMAND_SETBAUD,

+		wValue,

+		wIndex,

+		0

+	};

+	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, NULL, NULL, MS2ST(1000));

+}

+

+

+static void _submitOutI(USBHFTDIPortDriver *ftdipp, uint32_t len) {

+	udbgf("FTDI: Submit OUT %d", len);

+	ftdipp->oq_urb.requestedLength = len;

+	usbhURBObjectResetI(&ftdipp->oq_urb);

+	usbhURBSubmitI(&ftdipp->oq_urb);

+}

+

+static void _out_cb(usbh_urb_t *urb) {

+	USBHFTDIPortDriver *const ftdipp = (USBHFTDIPortDriver *)urb->userData;

+	switch (urb->status) {

+	case USBH_URBSTATUS_OK:

+		ftdipp->oq_ptr = ftdipp->oq_buff;

+		ftdipp->oq_counter = 64;

+		chThdDequeueNextI(&ftdipp->oq_waiting, Q_OK);

+		return;

+	case USBH_URBSTATUS_DISCONNECTED:

+		uwarn("FTDI: URB OUT disconnected");

+		chThdDequeueNextI(&ftdipp->oq_waiting, Q_RESET);

+		return;

+	default:

+		uerrf("FTDI: URB OUT status unexpected = %d", urb->status);

+		break;

+	}

+	usbhURBObjectResetI(&ftdipp->oq_urb);

+	usbhURBSubmitI(&ftdipp->oq_urb);

+}

+

+static size_t _write_timeout(USBHFTDIPortDriver *ftdipp, const uint8_t *bp,

+		size_t n, systime_t timeout) {

+	chDbgCheck(n > 0U);

+

+	size_t w = 0;

+	chSysLock();

+	while (true) {

+		if (ftdipp->state != USBHFTDIP_STATE_READY) {

+			chSysUnlock();

+			return w;

+		}

+		while (usbhURBIsBusy(&ftdipp->oq_urb)) {

+			if (chThdEnqueueTimeoutS(&ftdipp->oq_waiting, timeout) != Q_OK) {

+				chSysUnlock();

+				return w;

+			}

+		}

+

+		*ftdipp->oq_ptr++ = *bp++;

+		if (--ftdipp->oq_counter == 0) {

+			_submitOutI(ftdipp, 64);

+			chSchRescheduleS();

+		}

+		chSysUnlock(); /* Gives a preemption chance in a controlled point.*/

+

+		w++;

+		if (--n == 0U)

+			return w;

+

+		chSysLock();

+	}

+}

+

+static msg_t _put_timeout(USBHFTDIPortDriver *ftdipp, uint8_t b, systime_t timeout) {

+

+	chSysLock();

+	if (ftdipp->state != USBHFTDIP_STATE_READY) {

+		chSysUnlock();

+		return Q_RESET;

+	}

+

+	while (usbhURBIsBusy(&ftdipp->oq_urb)) {

+		msg_t msg = chThdEnqueueTimeoutS(&ftdipp->oq_waiting, timeout);

+		if (msg < Q_OK) {

+			chSysUnlock();

+			return msg;

+		}

+	}

+

+	*ftdipp->oq_ptr++ = b;

+	if (--ftdipp->oq_counter == 0) {

+		_submitOutI(ftdipp, 64);

+		chSchRescheduleS();

+	}

+	chSysUnlock();

+	return Q_OK;

+}

+

+static size_t _write(USBHFTDIPortDriver *ftdipp, const uint8_t *bp, size_t n) {

+	return _write_timeout(ftdipp, bp, n, TIME_INFINITE);

+}

+

+static msg_t _put(USBHFTDIPortDriver *ftdipp, uint8_t b) {

+	return _put_timeout(ftdipp, b, TIME_INFINITE);

+}

+

+static void _submitInI(USBHFTDIPortDriver *ftdipp) {

+	udbg("FTDI: Submit IN");

+	usbhURBObjectResetI(&ftdipp->iq_urb);

+	usbhURBSubmitI(&ftdipp->iq_urb);

+}

+

+static void _in_cb(usbh_urb_t *urb) {

+	USBHFTDIPortDriver *const ftdipp = (USBHFTDIPortDriver *)urb->userData;

+	switch (urb->status) {

+	case USBH_URBSTATUS_OK:

+		if (urb->actualLength < 2) {

+			uwarnf("FTDI: URB IN actualLength = %d, < 2", urb->actualLength);

+		} else if (urb->actualLength > 2) {

+			udbgf("FTDI: URB IN data len=%d, status=%02x %02x",

+					urb->actualLength - 2,

+					((uint8_t *)urb->buff)[0],

+					((uint8_t *)urb->buff)[1]);

+			ftdipp->iq_ptr = ftdipp->iq_buff + 2;

+			ftdipp->iq_counter = urb->actualLength - 2;

+			chThdDequeueNextI(&ftdipp->iq_waiting, Q_OK);

+			return;

+		} else {

+			udbgf("FTDI: URB IN no data, status=%02x %02x",

+					((uint8_t *)urb->buff)[0],

+					((uint8_t *)urb->buff)[1]);

+			return;

+		}

+		break;

+	case USBH_URBSTATUS_DISCONNECTED:

+		uwarn("FTDI: URB IN disconnected");

+		chThdDequeueNextI(&ftdipp->iq_waiting, Q_RESET);

+		return;

+	default:

+		uerrf("FTDI: URB IN status unexpected = %d", urb->status);

+		break;

+	}

+	_submitInI(ftdipp);

+}

+

+static size_t _read_timeout(USBHFTDIPortDriver *ftdipp, uint8_t *bp,

+		size_t n, systime_t timeout) {

+	size_t r = 0;

+

+	chDbgCheck(n > 0U);

+

+	chSysLock();

+	while (true) {

+		if (ftdipp->state != USBHFTDIP_STATE_READY) {

+			chSysUnlock();

+			return r;

+		}

+		while (ftdipp->iq_counter == 0) {

+			if (!usbhURBIsBusy(&ftdipp->iq_urb))

+				_submitInI(ftdipp);

+			if (chThdEnqueueTimeoutS(&ftdipp->iq_waiting, timeout) != Q_OK) {

+				chSysUnlock();

+				return r;

+			}

+		}

+		*bp++ = *ftdipp->iq_ptr++;

+		if (--ftdipp->iq_counter == 0) {

+			_submitInI(ftdipp);

+			chSchRescheduleS();

+		}

+		chSysUnlock();

+

+		r++;

+		if (--n == 0U)

+			return r;

+

+		chSysLock();

+	}

+}

+

+static msg_t _get_timeout(USBHFTDIPortDriver *ftdipp, systime_t timeout) {

+	uint8_t b;

+

+	chSysLock();

+	if (ftdipp->state != USBHFTDIP_STATE_READY) {

+		chSysUnlock();

+		return Q_RESET;

+	}

+	while (ftdipp->iq_counter == 0) {

+		if (!usbhURBIsBusy(&ftdipp->iq_urb))

+			_submitInI(ftdipp);

+		msg_t msg = chThdEnqueueTimeoutS(&ftdipp->iq_waiting, timeout);

+		if (msg < Q_OK) {

+			chSysUnlock();

+			return msg;

+		}

+	}

+	b = *ftdipp->iq_ptr++;

+	if (--ftdipp->iq_counter == 0) {

+		_submitInI(ftdipp);

+		chSchRescheduleS();

+	}

+	chSysUnlock();

+

+	return (msg_t)b;

+}

+

+static msg_t _get(USBHFTDIPortDriver *ftdipp) {

+	return _get_timeout(ftdipp, TIME_INFINITE);

+}

+

+static size_t _read(USBHFTDIPortDriver *ftdipp, uint8_t *bp, size_t n) {

+	return _read_timeout(ftdipp, bp, n, TIME_INFINITE);

+}

+

+static void _vt(void *p) {

+	USBHFTDIPortDriver *const ftdipp = (USBHFTDIPortDriver *)p;

+	chSysLockFromISR();

+	uint32_t len = ftdipp->oq_ptr - ftdipp->oq_buff;

+	if (len && !usbhURBIsBusy(&ftdipp->oq_urb)) {

+		_submitOutI(ftdipp, len);

+	}

+	if ((ftdipp->iq_counter == 0) && !usbhURBIsBusy(&ftdipp->iq_urb)) {

+		_submitInI(ftdipp);

+	}

+	chVTSetI(&ftdipp->vt, MS2ST(16), _vt, ftdipp);

+	chSysUnlockFromISR();

+}

+

+static const struct FTDIPortDriverVMT async_channel_vmt = {

+	(size_t (*)(void *, const uint8_t *, size_t))_write,

+	(size_t (*)(void *, uint8_t *, size_t))_read,

+	(msg_t (*)(void *, uint8_t))_put,

+	(msg_t (*)(void *))_get,

+	(msg_t (*)(void *, uint8_t, systime_t))_put_timeout,

+	(msg_t (*)(void *, systime_t))_get_timeout,

+	(size_t (*)(void *, const uint8_t *, size_t, systime_t))_write_timeout,

+	(size_t (*)(void *, uint8_t *, size_t, systime_t))_read_timeout

+};

+

+

+static void _stop(USBHFTDIPortDriver *ftdipp) {

+	osalSysLock();

+	chVTResetI(&ftdipp->vt);

+	usbhEPCloseS(&ftdipp->epin);

+	usbhEPCloseS(&ftdipp->epout);

+	chThdDequeueAllI(&ftdipp->iq_waiting, Q_RESET);

+	chThdDequeueAllI(&ftdipp->oq_waiting, Q_RESET);

+	osalOsRescheduleS();

+	ftdipp->state = USBHFTDIP_STATE_ACTIVE;

+	osalSysUnlock();

+}

+

+void usbhftdipStop(USBHFTDIPortDriver *ftdipp) {

+	osalDbgCheck((ftdipp->state == USBHFTDIP_STATE_ACTIVE)

+			|| (ftdipp->state == USBHFTDIP_STATE_READY));

+

+	if (ftdipp->state == USBHFTDIP_STATE_ACTIVE) {

+		return;

+	}

+

+	osalMutexLock(&ftdipp->ftdip->mtx);

+	_stop(ftdipp);

+	osalMutexUnlock(&ftdipp->ftdip->mtx);

+}

+

+void usbhftdipStart(USBHFTDIPortDriver *ftdipp, const USBHFTDIPortConfig *config) {

+	static const USBHFTDIPortConfig default_config = {

+		HAL_USBHFTDI_DEFAULT_SPEED,

+		HAL_USBHFTDI_DEFAULT_FRAMING,

+		HAL_USBHFTDI_DEFAULT_HANDSHAKE,

+		HAL_USBHFTDI_DEFAULT_XON,

+		HAL_USBHFTDI_DEFAULT_XOFF

+	};

+

+	osalDbgCheck((ftdipp->state == USBHFTDIP_STATE_ACTIVE)

+			|| (ftdipp->state == USBHFTDIP_STATE_READY));

+

+	if (ftdipp->state == USBHFTDIP_STATE_READY)

+		return;

+

+	osalMutexLock(&ftdipp->ftdip->mtx);

+	if (config == NULL)

+		config = &default_config;

+

+	uint16_t wValue = 0;

+	_ftdi_port_control(ftdipp, FTDI_COMMAND_RESET, FTDI_RESET_ALL, 0, 0, NULL);

+	_set_baudrate(ftdipp, config->speed);

+	_ftdi_port_control(ftdipp, FTDI_COMMAND_SETDATA, config->framing, 0, 0, NULL);

+	if (config->handshake & USBHFTDI_HANDSHAKE_XON_XOFF)

+		wValue = (config->xoff_character << 8) | config->xon_character;

+	_ftdi_port_control(ftdipp, FTDI_COMMAND_SETFLOW, wValue, config->handshake, 0, NULL);

+

+	usbhURBObjectInit(&ftdipp->oq_urb, &ftdipp->epout, _out_cb, ftdipp, ftdipp->oq_buff, 0);

+	chThdQueueObjectInit(&ftdipp->oq_waiting);

+	ftdipp->oq_counter = 64;

+	ftdipp->oq_ptr = ftdipp->oq_buff;

+	usbhEPOpen(&ftdipp->epout);

+

+	usbhURBObjectInit(&ftdipp->iq_urb, &ftdipp->epin, _in_cb, ftdipp, ftdipp->iq_buff, 64);

+	chThdQueueObjectInit(&ftdipp->iq_waiting);

+	ftdipp->iq_counter = 0;

+	ftdipp->iq_ptr = ftdipp->iq_buff;

+	usbhEPOpen(&ftdipp->epin);

+	osalSysLock();

+	usbhURBSubmitI(&ftdipp->iq_urb);

+	osalSysUnlock();

+

+	chVTObjectInit(&ftdipp->vt);

+	chVTSet(&ftdipp->vt, MS2ST(16), _vt, ftdipp);

+

+	ftdipp->state = USBHFTDIP_STATE_READY;

+	osalMutexUnlock(&ftdipp->ftdip->mtx);

+}

+

+void usbhftdiObjectInit(USBHFTDIDriver *ftdip) {

+	osalDbgCheck(ftdip != NULL);

+	memset(ftdip, 0, sizeof(*ftdip));

+	ftdip->info = &usbhftdiClassDriverInfo;

+	osalMutexObjectInit(&ftdip->mtx);

+}

+

+void usbhftdipObjectInit(USBHFTDIPortDriver *ftdipp) {

+	osalDbgCheck(ftdipp != NULL);

+	memset(ftdipp, 0, sizeof(*ftdipp));

+	ftdipp->vmt = &async_channel_vmt;

+	ftdipp->state = USBHFTDIP_STATE_STOP;

+}

+

+#endif

diff --git a/os/hal/src/usbh/usbh_hub.c b/os/hal/src/usbh/usbh_hub.c
new file mode 100644
index 0000000..eb585d2
--- /dev/null
+++ b/os/hal/src/usbh/usbh_hub.c
@@ -0,0 +1,302 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+#include "usbh.h"

+#include "usbh/internal.h"

+

+#if HAL_USBH_USE_HUB

+

+#if !HAL_USE_USBH

+#error "USBHHUB needs HAL_USE_USBH"

+#endif

+

+#include <string.h>

+#include "usbh/dev/hub.h"

+

+#if USBHHUB_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBHHUB_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBHHUB_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBHHUB_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+

+USBHHubDriver USBHHUBD[HAL_USBHHUB_MAX_INSTANCES];

+usbh_port_t USBHPorts[HAL_USBHHUB_MAX_PORTS];

+

+static usbh_baseclassdriver_t *hub_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem);

+static void hub_unload(usbh_baseclassdriver_t *drv);

+static const usbh_classdriver_vmt_t usbhhubClassDriverVMT = {

+	hub_load,

+	hub_unload

+};

+const usbh_classdriverinfo_t usbhhubClassDriverInfo = {

+	0x09, 0x00, -1, "HUB", &usbhhubClassDriverVMT

+};

+

+

+void _usbhub_port_object_init(usbh_port_t *port, USBHDriver *usbh,

+		USBHHubDriver *hub, uint8_t number) {

+	memset(port, 0, sizeof(*port));

+	port->number = number;

+	port->device.host = usbh;

+	port->hub = hub;

+}

+

+usbh_urbstatus_t usbhhubControlRequest(USBHDriver *host, USBHHubDriver *hub,

+											uint8_t bmRequestType,

+											uint8_t bRequest,

+											uint16_t wValue,

+											uint16_t wIndex,

+											uint16_t wLength,

+											uint8_t *buf) {

+	if (hub == NULL)

+		return usbh_lld_root_hub_request(host, bmRequestType, bRequest, wValue, wIndex, wLength, buf);

+

+	return usbhControlRequest(hub->dev,

+			bmRequestType, bRequest, wValue, wIndex, wLength, buf);

+}

+

+

+static void _urb_complete(usbh_urb_t *urb) {

+

+	USBHHubDriver *const hubdp = (USBHHubDriver *)urb->userData;

+	switch (urb->status) {

+	case USBH_URBSTATUS_TIMEOUT:

+		/* the device NAKed */

+		udbg("HUB: no info");

+		hubdp->statuschange = 0;

+		break;

+	case USBH_URBSTATUS_OK: {

+		uint8_t len = hubdp->hubDesc.bNbrPorts / 8 + 1;

+		if (urb->actualLength != len) {

+			uwarnf("Expected %d status change bytes but got %d", len, urb->actualLength);

+		}

+

+		if (urb->actualLength < len)

+			len = urb->actualLength;

+

+		if (len > 4)

+			len = 4;

+

+		uint8_t *sc = (uint8_t *)&hubdp->statuschange;

+		uint8_t *r = hubdp->scbuff;

+		while (len--)

+			*sc++ |= *r++;

+

+		uinfof("HUB: change, %08x", hubdp->statuschange);

+	}	break;

+	case USBH_URBSTATUS_DISCONNECTED:

+		uwarn("HUB: URB disconnected, aborting poll");

+		return;

+	default:

+		uerrf("HUB: URB status unexpected = %d", urb->status);

+		break;

+	}

+

+	usbhURBObjectResetI(urb);

+	usbhURBSubmitI(urb);

+}

+

+static usbh_baseclassdriver_t *hub_load(usbh_device_t *dev,

+		const uint8_t *descriptor, uint16_t rem) {

+	int i;

+

+	USBHHubDriver *hubdp;

+

+	if ((rem < descriptor[0]) || (descriptor[1] != USBH_DT_DEVICE))

+		return NULL;

+

+	if (dev->devDesc.bDeviceProtocol != 0)

+		return NULL;

+

+	generic_iterator_t iep, icfg;

+	if_iterator_t iif;

+

+	cfg_iter_init(&icfg, dev->fullConfigurationDescriptor,

+			dev->basicConfigDesc.wTotalLength);

+

+	if_iter_init(&iif, &icfg);

+	if (!iif.valid)

+		return NULL;

+	const usbh_interface_descriptor_t *const ifdesc = if_get(&iif);

+	if ((ifdesc->bInterfaceClass != 0x09)

+		|| (ifdesc->bInterfaceSubClass != 0x00)

+		|| (ifdesc->bInterfaceProtocol != 0x00)) {

+		return NULL;

+	}

+

+	ep_iter_init(&iep, &iif);

+	if (!iep.valid)

+		return NULL;

+	const usbh_endpoint_descriptor_t *const epdesc = ep_get(&iep);

+	if ((epdesc->bmAttributes & 0x03) != USBH_EPTYPE_INT) {

+		return NULL;

+	}

+

+

+	/* alloc driver */

+	for (i = 0; i < HAL_USBHHUB_MAX_INSTANCES; i++) {

+		if (USBHHUBD[i].dev == NULL) {

+			hubdp = &USBHHUBD[i];

+			goto alloc_ok;

+		}

+	}

+

+	uwarn("Can't alloc HUB driver");

+

+	/* can't alloc */

+	return NULL;

+

+alloc_ok:

+	/* initialize the driver's variables */

+	hubdp->epint.status = USBH_EPSTATUS_UNINITIALIZED;

+	hubdp->dev = dev;

+	hubdp->ports = 0;

+

+	usbhEPSetName(&dev->ctrl, "HUB[CTRL]");

+

+	/* read Hub descriptor */

+	uinfo("Read Hub descriptor");

+	if (usbhhubControlRequest(dev->host, hubdp,

+			USBH_REQTYPE_IN | USBH_REQTYPE_CLASS | USBH_REQTYPE_DEVICE,

+			USBH_REQ_GET_DESCRIPTOR,

+			(USBH_DT_HUB << 8), 0, sizeof(hubdp->hubDesc),

+			(uint8_t *)&hubdp->hubDesc) != USBH_URBSTATUS_OK) {

+		hubdp->dev = NULL;

+		return NULL;

+	}

+

+	const usbh_hub_descriptor_t *const hubdesc = &hubdp->hubDesc;

+

+	uinfof("Hub descriptor loaded; %d ports, wHubCharacteristics=%04x, bPwrOn2PwrGood=%d, bHubContrCurrent=%d",

+			hubdesc->bNbrPorts,

+			hubdesc->wHubCharacteristics,

+			hubdesc->bPwrOn2PwrGood,

+			hubdesc->bHubContrCurrent);

+

+	/* Alloc ports */

+	uint8_t ports = hubdesc->bNbrPorts;

+	for (i = 0; (ports > 0) && (i < HAL_USBHHUB_MAX_PORTS); i++) {

+		if (USBHPorts[i].hub == NULL) {

+			uinfof("Alloc port %d", ports);

+			_usbhub_port_object_init(&USBHPorts[i], dev->host, hubdp, ports);

+			USBHPorts[i].next = hubdp->ports;

+			hubdp->ports = &USBHPorts[i];

+			--ports;

+		}

+	}

+

+	if (ports) {

+		uwarn("Could not alloc all ports");

+	}

+

+	/* link hub to the host's list */

+	list_add_tail(&hubdp->node, &dev->host->hubs);

+

+	/* enable power to ports */

+	usbh_port_t *port = hubdp->ports;

+	while (port) {

+		uinfof("Enable power for port %d", port->number);

+		usbhhubSetFeaturePort(port, USBH_PORT_FEAT_POWER);

+		port = port->next;

+	}

+

+	if (hubdesc->bPwrOn2PwrGood)

+		osalThreadSleepMilliseconds(2 * hubdesc->bPwrOn2PwrGood);

+

+	/* initialize the status change endpoint and trigger the first transfer */

+	usbhEPObjectInit(&hubdp->epint, dev, epdesc);

+	usbhEPSetName(&hubdp->epint, "HUB[INT ]");

+	usbhEPOpen(&hubdp->epint);

+

+	usbhURBObjectInit(&hubdp->urb, &hubdp->epint,

+			_urb_complete, hubdp, hubdp->scbuff,

+			(hubdesc->bNbrPorts + 8) / 8);

+

+	osalSysLock();

+	usbhURBSubmitI(&hubdp->urb);

+	osalOsRescheduleS();

+	osalSysUnlock();

+

+	return (usbh_baseclassdriver_t *)hubdp;

+}

+

+static void hub_unload(usbh_baseclassdriver_t *drv) {

+	osalDbgCheck(drv != NULL);

+	USBHHubDriver *const hubdp = (USBHHubDriver *)drv;

+

+	/* close the status change endpoint (this cancels ongoing URBs) */

+	osalSysLock();

+	usbhEPCloseS(&hubdp->epint);

+	osalSysUnlock();

+

+	/* de-alloc ports and unload drivers */

+	usbh_port_t *port = hubdp->ports;

+	while (port) {

+		_usbh_port_disconnected(port);

+		port->hub = NULL;

+		port = port->next;

+	}

+

+	/* unlink the hub from the host's list */

+	list_del(&hubdp->node);

+

+}

+

+void usbhhubObjectInit(USBHHubDriver *hubdp) {

+	osalDbgCheck(hubdp != NULL);

+	memset(hubdp, 0, sizeof(*hubdp));

+	hubdp->info = &usbhhubClassDriverInfo;

+}

+#else

+

+#if HAL_USE_USBH

+void _usbhub_port_object_init(usbh_port_t *port, USBHDriver *usbh, uint8_t number) {

+	memset(port, 0, sizeof(*port));

+	port->number = number;

+	port->device.host = usbh;

+}

+#endif

+

+#endif

diff --git a/os/hal/src/usbh/usbh_msd.c b/os/hal/src/usbh/usbh_msd.c
new file mode 100644
index 0000000..8db68a4
--- /dev/null
+++ b/os/hal/src/usbh/usbh_msd.c
@@ -0,0 +1,939 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+#include "usbh.h"

+

+#if HAL_USBH_USE_MSD

+

+#if !HAL_USE_USBH

+#error "USBHMSD needs USBH"

+#endif

+

+#include <string.h>

+#include "usbh/dev/msd.h"

+#include "usbh/internal.h"

+

+//#pragma GCC optimize("Og")

+

+

+#if USBHMSD_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBHMSD_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBHMSD_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBHMSD_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+

+

+

+

+/*===========================================================================*/

+/* USB Class driver loader for MSD								 		 	 */

+/*===========================================================================*/

+

+USBHMassStorageDriver USBHMSD[HAL_USBHMSD_MAX_INSTANCES];

+

+static usbh_baseclassdriver_t *_msd_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem);

+static void _msd_unload(usbh_baseclassdriver_t *drv);

+

+static const usbh_classdriver_vmt_t class_driver_vmt = {

+	_msd_load,

+	_msd_unload

+};

+

+const usbh_classdriverinfo_t usbhmsdClassDriverInfo = {

+	0x08, 0x06, 0x50, "MSD", &class_driver_vmt

+};

+

+#define MSD_REQ_RESET							0xFF

+#define MSD_GET_MAX_LUN							0xFE

+

+static usbh_baseclassdriver_t *_msd_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem) {

+	int i;

+	USBHMassStorageDriver *msdp;

+	uint8_t luns; // should declare it here to eliminate 'control bypass initialization' warning

+	usbh_urbstatus_t stat;  // should declare it here to eliminate 'control bypass initialization' warning

+

+	if ((rem < descriptor[0]) || (descriptor[1] != USBH_DT_INTERFACE))

+		return NULL;

+

+	const usbh_interface_descriptor_t * const ifdesc = (const usbh_interface_descriptor_t *)descriptor;

+

+	if ((ifdesc->bAlternateSetting != 0)

+			|| (ifdesc->bNumEndpoints < 2)

+			|| (ifdesc->bInterfaceSubClass != 0x06)

+			|| (ifdesc->bInterfaceProtocol != 0x50)) {

+		return NULL;

+	}

+

+	/* alloc driver */

+	for (i = 0; i < HAL_USBHMSD_MAX_INSTANCES; i++) {

+		if (USBHMSD[i].dev == NULL) {

+			msdp = &USBHMSD[i];

+			goto alloc_ok;

+		}

+	}

+

+	uwarn("Can't alloc MSD driver");

+

+	/* can't alloc */

+	return NULL;

+

+alloc_ok:

+	/* initialize the driver's variables */

+	msdp->epin.status = USBH_EPSTATUS_UNINITIALIZED;

+	msdp->epout.status = USBH_EPSTATUS_UNINITIALIZED;

+	msdp->max_lun = 0;

+	msdp->tag = 0;

+	msdp->luns = 0;

+	msdp->ifnum = ifdesc->bInterfaceNumber;

+	usbhEPSetName(&dev->ctrl, "MSD[CTRL]");

+

+	/* parse the configuration descriptor */

+	if_iterator_t iif;

+	generic_iterator_t iep;

+	iif.iad = 0;

+	iif.curr = descriptor;

+	iif.rem = rem;

+	for (ep_iter_init(&iep, &iif); iep.valid; ep_iter_next(&iep)) {

+		const usbh_endpoint_descriptor_t *const epdesc = ep_get(&iep);

+		if ((epdesc->bEndpointAddress & 0x80) && (epdesc->bmAttributes == USBH_EPTYPE_BULK)) {

+			uinfof("BULK IN endpoint found: bEndpointAddress=%02x", epdesc->bEndpointAddress);

+			usbhEPObjectInit(&msdp->epin, dev, epdesc);

+			usbhEPSetName(&msdp->epin, "MSD[BIN ]");

+		} else if (((epdesc->bEndpointAddress & 0x80) == 0)

+				&& (epdesc->bmAttributes == USBH_EPTYPE_BULK)) {

+			uinfof("BULK OUT endpoint found: bEndpointAddress=%02x", epdesc->bEndpointAddress);

+			usbhEPObjectInit(&msdp->epout, dev, epdesc);

+			usbhEPSetName(&msdp->epout, "MSD[BOUT]");

+		} else {

+			uinfof("unsupported endpoint found: bEndpointAddress=%02x, bmAttributes=%02x",

+					epdesc->bEndpointAddress, epdesc->bmAttributes);

+		}

+	}

+	if ((msdp->epin.status != USBH_EPSTATUS_CLOSED) || (msdp->epout.status != USBH_EPSTATUS_CLOSED)) {

+		goto deinit;

+	}

+

+	/* read the number of LUNs */

+	uinfo("Reading Max LUN:");

+	USBH_DEFINE_BUFFER(uint8_t, buff[4]);

+	stat = usbhControlRequest(dev,

+			USBH_CLASSIN(USBH_REQTYPE_INTERFACE, MSD_GET_MAX_LUN, 0, msdp->ifnum),

+			1, buff);

+	if (stat == USBH_URBSTATUS_OK) {

+		msdp->max_lun = buff[0] + 1;

+		uinfof("\tmax_lun = %d", msdp->max_lun);

+		if (msdp->max_lun > HAL_USBHMSD_MAX_LUNS) {

+			msdp->max_lun = HAL_USBHMSD_MAX_LUNS;

+			uwarnf("\tUsing max_lun = %d", msdp->max_lun);

+		}

+	} else if (stat == USBH_URBSTATUS_STALL) {

+		uwarn("\tStall, max_lun = 1");

+		msdp->max_lun = 1;

+	} else {

+		uerr("\tError");

+		goto deinit;

+	}

+

+	/* open the bulk IN/OUT endpoints */

+	usbhEPOpen(&msdp->epin);

+	usbhEPOpen(&msdp->epout);

+

+	/* Alloc one block device per logical unit found */

+	luns = msdp->max_lun;

+	for (i = 0; (luns > 0) && (i < HAL_USBHMSD_MAX_LUNS); i++) {

+		if (MSBLKD[i].msdp == NULL) {

+			/* link the new block driver to the list */

+			MSBLKD[i].next = msdp->luns;

+			msdp->luns = &MSBLKD[i];

+			MSBLKD[i].msdp = msdp;

+

+			osalSysLock();

+			MSBLKD[i].state = BLK_ACTIVE;	/* transition directly to active, instead of BLK_STOP */

+			osalSysUnlock();

+

+			/* connect the LUN (TODO: review if it's best to leave the LUN disconnected) */

+			usbhmsdLUNConnect(&MSBLKD[i]);

+			luns--;

+		}

+	}

+

+	return (usbh_baseclassdriver_t *)msdp;

+

+deinit:

+	/* Here, the enpoints are closed, and the driver is unlinked */

+	return NULL;

+}

+

+static void _msd_unload(usbh_baseclassdriver_t *drv) {

+	osalDbgCheck(drv != NULL);

+	USBHMassStorageDriver *const msdp = (USBHMassStorageDriver *)drv;

+	USBHMassStorageLUNDriver *lunp = msdp->luns;

+

+	osalMutexLock(&msdp->mtx);

+	osalSysLock();

+	usbhEPCloseS(&msdp->epin);

+	usbhEPCloseS(&msdp->epout);

+	while (lunp) {

+		lunp->state = BLK_STOP;

+		lunp = lunp->next;

+	}

+	osalSysUnlock();

+	osalMutexUnlock(&msdp->mtx);

+

+	/* now that the LUNs are idle, deinit them */

+	lunp = msdp->luns;

+	osalSysLock();

+	while (lunp) {

+		usbhmsdLUNObjectInit(lunp);

+		lunp = lunp->next;

+	}

+	osalSysUnlock();

+}

+

+

+/*===========================================================================*/

+/* MSD Class driver operations (Bulk-Only transport)			 		 	 */

+/*===========================================================================*/

+

+

+

+/* USB Bulk Only Transport SCSI Command block wrapper */

+PACKED_STRUCT {

+	uint32_t dCBWSignature;

+	uint32_t dCBWTag;

+	uint32_t dCBWDataTransferLength;

+	uint8_t bmCBWFlags;

+	uint8_t bCBWLUN;

+	uint8_t bCBWCBLength;

+	uint8_t CBWCB[16];

+} msd_cbw_t;

+#define MSD_CBW_SIGNATURE						0x43425355

+#define MSD_CBWFLAGS_D2H						0x80

+#define MSD_CBWFLAGS_H2D						0x00

+

+

+/* USB Bulk Only Transport SCSI Command status wrapper */

+PACKED_STRUCT {

+	uint32_t dCSWSignature;

+	uint32_t dCSWTag;

+	uint32_t dCSWDataResidue;

+	uint8_t bCSWStatus;

+} msd_csw_t;

+#define MSD_CSW_SIGNATURE						0x53425355

+

+

+typedef union {

+	msd_cbw_t cbw;

+	msd_csw_t csw;

+} msd_transaction_t;

+

+typedef enum {

+	MSD_TRANSACTIONRESULT_OK,

+	MSD_TRANSACTIONRESULT_DISCONNECTED,

+	MSD_TRANSACTIONRESULT_STALL,

+	MSD_TRANSACTIONRESULT_BUS_ERROR,

+	MSD_TRANSACTIONRESULT_SYNC_ERROR

+} msd_transaction_result_t;

+

+typedef enum {

+	MSD_COMMANDRESULT_PASSED = 0,

+	MSD_COMMANDRESULT_FAILED = 1,

+	MSD_COMMANDRESULT_PHASE_ERROR = 2

+} msd_command_result_t;

+

+typedef struct {

+	msd_transaction_result_t tres;

+	msd_command_result_t cres;

+} msd_result_t;

+

+

+/* ----------------------------------------------------- */

+/* 			SCSI Commands 								*/

+/* ----------------------------------------------------- */

+

+/* Read 10 and Write 10 */

+#define SCSI_CMD_READ_10 						0x28

+#define SCSI_CMD_WRITE_10						0x2A

+

+/* Request sense */

+#define SCSI_CMD_REQUEST_SENSE 					0x03

+PACKED_STRUCT {

+	uint8_t byte[18];

+} scsi_sense_response_t;

+

+#define SCSI_SENSE_KEY_GOOD                     0x00

+#define SCSI_SENSE_KEY_RECOVERED_ERROR          0x01

+#define SCSI_SENSE_KEY_NOT_READY                0x02

+#define SCSI_SENSE_KEY_MEDIUM_ERROR             0x03

+#define SCSI_SENSE_KEY_HARDWARE_ERROR           0x04

+#define SCSI_SENSE_KEY_ILLEGAL_REQUEST          0x05

+#define SCSI_SENSE_KEY_UNIT_ATTENTION           0x06

+#define SCSI_SENSE_KEY_DATA_PROTECT             0x07

+#define SCSI_SENSE_KEY_BLANK_CHECK              0x08

+#define SCSI_SENSE_KEY_VENDOR_SPECIFIC          0x09

+#define SCSI_SENSE_KEY_COPY_ABORTED             0x0A

+#define SCSI_SENSE_KEY_ABORTED_COMMAND          0x0B

+#define SCSI_SENSE_KEY_VOLUME_OVERFLOW          0x0D

+#define SCSI_SENSE_KEY_MISCOMPARE               0x0E

+#define SCSI_ASENSE_NO_ADDITIONAL_INFORMATION   0x00

+#define SCSI_ASENSE_LOGICAL_UNIT_NOT_READY      0x04

+#define SCSI_ASENSE_INVALID_FIELD_IN_CDB        0x24

+#define SCSI_ASENSE_NOT_READY_TO_READY_CHANGE   0x28

+#define SCSI_ASENSE_WRITE_PROTECTED             0x27

+#define SCSI_ASENSE_FORMAT_ERROR                0x31

+#define SCSI_ASENSE_INVALID_COMMAND             0x20

+#define SCSI_ASENSE_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21

+#define SCSI_ASENSE_MEDIUM_NOT_PRESENT                 0x3A

+#define SCSI_ASENSEQ_NO_QUALIFIER                      0x00

+#define SCSI_ASENSEQ_FORMAT_COMMAND_FAILED             0x01

+#define SCSI_ASENSEQ_INITIALIZING_COMMAND_REQUIRED     0x02

+#define SCSI_ASENSEQ_OPERATION_IN_PROGRESS             0x07

+

+/* Inquiry */

+#define SCSI_CMD_INQUIRY 						0x12

+PACKED_STRUCT {

+	uint8_t peripheral;

+	uint8_t removable;

+	uint8_t version;

+	uint8_t response_data_format;

+	uint8_t additional_length;

+	uint8_t sccstp;

+	uint8_t bqueetc;

+	uint8_t cmdque;

+	uint8_t vendorID[8];

+	uint8_t productID[16];

+	uint8_t productRev[4];

+} scsi_inquiry_response_t;

+

+/* Read Capacity 10 */

+#define SCSI_CMD_READ_CAPACITY_10				0x25

+PACKED_STRUCT {

+	uint32_t last_block_addr;

+	uint32_t block_size;

+} scsi_readcapacity10_response_t;

+

+/* Start/Stop Unit */

+#define SCSI_CMD_START_STOP_UNIT				0x1B

+PACKED_STRUCT {

+	uint8_t op_code;

+	uint8_t lun_immed;

+	uint8_t res1;

+	uint8_t res2;

+	uint8_t loej_start;

+	uint8_t control;

+} scsi_startstopunit_request_t;

+

+/* test unit ready */

+#define SCSI_CMD_TEST_UNIT_READY				0x00

+

+/* Other commands, TODO: use or remove them

+#define SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL	0x1E

+#define SCSI_CMD_VERIFY_10						0x2F

+#define SCSI_CMD_SEND_DIAGNOSTIC				0x1D

+#define SCSI_CMD_MODE_SENSE_6                   0x1A

+*/

+

+static inline void _prepare_cbw(msd_transaction_t *tran, USBHMassStorageLUNDriver *lunp) {

+	tran->cbw.bCBWLUN = (uint8_t)(lunp - &lunp->msdp->luns[0]);

+	memset(&tran->cbw.CBWCB, 0, sizeof(tran->cbw.CBWCB));

+}

+

+static msd_transaction_result_t _msd_transaction(msd_transaction_t *tran, USBHMassStorageLUNDriver *lunp, void *data) {

+

+	uint32_t actual_len;

+	usbh_urbstatus_t status;

+

+	tran->cbw.dCBWSignature = MSD_CBW_SIGNATURE;

+	tran->cbw.dCBWTag = ++lunp->msdp->tag;

+

+	/* control phase */

+	status = usbhBulkTransfer(&lunp->msdp->epout, &tran->cbw,

+					sizeof(tran->cbw), &actual_len, MS2ST(1000));

+

+	if (status == USBH_URBSTATUS_CANCELLED) {

+		uerr("\tMSD: Control phase: USBH_URBSTATUS_CANCELLED");

+		return MSD_TRANSACTIONRESULT_DISCONNECTED;

+	} else if (status == USBH_URBSTATUS_STALL) {

+		uerr("\tMSD: Control phase: USBH_URBSTATUS_STALL");

+		return MSD_TRANSACTIONRESULT_STALL;

+	} else if (status != USBH_URBSTATUS_OK) {

+		uerrf("\tMSD: Control phase: status = %d, != OK", status);

+		return MSD_TRANSACTIONRESULT_BUS_ERROR;

+	} else if (actual_len != sizeof(tran->cbw)) {

+		uerrf("\tMSD: Control phase: wrong actual_len = %d", actual_len);

+		return MSD_TRANSACTIONRESULT_BUS_ERROR;

+	}

+

+

+	/* data phase */

+	if (tran->cbw.dCBWDataTransferLength) {

+		status = usbhBulkTransfer(

+				tran->cbw.bmCBWFlags & MSD_CBWFLAGS_D2H ? &lunp->msdp->epin : &lunp->msdp->epout,

+				data,

+				tran->cbw.dCBWDataTransferLength,

+				&actual_len, MS2ST(20000));

+

+		if (status == USBH_URBSTATUS_CANCELLED) {

+			uerr("\tMSD: Data phase: USBH_URBSTATUS_CANCELLED");

+			return MSD_TRANSACTIONRESULT_DISCONNECTED;

+		} else if (status == USBH_URBSTATUS_STALL) {

+			uerr("\tMSD: Data phase: USBH_URBSTATUS_STALL");

+			return MSD_TRANSACTIONRESULT_STALL;

+		} else if (status != USBH_URBSTATUS_OK) {

+			uerrf("\tMSD: Data phase: status = %d, != OK", status);

+			return MSD_TRANSACTIONRESULT_BUS_ERROR;

+		} else if (actual_len != tran->cbw.dCBWDataTransferLength) {

+			uerrf("\tMSD: Data phase: wrong actual_len = %d", actual_len);

+			return MSD_TRANSACTIONRESULT_BUS_ERROR;

+		}

+	}

+

+

+	/* status phase */

+	status = usbhBulkTransfer(&lunp->msdp->epin, &tran->csw,

+			sizeof(tran->csw), &actual_len, MS2ST(1000));

+

+	if (status == USBH_URBSTATUS_CANCELLED) {

+		uerr("\tMSD: Status phase: USBH_URBSTATUS_CANCELLED");

+		return MSD_TRANSACTIONRESULT_DISCONNECTED;

+	} else if (status == USBH_URBSTATUS_STALL) {

+		uerr("\tMSD: Status phase: USBH_URBSTATUS_STALL");

+		return MSD_TRANSACTIONRESULT_STALL;

+	} else if (status != USBH_URBSTATUS_OK) {

+		uerrf("\tMSD: Status phase: status = %d, != OK", status);

+		return MSD_TRANSACTIONRESULT_BUS_ERROR;

+	} else if (actual_len != sizeof(tran->csw)) {

+		uerrf("\tMSD: Status phase: wrong actual_len = %d", actual_len);

+		return MSD_TRANSACTIONRESULT_BUS_ERROR;

+	} else if (tran->csw.dCSWSignature != MSD_CSW_SIGNATURE) {

+		uerr("\tMSD: Status phase: wrong signature");

+		return MSD_TRANSACTIONRESULT_BUS_ERROR;

+	} else if (tran->csw.dCSWTag != lunp->msdp->tag) {

+		uerrf("\tMSD: Status phase: wrong tag (expected %d, got %d)",

+				lunp->msdp->tag, tran->csw.dCSWTag);

+		return MSD_TRANSACTIONRESULT_SYNC_ERROR;

+	}

+

+	if (tran->csw.dCSWDataResidue) {

+		uwarnf("\tMSD: Residue=%d", tran->csw.dCSWDataResidue);

+	}

+

+	return MSD_TRANSACTIONRESULT_OK;

+}

+

+

+static msd_result_t scsi_inquiry(USBHMassStorageLUNDriver *lunp, scsi_inquiry_response_t *resp) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = sizeof(scsi_inquiry_response_t);

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_D2H;

+	transaction.cbw.bCBWCBLength = 6;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_INQUIRY;

+	transaction.cbw.CBWCB[4] = sizeof(scsi_inquiry_response_t);

+

+	res.tres = _msd_transaction(&transaction, lunp, resp);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+static msd_result_t scsi_requestsense(USBHMassStorageLUNDriver *lunp, scsi_sense_response_t *resp) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = sizeof(scsi_sense_response_t);

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_D2H;

+	transaction.cbw.bCBWCBLength = 12;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_REQUEST_SENSE;

+	transaction.cbw.CBWCB[4] = sizeof(scsi_sense_response_t);

+

+	res.tres = _msd_transaction(&transaction, lunp, resp);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+static msd_result_t scsi_testunitready(USBHMassStorageLUNDriver *lunp) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = 0;

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_D2H;

+	transaction.cbw.bCBWCBLength = 6;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_TEST_UNIT_READY;

+

+	res.tres = _msd_transaction(&transaction, lunp, NULL);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+static msd_result_t scsi_readcapacity10(USBHMassStorageLUNDriver *lunp, scsi_readcapacity10_response_t *resp) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = sizeof(scsi_readcapacity10_response_t);

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_D2H;

+	transaction.cbw.bCBWCBLength = 12;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_READ_CAPACITY_10;

+

+	res.tres = _msd_transaction(&transaction, lunp, resp);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+

+static msd_result_t scsi_read10(USBHMassStorageLUNDriver *lunp, uint32_t lba, uint16_t n, uint8_t *data) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = n * lunp->info.blk_size;

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_D2H;

+	transaction.cbw.bCBWCBLength = 10;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_READ_10;

+	transaction.cbw.CBWCB[2] = (uint8_t)(lba >> 24);

+	transaction.cbw.CBWCB[3] = (uint8_t)(lba >> 16);

+	transaction.cbw.CBWCB[4] = (uint8_t)(lba >> 8);

+	transaction.cbw.CBWCB[5] = (uint8_t)(lba);

+	transaction.cbw.CBWCB[7] = (uint8_t)(n >> 8);

+	transaction.cbw.CBWCB[8] = (uint8_t)(n);

+

+	res.tres = _msd_transaction(&transaction, lunp, data);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+static msd_result_t scsi_write10(USBHMassStorageLUNDriver *lunp, uint32_t lba, uint16_t n, const uint8_t *data) {

+	msd_transaction_t transaction;

+	msd_result_t res;

+

+	_prepare_cbw(&transaction, lunp);

+	transaction.cbw.dCBWDataTransferLength = n * lunp->info.blk_size;

+	transaction.cbw.bmCBWFlags = MSD_CBWFLAGS_H2D;

+	transaction.cbw.bCBWCBLength = 10;

+	transaction.cbw.CBWCB[0] = SCSI_CMD_WRITE_10;

+	transaction.cbw.CBWCB[2] = (uint8_t)(lba >> 24);

+	transaction.cbw.CBWCB[3] = (uint8_t)(lba >> 16);

+	transaction.cbw.CBWCB[4] = (uint8_t)(lba >> 8);

+	transaction.cbw.CBWCB[5] = (uint8_t)(lba);

+	transaction.cbw.CBWCB[7] = (uint8_t)(n >> 8);

+	transaction.cbw.CBWCB[8] = (uint8_t)(n);

+

+	res.tres = _msd_transaction(&transaction, lunp, (uint8_t *)data);

+	if (res.tres == MSD_TRANSACTIONRESULT_OK) {

+		res.cres = (msd_command_result_t) transaction.csw.bCSWStatus;

+	}

+	return res;

+}

+

+

+

+/*===========================================================================*/

+/* Block driver data/functions								 		 	 	 */

+/*===========================================================================*/

+

+USBHMassStorageLUNDriver MSBLKD[HAL_USBHMSD_MAX_LUNS];

+

+static const struct USBHMassStorageDriverVMT blk_vmt = {

+	(bool (*)(void *))usbhmsdLUNIsInserted,

+	(bool (*)(void *))usbhmsdLUNIsProtected,

+	(bool (*)(void *))usbhmsdLUNConnect,

+	(bool (*)(void *))usbhmsdLUNDisconnect,

+	(bool (*)(void *, uint32_t, uint8_t *, uint32_t))usbhmsdLUNRead,

+	(bool (*)(void *, uint32_t,	const uint8_t *, uint32_t))usbhmsdLUNWrite,

+	(bool (*)(void *))usbhmsdLUNSync,

+	(bool (*)(void *, BlockDeviceInfo *))usbhmsdLUNGetInfo

+};

+

+

+

+static uint32_t _requestsense(USBHMassStorageLUNDriver *lunp) {

+	scsi_sense_response_t sense;

+	msd_result_t res;

+

+	res = scsi_requestsense(lunp, &sense);

+	if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+		uerr("\tREQUEST SENSE: Transaction error");

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+		uerr("\tREQUEST SENSE: Command Failed");

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+		//TODO: Do reset, etc.

+		uerr("\tREQUEST SENSE: Command Phase Error");

+		goto failed;

+	}

+

+	uerrf("\tREQUEST SENSE: Sense key=%x, ASC=%02x, ASCQ=%02x",

+			sense.byte[2] & 0xf, sense.byte[12], sense.byte[13]);

+

+	return (sense.byte[2] & 0xf) | (sense.byte[12] << 8) | (sense.byte[13] << 16);

+

+failed:

+	return 0xffffffff;

+}

+

+void usbhmsdLUNObjectInit(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	memset(lunp, 0, sizeof(*lunp));

+	lunp->vmt = &blk_vmt;

+	lunp->state = BLK_STOP;

+	/* Unnecessary because of the memset:

+		lunp->msdp = NULL;

+		lunp->next = NULL;

+		lunp->info.* = 0;

+	*/

+}

+

+void usbhmsdLUNStart(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	osalSysLock();

+	osalDbgAssert((lunp->state == BLK_STOP) || (lunp->state == BLK_ACTIVE),

+			"invalid state");

+	//TODO: complete

+	//lunp->state = BLK_ACTIVE;

+	osalSysUnlock();

+}

+

+void usbhmsdLUNStop(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	osalSysLock();

+	osalDbgAssert((lunp->state == BLK_STOP) || (lunp->state == BLK_ACTIVE),

+			"invalid state");

+	//TODO: complete

+	//lunp->state = BLK_STOP;

+	osalSysUnlock();

+}

+

+bool usbhmsdLUNConnect(USBHMassStorageLUNDriver *lunp) {

+	USBHMassStorageDriver *const msdp = lunp->msdp;

+	msd_result_t res;

+

+	osalDbgCheck(msdp != NULL);

+	osalSysLock();

+	//osalDbgAssert((lunp->state == BLK_ACTIVE) || (lunp->state == BLK_READY),

+    //            "invalid state");

+	if (lunp->state == BLK_READY) {

+	    osalSysUnlock();

+		return HAL_SUCCESS;

+	} else if (lunp->state != BLK_ACTIVE) {

+		osalSysUnlock();

+		return HAL_FAILED;

+	}

+	lunp->state = BLK_CONNECTING;

+    osalSysUnlock();

+

+    osalMutexLock(&msdp->mtx);

+

+    USBH_DEFINE_BUFFER(union {

+    		scsi_inquiry_response_t inq;

+    		scsi_readcapacity10_response_t cap;	}, u);

+

+	uinfo("INQUIRY...");

+	res = scsi_inquiry(lunp, &u.inq);

+	if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+		uerr("\tINQUIRY: Transaction error");

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+		uerr("\tINQUIRY: Command Failed");

+		_requestsense(lunp);

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+		//TODO: Do reset, etc.

+		uerr("\tINQUIRY: Command Phase Error");

+		goto failed;

+	}

+

+	uinfof("\tPDT=%02x", u.inq.peripheral & 0x1f);

+	if (u.inq.peripheral != 0) {

+		uerr("\tUnsupported PDT");

+		goto failed;

+	}

+

+	// Test if unit ready

+	uint8_t i;

+	for (i = 0; i < 10; i++) {

+		uinfo("TEST UNIT READY...");

+		res = scsi_testunitready(lunp);

+		if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+			uerr("\tTEST UNIT READY: Transaction error");

+			goto failed;

+		} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+			uerr("\tTEST UNIT READY: Command Failed");

+			_requestsense(lunp);

+			continue;

+		} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+			//TODO: Do reset, etc.

+			uerr("\tTEST UNIT READY: Command Phase Error");

+			goto failed;

+		}

+		uinfo("\tReady.");

+		break;

+		// osalThreadSleepMilliseconds(200); // will raise 'code is unreachable' warning

+	}

+	if (i == 10) goto failed;

+

+	// Read capacity

+	uinfo("READ CAPACITY(10)...");

+	res = scsi_readcapacity10(lunp, &u.cap);

+	if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+		uerr("\tREAD CAPACITY(10): Transaction error");

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+		uerr("\tREAD CAPACITY(10): Command Failed");

+		_requestsense(lunp);

+		goto failed;

+	} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+		//TODO: Do reset, etc.

+		uerr("\tREAD CAPACITY(10): Command Phase Error");

+		goto failed;

+	}

+	lunp->info.blk_size = __REV(u.cap.block_size);

+	lunp->info.blk_num = __REV(u.cap.last_block_addr) + 1;

+	uinfof("\tBlock size=%dbytes, blocks=%u (~%u MB)", lunp->info.blk_size, lunp->info.blk_num,

+		(uint32_t)(((uint64_t)lunp->info.blk_size * lunp->info.blk_num) / (1024UL * 1024UL)));

+

+	uinfo("MSD Connected.");

+

+	osalMutexUnlock(&msdp->mtx);

+	osalSysLock();

+	lunp->state = BLK_READY;

+    osalSysUnlock();

+

+	return HAL_SUCCESS;

+

+  /* Connection failed, state reset to BLK_ACTIVE.*/

+failed:

+	osalMutexUnlock(&msdp->mtx);

+	osalSysLock();

+	lunp->state = BLK_ACTIVE;

+    osalSysUnlock();

+	return HAL_FAILED;

+}

+

+

+bool usbhmsdLUNDisconnect(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	osalSysLock();

+	osalDbgAssert((lunp->state == BLK_ACTIVE) || (lunp->state == BLK_READY),

+				"invalid state");

+	if (lunp->state == BLK_ACTIVE) {

+		osalSysUnlock();

+		return HAL_SUCCESS;

+	}

+	lunp->state = BLK_DISCONNECTING;

+	osalSysUnlock();

+

+	//TODO: complete

+

+	osalSysLock();

+	lunp->state = BLK_ACTIVE;

+	osalSysUnlock();

+	return HAL_SUCCESS;

+}

+

+bool usbhmsdLUNRead(USBHMassStorageLUNDriver *lunp, uint32_t startblk,

+                uint8_t *buffer, uint32_t n) {

+

+	osalDbgCheck(lunp != NULL);

+	bool ret = HAL_FAILED;

+	uint16_t blocks;

+	msd_result_t res;

+

+	osalSysLock();

+	if (lunp->state != BLK_READY) {

+		osalSysUnlock();

+		return ret;

+	}

+	lunp->state = BLK_READING;

+    osalSysUnlock();

+

+	osalMutexLock(&lunp->msdp->mtx);

+	while (n) {

+		if (n > 0xffff) {

+			blocks = 0xffff;

+		} else {

+			blocks = (uint16_t)n;

+		}

+		res = scsi_read10(lunp, startblk, blocks, buffer);

+		if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+			uerr("\tREAD (10): Transaction error");

+			goto exit;

+		} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+			//TODO: request sense, and act appropriately

+			uerr("\tREAD (10): Command Failed");

+			_requestsense(lunp);

+			goto exit;

+		} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+			//TODO: Do reset, etc.

+			uerr("\tREAD (10): Command Phase Error");

+			goto exit;

+		}

+		n -= blocks;

+		startblk += blocks;

+		buffer += blocks * lunp->info.blk_size;

+	}

+

+	ret = HAL_SUCCESS;

+

+exit:

+	osalMutexUnlock(&lunp->msdp->mtx);

+	osalSysLock();

+	if (lunp->state == BLK_READING) {

+		lunp->state = BLK_READY;

+	} else {

+		osalDbgCheck(lunp->state == BLK_STOP);

+		uwarn("MSD: State = BLK_STOP");

+	}

+    osalSysUnlock();

+	return ret;

+}

+

+bool usbhmsdLUNWrite(USBHMassStorageLUNDriver *lunp, uint32_t startblk,

+                const uint8_t *buffer, uint32_t n) {

+

+	osalDbgCheck(lunp != NULL);

+	bool ret = HAL_FAILED;

+	uint16_t blocks;

+	msd_result_t res;

+

+	osalSysLock();

+	if (lunp->state != BLK_READY) {

+		osalSysUnlock();

+		return ret;

+	}

+	lunp->state = BLK_WRITING;

+    osalSysUnlock();

+

+	osalMutexLock(&lunp->msdp->mtx);

+	while (n) {

+		if (n > 0xffff) {

+			blocks = 0xffff;

+		} else {

+			blocks = (uint16_t)n;

+		}

+		res = scsi_write10(lunp, startblk, blocks, buffer);

+		if (res.tres != MSD_TRANSACTIONRESULT_OK) {

+			uerr("\tWRITE (10): Transaction error");

+			goto exit;

+		} else if (res.cres == MSD_COMMANDRESULT_FAILED) {

+			//TODO: request sense, and act appropriately

+			uerr("\tWRITE (10): Command Failed");

+			_requestsense(lunp);

+			goto exit;

+		} else if (res.cres == MSD_COMMANDRESULT_PHASE_ERROR) {

+			//TODO: Do reset, etc.

+			uerr("\tWRITE (10): Command Phase Error");

+			goto exit;

+		}

+		n -= blocks;

+		startblk += blocks;

+		buffer += blocks * lunp->info.blk_size;

+	}

+

+	ret = HAL_SUCCESS;

+

+exit:

+	osalMutexUnlock(&lunp->msdp->mtx);

+	osalSysLock();

+	if (lunp->state == BLK_WRITING) {

+		lunp->state = BLK_READY;

+	} else {

+		osalDbgCheck(lunp->state == BLK_STOP);

+		uwarn("MSD: State = BLK_STOP");

+	}

+	osalSysUnlock();

+	return ret;

+}

+

+bool usbhmsdLUNSync(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	(void)lunp;

+	//TODO: Do SCSI Sync

+	return HAL_SUCCESS;

+}

+

+bool usbhmsdLUNGetInfo(USBHMassStorageLUNDriver *lunp, BlockDeviceInfo *bdip) {

+	osalDbgCheck(lunp != NULL);

+	osalDbgCheck(bdip != NULL);

+	*bdip = lunp->info;

+	return HAL_SUCCESS;

+}

+

+bool usbhmsdLUNIsInserted(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	blkstate_t state;

+	osalSysLock();

+	state = lunp->state;

+	osalSysUnlock();

+	return (state >= BLK_ACTIVE);

+}

+

+bool usbhmsdLUNIsProtected(USBHMassStorageLUNDriver *lunp) {

+	osalDbgCheck(lunp != NULL);

+	return FALSE;

+}

+

+void usbhmsdObjectInit(USBHMassStorageDriver *msdp) {

+	osalDbgCheck(msdp != NULL);

+	memset(msdp, 0, sizeof(*msdp));

+	msdp->info = &usbhmsdClassDriverInfo;

+	osalMutexObjectInit(&msdp->mtx);

+}

+

+#endif

diff --git a/os/hal/src/usbh/usbh_uvc.c b/os/hal/src/usbh/usbh_uvc.c
new file mode 100644
index 0000000..2fb2563
--- /dev/null
+++ b/os/hal/src/usbh/usbh_uvc.c
@@ -0,0 +1,89 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+              Copyright (C) 2015 Diego Ismirlian, TISA, (dismirlian (at) google's mail)

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "hal.h"

+#include "usbh.h"

+

+#if HAL_USBH_USE_UVC

+

+#if !HAL_USE_USBH

+#error "USBHUVC needs HAL_USE_USBH"

+#endif

+

+#if !HAL_USBH_USE_IAD

+#error "USBHUVC needs HAL_USBH_USE_IAD"

+#endif

+

+#if USBHUVC_DEBUG_ENABLE_TRACE

+#define udbgf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define udbg(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define udbgf(f, ...)  do {} while(0)

+#define udbg(f, ...)   do {} while(0)

+#endif

+

+#if USBHUVC_DEBUG_ENABLE_INFO

+#define uinfof(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uinfo(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uinfof(f, ...)  do {} while(0)

+#define uinfo(f, ...)   do {} while(0)

+#endif

+

+#if USBHUVC_DEBUG_ENABLE_WARNINGS

+#define uwarnf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uwarn(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uwarnf(f, ...)  do {} while(0)

+#define uwarn(f, ...)   do {} while(0)

+#endif

+

+#if USBHUVC_DEBUG_ENABLE_ERRORS

+#define uerrf(f, ...)  usbDbgPrintf(f, ##__VA_ARGS__)

+#define uerr(f, ...)  usbDbgPuts(f, ##__VA_ARGS__)

+#else

+#define uerrf(f, ...)  do {} while(0)

+#define uerr(f, ...)   do {} while(0)

+#endif

+

+

+static usbh_baseclassdriver_t *uvc_load(usbh_device_t *dev,

+		const uint8_t *descriptor, uint16_t rem);

+static void uvc_unload(usbh_baseclassdriver_t *drv);

+

+static const usbh_classdriver_vmt_t class_driver_vmt = {

+	uvc_load,

+	uvc_unload

+};

+const usbh_classdriverinfo_t usbhuvcClassDriverInfo = {

+	0x0e, 0x03, 0x00, "UVC", &class_driver_vmt

+};

+

+

+static usbh_baseclassdriver_t *uvc_load(usbh_device_t *dev, const uint8_t *descriptor, uint16_t rem) {

+	(void)dev;

+	(void)descriptor;

+	(void)rem;

+	return NULL;

+}

+

+static void uvc_unload(usbh_baseclassdriver_t *drv) {

+	(void)drv;

+}

+

+#endif

+

diff --git a/os/various/bswap.h b/os/various/bswap.h
new file mode 100644
index 0000000..30ae1d6
--- /dev/null
+++ b/os/various/bswap.h
@@ -0,0 +1,146 @@
+/*
+    Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef BSWAP_H
+#define BSWAP_H
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#if !(defined(ARCH_BIG_ENDIAN) || defined(ARCH_LITTLE_ENDIAN))
+#error "Need to define one: ARCH_BIG_ENDIAN or ARCH_LITTLE_ENDIAN"
+#endif
+
+#if defined(ARCH_BIG_ENDIAN) && defined(ARCH_LITTLE_ENDIAN)
+#error "ARCH_BIG_ENDIAN and ARCH_LITTLE_ENDIAN are both set"
+#endif
+
+    
+#define BSWAP_16(x)							\
+    (uint16_t)((((x) & 0xFF00) >> 8) |					\
+	       (((x) & 0x00FF) << 8))
+#define BSWAP_32(x)							\
+    (uint32_t)((((x) & 0xFF000000UL) >> 24UL) |				\
+	       (((x) & 0x00FF0000UL) >>  8UL) |				\
+	       (((x) & 0x0000FF00UL) <<  8UL) |				\
+	       (((x) & 0x000000FFUL) << 24UL))
+
+    
+#if defined(ARCH_BIG_ENDIAN)
+#define le16_to_cpu(x)           bswap_16(x)
+#define le32_to_cpu(x)           bswap_32(x)
+#define be16_to_cpu(x)           (x)
+#define be32_to_cpu(x)           (x)
+#define cpu_to_le16(x)           bswap_16(x)
+#define cpu_to_le32(x)           bswap_32(x)
+#define cpu_to_be16(x)           (x)
+#define cpu_to_be32(x)           (x)
+#define LE16_TO_CPU(x)           BSWAP_16(x)
+#define LE32_TO_CPU(x)           BSWAP_32(x)
+#define BE16_TO_CPU(x)           (x)
+#define BE32_TO_CPU(x)           (x)
+#define CPU_TO_LE16(x)           BSWAP_16(x)
+#define CPU_TO_LE32(x)           BSWAP_32(x)
+#define CPU_TO_BE16(x)           (x)
+#define CPU_TO_BE32(x)           (x)
+#endif
+
+   
+#if defined(ARCH_LITTLE_ENDIAN)
+#define le16_to_cpu(x)           (x)
+#define le32_to_cpu(x)           (x)
+#define be16_to_cpu(x)           bswap_16(x)
+#define be32_to_cpu(x)           bswap_32(x)
+#define cpu_to_le16(x)           (x)
+#define cpu_to_le32(x)           (x)
+#define cpu_to_be16(x)           bswap_16(x)
+#define cpu_to_be32(x)           bswap_32(x)
+#define LE16_TO_CPU(x)           (x)
+#define LE32_TO_CPU(x)           (x)
+#define BE16_TO_CPU(x)           BSWAP_16(x)
+#define BE32_TO_CPU(x)           BSWAP_32(x)
+#define CPU_TO_LE16(x)           (x)
+#define CPU_TO_LE32(x)           (x)
+#define CPU_TO_BE16(x)           BSWAP_16(x)
+#define CPU_TO_BE32(x)           BSWAP_32(x)
+#endif
+
+    
+static inline uint16_t bswap_16(const uint16_t x)
+    __attribute__ ((warn_unused_result))
+    __attribute__ ((const))
+    __attribute__ ((always_inline));
+
+static inline uint16_t bswap_16(const uint16_t x) {
+    if (__builtin_constant_p(x))
+	return BSWAP_16(x);
+
+    uint8_t                             tmp;
+    union { uint16_t x; uint8_t b[2]; } data;
+    
+    data.x    = x;
+    tmp       = data.b[0];
+    data.b[0] = data.b[1];
+    data.b[1] = tmp;
+    
+    return data.x;
+}
+
+static inline uint32_t bswap_32(const uint32_t x)
+    __attribute__ ((warn_unused_result))
+    __attribute__ ((const))
+    __attribute__ ((always_inline));
+
+
+static inline uint32_t bswap_32(const uint32_t x) {
+    if (__builtin_constant_p(x))
+	return BSWAP_32(x);
+    
+    uint8_t                             tmp;
+    union { uint32_t x; uint8_t b[4]; } data;
+    
+    data.x    = x;    
+    tmp       = data.b[0];
+    data.b[0] = data.b[3];
+    data.b[3] = tmp;
+    tmp       = data.b[1];
+    data.b[1] = data.b[2];
+    data.b[2] = tmp;
+    
+    return data.x;
+}
+    
+static inline void bswap_n(void* const data, uint8_t len)
+    __attribute__ ((nonnull (1)));
+
+static inline void bswap_n(void* const data, uint8_t len) {
+    uint8_t* ptr = (uint8_t*)data;
+
+    for ( ; len > 1 ; ptr++, len -= 2 ) {
+	uint8_t tmp      = *ptr;
+	*ptr             = *(ptr + len - 1);
+	*(ptr + len - 1) = tmp;
+    }
+}
+    
+#if defined(__cplusplus)
+}
+#endif
+
+#endif
+
+
diff --git a/os/various/devices_lib/sensors/hdc1000.c b/os/various/devices_lib/sensors/hdc1000.c
new file mode 100644
index 0000000..39e47ec
--- /dev/null
+++ b/os/various/devices_lib/sensors/hdc1000.c
@@ -0,0 +1,265 @@
+/*
+    HDC100x for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    HDC1000.c
+ * @brief   HDC1000 interface module code.
+ *
+ * @addtogroup hdc1000
+ * @{
+ */
+
+#define I2C_HELPERS_AUTOMATIC_DRV TRUE
+
+#include "hal.h"
+#include "i2c_helpers.h"
+#include "hdc1000.h"
+
+/* DOC: http://www.ti.com/lit/ds/symlink/hdc1008.pdf
+ */
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/* I2C Register */
+#define HDC1000_REG_TEMP_HUMID     0x00
+#define HDC1000_REG_TEMP           0x00
+#define HDC1000_REG_HUMID          0x01
+#define HDC1000_REG_CONFIG         0x02
+#define HDC1000_REG_SERIAL         0xFB
+#define HDC1000_REG_SERIAL_1       0xFB
+#define HDC1000_REG_SERIAL_2       0xFC
+#define HDC1000_REG_SERIAL_3       0xFD
+#define HDC1000_REG_MANUF_ID       0xFE
+#define HDC1000_REG_DEVICE_ID      0xFF
+
+/* Configuration */
+#define HDC1000_CONFIG_RST         (1 << 15)
+#define HDC1000_CONFIG_HEATER      (1 << 13)
+#define HDC1000_CONFIG_MODE_ONE    (0 << 12)
+#define HDC1000_CONFIG_MODE_BOTH   (1 << 12)
+#define HDC1000_CONFIG_BATT        (1 << 11)
+#define HDC1000_CONFIG_TRES_14     (0)
+#define HDC1000_CONFIG_TRES_11     (1 << 10)
+#define HDC1000_CONFIG_HRES_14     (0)
+#define HDC1000_CONFIG_HRES_11     (1 << 8)
+#define HDC1000_CONFIG_HRES_8      (1 << 9)
+
+/* Value */
+#define HDC1000_MANUF_ID           0x5449
+#define HDC1000_DEVICE_ID          0x1000
+
+/* Delay in micro seconds */
+#define HDC1000_DELAY_ACQUIRE_SAFETY     1000
+#define HDC1000_DELAY_ACQUIRE_TRES_14    6350
+#define HDC1000_DELAY_ACQUIRE_TRES_11    3650
+#define HDC1000_DELAY_ACQUIRE_HRES_14    6500
+#define HDC1000_DELAY_ACQUIRE_HRES_11    3850
+#define HDC1000_DELAY_ACQUIRE_HRES_8     2500
+#define HDC1000_DELAY_STARTUP           15000
+
+// Deefault config (high res)
+#define HDC1000_CONFIG_RES    (HDC1000_CONFIG_TRES_14        |		\
+			       HDC1000_CONFIG_HRES_14)
+#define HDC1000_DELAY_ACQUIRE (HDC1000_DELAY_ACQUIRE_TRES_14 + 		\
+			       HDC1000_DELAY_ACQUIRE_HRES_14)
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static inline msg_t
+_apply_config(HDC1000_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t  reg;
+	uint16_t conf;
+    } tx = { HDC1000_REG_CONFIG, cpu_to_be16(drv->cfg) };
+    
+    return i2c_send((uint8_t*)&tx, sizeof(tx));
+}
+
+static inline msg_t
+_decode_measure(HDC1000_drv *drv,
+	uint32_t val, float *temperature, float *humidity) {
+    (void)drv;
+    
+    /* Temperature */
+    if (temperature) {
+	float temp = (val >> 16);
+	temp /= 65536;
+	temp *= 165;
+	temp -= 40;
+	*temperature = temp;
+    }
+
+    /* Humidiy */
+    if (humidity) {
+	float hum  = (val & 0xFFFF);
+	hum /= 65535;
+	hum *= 100;
+	*humidity = hum;
+    }
+
+    /* ok */
+    return MSG_OK;
+}
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+void
+HDC1000_init(HDC1000_drv *drv, HDC1000_config *config) {
+    drv->config   = config;
+    drv->cfg      =  HDC1000_CONFIG_RST | HDC1000_CONFIG_MODE_BOTH |
+	             HDC1000_CONFIG_RES;
+    drv->delay    = (HDC1000_DELAY_ACQUIRE +
+		     HDC1000_DELAY_ACQUIRE_SAFETY) / 1000;
+    drv->state    = SENSOR_INIT;
+}
+
+msg_t
+HDC1000_check(HDC1000_drv *drv) {
+    uint16_t manuf, device;
+
+    msg_t msg;
+    if (((msg = i2c_reg_recv16_be(HDC1000_REG_MANUF_ID,  &manuf )) < MSG_OK) ||
+	((msg = i2c_reg_recv16_be(HDC1000_REG_DEVICE_ID, &device)) < MSG_OK))
+	return msg;
+    
+    if ((manuf != HDC1000_MANUF_ID) || (device != HDC1000_DEVICE_ID))
+	return SENSOR_NOTFOUND;
+
+    return MSG_OK;
+}
+
+
+msg_t
+HDC1000_start(HDC1000_drv *drv) {
+    osalDbgAssert((drv->state == SENSOR_INIT   ) ||
+		  (drv->state == SENSOR_ERROR  ) ||
+		  (drv->state == SENSOR_STOPPED),
+		  "invalid state");
+    msg_t msg;    
+    if ((msg = _apply_config(drv)) < MSG_OK) {
+	drv->state = SENSOR_ERROR;
+	return msg;
+    }
+    drv->state = SENSOR_STARTED;
+    return MSG_OK;
+}
+
+msg_t
+HDC1000_stop(HDC1000_drv *drv) {
+    drv->state = SENSOR_STOPPED;
+    return MSG_OK;
+}
+
+msg_t
+HDC1000_setHeater(HDC1000_drv *drv, bool on) {
+    if (on) { drv->cfg |=  HDC1000_CONFIG_HEATER; }
+    else    { drv->cfg &= ~HDC1000_CONFIG_HEATER; }
+
+    msg_t msg;    
+    if ((msg = _apply_config(drv)) < MSG_OK) {
+	drv->state = SENSOR_ERROR;
+	return msg;
+    }
+    return MSG_OK;
+}
+
+msg_t
+HDC1000_startMeasure(HDC1000_drv *drv) {
+    msg_t msg;
+    osalDbgAssert(drv->state == SENSOR_STARTED, "invalid state");
+    if ((msg = i2c_reg(HDC1000_REG_TEMP_HUMID)) < MSG_OK)
+	return msg;
+    drv->state = SENSOR_MEASURING;
+    return MSG_OK;
+}
+
+
+msg_t
+HDC1000_readSerial(HDC1000_drv *drv, uint8_t *serial) {
+    msg_t msg;
+    osalDbgAssert(drv->state == SENSOR_STARTED, "invalid state");
+
+    if (((msg = i2c_reg_recv16(HDC1000_REG_SERIAL_1,
+			       (uint16_t*)&serial[0])) < MSG_OK) ||
+	((msg = i2c_reg_recv16(HDC1000_REG_SERIAL_2,
+			       (uint16_t*)&serial[2])) < MSG_OK) ||
+	((msg = i2c_reg_recv8 (HDC1000_REG_SERIAL_3,
+			       (uint8_t*) &serial[4])) < MSG_OK))
+	return msg;
+    return MSG_OK;
+}
+
+
+msg_t
+HDC1000_readMeasure(HDC1000_drv *drv,
+	float *temperature, float *humidity) {
+    msg_t    msg;
+    uint32_t val;
+
+    osalDbgAssert((drv->state == SENSOR_MEASURING) ||
+		  (drv->state == SENSOR_READY    ),
+		  "invalid state");
+
+    if ((msg = i2c_recv32_be(&val)) < MSG_OK) {
+	drv->state = SENSOR_ERROR;
+	return msg;
+    }
+
+    drv->state = SENSOR_STARTED;
+
+    return _decode_measure(drv, val, temperature, humidity);
+}
+
+msg_t
+HDC1000_readTemperatureHumidity(HDC1000_drv *drv,
+	float *temperature, float *humidity) {
+    msg_t    msg;
+    uint32_t val;
+
+    osalDbgAssert(drv->state == SENSOR_STARTED, "invalid state");
+
+    /* Request value */
+    if ((msg = i2c_reg(HDC1000_REG_TEMP_HUMID)) < MSG_OK)
+	return msg;
+
+    /* Wait */
+    osalThreadSleepMilliseconds(drv->delay);
+	
+    /* Get value */
+    if ((msg = i2c_recv32_be(&val)) < MSG_OK) {
+	drv->state = SENSOR_ERROR;
+	return msg;
+    }
+
+    return _decode_measure(drv, val, temperature, humidity);
+}
+
+
+/** @} */
diff --git a/os/various/devices_lib/sensors/hdc1000.h b/os/various/devices_lib/sensors/hdc1000.h
new file mode 100644
index 0000000..e4eae4c
--- /dev/null
+++ b/os/various/devices_lib/sensors/hdc1000.h
@@ -0,0 +1,240 @@
+/*
+    HDC100x for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    hdc1000.h
+ * @brief   HDC1000 Temperature/Humidiry sensor interface module header.
+ *
+ * When changing sensor settings, you generally need to wait
+ * for 2 * getAquisitionTime(), as usually the first acquisition
+ * will be corrupted by the change of settings.
+ *
+ * No locking is done.
+ *
+ * @{
+ */
+
+#ifndef _SENSOR_HDC1000_H_
+#define _SENSOR_HDC1000_H_
+
+#include <math.h>
+#include <stdbool.h>
+#include "i2c_helpers.h"
+#include "sensor.h"
+
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+#define HDC1000_CONTINUOUS_ACQUISITION_SUPPORTED   FALSE
+
+/* I2C address */
+#define HDC1000_I2CADDR_1           0x40
+#define HDC1000_I2CADDR_2           0x41
+#define HDC1000_I2CADDR_3           0x42
+#define HDC1000_I2CADDR_4           0x43
+
+#define HDC1000_SERIAL_SIZE         5  /**< @brief Size of serial (40bits) */
+
+/**
+ * @brief Time necessary for the sensor to boot
+ */
+#define HDC1000_BOOTUP_TIME		15
+
+/**
+ * @brief Time necessary for the sensor to start
+ */
+#define HDC1000_STARTUP_TIME		0
+
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+#define HDC1000_I2CADDR_DEFAULT     HDC1000_I2CADDR_1
+
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   HDC1000 configuration structure.
+ */
+typedef struct {
+    I2CHelper i2c; /* keep it first */
+} HDC1000_config;
+
+/**
+ * @brief   HDC1000 configuration structure.
+ */
+typedef struct {
+    HDC1000_config  *config;
+    sensor_state_t   state;
+    unsigned int     delay;    
+    uint16_t         cfg;
+} HDC1000_drv;
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+/**
+ * @brief Initialize the sensor driver
+ */
+void
+HDC1000_init(HDC1000_drv *drv,
+	HDC1000_config *config);
+
+/**
+ * @brief Start the sensor
+ */
+msg_t
+HDC1000_start(HDC1000_drv *drv);
+
+/**
+ * @brief   Stop the sensor
+ *
+ * @details If the sensor support it, it will be put in low energy mode.
+ */
+msg_t
+HDC1000_stop(HDC1000_drv *drv);
+
+/**
+ * @brief   Check that the sensor is really present
+ */
+msg_t
+HDC1000_check(HDC1000_drv *drv);
+
+
+msg_t
+HDC1000_readSerial(HDC1000_drv *drv, uint8_t *serial);
+
+/**
+ * @brief   Control the HD1000 heater.
+ */
+msg_t
+HDC1000_setHeater(HDC1000_drv *drv,
+	bool on);
+
+
+
+/**
+ * @brief Time in milli-seconds necessary for acquiring a naw measure
+ *
+ * @returns
+ *   unsigned int   time in millis-seconds
+ */
+static inline unsigned int
+HDC1000_getAcquisitionTime(HDC1000_drv *drv) {
+    return drv->delay;
+}
+
+/**
+ * @brief Trigger a mesure acquisition
+ */
+msg_t
+HDC1000_startMeasure(HDC1000_drv *drv);
+
+/**
+ * @brief Read the newly acquiered measure
+ *
+ * @note  According the the sensor design the measure read
+ *        can be any value acquired after the acquisition time
+ *        and the call to readMeasure.
+ */
+msg_t
+HDC1000_readMeasure(HDC1000_drv *drv,
+	float *temperature, float *humidity);
+
+
+/**
+ * @brief   Read temperature and humidity
+ *
+ * @details According to the sensor specification/configuration
+ *          (see #HDC1000_CONTINUOUS_ACQUISITION_SUPPORTED), 
+ *          if the sensor is doing continuous measurement
+ *          it's value will be requested and returned immediately.
+ *          Otherwise a measure is started, the necessary amount of
+ *          time for acquiring the value is spend sleeping (not spinning),
+ *          and finally the measure is read.
+ *
+ * @note    In continuous measurement mode, if you just started
+ *          the sensor, you will need to wait getAcquisitionTime()
+ *          in addition to the usual #HDC1000_STARTUP_TIME
+
+ * @note    If using several sensors, it is better to start all the
+ *          measure together, wait for the sensor having the longuest
+ *          aquisition time, and finally read all the values
+ */
+msg_t
+HDC1000_readTemperatureHumidity(HDC1000_drv *drv,
+	float *temperature, float *humidity);
+
+/**
+ * @brief   Return the humidity value in percent.
+ *
+ * @details Use readTemperatureHumidity() for returning the humidity value.
+ *
+ * @note    Prefere readTemperatureHumidity(), if you need both temperature
+ *          and humidity, or if you need better error handling.
+ *
+ * @returns
+ *   float  humidity percent
+ *   NAN    on failure
+ */
+static inline float
+HDC1000_getHumidity(HDC1000_drv *drv) {
+    float humidity   = NAN;
+    HDC1000_readTemperatureHumidity(drv, NULL, &humidity);
+    return humidity;
+}
+
+/**
+ * @brief   Return the temperature value in °C.
+ *
+ * @details Use readTemperatureHumidity() for returning the humidity value.
+ *
+ * @note    Prefere readTemperatureHumidity(), if you need both temperature
+ *          and humidity, or if you need better error handling.
+ *
+ * @returns
+ *   float  humidity percent
+ *   NAN    on failure
+ */
+static inline float
+HDC1000_getTemperature(HDC1000_drv *drv) {
+    float temperature = NAN;
+    HDC1000_readTemperatureHumidity(drv, &temperature, NULL);
+    return temperature;
+}
+
+
+#endif
+
+/**
+ * @}
+ */
diff --git a/os/various/devices_lib/sensors/mcp9808.c b/os/various/devices_lib/sensors/mcp9808.c
new file mode 100644
index 0000000..4b22ea9
--- /dev/null
+++ b/os/various/devices_lib/sensors/mcp9808.c
@@ -0,0 +1,207 @@
+/*
+    MCP9808 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#define I2C_HELPERS_AUTOMATIC_DRV TRUE
+
+#include "hal.h"
+#include "i2c_helpers.h"
+#include "mcp9808.h"
+
+// http://www.mouser.com/ds/2/268/25095A-15487.pdf
+// http://ww1.microchip.com/downloads/en/DeviceDoc/25095A.pdf
+
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/* I2C Register */
+#define MCP9808_REG_CONFIG             0x01
+#define MCP9808_REG_UPPER_TEMP         0x02
+#define MCP9808_REG_LOWER_TEMP         0x03
+#define MCP9808_REG_CRIT_TEMP          0x04
+#define MCP9808_REG_AMBIENT_TEMP       0x05
+#define MCP9808_REG_MANUF_ID           0x06
+#define MCP9808_REG_DEVICE_ID          0x07
+#define MCP9808_REG_RESOLUTION         0x08
+
+/* Config */
+#define MCP9808_REG_CONFIG_SHUTDOWN    0x0100
+#define MCP9808_REG_CONFIG_CRITLOCKED  0x0080
+#define MCP9808_REG_CONFIG_WINLOCKED   0x0040
+#define MCP9808_REG_CONFIG_INTCLR      0x0020
+#define MCP9808_REG_CONFIG_ALERTSTAT   0x0010
+#define MCP9808_REG_CONFIG_ALERTCTRL   0x0008
+#define MCP9808_REG_CONFIG_ALERTSEL    0x0002
+#define MCP9808_REG_CONFIG_ALERTPOL    0x0002
+#define MCP9808_REG_CONFIG_ALERTMODE   0x0001
+
+/* Device Id */
+#define MCP9808_MANUF_ID               0x0054
+#define MCP9808_DEVICE_ID              0x0400
+
+/* Resolution */
+#define MCP9808_RES_2                  0x00  /* 1/2  = 0.5    */
+#define MCP9808_RES_4                  0x01  /* 1/4  = 0.25   */
+#define MCP9808_RES_8                  0x10  /* 1/8  = 0.125  */
+#define MCP9808_RES_16                 0x11  /* 1/16 = 0.0625 */
+
+/* Time in milli-seconds */
+#define MCP9808_DELAY_ACQUIRE_RES_2   30
+#define MCP9808_DELAY_ACQUIRE_RES_4   65
+#define MCP9808_DELAY_ACQUIRE_RES_8  130
+#define MCP9808_DELAY_ACQUIRE_RES_16 250
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static inline msg_t
+_apply_config(MCP9808_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t  reg;
+	uint16_t conf;
+    } tx = { MCP9808_REG_CONFIG, cpu_to_be16(drv->cfg) };
+    
+    return i2c_send((uint8_t*)&tx, sizeof(tx));
+}
+
+static inline msg_t
+_decode_measure(MCP9808_drv *drv,
+	uint16_t val, float *temperature) {
+    
+    /* Temperature */
+    if (temperature) {
+	float temp   = val & 0x0fff;
+	if (val & 0x1000) temp -= 0x1000;
+
+	float factor = 16.0F;
+	switch(drv->resolution) {
+	case RES_2 : factor =  2.0F; break;
+	case RES_4 : factor =  4.0F; break;
+	case RES_8 : factor =  8.0F; break;
+	case RES_16: factor = 16.0F; break;
+	}
+
+	*temperature = temp / factor;
+    }
+
+    /* Ok */
+    return MSG_OK;
+}
+
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+void
+MCP9808_init(MCP9808_drv *drv, MCP9808_config *config) {
+    drv->config      = config;
+    drv->cfg         = 0;
+    drv->resolution  = RES_16; /* power up default */
+    drv->state       = SENSOR_INIT;
+}
+
+msg_t
+MCP9808_check(MCP9808_drv *drv) {
+    uint16_t manuf, device;
+
+    msg_t msg;
+    if (((msg = i2c_reg_recv16_be(MCP9808_REG_MANUF_ID,  &manuf )) < MSG_OK) ||
+	((msg = i2c_reg_recv16_be(MCP9808_REG_DEVICE_ID, &device)) < MSG_OK))
+	return msg;
+    
+    if ((manuf != MCP9808_MANUF_ID) || (device != MCP9808_DEVICE_ID))
+	return SENSOR_NOTFOUND;
+
+    return MSG_OK;
+}
+
+msg_t
+MCP9808_setResolution(MCP9808_drv *drv, MCP9808_resolution_t res) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t resolution;
+    } tx = { MCP9808_REG_RESOLUTION, res };
+
+    msg_t msg;
+    if ((msg = i2c_send((uint8_t*)&tx, sizeof(tx))) < MSG_OK)
+	return msg;
+
+    drv->resolution = res;
+    return MSG_OK;
+}
+
+msg_t
+MCP9808_start(MCP9808_drv *drv) {
+    drv->cfg &= ~(MCP9808_REG_CONFIG_SHUTDOWN);
+    return _apply_config(drv);
+}
+
+msg_t
+MCP9808_stop(MCP9808_drv *drv) {
+    drv->cfg |= (MCP9808_REG_CONFIG_SHUTDOWN);
+    return _apply_config(drv);
+}
+
+unsigned int
+MCP9808_getAcquisitionTime(MCP9808_drv *drv) {
+    switch(drv->resolution) {
+    case RES_2 : return MCP9808_DELAY_ACQUIRE_RES_2;
+    case RES_4 : return MCP9808_DELAY_ACQUIRE_RES_4;
+    case RES_8 : return MCP9808_DELAY_ACQUIRE_RES_8;
+    case RES_16: return MCP9808_DELAY_ACQUIRE_RES_16;
+    }
+    osalDbgAssert(false, "OOPS");
+    return 0;
+}
+
+msg_t
+MCP9808_readMeasure(MCP9808_drv *drv,
+	float *temperature) {
+
+    msg_t msg;
+    uint16_t val;
+
+    if ((msg = i2c_reg_recv16_be(MCP9808_REG_AMBIENT_TEMP, &val)) < MSG_OK)
+	return msg;
+
+    return _decode_measure(drv, val, temperature);    
+}
+
+
+msg_t
+MCP9808_readTemperature(MCP9808_drv *drv,
+	float *temperature) {
+    osalDbgAssert(drv->state == SENSOR_STARTED, "invalid state");
+
+    msg_t msg;
+    uint16_t val;
+
+    if ((msg = i2c_reg_recv16_be(MCP9808_REG_AMBIENT_TEMP, &val)) < MSG_OK)
+	return msg;
+
+    return _decode_measure(drv, val, temperature);    
+}
diff --git a/os/various/devices_lib/sensors/mcp9808.h b/os/various/devices_lib/sensors/mcp9808.h
new file mode 100644
index 0000000..857f2f9
--- /dev/null
+++ b/os/various/devices_lib/sensors/mcp9808.h
@@ -0,0 +1,204 @@
+/*
+    MCP9808 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _SENSOR_MCP9808_H_
+#define _SENSOR_MCP9808_H_
+
+#include <math.h>
+#include "i2c_helpers.h"
+#include "sensor.h"
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+#define MCP9808_CONTINUOUS_ACQUISITION_SUPPORTED   TRUE
+
+
+#define MCP9808_I2CADDR_FIXED           0x18
+
+/**
+ * @brief Time necessary for the sensor to boot
+ */
+#define MCP9808_BOOTUP_TIME		0
+
+/**
+ * @brief Time necessary for the sensor to start
+ */
+#define MCP9808_STARTUP_TIME		0
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+#define MCP9808_I2CADDR_DEFAULT       MCP9808_I2CADDR_FIXED
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief  Different possible resolution
+ */
+typedef enum {
+    RES_2  = 0x00,  /**< @brief Resolution of 1/2  = 0.5    */
+    RES_4  = 0x01,  /**< @brief Resolution of 1/4  = 0.25   */
+    RES_8  = 0x10,  /**< @brief Resolution of 1/8  = 0.125  */
+    RES_16 = 0x11,  /**< @brief Resolution of 1/16 = 0.0625 */
+} MCP9808_resolution_t;
+
+/**
+ * @brief   MCP9808 configuration structure.
+ */
+typedef struct {
+    I2CHelper i2c; /* keep it first */
+} MCP9808_config;
+
+/**
+ * @brief   MCP9808 configuration structure.
+ */
+typedef struct {
+    MCP9808_config      *config;
+    sensor_state_t       state;
+    MCP9808_resolution_t resolution;
+    uint16_t             cfg;
+} MCP9808_drv;
+
+/**
+ * @brief   MCP9808 measure reading
+ */
+typedef struct {
+    float temperature;
+} MCP9808_measure;
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+/**
+ * @brief   Initialize the sensor driver
+ */
+void
+MCP9808_init(MCP9808_drv *drv,
+	MCP9808_config *config);
+
+/**
+ * @brief   Check that the sensor is really present
+ */
+msg_t
+MCP9808_check(MCP9808_drv *drv);
+
+/**
+ * @brief   Start the sensor
+ */
+msg_t
+MCP9808_start(MCP9808_drv *drv);
+
+/**
+ * @brief   Stop the sensor
+ *
+ * @details If the sensor support it, it will be put in low energy mode.
+ */
+msg_t
+MCP9808_stop(MCP9808_drv *drv);
+
+/**
+ * @brief   Control the MCP9809 resolution.
+ */
+msg_t
+MCP9808_setResolution(MCP9808_drv *drv,
+	MCP9808_resolution_t res);
+
+/**
+ * @brief Time in milli-seconds necessary for acquiring a naw measure
+ *
+ * @returns
+ *   unsigned int   time in millis-seconds
+ */
+unsigned int
+MCP9808_getAcquisitionTime(MCP9808_drv *drv);
+
+/**
+ * @brief Trigger a mesure acquisition
+ */
+static inline msg_t
+MCP9808_startMeasure(MCP9808_drv *drv) {
+    (void)drv;
+    return MSG_OK;
+}
+
+/**
+ * @brief Read the newly acquiered measure
+ *
+ * @note  According the the sensor design the measure read
+ *        can be any value acquired after the acquisition time
+ *        and the call to readMeasure.
+ */
+msg_t
+MCP9808_readMeasure(MCP9808_drv *drv,
+	float *temperature);
+
+
+/**
+ * @brief   Read temperature and humidity
+ *
+ * @details According to the sensor specification/configuration
+ *          (see #MCP9808_CONTINUOUS_ACQUISITION_SUPPORTED), 
+ *          if the sensor is doing continuous measurement
+ *          it's value will be requested and returned immediately.
+ *          Otherwise a measure is started, the necessary amount of
+ *          time for acquiring the value is spend sleeping (not spinning),
+ *          and finally the measure is read.
+ *
+ * @note    In continuous measurement mode, if you just started
+ *          the sensor, you will need to wait getAcquisitionTime()
+ *          in addition to the usual getStartupTime()
+
+ * @note    If using several sensors, it is better to start all the
+ *          measure together, wait for the sensor having the longuest
+ *          aquisition time, and finally read all the values
+ */
+msg_t
+MCP9808_readTemperature(MCP9808_drv *drv,
+	float *temperature);
+
+/**
+ * @brief   Return the temperature value in °C.
+ *
+ * @note    Prefere readTemperature(), if you need better error handling.
+ *
+ * @return  The temperature in °C
+ * @retval  float  humidity percent
+ * @retval  NAN    on failure
+ */
+static inline float
+MCP9808_getTemperature(MCP9808_drv *drv) {
+    float temperature = NAN;
+    MCP9808_readTemperature(drv, &temperature);
+    return temperature;
+}
+
+#endif
+
diff --git a/os/various/devices_lib/sensors/sensor.h b/os/various/devices_lib/sensors/sensor.h
new file mode 100644
index 0000000..bd544b1
--- /dev/null
+++ b/os/various/devices_lib/sensors/sensor.h
@@ -0,0 +1,81 @@
+/*
+    Copyright (C) 2016 Stephane D'Alu
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * 
+ * Example of function calls.
+ *
+ * @code
+ * static SENSOR_config sensor_config = {
+ * };
+ * static SENSOR_drv    sensor_drv;
+ * @endcode
+ *
+ * 
+ * @code
+ * osalThreadSleepMilliseconds(SENSOR_BOOTUP_TIME);
+ * SENSOR_init(&sensor_drv);
+ * @endcode
+ *
+ * @code
+ * SENSOR_start(&sensor_drv, &sensor_config);
+ * osalThreadSleepMilliseconds(SENSOR_STARTUP_TIME);
+ * @endcode
+ *
+ * If using SENSOR_startMeasure()/SENSOR_readMeasure()
+ * @code
+ * while(true) {
+ *   SENSOR_startMeasure(&sensor_drv);
+ *   osalThreadSleepMilliseconds(SENSOR_getAcquisitionTime());
+ *   SENSOR_readMeasure(&sensor_drv, ...);
+ * }
+ * @endcode
+ *
+ * If using SENSOR_readValue() or SENSOR_getValue()
+ * @code
+ * #if SENSOR_CONTINUOUS_ACQUISITION_SUPPORTED == TRUE
+ * osalThreadSleepMilliseconds(SENSOR_getAcquisitionTime())
+ * #endif
+ * 
+ * while(true) {
+ *   SENSOR_readValue(&sensor_drv, ...);
+ * }
+ * @encode
+ */
+#ifndef _SENSOR_H_
+#define _SENSOR_H_
+
+#define SENSOR_OK        MSG_OK         /**< @brief Operation successful. */
+#define SENSOR_TIMEOUT   MSG_TIMEOUT    /**< @brief Communication timeout */
+#define SENSOR_RESET     MSG_REST       /**< @brief Communication error.  */
+#define SENSOR_NOTFOUND  (msg_t)-20     /**< @brief Sensor not found.     */
+
+
+/**
+ * @brief   Driver state machine possible states.
+ */
+typedef enum __attribute__ ((__packed__)) {
+    SENSOR_UNINIT    = 0,            /**< Not initialized.                */
+    SENSOR_INIT      = 1,            /**< Initialized.                    */
+    SENSOR_STARTED   = 2,            /**< Started.                        */
+    SENSOR_MEASURING = 4,            /**< Measuring.                      */
+    SENSOR_READY     = 3,            /**< Ready.                          */
+    SENSOR_STOPPED   = 5,            /**< Stopped.                        */
+    SENSOR_ERROR     = 6,            /**< Error.                          */
+} sensor_state_t;
+
+#endif
+
+
diff --git a/os/various/devices_lib/sensors/tsl2561.c b/os/various/devices_lib/sensors/tsl2561.c
new file mode 100644
index 0000000..a4ac8ec
--- /dev/null
+++ b/os/various/devices_lib/sensors/tsl2561.c
@@ -0,0 +1,386 @@
+/*
+    TSL2561 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * Illuminance calculation code provided by www.taosinc.com
+ * DOC: http://ams.com/eng/content/download/250096/975518/143687
+ */
+#define I2C_HELPERS_AUTOMATIC_DRV TRUE
+
+#include "hal.h"
+#include "i2c_helpers.h"
+#include "tsl2561.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+// Integration time in µs
+#define TSL2561_DELAY_INTTIME_SHORT     13700  //   13.7 ms
+#define TSL2561_DELAY_INTTIME_MEDIUM   120000  //  120.0 ms
+#define TSL2561_DELAY_INTTIME_LONG     450000  //  450.0 ms
+
+
+#define TSL2561_COMMAND_BIT       (0x80)
+#define TSL2561_CLEAR_BIT         (0x40)
+#define TSL2561_WORD_BIT          (0x20)
+#define TSL2561_BLOCK_BIT         (0x10)
+
+#define TSL2561_CONTROL_POWERON   (0x03)
+#define TSL2561_CONTROL_POWEROFF  (0x00)
+
+#define TSL2561_LUX_LUXSCALE      (14)
+#define TSL2561_LUX_RATIOSCALE    (9)
+#define TSL2561_LUX_CHSCALE       (10)      // Scale channel values by 2^10
+#define TSL2561_LUX_CHSCALE_TINT0 (0x7517)  // 322/11 * 2^TSL2561_LUX_CHSCALE
+#define TSL2561_LUX_CHSCALE_TINT1 (0x0FE7)  // 322/81 * 2^TSL2561_LUX_CHSCALE
+
+
+// I2C Register
+#define TSL2561_REG_CONTROL           0x00
+#define TSL2561_REG_TIMING            0x01
+#define TSL2561_REG_THRESHHOLDLLOW    0x02
+#define TSL2561_REG_THRESHHOLDLHIGH   0x03
+#define TSL2561_REG_THRESHHOLDHLOW    0x04
+#define TSL2561_REG_THRESHHOLDHHIGH   0x05
+#define TSL2561_REG_INTERRUPT         0x06
+#define TSL2561_REG_CRC               0x08
+#define TSL2561_REG_ID                0x0A
+#define TSL2561_REG_DATA0LOW          0x0C
+#define TSL2561_REG_DATA0HIGH         0x0D
+#define TSL2561_REG_DATA1LOW          0x0E
+#define TSL2561_REG_DATA1HIGH         0x0F
+
+
+// Auto-gain thresholds
+#define TSL2561_AGC_THI_SHORT      (4850)    // Max value at Ti 13ms = 5047
+#define TSL2561_AGC_TLO_SHORT      (100)
+#define TSL2561_AGC_THI_MEDIUM     (36000)   // Max value at Ti 101ms = 37177
+#define TSL2561_AGC_TLO_MEDIUM     (200)
+#define TSL2561_AGC_THI_LONG       (63000)   // Max value at Ti 402ms = 65535
+#define TSL2561_AGC_TLO_LONG       (500)
+
+// Clipping thresholds
+#define TSL2561_CLIPPING_SHORT     (4900)
+#define TSL2561_CLIPPING_MEDIUM    (37000)
+#define TSL2561_CLIPPING_LONG      (65000)
+
+// T, FN and CL package values
+#define TSL2561_LUX_K1T           (0x0040)  // 0.125   * 2^RATIO_SCALE
+#define TSL2561_LUX_B1T           (0x01f2)  // 0.0304  * 2^LUX_SCALE
+#define TSL2561_LUX_M1T           (0x01be)  // 0.0272  * 2^LUX_SCALE
+#define TSL2561_LUX_K2T           (0x0080)  // 0.250   * 2^RATIO_SCALE
+#define TSL2561_LUX_B2T           (0x0214)  // 0.0325  * 2^LUX_SCALE
+#define TSL2561_LUX_M2T           (0x02d1)  // 0.0440  * 2^LUX_SCALE
+#define TSL2561_LUX_K3T           (0x00c0)  // 0.375   * 2^RATIO_SCALE
+#define TSL2561_LUX_B3T           (0x023f)  // 0.0351  * 2^LUX_SCALE
+#define TSL2561_LUX_M3T           (0x037b)  // 0.0544  * 2^LUX_SCALE
+#define TSL2561_LUX_K4T           (0x0100)  // 0.50    * 2^RATIO_SCALE
+#define TSL2561_LUX_B4T           (0x0270)  // 0.0381  * 2^LUX_SCALE
+#define TSL2561_LUX_M4T           (0x03fe)  // 0.0624  * 2^LUX_SCALE
+#define TSL2561_LUX_K5T           (0x0138)  // 0.61    * 2^RATIO_SCALE
+#define TSL2561_LUX_B5T           (0x016f)  // 0.0224  * 2^LUX_SCALE
+#define TSL2561_LUX_M5T           (0x01fc)  // 0.0310  * 2^LUX_SCALE
+#define TSL2561_LUX_K6T           (0x019a)  // 0.80    * 2^RATIO_SCALE
+#define TSL2561_LUX_B6T           (0x00d2)  // 0.0128  * 2^LUX_SCALE
+#define TSL2561_LUX_M6T           (0x00fb)  // 0.0153  * 2^LUX_SCALE
+#define TSL2561_LUX_K7T           (0x029a)  // 1.3     * 2^RATIO_SCALE
+#define TSL2561_LUX_B7T           (0x0018)  // 0.00146 * 2^LUX_SCALE
+#define TSL2561_LUX_M7T           (0x0012)  // 0.00112 * 2^LUX_SCALE
+#define TSL2561_LUX_K8T           (0x029a)  // 1.3     * 2^RATIO_SCALE
+#define TSL2561_LUX_B8T           (0x0000)  // 0.000   * 2^LUX_SCALE
+#define TSL2561_LUX_M8T           (0x0000)  // 0.000   * 2^LUX_SCALE
+
+// CS package values
+#define TSL2561_LUX_K1C           (0x0043)  // 0.130   * 2^RATIO_SCALE
+#define TSL2561_LUX_B1C           (0x0204)  // 0.0315  * 2^LUX_SCALE
+#define TSL2561_LUX_M1C           (0x01ad)  // 0.0262  * 2^LUX_SCALE
+#define TSL2561_LUX_K2C           (0x0085)  // 0.260   * 2^RATIO_SCALE
+#define TSL2561_LUX_B2C           (0x0228)  // 0.0337  * 2^LUX_SCALE
+#define TSL2561_LUX_M2C           (0x02c1)  // 0.0430  * 2^LUX_SCALE
+#define TSL2561_LUX_K3C           (0x00c8)  // 0.390   * 2^RATIO_SCALE
+#define TSL2561_LUX_B3C           (0x0253)  // 0.0363  * 2^LUX_SCALE
+#define TSL2561_LUX_M3C           (0x0363)  // 0.0529  * 2^LUX_SCALE
+#define TSL2561_LUX_K4C           (0x010a)  // 0.520   * 2^RATIO_SCALE
+#define TSL2561_LUX_B4C           (0x0282)  // 0.0392  * 2^LUX_SCALE
+#define TSL2561_LUX_M4C           (0x03df)  // 0.0605  * 2^LUX_SCALE
+#define TSL2561_LUX_K5C           (0x014d)  // 0.65    * 2^RATIO_SCALE
+#define TSL2561_LUX_B5C           (0x0177)  // 0.0229  * 2^LUX_SCALE
+#define TSL2561_LUX_M5C           (0x01dd)  // 0.0291  * 2^LUX_SCALE
+#define TSL2561_LUX_K6C           (0x019a)  // 0.80    * 2^RATIO_SCALE
+#define TSL2561_LUX_B6C           (0x0101)  // 0.0157  * 2^LUX_SCALE
+#define TSL2561_LUX_M6C           (0x0127)  // 0.0180  * 2^LUX_SCALE
+#define TSL2561_LUX_K7C           (0x029a)  // 1.3     * 2^RATIO_SCALE
+#define TSL2561_LUX_B7C           (0x0037)  // 0.00338 * 2^LUX_SCALE
+#define TSL2561_LUX_M7C           (0x002b)  // 0.00260 * 2^LUX_SCALE
+#define TSL2561_LUX_K8C           (0x029a)  // 1.3     * 2^RATIO_SCALE
+#define TSL2561_LUX_B8C           (0x0000)  // 0.000   * 2^LUX_SCALE
+#define TSL2561_LUX_M8C           (0x0000)  // 0.000   * 2^LUX_SCALE
+
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+#define CEILING(x,y) (((x) + (y) - 1) / (y))
+
+static inline unsigned int
+calculateIlluminance(TSL2561_integration_time_t integration_time,
+		     TSL2561_gain_t gain,
+		     uint16_t broadband, uint16_t ir,
+		     unsigned int partno) {
+    unsigned long channel_1;
+    unsigned long channel_0;  
+
+    /* Get value for channel scaling, and clipping */
+    uint16_t      clip_threshold = 0;
+    unsigned long channel_scale  = 0;
+    switch (integration_time) {
+    case TSL2561_INTEGRATIONTIME_SHORT:
+	clip_threshold = TSL2561_CLIPPING_SHORT;
+	channel_scale  = TSL2561_LUX_CHSCALE_TINT0;
+ 	break;
+    case TSL2561_INTEGRATIONTIME_MEDIUM:
+	clip_threshold = TSL2561_CLIPPING_MEDIUM;
+	channel_scale  = TSL2561_LUX_CHSCALE_TINT1;
+	break;
+    case TSL2561_INTEGRATIONTIME_LONG:
+	clip_threshold = TSL2561_CLIPPING_LONG;
+	channel_scale  = (1 << TSL2561_LUX_CHSCALE);
+	break;
+    default:
+	// assert failed
+	break;
+    }
+
+    /* Check for saturated sensor (ie: clipping) */
+    if ((broadband > clip_threshold) || (ir > clip_threshold)) {
+	return TSL2561_OVERLOADED;
+    }
+    
+    /* Scale for gain (1x or 16x) */
+    if (gain == TSL2561_GAIN_1X)
+	channel_scale <<= 4;
+    
+    /* Scale the channel values */
+    channel_0 = (broadband * channel_scale) >> TSL2561_LUX_CHSCALE;
+    channel_1 = (ir        * channel_scale) >> TSL2561_LUX_CHSCALE;
+
+    /* Find the ratio of the channel values (Channel_1/Channel_0) */
+    unsigned long _ratio = 0;
+    if (channel_0 != 0)
+	_ratio = (channel_1 << (TSL2561_LUX_RATIOSCALE+1)) / channel_0;
+    unsigned long ratio = (_ratio + 1) >> 1; /* round the ratio value */
+
+    /* Find linear approximation */
+    unsigned int b = 0;
+    unsigned int m = 0;
+
+    switch (partno) {
+#if TSL2561_WITH_CS
+    case 0x1: // 0001 = TSL2561 CS
+	if ((ratio >= 0) && (ratio <= TSL2561_LUX_K1C))
+	    { b=TSL2561_LUX_B1C; m=TSL2561_LUX_M1C; }
+	else if (ratio <= TSL2561_LUX_K2C)
+	    { b=TSL2561_LUX_B2C; m=TSL2561_LUX_M2C; }
+	else if (ratio <= TSL2561_LUX_K3C)
+	    { b=TSL2561_LUX_B3C; m=TSL2561_LUX_M3C; }
+	else if (ratio <= TSL2561_LUX_K4C)
+	    { b=TSL2561_LUX_B4C; m=TSL2561_LUX_M4C; }
+	else if (ratio <= TSL2561_LUX_K5C)
+	    { b=TSL2561_LUX_B5C; m=TSL2561_LUX_M5C; }
+	else if (ratio <= TSL2561_LUX_K6C)
+	    { b=TSL2561_LUX_B6C; m=TSL2561_LUX_M6C; }
+	else if (ratio <= TSL2561_LUX_K7C)
+	    { b=TSL2561_LUX_B7C; m=TSL2561_LUX_M7C; }
+	else if (ratio > TSL2561_LUX_K8C)
+	    { b=TSL2561_LUX_B8C; m=TSL2561_LUX_M8C; }
+	break;
+#endif
+#if TSL2561_WITH_T_FN_CL
+    case 0x5: // 0101 = TSL2561 T/FN/CL
+	if ((ratio >= 0) && (ratio <= TSL2561_LUX_K1T))
+	    { b=TSL2561_LUX_B1T; m=TSL2561_LUX_M1T; }
+	else if (ratio <= TSL2561_LUX_K2T)
+	    { b=TSL2561_LUX_B2T; m=TSL2561_LUX_M2T; }
+	else if (ratio <= TSL2561_LUX_K3T)
+	    { b=TSL2561_LUX_B3T; m=TSL2561_LUX_M3T; }
+	else if (ratio <= TSL2561_LUX_K4T)
+	    { b=TSL2561_LUX_B4T; m=TSL2561_LUX_M4T; }
+	else if (ratio <= TSL2561_LUX_K5T)
+	    { b=TSL2561_LUX_B5T; m=TSL2561_LUX_M5T; }
+	else if (ratio <= TSL2561_LUX_K6T)
+	    { b=TSL2561_LUX_B6T; m=TSL2561_LUX_M6T; }
+	else if (ratio <= TSL2561_LUX_K7T)
+	    { b=TSL2561_LUX_B7T; m=TSL2561_LUX_M7T; }
+	else if (ratio > TSL2561_LUX_K8T)
+	    { b=TSL2561_LUX_B8T; m=TSL2561_LUX_M8T; }
+	break;
+#endif
+    default:
+	// assert failed
+	break;
+    }
+    
+    /* Compute illuminance */
+    long ill = ((channel_0 * b) - (channel_1 * m));
+    if (ill < 0) ill = 0;                /* Do not allow negative lux value */
+    ill  += (1 << (TSL2561_LUX_LUXSCALE-1)); /* Round lsb (2^(LUX_SCALE-1)) */
+    ill >>= TSL2561_LUX_LUXSCALE;                  /* Strip fractional part */
+    
+    /* Signal I2C had no errors */
+    return ill;
+}
+
+static inline msg_t
+_readChannel(TSL2561_drv *drv, uint16_t *broadband, uint16_t *ir) {
+    msg_t msg;
+    if (((msg = i2c_reg_recv16_le(
+	  TSL2561_COMMAND_BIT | TSL2561_WORD_BIT | TSL2561_REG_DATA0LOW,
+	  broadband)) < MSG_OK) ||
+	((msg = i2c_reg_recv16_le(
+	  TSL2561_COMMAND_BIT | TSL2561_WORD_BIT | TSL2561_REG_DATA1LOW,
+	  ir       )) < MSG_OK))
+	return msg;
+    return MSG_OK;
+}
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+void
+TSL2561_init(TSL2561_drv *drv, TSL2561_config *config) {
+    drv->config           = config;
+    drv->gain             = TSL2561_GAIN_1X;
+    drv->integration_time = TSL2561_INTEGRATIONTIME_LONG;
+    drv->state            = SENSOR_INIT;
+
+    i2c_reg_recv8(TSL2561_COMMAND_BIT | TSL2561_REG_ID,
+		 (uint8_t*)&drv->id);
+}
+
+msg_t
+TSL2561_check(TSL2561_drv *drv) {
+    uint8_t rx;
+
+    msg_t msg;
+    if ((msg = i2c_reg_recv8(TSL2561_REG_ID, &rx)) < MSG_OK)
+	return msg;
+    if (!(rx & 0x0A))
+	return SENSOR_NOTFOUND;
+    return MSG_OK;
+}
+  
+msg_t
+TSL2561_stop(TSL2561_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2561_COMMAND_BIT | TSL2561_REG_CONTROL,
+	     TSL2561_CONTROL_POWEROFF };
+
+    return i2c_send((uint8_t*)&tx, sizeof(tx));
+}
+
+msg_t
+TSL2561_start(TSL2561_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2561_COMMAND_BIT | TSL2561_REG_CONTROL,
+	     TSL2561_CONTROL_POWERON };
+    
+    return i2c_send((uint8_t*)&tx, sizeof(tx));
+}
+
+msg_t
+TSL2561_setIntegrationTime(TSL2561_drv *drv,
+	TSL2561_integration_time_t time) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2561_COMMAND_BIT | TSL2561_REG_TIMING,
+	     (uint8_t)(time | drv->gain) };
+        
+    msg_t msg;
+    if ((msg = i2c_send((uint8_t*)&tx, sizeof(tx))) < MSG_OK)
+	return msg;
+    
+    drv->integration_time = time;
+    
+    return MSG_OK;
+}
+
+msg_t
+TSL2561_setGain(TSL2561_drv *drv,
+	TSL2561_gain_t gain) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2561_COMMAND_BIT | TSL2561_REG_TIMING,
+	     (uint8_t)(drv->integration_time | gain) };
+    
+    msg_t msg;
+    if ((msg = i2c_send((uint8_t*)&tx, sizeof(tx))) < MSG_OK)
+	return msg;
+
+    drv->gain = gain;
+
+    return MSG_OK;
+}
+
+unsigned int
+TSL2561_getAcquisitionTime(TSL2561_drv *drv) {
+    switch (drv->integration_time) {
+    case TSL2561_INTEGRATIONTIME_SHORT:
+	return CEILING(TSL2561_DELAY_INTTIME_SHORT , 1000);
+    case TSL2561_INTEGRATIONTIME_MEDIUM:
+	return CEILING(TSL2561_DELAY_INTTIME_MEDIUM, 1000);
+    case TSL2561_INTEGRATIONTIME_LONG:
+	return CEILING(TSL2561_DELAY_INTTIME_LONG  , 1000);
+    }
+    return -1;
+}
+
+
+msg_t
+TSL2561_readIlluminance(TSL2561_drv *drv,
+	unsigned int *illuminance) {
+    uint16_t broadband;
+    uint16_t ir;
+
+    /* Read channels */
+    msg_t msg;
+    if ((msg = _readChannel(drv, &broadband, &ir)) < MSG_OK)
+	return msg;
+
+    /* Calculate illuminance */
+    *illuminance =
+	calculateIlluminance(drv->integration_time, drv->gain,
+			     broadband, ir, drv->id.partno);
+    /* Ok */
+    return SENSOR_OK;
+}
+
diff --git a/os/various/devices_lib/sensors/tsl2561.h b/os/various/devices_lib/sensors/tsl2561.h
new file mode 100644
index 0000000..75e7c78
--- /dev/null
+++ b/os/various/devices_lib/sensors/tsl2561.h
@@ -0,0 +1,241 @@
+/*
+    TSL2561 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    tsl2561.h
+ * @brief   TSL2561 Light sensor interface module header.
+ *
+ * @{
+ */
+
+#ifndef _SENSOR_TSL2561_H_
+#define _SENSOR_TSL2561_H_
+
+#include <math.h>
+#include "i2c_helpers.h"
+#include "sensor.h"
+
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+#define TSL2561_CONTINUOUS_ACQUISITION_SUPPORTED   TRUE
+
+#define TSL2561_OVERLOADED        (-1)
+
+
+/* I2C address */
+#define TSL2561_I2CADDR_LOW          (0x29)
+#define TSL2561_I2CADDR_FLOAT        (0x39)
+#define TSL2561_I2CADDR_HIGH         (0x49)
+
+/**
+ * @brief Time necessary for the sensor to boot
+ */
+#define TSL2561_BOOTUP_TIME		0
+
+/**
+ * @brief Time necessary for the sensor to start
+ */
+#define TSL2561_STARTUP_TIME		0
+
+
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+#ifndef TSL2561_WITH_CS
+#define TSL2561_WITH_CS		  0
+#endif
+
+#ifndef TSL2561_WITH_T_FN_CL
+#define TSL2561_WITH_T_FN_CL	  1
+#endif
+
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+
+#define TSL2561_I2CADDR_DEFAULT        TSL2561_I2CADDR_FLOAT
+
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   TSL2561 configuration structure.
+ */
+typedef struct {
+    I2CHelper i2c; /* keep it first */
+} TSL2561_config;
+
+/**
+ * @brief   Available integration time
+ *
+ * @details Available integration time are:
+ *          13.7ms, 101ms, 402ms
+ */
+typedef enum {
+    TSL2561_INTEGRATIONTIME_SHORT      = 0x00,    /**< @brief  13.7ms */
+    TSL2561_INTEGRATIONTIME_MEDIUM     = 0x01,    /**< @brief 101.0ms */
+    TSL2561_INTEGRATIONTIME_LONG       = 0x02,    /**< @brief 402.0ms */
+} TSL2561_integration_time_t;
+
+/**
+ * @brief   Available gain
+ *
+ * @details Available gain are 1x, 16x
+ */
+typedef enum {
+    TSL2561_GAIN_1X                    = 0x00,    /**< @brief  1x gain */
+    TSL2561_GAIN_16X                   = 0x10,    /**< @brief 16x gain */
+} TSL2561_gain_t;
+
+/**
+ * @brief   TSL2561 configuration structure.
+ */
+typedef struct {
+    TSL2561_config  *config;
+    sensor_state_t   state;
+    TSL2561_gain_t   gain;
+    TSL2561_integration_time_t integration_time;
+    struct PACKED {
+	uint8_t revno  : 4;
+	uint8_t partno : 4; }  id;
+} TSL2561_drv;
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+/**
+ * @brief Initialize the sensor driver
+ */
+void
+TSL2561_init(TSL2561_drv *drv,
+	TSL2561_config *config);
+
+/**
+ * @brief Start the sensor
+ */
+msg_t
+TSL2561_start(TSL2561_drv *drv);
+
+/**
+ * @brief   Stop the sensor
+ *
+ * @details If the sensor support it, it will be put in low energy mode.
+ */
+msg_t
+TSL2561_stop(TSL2561_drv *drv);
+
+/**
+ * @brief   Check that the sensor is really present
+ */
+msg_t
+TSL2561_check(TSL2561_drv *drv);
+
+/**
+ * @brief Time in milli-seconds necessary for acquiring a naw measure
+ *
+ * @returns
+ *   unsigned int   time in millis-seconds
+ */
+unsigned int
+TSL2561_getAcquisitionTime(TSL2561_drv *drv);
+
+/**
+ * @brief Trigger a mesure acquisition
+ */
+static inline msg_t
+TSL2561_startMeasure(TSL2561_drv *drv) {
+    (void)drv;
+    return MSG_OK;
+};
+
+/**
+ * @brief Read the newly acquiered measure
+ *
+ * @note  According the the sensor design the measure read
+ *        can be any value acquired after the acquisition time
+ *        and the call to readMeasure.
+ */
+msg_t
+TSL2561_readMeasure(TSL2561_drv *drv,
+	unsigned int illuminance);
+
+msg_t
+TSL2561_setGain(TSL2561_drv *drv,
+	TSL2561_gain_t gain);
+
+msg_t
+TSL2561_setIntegrationTime(TSL2561_drv *drv,
+	TSL2561_integration_time_t time);
+
+/**
+ * @brief   Read temperature and humidity
+ *
+ * @details According to the sensor specification/configuration
+ *          (see #TSL2561_CONTINUOUS_ACQUISITION_SUPPORTED), 
+ *          if the sensor is doing continuous measurement
+ *          it's value will be requested and returned immediately.
+ *          Otherwise a measure is started, the necessary amount of
+ *          time for acquiring the value is spend sleeping (not spinning),
+ *          and finally the measure is read.
+ *
+ * @note    In continuous measurement mode, if you just started
+ *          the sensor, you will need to wait getAcquisitionTime()
+ *          in addition to the usual getStartupTime()
+
+ * @note    If using several sensors, it is better to start all the
+ *          measure together, wait for the sensor having the longuest
+ *          aquisition time, and finally read all the values
+ */
+msg_t
+TSL2561_readIlluminance(TSL2561_drv *drv,
+	unsigned int *illuminance);
+
+/**
+ * @brief   Return the illuminance value in Lux
+ *
+ * @details Use readIlluminance() for returning the humidity value.
+ *
+ * @note    Prefere readIlluminance()if you need better error handling.
+ *
+ * @return Illuminance in Lux
+ * @retval  unsigned int illuminace value 
+ * @retval  -1           on failure
+ */
+static inline unsigned int
+TSL2561_getIlluminance(TSL2561_drv *drv) {
+    unsigned int illuminance = -1;
+    TSL2561_readIlluminance(drv, &illuminance);
+    return illuminance;
+}
+
+
+#endif
+
diff --git a/os/various/devices_lib/sensors/tsl2591.c b/os/various/devices_lib/sensors/tsl2591.c
new file mode 100644
index 0000000..c0bbee0
--- /dev/null
+++ b/os/various/devices_lib/sensors/tsl2591.c
@@ -0,0 +1,272 @@
+/*
+    TSL2591 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ *
+ * DOC: http://ams.com/eng/content/download/389383/1251117/221235
+ */
+
+#define I2C_HELPERS_AUTOMATIC_DRV TRUE
+
+#include "hal.h"
+#include "i2c_helpers.h"
+#include "tsl2591.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+#define TSL2591_LUX_DF            (408.0F)
+#define TSL2591_LUX_COEFB         (1.64F)  // CH0 coefficient 
+#define TSL2591_LUX_COEFC         (0.59F)  // CH1 coefficient A
+#define TSL2591_LUX_COEFD         (0.86F)  // CH2 coefficient B
+
+/* I2C registers */
+#define TSL2591_REG_ENABLE        0x00
+#define TSL2591_REG_CONFIG        0x01 /**< @brief gain and integration */
+#define TSL2591_REG_AILTL         0x04
+#define TSL2591_REG_AILTH         0x05
+#define TSL2591_REG_AIHTL         0x06
+#define TSL2591_REG_AIHTH         0x07
+#define TSL2591_REG_NPAILTL       0x08
+#define TSL2591_REG_NPAILTH       0x09
+#define TSL2591_REG_NPAIHTL       0x0A
+#define TSL2591_REG_NPAIHTH       0x0B
+#define TSL2591_REG_PERSIST       0x0C
+#define TSL2591_REG_PID           0x11 /**< @brief Package ID */
+#define TSL2591_REG_ID            0x12 /**< @brief Device ID */
+#define TSL2591_REG_STATUS        0x13 /**< @brief Device status */
+#define TSL2591_REG_C0DATAL       0x14 /**< @brief CH0 ADC low  data byte */
+#define TSL2591_REG_C0DATAH       0x15 /**< @brief CH0 ADC high data byte */
+#define TSL2591_REG_C1DATAL       0x16 /**< @brief CH1 ADC low  data byte */
+#define TSL2591_REG_C1DATAH       0x17 /**< @brief CH1 ADC high data byte */
+
+#define TSL2591_REG_COMMAND       0x80 /**< @brief Select command register */
+#define TSL2591_REG_NORMAL        0x20 /**< @brief Normal opearation       */
+#define TSL2591_REG_SPECIAL       0x60 /**< @brief Special function        */
+
+#define TSL2591_ID_TSL2591        0x50
+
+#define TSL2591_VISIBLE           (2)       // channel 0 - channel 1
+#define TSL2591_INFRARED          (1)       // channel 1
+#define TSL2591_FULLSPECTRUM      (0)       // channel 0
+
+#define TSL2591_ENABLE_POWERON    (0x01)
+#define TSL2591_ENABLE_POWEROFF   (0x00)
+#define TSL2591_ENABLE_AEN        (0x02)
+#define TSL2591_ENABLE_AIEN       (0x10)
+
+#define TSL2591_CONTROL_RESET     (0x80)
+
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static inline uint32_t
+calculateIlluminance(TSL2591_integration_time_t integration_time,
+		     TSL2591_gain_t gain,
+		     uint16_t broadband, uint16_t ir) {
+  uint16_t atime, again;
+
+  /* Check for overflow conditions first */
+  if ((broadband == 0xFFFF) | (ir == 0xFFFF)) {
+      return 0xFFFFFFFF; /* Signal overflow */
+  }
+
+  switch (integration_time) {
+  case TSL2591_INTEGRATIONTIME_100MS : atime =   100; break;
+  case TSL2591_INTEGRATIONTIME_200MS : atime =   200; break;
+  case TSL2591_INTEGRATIONTIME_300MS : atime =   300; break;
+  case TSL2591_INTEGRATIONTIME_400MS : atime =   400; break;
+  case TSL2591_INTEGRATIONTIME_500MS : atime =   500; break;
+  case TSL2591_INTEGRATIONTIME_600MS : atime =   600; break;
+  }
+  
+  switch (gain) {
+  case TSL2591_GAIN_1X              : again =     1; break;
+  case TSL2591_GAIN_25X             : again =    25; break;
+  case TSL2591_GAIN_415X            : again =   415; break;
+  case TSL2591_GAIN_10000X          : again = 10000; break;
+  }
+
+  // cpl = (ATIME * AGAIN) / DF
+  float cpl  = ((float)(atime * again)) / ((float)TSL2591_LUX_DF);
+  float lux1 = ( ((float)broadband) - (TSL2591_LUX_COEFB * (float)ir) ) / cpl;
+  float lux2 = ( (TSL2591_LUX_COEFC * (float)broadband) -
+		 (TSL2591_LUX_COEFD * (float)ir       ) ) / cpl;
+  
+  return (uint32_t) (lux1 > lux2 ? lux1 : lux2);
+}
+
+static inline msg_t
+_readChannel(TSL2591_drv *drv, uint16_t *broadband, uint16_t *ir) {
+    msg_t msg;
+    if (((msg = i2c_reg_recv16_le(
+	  TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_C0DATAL,
+	  broadband)) < MSG_OK) ||
+	((msg = i2c_reg_recv16_le(
+	  TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_C1DATAL,
+	  ir       )) < MSG_OK))
+	return msg;
+
+    return MSG_OK;
+}
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
+
+void
+TSL2591_init(TSL2591_drv *drv, TSL2591_config *config) {
+    drv->config           = config;
+    drv->gain             = TSL2591_GAIN_1X;
+    drv->integration_time = TSL2591_INTEGRATIONTIME_100MS;
+    drv->state            = SENSOR_INIT;
+}
+  
+msg_t
+TSL2591_check(TSL2591_drv *drv) {
+    uint8_t id;
+
+    msg_t msg;
+    if ((msg = i2c_reg_recv8(TSL2591_REG_COMMAND | TSL2591_REG_NORMAL |
+			     TSL2591_REG_ID, &id)) < MSG_OK)
+	return msg;
+
+    if (id != TSL2591_ID_TSL2591)
+	return SENSOR_NOTFOUND;
+
+    return MSG_OK;
+}
+
+msg_t
+TSL2591_start(TSL2591_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx_config = {
+	TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_CONFIG,
+	(uint8_t)(drv->integration_time | drv->gain) };
+
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx_start = {
+	TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_ENABLE,
+	TSL2591_ENABLE_POWERON };
+
+    msg_t msg;
+
+    if (((msg = i2c_send((uint8_t*)&tx_config, sizeof(tx_config))) < MSG_OK) ||
+	((msg = i2c_send((uint8_t*)&tx_start,  sizeof(tx_start ))) < MSG_OK)) {
+	drv->state = SENSOR_ERROR;
+	return msg;
+    }
+    
+    drv->state = SENSOR_STARTED;
+    return MSG_OK;
+}
+
+msg_t
+TSL2591_stop(TSL2591_drv *drv) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx_stop = {
+	TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_ENABLE,
+	TSL2591_ENABLE_POWEROFF };
+    
+    return i2c_send((uint8_t*)&tx_stop, sizeof(tx_stop));
+}
+
+msg_t
+TSL2591_setIntegrationTime(TSL2591_drv *drv,
+	TSL2591_integration_time_t time) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_CONFIG,
+	     (uint8_t)(time | drv->gain) };
+    
+    msg_t msg;
+    if ((msg = i2c_send((uint8_t*)&tx, sizeof(tx))) < MSG_OK)
+	return msg;
+    
+    drv->integration_time = time;
+    
+    return MSG_OK;
+}
+
+msg_t
+TSL2591_setGain(TSL2591_drv *drv,
+	TSL2591_gain_t gain) {
+    struct __attribute__((packed)) {
+	uint8_t reg;
+	uint8_t conf;
+    } tx = { TSL2591_REG_COMMAND | TSL2591_REG_NORMAL | TSL2591_REG_CONFIG,
+	     (uint8_t)(drv->integration_time | gain) };
+
+    msg_t msg;
+    if ((msg = i2c_send((uint8_t*)&tx, sizeof(tx))) < MSG_OK)
+	return msg;
+
+    drv->gain = gain;
+
+    return MSG_OK;
+}
+
+unsigned int
+TSL2591_getAcquisitionTime(TSL2591_drv *drv) {
+    switch (drv->integration_time) {
+    case TSL2591_INTEGRATIONTIME_100MS : return 100;
+    case TSL2591_INTEGRATIONTIME_200MS : return 200;
+    case TSL2591_INTEGRATIONTIME_300MS : return 300; 
+    case TSL2591_INTEGRATIONTIME_400MS : return 400; 
+    case TSL2591_INTEGRATIONTIME_500MS : return 500; 
+    case TSL2591_INTEGRATIONTIME_600MS : return 600; 
+    }
+    return -1;
+}
+
+
+msg_t
+TSL2591_readIlluminance(TSL2591_drv *drv,
+	unsigned int *illuminance) {
+    uint16_t broadband;
+    uint16_t ir;
+
+    /* Read channels */
+    msg_t msg;
+    if ((msg = _readChannel(drv, &broadband, &ir)) < MSG_OK)
+	return msg;
+
+    /* Calculate illuminance */
+    *illuminance =
+	calculateIlluminance(drv->integration_time, drv->gain,
+			     broadband, ir);
+    /* Ok */
+    return SENSOR_OK;
+}
+
diff --git a/os/various/devices_lib/sensors/tsl2591.h b/os/various/devices_lib/sensors/tsl2591.h
new file mode 100644
index 0000000..8320eb8
--- /dev/null
+++ b/os/various/devices_lib/sensors/tsl2591.h
@@ -0,0 +1,238 @@
+/*
+    TSL2591 for ChibiOS/RT - Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    tsl2591.h
+ * @brief   TSL2591 Light sensor interface module header.
+ *
+ * @{
+ */
+
+#ifndef _SENSOR_TSL2591_H_
+#define _SENSOR_TSL2591_H_
+
+#include <math.h>
+#include "i2c_helpers.h"
+#include "sensor.h"
+
+
+/*===========================================================================*/
+/* Driver constants.                                                         */
+/*===========================================================================*/
+
+/**
+ * @brief Device sensor continuous acquisition support.
+ */
+#define TSL2591_CONTINUOUS_ACQUISITION_SUPPORTED   TRUE
+
+/**
+ * @brief I2C address. 
+ */
+#define TSL2591_I2CADDR_FIXED           0x29
+
+/**
+ * @brief Time necessary for the sensor to boot
+ */
+#define TSL2591_BOOTUP_TIME		0
+
+/**
+ * @brief Time necessary for the sensor to start
+ */
+#define TSL2591_STARTUP_TIME		0
+
+
+
+/*===========================================================================*/
+/* Driver pre-compile time settings.                                         */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+/**
+ * @brief Default I2C address (when pin unconfigured)
+ */
+#define TSL2591_I2CADDR_DEFAULT     TSL2591_I2CADDR_FIXED
+
+
+/*===========================================================================*/
+/* Driver data structures and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   TSL2591 configuration structure.
+ */
+typedef struct {
+    I2CHelper i2c; /* keep it first */
+} TSL2591_config;
+
+/**
+ * @brief   Available integration time
+ *
+ * @details Available integration time are:
+ *          100ms, 200ms, 300ms, 400ms, 500ms and 600ms
+ */
+typedef enum {
+    TSL2591_INTEGRATIONTIME_100MS     = 0x00, /**< @brief 100ms */
+    TSL2591_INTEGRATIONTIME_200MS     = 0x01, /**< @brief 200ms */
+    TSL2591_INTEGRATIONTIME_300MS     = 0x02, /**< @brief 300ms */
+    TSL2591_INTEGRATIONTIME_400MS     = 0x03, /**< @brief 400ms */
+    TSL2591_INTEGRATIONTIME_500MS     = 0x04, /**< @brief 500ms */
+    TSL2591_INTEGRATIONTIME_600MS     = 0x05, /**< @brief 600ms */
+} TSL2591_integration_time_t;
+
+/**
+ * @brief   Available gain
+ *
+ * @details Available gain are 1x, 25x, 415x, 10000x
+ */
+typedef enum {
+    TSL2591_GAIN_1X                  = 0x00, /**< @brief     1x gain */
+    TSL2591_GAIN_25X                 = 0x10, /**< @brief    25x gain */
+    TSL2591_GAIN_415X                = 0x20, /**< @brief   415x gain */
+    TSL2591_GAIN_10000X              = 0x30, /**< @brief 10000x gain */
+} TSL2591_gain_t;
+
+/**
+ * @brief   TSL2591 configuration structure.
+ */
+typedef struct {
+    TSL2591_config  *config;
+    sensor_state_t   state;
+    TSL2591_gain_t gain;
+    TSL2591_integration_time_t integration_time;
+} TSL2591_drv;
+
+/*===========================================================================*/
+/* Driver macros.                                                            */
+/*===========================================================================*/
+
+
+/*===========================================================================*/
+/* External declarations.                                                    */
+/*===========================================================================*/
+
+/**
+ * @brief Initialize the sensor driver
+ */
+void
+TSL2591_init(TSL2591_drv *drv,
+	TSL2591_config *config);
+
+/**
+ * @brief Start the sensor
+ */
+msg_t
+TSL2591_start(TSL2591_drv *drv);
+
+/**
+ * @brief   Stop the sensor
+ *
+ * @details If the sensor support it, it will be put in low energy mode.
+ */
+msg_t
+TSL2591_stop(TSL2591_drv *drv);
+
+/**
+ * @brief   Check that the sensor is really present
+ */
+msg_t
+TSL2591_check(TSL2591_drv *drv);
+
+/**
+ * @brief Time in milli-seconds necessary for acquiring a naw measure
+ *
+ * @returns
+ *   unsigned int   time in millis-seconds
+ */
+unsigned int
+TSL2591_getAcquisitionTime(TSL2591_drv *drv);
+
+/**
+ * @brief Trigger a mesure acquisition
+ */
+static inline msg_t
+TSL2591_startMeasure(TSL2591_drv *drv) {
+    (void)drv;
+    return MSG_OK;
+};
+
+
+msg_t
+TSL2591_setGain(TSL2591_drv *drv,
+	TSL2591_gain_t gain);
+
+msg_t
+TSL2591_setIntegrationTime(TSL2591_drv *drv,
+	TSL2591_integration_time_t time);
+
+/**
+ * @brief Read the newly acquiered measure
+ *
+ * @note  According the the sensor design the measure read
+ *        can be any value acquired after the acquisition time
+ *        and the call to readMeasure.
+ */
+msg_t
+TSL2591_readMeasure(TSL2591_drv *drv,
+	unsigned int illuminance);
+
+
+/**
+ * @brief   Read temperature and humidity
+ *
+ * @details According to the sensor specification/configuration
+ *          (see #TSL2591_CONTINUOUS_ACQUISITION_SUPPORTED), 
+ *          if the sensor is doing continuous measurement
+ *          it's value will be requested and returned immediately.
+ *          Otherwise a measure is started, the necessary amount of
+ *          time for acquiring the value is spend sleeping (not spinning),
+ *          and finally the measure is read.
+ *
+ * @note    In continuous measurement mode, if you just started
+ *          the sensor, you will need to wait getAcquisitionTime()
+ *          in addition to the usual getStartupTime()
+
+ * @note    If using several sensors, it is better to start all the
+ *          measure together, wait for the sensor having the longuest
+ *          aquisition time, and finally read all the values
+ */
+msg_t
+TSL2591_readIlluminance(TSL2591_drv *drv,
+	unsigned int *illuminance);
+
+/**
+ * @brief   Return the illuminance value in Lux
+ *
+ * @details Use readIlluminance() for returning the humidity value.
+ *
+ * @note    Prefere readIlluminance()if you need better error handling.
+ *
+ * @return Illuminance in Lux
+ * @retval  unsigned int illuminace value 
+ * @retval  -1           on failure
+ */
+static inline unsigned int
+TSL2591_getIlluminance(TSL2591_drv *drv) {
+    unsigned int illuminance = -1;
+    TSL2591_readIlluminance(drv, &illuminance);
+    return illuminance;
+}
+
+
+#endif
+
diff --git a/os/various/gdb.mk b/os/various/gdb.mk
new file mode 100644
index 0000000..aa636a8
--- /dev/null
+++ b/os/various/gdb.mk
@@ -0,0 +1,13 @@
+GDB               ?= arm-none-eabi-gdb
+GDB_PROGRAM       ?= $(BUILDDIR)/$(PROJECT).elf
+GDB_PORT          ?= 2331
+GDB_START_ADDRESS ?= 0
+GDB_BREAK         ?= main
+
+gdb-debug:
+	printf "target remote localhost:$(GDB_PORT)\nmem $(GDB_START_ADDRESS) 0\nbreak $(GDB_BREAK)\nload\nmon reset\ncontinue" > .gdbinit
+	$(GDB) --command=.gdbinit $(GDB_PROGRAM)
+
+
+
+.PHONY: gdb-debug
diff --git a/os/various/i2c_helpers.h b/os/various/i2c_helpers.h
new file mode 100644
index 0000000..4b57174
--- /dev/null
+++ b/os/various/i2c_helpers.h
@@ -0,0 +1,283 @@
+/*
+    Copyright (C) 2016 Stephane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef I2C_HELPERS_H
+#define I2C_HELPERS_H
+
+#include "hal.h"
+#include "bswap.h"
+
+
+typedef struct {
+    /**
+     * @brief Pointer to the I2C driver.
+     */
+    I2CDriver *driver;
+    /**
+     * @brief I2C address.
+     */
+    i2caddr_t addr;
+} I2CHelper;
+
+
+
+#if !defined(I2C_HELPERS_AUTOMATIC_DRV) || (I2C_HELPERS_AUTOMATIC_DRV == FALSE)
+
+#define i2c_send(i2c, txbuf, txbytes)					\
+    _i2c_send(i2c, txbuf, txbytes)
+#define i2c_transmit(i2c, txbuf, txbytes, rxbuf, rxbytes)		\
+    _i2c_transmit(i2c, txbuf, txbytes, rxbuf, rxbytes)
+#define i2c_receive(i2, rxbuf, rxbytes)					\
+    _i2c_receive(i2c, rxbuf, rxbytes)
+
+#define i2c_send_timeout(i2c, txbuf, txbytes)				\
+    _i2c_send(i2c, txbuf, txbytes)
+#define i2c_transmit_timeout(i2c, txbuf, txbytes, rxbuf, rxbytes)	\
+    _i2c_transmit(i2c, txbuf, txbytes, rxbuf, rxbytes)
+#define i2c_receive_timeout(i2, rxbuf, rxbytes)				\
+    _i2c_receive(i2c, rxbuf, rxbytes)
+
+#define i2c_reg(i2c, reg)						\
+    _i2c_reg(i2c, reg) 
+
+#define i2c_reg_recv8(i2c, reg, val)					\
+    _i2c_reg_recv8(i2c, reg, val)		
+#define i2c_reg_recv16(i2c, reg, val)					\
+    _i2c_reg_recv16(i2c, reg, val)		
+#define i2c_reg_recv16_le(i2c, reg, val)				\
+    _i2c_reg_recv16_le(i2c, reg, val)
+#define i2c_reg_recv16_be(i2c, reg, val)				\
+    _i2c_reg_recv16_be(i2c, reg, val) 
+#define i2c_reg_recv32(i2c, reg, val)					\
+    _i2c_reg_recv32(i2c, reg, val)
+#define i2c_reg_recv32_le(i2c, reg, val)				\
+    _i2c_reg_recv32_le(i2c, reg, val)
+#define i2c_reg_recv32_be(i2c, reg, val)				\
+    _i2c_reg_recv32_be(i2c, reg, val)
+
+#define i2c_recv8(i2c, val)						\
+    _i2c_recv8(i2c, val)		
+#define i2c_recv16(i2c, val)						\
+    _i2c_recv16(i2c, val)		
+#define i2c_recv16_le(i2c, val)						\
+    _i2c_recv16_le(i2c, val)
+#define i2c_recv16_be(i2c, val)						\
+    _i2c_recv16_be(i2c, val) 
+#define i2c_recv32(i2c, val)						\
+    _i2c_recv32(i2c, val)
+#define i2c_recv32_le(i2c, val)						\
+    _i2c_recv32_le(i2c, val)
+#define i2c_recv32_be(i2c, val)						\
+    _i2c_recv32_be(i2c, val)
+
+#else
+
+#define i2c_send(txbuf, txbytes)					\
+    _i2c_send(&drv->config->i2c, txbuf, txbytes)
+#define i2c_transmit(txbuf, txbytes, rxbuf, rxbytes)			\
+    _i2c_transmit(&drv->config->i2c, txbuf, txbytes, rxbuf, rxbytes)
+#define i2c_receive(rxbuf, rxbytes)					\
+    _i2c_receive(&drv->config->i2c, rxbuf, rxbytes)
+
+#define i2c_send_timeout(txbuf, txbytes)				\
+    _i2c_send(&drv->config->i2c, txbuf, txbytes)
+#define i2c_transmit_timeout(txbuf, txbytes, rxbuf, rxbytes)	\
+    _i2c_transmit(&drv->config->i2c, txbuf, txbytes, rxbuf, rxbytes)
+#define i2c_receive_timeout(rxbuf, rxbytes)				\
+    _i2c_receive(&drv->config->i2c, rxbuf, rxbytes)
+
+
+#define i2c_reg(reg)							\
+    _i2c_reg(&drv->config->i2c, reg) 
+
+#define i2c_reg_recv8(reg, val)						\
+    _i2c_reg_recv8(&drv->config->i2c, reg, val)		
+#define i2c_reg_recv16(reg, val)					\
+    _i2c_reg_recv16(&drv->config->i2c, reg, val)		
+#define i2c_reg_recv16_le(reg, val)					\
+    _i2c_reg_recv16_le(&drv->config->i2c, reg, val)
+#define i2c_reg_recv16_be(reg, val)					\
+    _i2c_reg_recv16_be(&drv->config->i2c, reg, val) 
+#define i2c_reg_recv32(reg, val)					\
+    _i2c_reg_recv32(&drv->config->i2c, reg, val)
+#define i2c_reg_recv32_le(reg, val)					\
+    _i2c_reg_recv32_le(&drv->config->i2c, reg, val)
+#define i2c_reg_recv32_be(reg, val)					\
+    _i2c_reg_recv32_be(&drv->config->i2c, reg, val)
+
+#define i2c_recv8(val)							\
+    _i2c_recv8(&drv->config->i2c, val)		
+#define i2c_recv16(val)							\
+    _i2c_recv16(&drv->config->i2c, val)		
+#define i2c_recv16_le(val)						\
+    _i2c_recv16_le(&drv->config->i2c, val)
+#define i2c_recv16_be(val)						\
+    _i2c_recv16_be(&drv->config->i2c, val) 
+#define i2c_recv32(val)							\
+    _i2c_recv32(&drv->config->i2c, val)
+#define i2c_recv32_le(val)						\
+    _i2c_recv32_le(&drv->config->i2c, val)
+#define i2c_recv32_be(val)						\
+    _i2c_recv32_be(&drv->config->i2c, val)
+
+#endif
+
+
+
+
+
+static inline msg_t
+_i2c_send(I2CHelper *i2c, const uint8_t *txbuf, size_t txbytes) {
+    return i2cMasterTransmitTimeout(i2c->driver, i2c->addr,
+			    txbuf, txbytes, NULL, 0, TIME_INFINITE);
+};
+
+static inline msg_t
+_i2c_transmit(I2CHelper *i2c, const uint8_t *txbuf, size_t txbytes,
+	     uint8_t *rxbuf, size_t rxbytes) {
+    return i2cMasterTransmitTimeout(i2c->driver, i2c->addr,
+			    txbuf, txbytes, rxbuf, rxbytes, TIME_INFINITE);
+}
+
+static inline msg_t
+_i2c_receive(I2CHelper *i2c, uint8_t *rxbuf, size_t rxbytes) {
+    return i2cMasterReceiveTimeout(i2c->driver, i2c->addr,
+			    rxbuf, rxbytes, TIME_INFINITE);
+};
+
+
+
+static inline msg_t
+_i2c_send_timeout(I2CHelper *i2c, const uint8_t *txbuf, size_t txbytes,
+		 systime_t timeout) {
+    return i2cMasterTransmitTimeout(i2c->driver, i2c->addr,
+				    txbuf, txbytes, NULL, 0, timeout);
+};
+
+static inline msg_t
+_i2c_transmit_timeout(I2CHelper *i2c, const uint8_t *txbuf, size_t txbytes,
+		     uint8_t *rxbuf, size_t rxbytes, systime_t timeout) {
+    return i2cMasterTransmitTimeout(i2c->driver, i2c->addr,
+				    txbuf, txbytes, rxbuf, rxbytes, timeout);
+}
+
+static inline msg_t
+_i2c_receive_timeout(I2CHelper *i2c, uint8_t *rxbuf, size_t rxbytes, systime_t timeout) {
+    return i2cMasterReceiveTimeout(i2c->driver, i2c->addr,
+			    rxbuf, rxbytes, timeout);
+};
+
+
+/*======================================================================*/
+
+
+static inline msg_t
+_i2c_reg(I2CHelper *i2c, uint8_t reg) {
+    return _i2c_transmit(i2c, &reg, sizeof(reg), NULL, 0);
+};
+
+/*======================================================================*/
+
+static inline msg_t
+_i2c_reg_recv8(I2CHelper *i2c, uint8_t reg, uint8_t *val) {
+    return _i2c_transmit(i2c, &reg, sizeof(reg), (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_reg_recv16(I2CHelper *i2c, uint8_t reg, uint16_t *val) {
+    return _i2c_transmit(i2c, &reg, sizeof(reg), (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_reg_recv16_le(I2CHelper *i2c, uint8_t reg, uint16_t *val) {
+    int msg = _i2c_reg_recv16(i2c, reg, val);
+    if (msg >= 0) *val = le16_to_cpu(*val);
+    return msg;
+};
+
+static inline msg_t
+_i2c_reg_recv16_be(I2CHelper *i2c, uint8_t reg, uint16_t *val) {
+    int msg = _i2c_reg_recv16(i2c, reg, val);
+    if (msg >= 0) *val = be16_to_cpu(*val);
+    return msg;
+};    
+
+static inline msg_t
+_i2c_reg_recv32(I2CHelper *i2c, uint8_t reg, uint32_t *val) {
+    return _i2c_transmit(i2c, &reg, sizeof(reg), (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_reg_recv32_le(I2CHelper *i2c, uint8_t reg, uint32_t *val) {
+    int msg = _i2c_reg_recv32(i2c, reg, val);
+    if (msg >= 0) *val = le32_to_cpu(*val);
+    return msg;
+};
+
+static inline msg_t
+_i2c_reg_recv32_be(I2CHelper *i2c, uint8_t reg, uint32_t *val) {
+    int msg = _i2c_reg_recv32(i2c, reg, val);
+    if (msg >= 0) *val = be32_to_cpu(*val);
+    return msg;
+};
+
+
+/*======================================================================*/
+
+static inline msg_t
+_i2c_recv8(I2CHelper *i2c, uint8_t *val) {
+    return _i2c_receive(i2c, (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_recv16(I2CHelper *i2c, uint16_t *val) {
+    return _i2c_receive(i2c, (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_recv16_le(I2CHelper *i2c, uint16_t *val) {
+    int msg = _i2c_recv16(i2c, val);
+    if (msg >= 0) *val = le16_to_cpu(*val);
+    return msg;
+};
+
+static inline msg_t
+_i2c_recv16_be(I2CHelper *i2c, uint16_t *val) {
+    int msg = _i2c_recv16(i2c, val);
+    if (msg >= 0) *val = be16_to_cpu(*val);
+    return msg;
+};
+
+static inline msg_t
+_i2c_recv32(I2CHelper *i2c, uint32_t *val) {
+    return _i2c_receive(i2c, (uint8_t*)val, sizeof(val));
+};
+
+static inline msg_t
+_i2c_recv32_le(I2CHelper *i2c, uint32_t *val) {
+    int msg = _i2c_recv32(i2c, val);
+    if (msg >= 0) *val = le32_to_cpu(*val);
+    return msg;
+};
+
+static inline msg_t
+_i2c_recv32_be(I2CHelper *i2c, uint32_t *val) {
+    int msg = _i2c_recv32(i2c, val);
+    if (msg >= 0) *val = be32_to_cpu(*val);
+    return msg;
+};
+
+#endif
diff --git a/os/various/jlink.mk b/os/various/jlink.mk
new file mode 100644
index 0000000..1a13bd3
--- /dev/null
+++ b/os/various/jlink.mk
@@ -0,0 +1,33 @@
+JLINK               ?= JLinkExe
+JLINK_GDB_SERVER    ?= JLinkGDBServer
+JLINK_GDB_PORT      ?= 2331
+JLINK_IF            ?= swd
+JLINK_SPEED         ?= 2000
+JLINK_START_ADDRESS ?= 0
+JLINK_BURN          ?= $(BUILDDIR)/$(PROJECT).bin
+JLINK_COMMON_OPTS   ?= -device $(JLINK_DEVICE) -if $(JLINK_IF) -speed $(JLINK_SPEED)
+
+jlink-flash:
+	printf "$(JLINK_PRE_FLASH)\nloadbin $(JLINK_BURN) $(JLINK_START_ADDRESS)\nverifybin $(JLINK_BURN) $(JLINK_START_ADDRESS)\nr\ng\nexit\n" > $(BUILDDIR)/flash.jlink
+	$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/flash.jlink
+
+ifneq ($(SOFTDEVICE),)
+jlink-flash-softdevice:
+	printf "w4 4001e504 1\nloadbin $(NRF51SDK)/components/softdevice/$(SOFTDEVICE)/hex/$(SOFTDEVICE)_nrf51_$(SOFTDEVICE_RELEASE)_softdevice.hex 0\nr\ng\nexit\n" > $(BUILDDIR)/flash.softdevice.jlink
+	$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/flash.softdevice.jlink
+endif
+
+ifneq ($(JLINK_ERASE_ALL),)
+jlink-erase-all: 
+	printf "$(JLINK_ERASE_ALL)\nr\nexit\n" > $(BUILDDIR)/erase-all.jlink
+	$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/erase-all.jlink
+endif
+
+jlink-reset: 
+	printf "r\nexit\n" > $(BUILDDIR)/reset.jlink
+	$(JLINK) $(JLINK_COMMON_OPTS) $(BUILDDIR)/reset.jlink
+
+jlink-debug-server:
+	$(JLINK_GDB_SERVER) $(JLINK_COMMON_OPTS) -port $(JLINK_GDB_PORT)
+
+.PHONY: jlink-flash jlink-flash-softdevice jlink-erase-all jlink-reset jlink-debug-server
diff --git a/testhal/NRF51/NRF51822/RNG/Makefile b/testhal/NRF51/NRF51822/RNG/Makefile
new file mode 100644
index 0000000..a42eae4
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/Makefile
@@ -0,0 +1,230 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT =

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# Linker extra options here.

+ifeq ($(USE_LDOPT),)

+  USE_LDOPT =

+endif

+

+# Enable this if you want link time optimizations (LTO)

+ifeq ($(USE_LTO),)

+  USE_LTO = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+# If enabled, this option makes the build process faster by not compiling

+# modules not used in the current configuration.

+ifeq ($(USE_SMART_BUILD),)

+  USE_SMART_BUILD = yes

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Stack size to be allocated to the Cortex-M process stack. This stack is

+# the stack used by the main() thread.

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  USE_PROCESS_STACKSIZE = 0x200

+endif

+

+# Stack size to the allocated to the Cortex-M main/exceptions stack. This

+# stack is used for processing interrupts and exceptions.

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  USE_EXCEPTIONS_STACKSIZE = 0x400

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+#CHIBIOS = ../../../../../ChibiOS-RT

+#CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib

+CHIBIOS = /home/sdalu/ChibiOS/ChibiOS_16.1.2

+CHIBIOS_CONTRIB = /home/sdalu/ChibiOS/Z/ChibiOS-Contrib

+

+# Startup files.

+include $(CHIBIOS_CONTRIB)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_nrf51.mk

+# HAL-OSAL files (optional).

+include $(CHIBIOS)/os/hal/hal.mk

+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk

+include $(CHIBIOS_CONTRIB)/os/hal/ports/NRF51/NRF51822/platform.mk

+include $(CHIBIOS_CONTRIB)/os/hal/boards/NRF51-DK/board.mk

+include $(CHIBIOS)/os/hal/osal/rt/osal.mk

+# RTOS files (optional).

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk

+

+

+# Define linker script file here

+LDSCRIPT= $(STARTUPLD)/NRF51822.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(STARTUPSRC) \

+       $(KERNSRC) \

+       $(PORTSRC) \

+       $(OSALSRC) \

+       $(HALSRC) \

+       $(PLATFORMSRC) \

+       $(BOARDSRC) \

+       $(TESTSRC) \

+       $(CHIBIOS)/os/various/shell.c \

+       $(CHIBIOS)/os/hal/lib/streams/memstreams.c \

+       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \

+       main.c

+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+

+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

+         $(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m0

+

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+AR   = $(TRGT)ar

+OD   = $(TRGT)objdump

+SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra -Wundef

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC

+include $(RULESPATH)/rules.mk

+

+

+# Flash

+JLINK_DEVICE    = nrf51422

+JLINK_PRE_FLASH = w4 4001e504 1

+JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100

+

+

+include /home/sdalu/ChibiOS/W/ChibiOS-Contrib/os/various/jlink.mk

+include /home/sdalu/ChibiOS/W/ChibiOS-Contrib/os/various/gdb.mk

+

+flash: all jlink-flash

+debug: gdb-debug

diff --git a/testhal/NRF51/NRF51822/RNG/chconf.h b/testhal/NRF51/NRF51822/RNG/chconf.h
new file mode 100644
index 0000000..20d7b4b
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/chconf.h
@@ -0,0 +1,499 @@
+/*

+    Copyright (C) 2016 Stephane D'Alu

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 1000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 0

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 20

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       FALSE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_QUEUES                   TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_TRACE                 TRUE

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/NRF51/NRF51822/RNG/halconf.h b/testhal/NRF51/NRF51822/RNG/halconf.h
new file mode 100644
index 0000000..7132e9c
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/halconf.h
@@ -0,0 +1,178 @@
+/*

+    Copyright (C) 2016 Stephane D'Alu

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              TRUE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 FALSE

+#endif

+

+#include "halconf_community.h"

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/NRF51/NRF51822/RNG/halconf_community.h b/testhal/NRF51/NRF51822/RNG/halconf_community.h
new file mode 100644
index 0000000..a85b95f
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/halconf_community.h
@@ -0,0 +1,117 @@
+/*
+    Copyright (C) 2016 Stéphane D'Alu
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _HALCONF_COMMUNITY_H_
+#define _HALCONF_COMMUNITY_H_
+
+/**
+ * @brief   Enables the community overlay.
+ */
+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
+#define HAL_USE_COMMUNITY           TRUE
+#endif
+/**
+ * @brief   Enables the FSMC subsystem.
+ */
+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC                FALSE
+#endif
+
+/**
+ * @brief   Enables the NAND subsystem.
+ */
+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
+#define HAL_USE_NAND                FALSE
+#endif
+
+/**
+ * @brief   Enables the 1-wire subsystem.
+ */
+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
+#define HAL_USE_ONEWIRE             FALSE
+#endif
+
+/**
+ * @brief   Enables the EICU subsystem.
+ */
+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
+#define HAL_USE_EICU                FALSE
+#endif
+
+/**
+ * @brief   Enables the community subsystem.
+ */
+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
+#define HAL_USE_CRC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the community subsystem.
+ */
+#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
+#define HAL_USE_RNG                 TRUE
+#endif
+
+/*===========================================================================*/
+/* FSMCNAND driver related settings.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define NAND_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* 1-wire driver related settings.                                           */
+/*===========================================================================*/
+/**
+ * @brief   Enables strong pull up feature.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_STRONG_PULLUP   FALSE
+
+/**
+ * @brief   Enables search ROM feature.
+ * @note    Disabling this option saves both code and data space.
+ */
+#define ONEWIRE_USE_SEARCH_ROM      FALSE
+
+/*===========================================================================*/
+/* CRC driver settings.                                                      */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables DMA engine when performing CRC transactions.
+ * @note    Enabling this option also enables asynchronous API.
+ */
+#if !defined(CRC_USE_DMA) || defined(__DOXYGEN__)
+#define CRC_USE_DMA                 FALSE
+#endif
+
+/**
+ * @brief   Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define CRC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+#endif /* _HALCONF_COMMUNITY_H_ */
+
+/** @} */
diff --git a/testhal/NRF51/NRF51822/RNG/main.c b/testhal/NRF51/NRF51822/RNG/main.c
new file mode 100644
index 0000000..b9572b8
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/main.c
@@ -0,0 +1,118 @@
+/*

+    Copyright (C) 2016 Stephane D'Alu

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "ch.h"

+#include "hal.h"

+#include "shell.h"

+#include "chprintf.h"

+#include <stdlib.h>

+

+

+/*

+ * Command Random

+ */

+#define RANDOM_BUFFER_SIZE 1024

+static uint8_t random_buffer[RANDOM_BUFFER_SIZE];

+

+static void cmd_random(BaseSequentialStream *chp, int argc, char *argv[]) {

+    uint16_t size = 16;

+    uint16_t i    = 0;

+    uint8_t  nl   = 0;

+    

+    if (argc > 0) {

+	size = atoi(argv[0]);

+    }

+

+    if (size > RANDOM_BUFFER_SIZE) {

+	chprintf(chp, "random: maximum size is %d.\r\n", RANDOM_BUFFER_SIZE);

+	return;

+    }

+    

+    chprintf(chp, "Fetching %d random byte(s):\r\n", size);

+

+    rngStart(&RNGD1, NULL);

+    rngWrite(&RNGD1, random_buffer, size, TIME_INFINITE);

+    rngStop(&RNGD1);

+

+    for (i = 0 ; i < size ; i++) {

+	chprintf(chp, "%02x ", random_buffer[i]);

+	if (nl = (((i+1) % 20) == 0))

+	    chprintf(chp, "\r\n");

+    }

+    if (!nl)

+	chprintf(chp, "\r\n");

+    

+}

+

+

+/*

+ * Shell

+ */

+#define SHELL_WA_SIZE   THD_WORKING_AREA_SIZE(2048)

+

+static const ShellCommand commands[] = {

+  {"random", cmd_random}, 

+  {NULL, NULL}

+};

+

+static const ShellConfig shell_cfg1 = {

+  (BaseSequentialStream *)&SD1,

+  commands

+};

+

+

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+

+  /*

+   * Serial device

+   */

+  SerialConfig serial_config = {

+      .speed   = 115200,

+      .tx_pad  = UART_TX,

+      .rx_pad  = UART_RX,

+  };

+  sdStart(&SD1, &serial_config);

+

+  

+  /*

+   * Shell manager initialization.

+   */

+  shellInit();

+  shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);

+  

+

+  /*

+   * Normal main() thread activity, in this demo it does nothing.

+   */

+  while (true) {

+      chThdSleepMilliseconds(500);

+      palTogglePad(IOPORT1, LED1);

+  }

+}

diff --git a/testhal/NRF51/NRF51822/RNG/mcuconf.h b/testhal/NRF51/NRF51822/RNG/mcuconf.h
new file mode 100644
index 0000000..7977f4b
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/mcuconf.h
@@ -0,0 +1,24 @@
+/*

+    Copyright (C) 2016 Stephane D'Alu

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _MCUCONF_H_

+#define _MCUCONF_H_

+

+#define NRF51_RNG_USE_RNG1 		   TRUE

+#define NRF51_SERIAL_USE_UART0             TRUE

+

+

+#endif /* _MCUCONF_H_ */

diff --git a/testhal/NRF51/NRF51822/RNG/readme.txt b/testhal/NRF51/NRF51822/RNG/readme.txt
new file mode 100644
index 0000000..02f4cc7
--- /dev/null
+++ b/testhal/NRF51/NRF51822/RNG/readme.txt
@@ -0,0 +1,17 @@
+*****************************************************************************

+** ChibiOS/HAL - GPT driver demo for NRF51x22.                             **

+*****************************************************************************

+

+** TARGET **

+

+The demo runs on an NRF51-DK board.

+

+** The Demo **

+

+The application demonstrates the use of the NRF51x22 RNG driver.

+

+** Board Setup **

+

+** Build Procedure **

+

+Just modify the TRGT line in the makefile in order to use different GCC ports.

diff --git a/testhal/STM32/STM32F3xx/EEProm/Makefile b/testhal/STM32/STM32F3xx/EEProm/Makefile
new file mode 100644
index 0000000..198f0d1
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/Makefile
@@ -0,0 +1,217 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT = 

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# Linker extra options here.

+ifeq ($(USE_LDOPT),)

+  USE_LDOPT = 

+endif

+

+# Enable this if you want link time optimizations (LTO)

+ifeq ($(USE_LTO),)

+  USE_LTO = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+# If enabled, this option makes the build process faster by not compiling

+# modules not used in the current configuration.

+ifeq ($(USE_SMART_BUILD),)

+  USE_SMART_BUILD = yes

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Stack size to be allocated to the Cortex-M process stack. This stack is

+# the stack used by the main() thread.

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  USE_PROCESS_STACKSIZE = 0x400

+endif

+

+# Stack size to the allocated to the Cortex-M main/exceptions stack. This

+# stack is used for processing interrupts and exceptions.

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  USE_EXCEPTIONS_STACKSIZE = 0x400

+endif

+

+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).

+ifeq ($(USE_FPU),)

+  USE_FPU = no

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+CHIBIOS = ../../../../../ChibiOS-RT

+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib

+# Startup files.

+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk

+# HAL-OSAL files (optional).

+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk

+include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk

+include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk

+include $(CHIBIOS)/os/hal/osal/rt/osal.mk

+# RTOS files (optional).

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk

+# Other files (optional).

+#include $(CHIBIOS)/test/rt/test.mk

+

+# Define linker script file here

+LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(STARTUPSRC) \

+       $(KERNSRC) \

+       $(PORTSRC) \

+       $(OSALSRC) \

+       $(HALSRC) \

+       $(PLATFORMSRC) \

+       $(BOARDSRC) \

+       $(TESTSRC) \

+       main.c

+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+

+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

+         $(CHIBIOS)/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m4

+

+#TRGT = arm-elf-

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+AR   = $(TRGT)ar

+OD   = $(TRGT)objdump

+SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra -Wundef

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC

+include $(RULESPATH)/rules.mk

diff --git a/testhal/STM32/STM32F3xx/EEProm/chconf.h b/testhal/STM32/STM32F3xx/EEProm/chconf.h
new file mode 100644
index 0000000..405149b
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/chconf.h
@@ -0,0 +1,499 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 10000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 2

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       TRUE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_QUEUES                   TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   TRUE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_TRACE                 TRUE

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/EEProm/halconf.h b/testhal/STM32/STM32F3xx/EEProm/halconf.h
new file mode 100644
index 0000000..42c228e
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/halconf.h
@@ -0,0 +1,387 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 TRUE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 TRUE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 TRUE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE          TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)

+#define MAC_USE_ZERO_COPY           FALSE

+#endif

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS              TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY              100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT             FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE      38400

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 16 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE         16

+#endif

+

+/*===========================================================================*/

+/* SERIAL_USB driver related setting.                                        */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial over USB buffers size.

+ * @details Configuration parameter, the buffer size must be a multiple of

+ *          the USB data endpoint maximum packet size.

+ * @note    The default is 256 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_SIZE     256

+#endif

+

+/**

+ * @brief   Serial over USB number of buffers.

+ * @note    The default is 2 buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_NUMBER   2

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* UART driver related settings.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)

+#define UART_USE_WAIT               FALSE

+#endif

+

+/**

+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define UART_USE_MUTUAL_EXCLUSION   FALSE

+#endif

+

+/*===========================================================================*/

+/* USB driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

+#define USB_USE_WAIT                FALSE

+#endif

+

+/*===========================================================================*/

+/* Community drivers's includes                                              */

+/*===========================================================================*/

+

+#include "halconf_community.h"

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/EEProm/halconf_community.h b/testhal/STM32/STM32F3xx/EEProm/halconf_community.h
new file mode 100644
index 0000000..06f35b1
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/halconf_community.h
@@ -0,0 +1,114 @@
+/*

+    ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _HALCONF_COMMUNITY_H_

+#define _HALCONF_COMMUNITY_H_

+

+/**

+ * @brief   Enables the community overlay.

+ */

+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)

+#define HAL_USE_COMMUNITY           TRUE

+#endif

+

+/**

+ * @brief   Enables the FSMC subsystem.

+ */

+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)

+#define HAL_USE_FSMC                FALSE

+#endif

+

+/**

+ * @brief   Enables the NAND subsystem.

+ */

+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)

+#define HAL_USE_NAND                FALSE

+#endif

+

+/**

+ * @brief   Enables the 1-wire subsystem.

+ */

+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)

+#define HAL_USE_ONEWIRE             FALSE

+#endif

+

+/**

+ * @brief   Enables the EICU subsystem.

+ */

+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)

+#define HAL_USE_EICU                FALSE

+#endif

+

+/**

+ * @brief   Enables the community subsystem.

+ */

+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)

+#define HAL_USE_CRC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EEPROM subsystem.

+ */

+#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)

+#define HAL_USE_EEPROM            TRUE

+#endif

+

+/*===========================================================================*/

+/* FSMCNAND driver related settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define NAND_USE_MUTUAL_EXCLUSION   TRUE

+#endif

+

+/*===========================================================================*/

+/* 1-wire driver related settings.                                           */

+/*===========================================================================*/

+/**

+ * @brief   Enables strong pull up feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_STRONG_PULLUP   FALSE

+

+/**

+ * @brief   Enables search ROM feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_SEARCH_ROM      TRUE

+

+ /*===========================================================================*/

+/* EEProm driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables 24xx series I2C eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE24XX TRUE

+ /**

+ * @brief   Enables 25xx series SPI eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE25XX TRUE

+

+

+#endif /* _HALCONF_COMMUNITY_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/EEProm/main.c b/testhal/STM32/STM32F3xx/EEProm/main.c
new file mode 100644
index 0000000..130a600
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/main.c
@@ -0,0 +1,99 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "ch.h"

+#include "hal.h"

+

+#define EEPROM_SIZE 8192 // 64Kb, 8KB

+#define EEPROM_PAGE_SIZE 32

+#define EEPROM_WRITE_TIME_MS 10 // byte/page write time

+#define EEPROM_SPID SPID1

+#define EEPROM_SPIDCONFIG spi1cfg

+

+static const SPIConfig EEPROM_SPIDCONFIG = {

+  NULL,

+  GPIOA,

+  12,

+  0, // Up to 20Mhz

+  SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0

+};

+

+static SPIEepromFileConfig eeCfg = {

+  0,

+  EEPROM_SIZE,

+  EEPROM_SIZE,

+  EEPROM_PAGE_SIZE,

+  MS2ST(EEPROM_WRITE_TIME_MS),

+  &EEPROM_SPID,

+  &EEPROM_SPIDCONFIG,

+};

+

+static SPIEepromFileStream eeFile;

+static EepromFileStream *eeFS;

+

+static uint8_t buffer[64];

+

+THD_WORKING_AREA(waThreadEE, 256);

+static THD_FUNCTION(ThreadEE, arg)

+{

+  (void)arg;

+  uint8_t len = 64;

+

+  while (TRUE)

+  {

+

+    eeFS = SPIEepromFileOpen(&eeFile, &eeCfg, EepromFindDevice(EEPROM_DEV_25XX));

+    fileStreamSeek(eeFS, 0);

+

+    fileStreamWrite(eeFS, buffer, len);

+    fileStreamRead(eeFS, buffer, len);

+

+    fileStreamClose(eeFS);

+

+    chThdSleepMilliseconds(500);

+  }

+

+  return;

+}

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+  spiStart(&EEPROM_SPID, &EEPROM_SPIDCONFIG);

+

+  chThdCreateStatic(waThreadEE, sizeof(waThreadEE), NORMALPRIO, ThreadEE, NULL);

+

+  /*

+   * Normal main() thread activity, it resets the watchdog.

+   */

+  while (true) {

+    palToggleLine(LINE_LED4_BLUE);

+    chThdSleepMilliseconds(500);

+  }

+  return 0;

+}

diff --git a/testhal/STM32/STM32F3xx/EEProm/mcuconf.h b/testhal/STM32/STM32F3xx/EEProm/mcuconf.h
new file mode 100644
index 0000000..60b9854
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/mcuconf.h
@@ -0,0 +1,258 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _MCUCONF_H_

+#define _MCUCONF_H_

+

+/*

+ * STM32F3xx drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 15...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F3xx_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   TRUE

+#define STM32_HSE_ENABLED                   TRUE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_HSE

+#define STM32_PREDIV_VALUE                  1

+#define STM32_PLLMUL_VALUE                  9

+#define STM32_HPRE                          STM32_HPRE_DIV1

+#define STM32_PPRE1                         STM32_PPRE1_DIV2

+#define STM32_PPRE2                         STM32_PPRE2_DIV2

+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

+#define STM32_ADC12PRES                     STM32_ADC12PRES_DIV1

+#define STM32_ADC34PRES                     STM32_ADC34PRES_DIV1

+#define STM32_USART1SW                      STM32_USART1SW_PCLK

+#define STM32_USART2SW                      STM32_USART2SW_PCLK

+#define STM32_USART3SW                      STM32_USART3SW_PCLK

+#define STM32_UART4SW                       STM32_UART4SW_PCLK

+#define STM32_UART5SW                       STM32_UART5SW_PCLK

+#define STM32_I2C1SW                        STM32_I2C1SW_SYSCLK

+#define STM32_I2C2SW                        STM32_I2C2SW_SYSCLK

+#define STM32_TIM1SW                        STM32_TIM1SW_PCLK2

+#define STM32_TIM8SW                        STM32_TIM8SW_PCLK2

+#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+#define STM32_USB_CLOCK_REQUIRED            TRUE

+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_DUAL_MODE                 FALSE

+#define STM32_ADC_COMPACT_SAMPLES           FALSE

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_USE_ADC2                  FALSE

+#define STM32_ADC_USE_ADC3                  FALSE

+#define STM32_ADC_USE_ADC4                  FALSE

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 5)

+#define STM32_ADC_ADC4_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC2_DMA_PRIORITY         2

+#define STM32_ADC_ADC3_DMA_PRIORITY         2

+#define STM32_ADC_ADC4_DMA_PRIORITY         2

+#define STM32_ADC_ADC12_IRQ_PRIORITY        5

+#define STM32_ADC_ADC3_IRQ_PRIORITY         5

+#define STM32_ADC_ADC4_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1

+#define STM32_ADC_ADC34_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1

+

+/*

+ * CAN driver system settings.

+ */

+#define STM32_CAN_USE_CAN1                  TRUE

+#define STM32_CAN_CAN1_IRQ_PRIORITY         11

+

+/*

+ * DAC driver system settings.

+ */

+#define STM32_DAC_DUAL_MODE                 FALSE

+#define STM32_DAC_USE_DAC1_CH1              TRUE

+#define STM32_DAC_USE_DAC1_CH2              TRUE

+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2

+

+/*

+ * EXT driver system settings.

+ */

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6

+#define STM32_EXT_EXTI30_32_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI33_IRQ_PRIORITY       6

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM4                  FALSE

+#define STM32_GPT_USE_TIM6                  FALSE

+#define STM32_GPT_USE_TIM7                  FALSE

+#define STM32_GPT_USE_TIM8                  FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         7

+#define STM32_GPT_TIM2_IRQ_PRIORITY         7

+#define STM32_GPT_TIM3_IRQ_PRIORITY         7

+#define STM32_GPT_TIM4_IRQ_PRIORITY         7

+#define STM32_GPT_TIM6_IRQ_PRIORITY         7

+#define STM32_GPT_TIM7_IRQ_PRIORITY         7

+#define STM32_GPT_TIM8_IRQ_PRIORITY         7

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  TRUE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_BUSY_TIMEOUT              50

+#define STM32_I2C_I2C1_IRQ_PRIORITY         10

+#define STM32_I2C_I2C2_IRQ_PRIORITY         10

+#define STM32_I2C_USE_DMA                   TRUE

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_USE_TIM4                  FALSE

+#define STM32_ICU_USE_TIM8                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         7

+#define STM32_ICU_TIM2_IRQ_PRIORITY         7

+#define STM32_ICU_TIM3_IRQ_PRIORITY         7

+#define STM32_ICU_TIM4_IRQ_PRIORITY         7

+#define STM32_ICU_TIM8_IRQ_PRIORITY         7

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_USE_TIM4                  FALSE

+#define STM32_PWM_USE_TIM8                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         7

+#define STM32_PWM_TIM2_IRQ_PRIORITY         7

+#define STM32_PWM_TIM3_IRQ_PRIORITY         7

+#define STM32_PWM_TIM4_IRQ_PRIORITY         7

+#define STM32_PWM_TIM8_IRQ_PRIORITY         7

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             FALSE

+#define STM32_SERIAL_USE_USART3             FALSE

+#define STM32_SERIAL_USE_UART4              FALSE

+#define STM32_SERIAL_USE_UART5              FALSE

+#define STM32_SERIAL_USART1_PRIORITY        12

+#define STM32_SERIAL_USART2_PRIORITY        12

+#define STM32_SERIAL_USART3_PRIORITY        12

+#define STM32_SERIAL_UART4_PRIORITY         12

+#define STM32_SERIAL_UART5_PRIORITY         12

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  TRUE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         10

+#define STM32_SPI_SPI2_IRQ_PRIORITY         10

+#define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

+

+/*

+ * ST driver system settings.

+ */

+#define STM32_ST_IRQ_PRIORITY               8

+#define STM32_ST_USE_TIMER                  2

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USART1_IRQ_PRIORITY      12

+#define STM32_UART_USART2_IRQ_PRIORITY      12

+#define STM32_UART_USART3_IRQ_PRIORITY      12

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART3_DMA_PRIORITY      0

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_USB1                  FALSE

+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13

+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

+

+/*

+ * WDG driver system settings.

+ */

+#define STM32_WDG_USE_IWDG                  TRUE

+

+/*

+ * header for community drivers.

+ */

+#include "mcuconf_community.h"

+

+#endif /* _MCUCONF_H_ */

diff --git a/testhal/STM32/STM32F3xx/EEProm/mcuconf_community.h b/testhal/STM32/STM32F3xx/EEProm/mcuconf_community.h
new file mode 100644
index 0000000..4a13b56
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/EEProm/mcuconf_community.h
@@ -0,0 +1,45 @@
+/*
+    ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * FSMC driver system settings.
+ */
+#define STM32_FSMC_USE_FSMC1                FALSE
+#define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
+
+/*
+ * FSMC NAND driver system settings.
+ */
+#define STM32_NAND_USE_FSMC_NAND1           FALSE
+#define STM32_NAND_USE_FSMC_NAND2           FALSE
+#define STM32_NAND_USE_EXT_INT              FALSE
+#define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
+#define STM32_NAND_DMA_PRIORITY             0
+#define STM32_NAND_DMA_ERROR_HOOK(nandp)    osalSysHalt("DMA failure")
+
+/*
+ * FSMC SRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SRAM                 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM1           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM2           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM3           FLASE
+#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
+
+/*
+ * FSMC SDRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SDRAM                FALSE
diff --git a/testhal/STM32/STM32F3xx/TIMCAP/Makefile b/testhal/STM32/STM32F3xx/TIMCAP/Makefile
new file mode 100644
index 0000000..198f0d1
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/Makefile
@@ -0,0 +1,217 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT = 

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# Linker extra options here.

+ifeq ($(USE_LDOPT),)

+  USE_LDOPT = 

+endif

+

+# Enable this if you want link time optimizations (LTO)

+ifeq ($(USE_LTO),)

+  USE_LTO = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+# If enabled, this option makes the build process faster by not compiling

+# modules not used in the current configuration.

+ifeq ($(USE_SMART_BUILD),)

+  USE_SMART_BUILD = yes

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Stack size to be allocated to the Cortex-M process stack. This stack is

+# the stack used by the main() thread.

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  USE_PROCESS_STACKSIZE = 0x400

+endif

+

+# Stack size to the allocated to the Cortex-M main/exceptions stack. This

+# stack is used for processing interrupts and exceptions.

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  USE_EXCEPTIONS_STACKSIZE = 0x400

+endif

+

+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).

+ifeq ($(USE_FPU),)

+  USE_FPU = no

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+CHIBIOS = ../../../../../ChibiOS-RT

+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib

+# Startup files.

+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk

+# HAL-OSAL files (optional).

+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk

+include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk

+include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk

+include $(CHIBIOS)/os/hal/osal/rt/osal.mk

+# RTOS files (optional).

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk

+# Other files (optional).

+#include $(CHIBIOS)/test/rt/test.mk

+

+# Define linker script file here

+LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(STARTUPSRC) \

+       $(KERNSRC) \

+       $(PORTSRC) \

+       $(OSALSRC) \

+       $(HALSRC) \

+       $(PLATFORMSRC) \

+       $(BOARDSRC) \

+       $(TESTSRC) \

+       main.c

+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+

+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

+         $(CHIBIOS)/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m4

+

+#TRGT = arm-elf-

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+AR   = $(TRGT)ar

+OD   = $(TRGT)objdump

+SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra -Wundef

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC

+include $(RULESPATH)/rules.mk

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/chconf.h b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h
new file mode 100644
index 0000000..405149b
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/chconf.h
@@ -0,0 +1,499 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 10000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 2

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       TRUE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_QUEUES                   TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   TRUE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_TRACE                 TRUE

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/halconf.h b/testhal/STM32/STM32F3xx/TIMCAP/halconf.h
new file mode 100644
index 0000000..9af6aca
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/halconf.h
@@ -0,0 +1,387 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 FALSE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE          TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)

+#define MAC_USE_ZERO_COPY           FALSE

+#endif

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS              TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY              100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT             FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE      38400

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 16 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE         16

+#endif

+

+/*===========================================================================*/

+/* SERIAL_USB driver related setting.                                        */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial over USB buffers size.

+ * @details Configuration parameter, the buffer size must be a multiple of

+ *          the USB data endpoint maximum packet size.

+ * @note    The default is 256 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_SIZE     256

+#endif

+

+/**

+ * @brief   Serial over USB number of buffers.

+ * @note    The default is 2 buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_NUMBER   2

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* UART driver related settings.                                             */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)

+#define UART_USE_WAIT               FALSE

+#endif

+

+/**

+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define UART_USE_MUTUAL_EXCLUSION   FALSE

+#endif

+

+/*===========================================================================*/

+/* USB driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

+#define USB_USE_WAIT                FALSE

+#endif

+

+/*===========================================================================*/

+/* Community drivers's includes                                              */

+/*===========================================================================*/

+

+#include "halconf_community.h"

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/halconf_community.h b/testhal/STM32/STM32F3xx/TIMCAP/halconf_community.h
new file mode 100644
index 0000000..6227e7d
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/halconf_community.h
@@ -0,0 +1,121 @@
+/*

+    ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _HALCONF_COMMUNITY_H_

+#define _HALCONF_COMMUNITY_H_

+

+/**

+ * @brief   Enables the community overlay.

+ */

+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)

+#define HAL_USE_COMMUNITY           TRUE

+#endif

+

+/**

+ * @brief   Enables the FSMC subsystem.

+ */

+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)

+#define HAL_USE_FSMC                FALSE

+#endif

+

+/**

+ * @brief   Enables the NAND subsystem.

+ */

+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)

+#define HAL_USE_NAND                FALSE

+#endif

+

+/**

+ * @brief   Enables the 1-wire subsystem.

+ */

+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)

+#define HAL_USE_ONEWIRE             FALSE

+#endif

+

+/**

+ * @brief   Enables the EICU subsystem.

+ */

+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)

+#define HAL_USE_EICU                FALSE

+#endif

+

+/**

+ * @brief   Enables the community subsystem.

+ */

+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)

+#define HAL_USE_CRC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EEPROM subsystem.

+ */

+#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)

+#define HAL_USE_EEPROM            FALSE

+#endif

+

+/**

+ * @brief   Enables the TIMCAP subsystem.

+ */

+#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)

+#define HAL_USE_TIMCAP            TRUE

+#endif

+

+/*===========================================================================*/

+/* FSMCNAND driver related settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define NAND_USE_MUTUAL_EXCLUSION   TRUE

+#endif

+

+/*===========================================================================*/

+/* 1-wire driver related settings.                                           */

+/*===========================================================================*/

+/**

+ * @brief   Enables strong pull up feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_STRONG_PULLUP   FALSE

+

+/**

+ * @brief   Enables search ROM feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_SEARCH_ROM      TRUE

+

+ /*===========================================================================*/

+/* EEProm driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables 24xx series I2C eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE24XX TRUE

+ /**

+ * @brief   Enables 25xx series SPI eeprom device driver.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define EEPROM_USE_EE25XX TRUE

+

+

+#endif /* _HALCONF_COMMUNITY_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/main.c b/testhal/STM32/STM32F3xx/TIMCAP/main.c
new file mode 100644
index 0000000..dd91924
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/main.c
@@ -0,0 +1,194 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "ch.h"

+#include "hal.h"

+

+

+static uint8_t TIM3CC1CaptureNumber, TIM3CC2CaptureNumber;

+static uint16_t TIM3CC1ReadValue1, TIM3CC1ReadValue2;

+static uint16_t TIM3CC2ReadValue1, TIM3CC2ReadValue2;

+static bool TIM3CC1UD, TIM3CC2UD;

+

+static uint16_t freq1, freq2;

+

+

+void reEnableInputCapture(TIMCAPDriver *timcapp)

+{

+

+  if ((timcapp->tim->DIER & TIM_DIER_CC1IE) == 0)

+  {

+    TIM3CC1CaptureNumber = 0;

+    TIM3CC1UD = false;

+    timcapp->tim->DIER |= TIM_DIER_CC1IE;

+  }

+

+  if ((timcapp->tim->DIER & TIM_DIER_CC2IE) == 0)

+  {

+    TIM3CC2CaptureNumber = 0;

+    TIM3CC2UD = false;

+    timcapp->tim->DIER |= TIM_DIER_CC2IE;

+  }

+

+}

+

+void captureOverflowCb(TIMCAPDriver *timcapp)

+{

+  if (TIM3CC1UD && (timcapp->tim->DIER & TIM_DIER_CC1IE))

+  {

+    timcapp->tim->DIER &= ~TIM_DIER_CC1IE;

+    freq1 = 0;

+  }

+

+  if (TIM3CC2UD && (timcapp->tim->DIER & TIM_DIER_CC2IE))

+  {

+    timcapp->tim->DIER &= ~TIM_DIER_CC2IE;

+    freq2 = 0;

+  }

+

+  TIM3CC1UD = true;

+  TIM3CC2UD = true;

+}

+

+void capture1Cb(TIMCAPDriver *timcapp)

+{

+  if(TIM3CC1CaptureNumber == 0)

+  {

+    /* Get the Input Capture value */

+    TIM3CC1ReadValue1 = timcapp->tim->CCR[0];

+    TIM3CC1CaptureNumber = 1;

+    TIM3CC1UD = false;

+  }

+  else if(TIM3CC1CaptureNumber == 1)

+  {

+      uint32_t Capture;

+      /* Get the Input Capture value */

+      TIM3CC1ReadValue2 = timcapp->tim->CCR[0];

+      TIM3CC1UD = false;

+

+      /* Capture computation */

+      if (TIM3CC1ReadValue2 > TIM3CC1ReadValue1)

+      {

+          Capture = ((uint32_t)TIM3CC1ReadValue2 - (uint32_t)TIM3CC1ReadValue1);

+      }

+      else

+      {

+          Capture = (((uint32_t)TIM3CC1ReadValue2 + 0x10000) - (uint32_t)TIM3CC1ReadValue1);

+      }

+

+      /* Frequency computation */

+      freq1 = (timcapp->config->frequency / Capture);

+

+      TIM3CC1ReadValue1 = TIM3CC1ReadValue2;

+      TIM3CC1CaptureNumber = 0;

+

+      /* Disable CC1 interrupt */

+      timcapp->tim->DIER &= ~TIM_DIER_CC1IE;

+  }

+}

+

+void capture2Cb(TIMCAPDriver *timcapp)

+{

+  if(TIM3CC2CaptureNumber == 0)

+  {

+    /* Get the Input Capture value */

+    TIM3CC2ReadValue1 = timcapp->tim->CCR[1];

+    TIM3CC2CaptureNumber = 1;

+    TIM3CC2UD = false;

+  }

+  else if(TIM3CC2CaptureNumber == 1)

+  {

+      uint32_t Capture;

+      /* Get the Input Capture value */

+      TIM3CC2ReadValue2 = timcapp->tim->CCR[1];

+      TIM3CC2UD = false;

+

+      /* Capture computation */

+      if (TIM3CC2ReadValue2 > TIM3CC2ReadValue1)

+      {

+          Capture = ((uint32_t)TIM3CC2ReadValue2 - (uint32_t)TIM3CC2ReadValue1);

+      }

+      else

+      {

+          Capture = (((uint32_t)TIM3CC2ReadValue2 + 0x10000) - (uint32_t)TIM3CC2ReadValue1);

+      }

+

+      /* Frequency computation */

+      freq2 = (timcapp->config->frequency / Capture);

+

+      TIM3CC2ReadValue1 = TIM3CC2ReadValue2;

+      TIM3CC2CaptureNumber = 0;

+

+      /* Disable CC2 interrupt */

+      timcapp->tim->DIER &= ~TIM_DIER_CC2IE;

+  }

+}

+

+TIMCAPConfig tc_conf = {

+   {TIMCAP_INPUT_ACTIVE_HIGH,

+    TIMCAP_INPUT_ACTIVE_HIGH,

+    TIMCAP_INPUT_DISABLED,

+    TIMCAP_INPUT_DISABLED},

+   200000, /* TIM3 Runs at 36Mhz max. (1/200000)*65536 = 0.32s Max, 3.12Hz Min */

+   {capture1Cb, capture2Cb, NULL, NULL},

+   captureOverflowCb,

+   0,

+   0

+};

+

+THD_WORKING_AREA(waThreadTimcap, 256);

+static THD_FUNCTION(ThreadTimcap, arg)

+{

+  (void)arg;

+

+  while (TRUE)

+  {

+

+    reEnableInputCapture(&TIMCAPD3);

+    chThdSleepMilliseconds(200);

+  }

+

+  return;

+}

+

+/*

+ * Application entry point.

+ */

+int main(void) {

+

+  /*

+   * System initializations.

+   * - HAL initialization, this also initializes the configured device drivers

+   *   and performs the board-specific initializations.

+   * - Kernel initialization, the main() function becomes a thread and the

+   *   RTOS is active.

+   */

+  halInit();

+  chSysInit();

+

+  timcapStart(&TIMCAPD3, &tc_conf);

+

+  chThdCreateStatic(waThreadTimcap, sizeof(waThreadTimcap), NORMALPRIO, ThreadTimcap, NULL);

+

+  /*

+   * Normal main() thread activity, it resets the watchdog.

+   */

+  while (true) {

+    palToggleLine(LINE_LED4_BLUE);

+    chThdSleepMilliseconds(500);

+  }

+  return 0;

+}

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/mcuconf.h b/testhal/STM32/STM32F3xx/TIMCAP/mcuconf.h
new file mode 100644
index 0000000..60b9854
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/mcuconf.h
@@ -0,0 +1,258 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _MCUCONF_H_

+#define _MCUCONF_H_

+

+/*

+ * STM32F3xx drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 15...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F3xx_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   TRUE

+#define STM32_HSE_ENABLED                   TRUE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_HSE

+#define STM32_PREDIV_VALUE                  1

+#define STM32_PLLMUL_VALUE                  9

+#define STM32_HPRE                          STM32_HPRE_DIV1

+#define STM32_PPRE1                         STM32_PPRE1_DIV2

+#define STM32_PPRE2                         STM32_PPRE2_DIV2

+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

+#define STM32_ADC12PRES                     STM32_ADC12PRES_DIV1

+#define STM32_ADC34PRES                     STM32_ADC34PRES_DIV1

+#define STM32_USART1SW                      STM32_USART1SW_PCLK

+#define STM32_USART2SW                      STM32_USART2SW_PCLK

+#define STM32_USART3SW                      STM32_USART3SW_PCLK

+#define STM32_UART4SW                       STM32_UART4SW_PCLK

+#define STM32_UART5SW                       STM32_UART5SW_PCLK

+#define STM32_I2C1SW                        STM32_I2C1SW_SYSCLK

+#define STM32_I2C2SW                        STM32_I2C2SW_SYSCLK

+#define STM32_TIM1SW                        STM32_TIM1SW_PCLK2

+#define STM32_TIM8SW                        STM32_TIM8SW_PCLK2

+#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+#define STM32_USB_CLOCK_REQUIRED            TRUE

+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_DUAL_MODE                 FALSE

+#define STM32_ADC_COMPACT_SAMPLES           FALSE

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_USE_ADC2                  FALSE

+#define STM32_ADC_USE_ADC3                  FALSE

+#define STM32_ADC_USE_ADC4                  FALSE

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)

+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 5)

+#define STM32_ADC_ADC4_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC2_DMA_PRIORITY         2

+#define STM32_ADC_ADC3_DMA_PRIORITY         2

+#define STM32_ADC_ADC4_DMA_PRIORITY         2

+#define STM32_ADC_ADC12_IRQ_PRIORITY        5

+#define STM32_ADC_ADC3_IRQ_PRIORITY         5

+#define STM32_ADC_ADC4_IRQ_PRIORITY         5

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY     5

+#define STM32_ADC_ADC12_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1

+#define STM32_ADC_ADC34_CLOCK_MODE          ADC_CCR_CKMODE_AHB_DIV1

+

+/*

+ * CAN driver system settings.

+ */

+#define STM32_CAN_USE_CAN1                  TRUE

+#define STM32_CAN_CAN1_IRQ_PRIORITY         11

+

+/*

+ * DAC driver system settings.

+ */

+#define STM32_DAC_DUAL_MODE                 FALSE

+#define STM32_DAC_USE_DAC1_CH1              TRUE

+#define STM32_DAC_USE_DAC1_CH2              TRUE

+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2

+

+/*

+ * EXT driver system settings.

+ */

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6

+#define STM32_EXT_EXTI30_32_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI33_IRQ_PRIORITY       6

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM4                  FALSE

+#define STM32_GPT_USE_TIM6                  FALSE

+#define STM32_GPT_USE_TIM7                  FALSE

+#define STM32_GPT_USE_TIM8                  FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         7

+#define STM32_GPT_TIM2_IRQ_PRIORITY         7

+#define STM32_GPT_TIM3_IRQ_PRIORITY         7

+#define STM32_GPT_TIM4_IRQ_PRIORITY         7

+#define STM32_GPT_TIM6_IRQ_PRIORITY         7

+#define STM32_GPT_TIM7_IRQ_PRIORITY         7

+#define STM32_GPT_TIM8_IRQ_PRIORITY         7

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  TRUE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_BUSY_TIMEOUT              50

+#define STM32_I2C_I2C1_IRQ_PRIORITY         10

+#define STM32_I2C_I2C2_IRQ_PRIORITY         10

+#define STM32_I2C_USE_DMA                   TRUE

+#define STM32_I2C_I2C1_DMA_PRIORITY         1

+#define STM32_I2C_I2C2_DMA_PRIORITY         1

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_USE_TIM4                  FALSE

+#define STM32_ICU_USE_TIM8                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         7

+#define STM32_ICU_TIM2_IRQ_PRIORITY         7

+#define STM32_ICU_TIM3_IRQ_PRIORITY         7

+#define STM32_ICU_TIM4_IRQ_PRIORITY         7

+#define STM32_ICU_TIM8_IRQ_PRIORITY         7

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_USE_TIM4                  FALSE

+#define STM32_PWM_USE_TIM8                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         7

+#define STM32_PWM_TIM2_IRQ_PRIORITY         7

+#define STM32_PWM_TIM3_IRQ_PRIORITY         7

+#define STM32_PWM_TIM4_IRQ_PRIORITY         7

+#define STM32_PWM_TIM8_IRQ_PRIORITY         7

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             FALSE

+#define STM32_SERIAL_USE_USART3             FALSE

+#define STM32_SERIAL_USE_UART4              FALSE

+#define STM32_SERIAL_USE_UART5              FALSE

+#define STM32_SERIAL_USART1_PRIORITY        12

+#define STM32_SERIAL_USART2_PRIORITY        12

+#define STM32_SERIAL_USART3_PRIORITY        12

+#define STM32_SERIAL_UART4_PRIORITY         12

+#define STM32_SERIAL_UART5_PRIORITY         12

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  TRUE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         10

+#define STM32_SPI_SPI2_IRQ_PRIORITY         10

+#define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

+

+/*

+ * ST driver system settings.

+ */

+#define STM32_ST_IRQ_PRIORITY               8

+#define STM32_ST_USE_TIMER                  2

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USART1_IRQ_PRIORITY      12

+#define STM32_UART_USART2_IRQ_PRIORITY      12

+#define STM32_UART_USART3_IRQ_PRIORITY      12

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART3_DMA_PRIORITY      0

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_USB1                  FALSE

+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13

+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

+

+/*

+ * WDG driver system settings.

+ */

+#define STM32_WDG_USE_IWDG                  TRUE

+

+/*

+ * header for community drivers.

+ */

+#include "mcuconf_community.h"

+

+#endif /* _MCUCONF_H_ */

diff --git a/testhal/STM32/STM32F3xx/TIMCAP/mcuconf_community.h b/testhal/STM32/STM32F3xx/TIMCAP/mcuconf_community.h
new file mode 100644
index 0000000..95eb845
--- /dev/null
+++ b/testhal/STM32/STM32F3xx/TIMCAP/mcuconf_community.h
@@ -0,0 +1,65 @@
+/*
+    ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * FSMC driver system settings.
+ */
+#define STM32_FSMC_USE_FSMC1                FALSE
+#define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
+
+/*
+ * FSMC NAND driver system settings.
+ */
+#define STM32_NAND_USE_FSMC_NAND1           FALSE
+#define STM32_NAND_USE_FSMC_NAND2           FALSE
+#define STM32_NAND_USE_EXT_INT              FALSE
+#define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
+#define STM32_NAND_DMA_PRIORITY             0
+#define STM32_NAND_DMA_ERROR_HOOK(nandp)    osalSysHalt("DMA failure")
+
+/*
+ * FSMC SRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SRAM                 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM1           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM2           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM3           FLASE
+#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
+
+/*
+ * FSMC SDRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SDRAM                FALSE
+
+/*
+ * TIMCAP driver system settings.
+ */
+#define STM32_TIMCAP_USE_TIM1                  FALSE
+#define STM32_TIMCAP_USE_TIM2                  FALSE
+#define STM32_TIMCAP_USE_TIM3                  TRUE
+#define STM32_TIMCAP_USE_TIM4                  FALSE
+#define STM32_TIMCAP_USE_TIM5                  FALSE
+#define STM32_TIMCAP_USE_TIM8                  FALSE
+#define STM32_TIMCAP_USE_TIM9                  FALSE
+#define STM32_TIMCAP_TIM1_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM2_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM3_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM4_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM5_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM8_IRQ_PRIORITY         3
+#define STM32_TIMCAP_TIM9_IRQ_PRIORITY         3
+
+ 
\ No newline at end of file
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/Makefile b/testhal/STM32/STM32F4xx/USB_HOST/Makefile
new file mode 100644
index 0000000..ca6645a
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/Makefile
@@ -0,0 +1,220 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16

+endif

+

+# C specific options here (added to USE_OPT).

+ifeq ($(USE_COPT),)

+  USE_COPT = 

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# Linker extra options here.

+ifeq ($(USE_LDOPT),)

+  USE_LDOPT = 

+endif

+

+# Enable this if you want link time optimizations (LTO)

+ifeq ($(USE_LTO),)

+  USE_LTO = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable this if you want to see the full log while compiling.

+ifeq ($(USE_VERBOSE_COMPILE),)

+  USE_VERBOSE_COMPILE = no

+endif

+

+# If enabled, this option makes the build process faster by not compiling

+# modules not used in the current configuration.

+ifeq ($(USE_SMART_BUILD),)

+  USE_SMART_BUILD = no

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Stack size to be allocated to the Cortex-M process stack. This stack is

+# the stack used by the main() thread.

+ifeq ($(USE_PROCESS_STACKSIZE),)

+  USE_PROCESS_STACKSIZE = 0x800

+endif

+

+# Stack size to the allocated to the Cortex-M main/exceptions stack. This

+# stack is used for processing interrupts and exceptions.

+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)

+  USE_EXCEPTIONS_STACKSIZE = 0x800

+endif

+

+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).

+ifeq ($(USE_FPU),)

+  USE_FPU = no

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Imported source files and paths

+CHIBIOS = ../../../../../ChibiOS-RT

+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib

+# Startup files.

+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk

+# HAL-OSAL files (optional).

+include $(CHIBIOS_CONTRIB)/os/hal/hal.mk

+include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F4xx/platform.mk

+include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk

+include $(CHIBIOS)/os/hal/osal/rt/osal.mk

+# RTOS files (optional).

+include $(CHIBIOS)/os/rt/rt.mk

+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk

+# Other files (optional).

+include $(CHIBIOS)/test/rt/test.mk

+

+# Define linker script file here

+LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = $(STARTUPSRC) \

+       $(KERNSRC) \

+       $(PORTSRC) \

+       $(OSALSRC) \

+       $(HALSRC) \

+       $(PLATFORMSRC) \

+       $(BOARDSRC) \

+       $(TESTSRC) \

+       $(CHIBIOS)/os/various/shell.c \

+       $(CHIBIOS)/os/hal/lib/streams/memstreams.c \

+       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \

+       ff.c fatfs_diskio.c main.c

+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)

+

+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \

+         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \

+         $(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m4

+

+#TRGT = arm-elf-

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+AR   = $(TRGT)ar

+OD   = $(TRGT)objdump

+SZ   = $(TRGT)size

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra -Wundef

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC

+include $(RULESPATH)/rules.mk

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/chconf.h b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
new file mode 100644
index 0000000..75802f0
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/chconf.h
@@ -0,0 +1,501 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/chconf.h

+ * @brief   Configuration file template.

+ * @details A copy of this file must be placed in each project directory, it

+ *          contains the application specific kernel settings.

+ *

+ * @addtogroup config

+ * @details Kernel related settings and hooks.

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/**

+ * @name System timers settings

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   System time counter resolution.

+ * @note    Allowed values are 16 or 32 bits.

+ */

+#define CH_CFG_ST_RESOLUTION                32

+

+/**

+ * @brief   System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#define CH_CFG_ST_FREQUENCY                 1000

+

+/**

+ * @brief   Time delta constant for the tick-less mode.

+ * @note    If this value is zero then the system uses the classic

+ *          periodic tick. This value represents the minimum number

+ *          of ticks that is safe to specify in a timeout directive.

+ *          The value one is not valid, timeouts are rounded up to

+ *          this value.

+ */

+#define CH_CFG_ST_TIMEDELTA                 0

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel parameters and options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the preemption for threads with equal priority and the

+ *          round robin becomes cooperative. Note that higher priority

+ *          threads can still preempt, the kernel is always preemptive.

+ * @note    Disabling the round robin preemption makes the kernel more compact

+ *          and generally faster.

+ * @note    The round robin preemption is not supported in tickless mode and

+ *          must be set to zero in that case.

+ */

+#define CH_CFG_TIME_QUANTUM                 0

+

+/**

+ * @brief   Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note    In order to let the OS manage the whole RAM the linker script must

+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note    Requires @p CH_CFG_USE_MEMCORE.

+ */

+#define CH_CFG_MEMCORE_SIZE                 0

+

+/**

+ * @brief   Idle thread automatic spawn suppression.

+ * @details When this option is activated the function @p chSysInit()

+ *          does not spawn the idle thread. The application @p main()

+ *          function becomes the idle thread and must implement an

+ *          infinite loop.

+ */

+#define CH_CFG_NO_IDLE_THREAD               FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Performance options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note    This is not related to the compiler optimization options.

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_OPTIMIZE_SPEED               TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Subsystem options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Time Measurement APIs.

+ * @details If enabled then the time measurement APIs are included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_TM                       TRUE

+

+/**

+ * @brief   Threads registry APIs.

+ * @details If enabled then the registry APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_REGISTRY                 TRUE

+

+/**

+ * @brief   Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_WAITEXIT                 TRUE

+

+/**

+ * @brief   Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_SEMAPHORES               TRUE

+

+/**

+ * @brief   Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

+

+/**

+ * @brief   Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MUTEXES                  TRUE

+

+/**

+ * @brief   Enables recursive behavior on mutexes.

+ * @note    Recursive mutexes are heavier and have an increased

+ *          memory footprint.

+ *

+ * @note    The default is @p FALSE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

+

+/**

+ * @brief   Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MUTEXES.

+ */

+#define CH_CFG_USE_CONDVARS                 TRUE

+

+/**

+ * @brief   Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_CONDVARS.

+ */

+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

+

+/**

+ * @brief   Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_EVENTS                   TRUE

+

+/**

+ * @brief   Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_EVENTS.

+ */

+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

+

+/**

+ * @brief   Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MESSAGES                 TRUE

+

+/**

+ * @brief   Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note    The default is @p FALSE. Enable this if you have special

+ *          requirements.

+ * @note    Requires @p CH_CFG_USE_MESSAGES.

+ */

+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

+

+/**

+ * @brief   Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.

+ */

+#define CH_CFG_USE_MAILBOXES                TRUE

+

+/**

+ * @brief   I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_QUEUES                   TRUE

+

+/**

+ * @brief   Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMCORE                  TRUE

+

+/**

+ * @brief   Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

+ *          @p CH_CFG_USE_SEMAPHORES.

+ * @note    Mutexes are recommended.

+ */

+#define CH_CFG_USE_HEAP                     TRUE

+

+/**

+ * @brief   Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ */

+#define CH_CFG_USE_MEMPOOLS                 TRUE

+

+/**

+ * @brief   Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note    The default is @p TRUE.

+ * @note    Requires @p CH_CFG_USE_WAITEXIT.

+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

+ */

+#define CH_CFG_USE_DYNAMIC                  TRUE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Debug options

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Debug option, kernel statistics.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_STATISTICS                   FALSE

+

+/**

+ * @brief   Debug option, system state check.

+ * @details If enabled the correct call protocol for system APIs is checked

+ *          at runtime.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

+

+/**

+ * @brief   Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_CHECKS                TRUE

+

+/**

+ * @brief   Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_ASSERTS               TRUE

+

+/**

+ * @brief   Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_ENABLE_TRACE                 FALSE

+

+/**

+ * @brief   Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note    The default is @p FALSE.

+ * @note    The stack check is performed in a architecture/port dependent way.

+ *          It may not be implemented or some ports.

+ * @note    The default failure mode is to halt the system with the global

+ *          @p panic_msg variable set to @p NULL.

+ */

+#define CH_DBG_ENABLE_STACK_CHECK           TRUE

+

+/**

+ * @brief   Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.

+ *

+ * @note    The default is @p FALSE.

+ */

+#define CH_DBG_FILL_THREADS                 TRUE

+

+/**

+ * @brief   Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p thread_t structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note    The default is @p FALSE.

+ * @note    This debug option is not currently compatible with the

+ *          tickless mode.

+ */

+#define CH_DBG_THREADS_PROFILING            FALSE

+

+/** @} */

+

+/*===========================================================================*/

+/**

+ * @name Kernel hooks

+ * @{

+ */

+/*===========================================================================*/

+

+/**

+ * @brief   Threads descriptor structure extension.

+ * @details User fields added to the end of the @p thread_t structure.

+ */

+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

+  /* Add threads custom fields here.*/

+

+/**

+ * @brief   Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note    It is invoked from within @p chThdInit() and implicitly from all

+ *          the threads creation APIs.

+ */

+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

+  /* Add threads initialization code here.*/                                \

+}

+

+/**

+ * @brief   Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note    It is inserted into lock zone.

+ * @note    It is also invoked when the threads simply return in order to

+ *          terminate.

+ */

+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

+  /* Add threads finalization code here.*/                                  \

+}

+

+/**

+ * @brief   Context switch hook.

+ * @details This hook is invoked just before switching between threads.

+ */

+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

+  /* Context switch code here.*/                                            \

+}

+

+/**

+ * @brief   Idle thread enter hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to activate a power saving mode.

+ */

+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle thread leave hook.

+ * @note    This hook is invoked within a critical zone, no OS functions

+ *          should be invoked from here.

+ * @note    This macro can be used to deactivate a power saving mode.

+ */

+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

+}

+

+/**

+ * @brief   Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

+  /* Idle loop code here.*/                                                 \

+}

+

+/**

+ * @brief   System tick event hook.

+ * @details This hook is invoked in the system tick handler immediately

+ *          after processing the virtual timers queue.

+ */

+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

+  /* System tick event code here.*/                                         \

+}

+

+/**

+ * @brief   System halt hook.

+ * @details This hook is invoked in case to a system halting error before

+ *          the system is halted.

+ */

+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

+  /* System halt code here.*/                                               \

+  void usbDbgSystemHalted(void); \

+  usbDbgSystemHalted(); \

+}

+

+/** @} */

+

+/*===========================================================================*/

+/* Port-specific settings (override port settings defaulted in chcore.h).    */

+/*===========================================================================*/

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/diskio.h b/testhal/STM32/STM32F4xx/USB_HOST/diskio.h
new file mode 100644
index 0000000..9650f68
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/diskio.h
@@ -0,0 +1,80 @@
+/*-----------------------------------------------------------------------/

+/  Low level disk interface modlue include file   (C)ChaN, 2014          /

+/-----------------------------------------------------------------------*/

+

+#ifndef _DISKIO_DEFINED

+#define _DISKIO_DEFINED

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+

+#define _USE_WRITE	1	/* 1: Enable disk_write function */

+#define _USE_IOCTL	1	/* 1: Enable disk_ioctl fucntion */

+

+#include "integer.h"

+

+

+/* Status of Disk Functions */

+typedef BYTE	DSTATUS;

+

+/* Results of Disk Functions */

+typedef enum {

+	RES_OK = 0,		/* 0: Successful */

+	RES_ERROR,		/* 1: R/W Error */

+	RES_WRPRT,		/* 2: Write Protected */

+	RES_NOTRDY,		/* 3: Not Ready */

+	RES_PARERR		/* 4: Invalid Parameter */

+} DRESULT;

+

+

+/*---------------------------------------*/

+/* Prototypes for disk control functions */

+

+

+DSTATUS disk_initialize (BYTE pdrv);

+DSTATUS disk_status (BYTE pdrv);

+DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);

+DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);

+DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);

+

+

+/* Disk Status Bits (DSTATUS) */

+

+#define STA_NOINIT		0x01	/* Drive not initialized */

+#define STA_NODISK		0x02	/* No medium in the drive */

+#define STA_PROTECT		0x04	/* Write protected */

+

+

+/* Command code for disk_ioctrl fucntion */

+

+/* Generic command (Used by FatFs) */

+#define CTRL_SYNC			0	/* Complete pending write process (needed at _FS_READONLY == 0) */

+#define GET_SECTOR_COUNT	1	/* Get media size (needed at _USE_MKFS == 1) */

+#define GET_SECTOR_SIZE		2	/* Get sector size (needed at _MAX_SS != _MIN_SS) */

+#define GET_BLOCK_SIZE		3	/* Get erase block size (needed at _USE_MKFS == 1) */

+#define CTRL_TRIM			4	/* Inform device that the data on the block of sectors is no longer used (needed at _USE_TRIM == 1) */

+

+/* Generic command (Not used by FatFs) */

+#define CTRL_POWER			5	/* Get/Set power status */

+#define CTRL_LOCK			6	/* Lock/Unlock media removal */

+#define CTRL_EJECT			7	/* Eject media */

+#define CTRL_FORMAT			8	/* Create physical format on the media */

+

+/* MMC/SDC specific ioctl command */

+#define MMC_GET_TYPE		10	/* Get card type */

+#define MMC_GET_CSD			11	/* Get CSD */

+#define MMC_GET_CID			12	/* Get CID */

+#define MMC_GET_OCR			13	/* Get OCR */

+#define MMC_GET_SDSTAT		14	/* Get SD status */

+

+/* ATA/CF specific ioctl command */

+#define ATA_GET_REV			20	/* Get F/W revision */

+#define ATA_GET_MODEL		21	/* Get model name */

+#define ATA_GET_SN			22	/* Get serial number */

+

+#ifdef __cplusplus

+}

+#endif

+

+#endif

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/fatfs_diskio.c b/testhal/STM32/STM32F4xx/USB_HOST/fatfs_diskio.c
new file mode 100644
index 0000000..98a7edf
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/fatfs_diskio.c
@@ -0,0 +1,144 @@
+/*-----------------------------------------------------------------------*/

+/* Low level disk I/O module skeleton for FatFs     (C)ChaN, 2007        */

+/*-----------------------------------------------------------------------*/

+/* This is a stub disk I/O module that acts as front end of the existing */

+/* disk I/O modules and attach it to FatFs module with common interface. */

+/*-----------------------------------------------------------------------*/

+

+#include "hal.h"

+#include "ffconf.h"

+#include "diskio.h"

+

+#include "usbh.h"

+#include "usbh/dev/msd.h"

+

+/*-----------------------------------------------------------------------*/

+/* Correspondence between physical drive number and physical drive.      */

+#define MSDLUN0	0

+

+/*-----------------------------------------------------------------------*/

+/* Inidialize a Drive                                                    */

+

+DSTATUS disk_initialize (

+    BYTE pdrv                /* Physical drive nmuber (0..) */

+)

+{

+  DSTATUS stat;

+

+  switch (pdrv) {

+  case MSDLUN0:

+    stat = 0;

+    /* It is initialized externally, just reads the status.*/

+    if (blkGetDriverState(&MSBLKD[0]) != BLK_READY)

+      stat |= STA_NOINIT;

+    return stat;

+  }

+  return STA_NOINIT;

+}

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Return Disk Status                                                    */

+

+DSTATUS disk_status (

+    BYTE pdrv        /* Physical drive nmuber (0..) */

+)

+{

+  DSTATUS stat;

+

+  switch (pdrv) {

+  case MSDLUN0:

+    stat = 0;

+    /* It is initialized externally, just reads the status.*/

+    if (blkGetDriverState(&MSBLKD[0]) != BLK_READY)

+      stat |= STA_NOINIT;

+    return stat;

+  }

+  return STA_NOINIT;

+}

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Read Sector(s)                                                        */

+

+DRESULT disk_read (

+    BYTE pdrv,        /* Physical drive nmuber (0..) */

+    BYTE *buff,        /* Data buffer to store read data */

+    DWORD sector,    /* Sector address (LBA) */

+    UINT count        /* Number of sectors to read (1..255) */

+)

+{

+  switch (pdrv) {

+  case MSDLUN0:

+	/* It is initialized externally, just reads the status.*/

+	if (blkGetDriverState(&MSBLKD[0]) != BLK_READY)

+		return RES_NOTRDY;

+	if (usbhmsdLUNRead(&MSBLKD[0], sector, buff, count))

+		return RES_ERROR;

+	return RES_OK;

+  }

+  return RES_PARERR;

+}

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Write Sector(s)                                                       */

+

+#if _USE_WRITE

+DRESULT disk_write (

+    BYTE pdrv,            /* Physical drive nmuber (0..) */

+    const BYTE *buff,    /* Data to be written */

+    DWORD sector,        /* Sector address (LBA) */

+    UINT count            /* Number of sectors to write (1..255) */

+)

+{

+  switch (pdrv) {

+  case MSDLUN0:

+	/* It is initialized externally, just reads the status.*/

+	if (blkGetDriverState(&MSBLKD[0]) != BLK_READY)

+		return RES_NOTRDY;

+	if (usbhmsdLUNWrite(&MSBLKD[0], sector, buff, count))

+		return RES_ERROR;

+	return RES_OK;

+  }

+  return RES_PARERR;

+}

+#endif /* _USE_WRITE */

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Miscellaneous Functions                                               */

+

+#if _USE_IOCTL

+DRESULT disk_ioctl (

+    BYTE pdrv,        /* Physical drive nmuber (0..) */

+    BYTE cmd,        /* Control code */

+    void *buff        /* Buffer to send/receive control data */

+)

+{

+  switch (pdrv) {

+  case MSDLUN0:

+    switch (cmd) {

+    case CTRL_SYNC:

+        return RES_OK;

+    case GET_SECTOR_COUNT:

+        *((DWORD *)buff) = MSBLKD[0].info.blk_num;

+        return RES_OK;

+    case GET_SECTOR_SIZE:

+        *((WORD *)buff) = MSBLKD[0].info.blk_size;

+        return RES_OK;

+    default:

+        return RES_PARERR;

+    }

+  }

+  return RES_PARERR;

+}

+#endif /* _USE_IOCTL */

+

+DWORD get_fattime(void) {

+    return ((uint32_t)0 | (1 << 16)) | (1 << 21); /* wrong but valid time */

+}

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/ff.c b/testhal/STM32/STM32F4xx/USB_HOST/ff.c
new file mode 100644
index 0000000..45e20ce
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/ff.c
@@ -0,0 +1,4611 @@
+/*----------------------------------------------------------------------------/

+/  FatFs - FAT file system module  R0.10c                (C)ChaN, 2014

+/-----------------------------------------------------------------------------/

+/ FatFs module is a generic FAT file system module for small embedded systems.

+/ This is a free software that opened for education, research and commercial

+/ developments under license policy of following terms.

+/

+/  Copyright (C) 2014, ChaN, all right reserved.

+/

+/ * The FatFs module is a free software and there is NO WARRANTY.

+/ * No restriction on use. You can use, modify and redistribute it for

+/   personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.

+/ * Redistributions of source code must retain the above copyright notice.

+/

+/-----------------------------------------------------------------------------/

+/ Feb 26,'06 R0.00  Prototype.

+/

+/ Apr 29,'06 R0.01  First stable version.

+/

+/ Jun 01,'06 R0.02  Added FAT12 support.

+/                   Removed unbuffered mode.

+/                   Fixed a problem on small (<32M) partition.

+/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM).

+/

+/ Sep 22,'06 R0.03  Added f_rename().

+/                   Changed option _FS_MINIMUM to _FS_MINIMIZE.

+/ Dec 11,'06 R0.03a Improved cluster scan algorithm to write files fast.

+/                   Fixed f_mkdir() creates incorrect directory on FAT32.

+/

+/ Feb 04,'07 R0.04  Supported multiple drive system.

+/                   Changed some interfaces for multiple drive system.

+/                   Changed f_mountdrv() to f_mount().

+/                   Added f_mkfs().

+/ Apr 01,'07 R0.04a Supported multiple partitions on a physical drive.

+/                   Added a capability of extending file size to f_lseek().

+/                   Added minimization level 3.

+/                   Fixed an endian sensitive code in f_mkfs().

+/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG.

+/                   Added FSINFO support.

+/                   Fixed DBCS name can result FR_INVALID_NAME.

+/                   Fixed short seek (<= csize) collapses the file object.

+/

+/ Aug 25,'07 R0.05  Changed arguments of f_read(), f_write() and f_mkfs().

+/                   Fixed f_mkfs() on FAT32 creates incorrect FSINFO.

+/                   Fixed f_mkdir() on FAT32 creates incorrect directory.

+/ Feb 03,'08 R0.05a Added f_truncate() and f_utime().

+/                   Fixed off by one error at FAT sub-type determination.

+/                   Fixed btr in f_read() can be mistruncated.

+/                   Fixed cached sector is not flushed when create and close without write.

+/

+/ Apr 01,'08 R0.06  Added fputc(), fputs(), fprintf() and fgets().

+/                   Improved performance of f_lseek() on moving to the same or following cluster.

+/

+/ Apr 01,'09 R0.07  Merged Tiny-FatFs as a configuration option. (_FS_TINY)

+/                   Added long file name feature.

+/                   Added multiple code page feature.

+/                   Added re-entrancy for multitask operation.

+/                   Added auto cluster size selection to f_mkfs().

+/                   Added rewind option to f_readdir().

+/                   Changed result code of critical errors.

+/                   Renamed string functions to avoid name collision.

+/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg.

+/                   Added multiple sector size feature.

+/ Jun 21,'09 R0.07c Fixed f_unlink() can return FR_OK on error.

+/                   Fixed wrong cache control in f_lseek().

+/                   Added relative path feature.

+/                   Added f_chdir() and f_chdrive().

+/                   Added proper case conversion to extended character.

+/ Nov 03,'09 R0.07e Separated out configuration options from ff.h to ffconf.h.

+/                   Fixed f_unlink() fails to remove a sub-directory on _FS_RPATH.

+/                   Fixed name matching error on the 13 character boundary.

+/                   Added a configuration option, _LFN_UNICODE.

+/                   Changed f_readdir() to return the SFN with always upper case on non-LFN cfg.

+/

+/ May 15,'10 R0.08  Added a memory configuration option. (_USE_LFN = 3)

+/                   Added file lock feature. (_FS_SHARE)

+/                   Added fast seek feature. (_USE_FASTSEEK)

+/                   Changed some types on the API, XCHAR->TCHAR.

+/                   Changed .fname in the FILINFO structure on Unicode cfg.

+/                   String functions support UTF-8 encoding files on Unicode cfg.

+/ Aug 16,'10 R0.08a Added f_getcwd().

+/                   Added sector erase feature. (_USE_ERASE)

+/                   Moved file lock semaphore table from fs object to the bss.

+/                   Fixed a wrong directory entry is created on non-LFN cfg when the given name contains ';'.

+/                   Fixed f_mkfs() creates wrong FAT32 volume.

+/ Jan 15,'11 R0.08b Fast seek feature is also applied to f_read() and f_write().

+/                   f_lseek() reports required table size on creating CLMP.

+/                   Extended format syntax of f_printf().

+/                   Ignores duplicated directory separators in given path name.

+/

+/ Sep 06,'11 R0.09  f_mkfs() supports multiple partition to complete the multiple partition feature.

+/                   Added f_fdisk().

+/ Aug 27,'12 R0.09a Changed f_open() and f_opendir() reject null object pointer to avoid crash.

+/                   Changed option name _FS_SHARE to _FS_LOCK.

+/                   Fixed assertion failure due to OS/2 EA on FAT12/16 volume.

+/ Jan 24,'13 R0.09b Added f_setlabel() and f_getlabel().

+/

+/ Oct 02,'13 R0.10  Added selection of character encoding on the file. (_STRF_ENCODE)

+/                   Added f_closedir().

+/                   Added forced full FAT scan for f_getfree(). (_FS_NOFSINFO)

+/                   Added forced mount feature with changes of f_mount().

+/                   Improved behavior of volume auto detection.

+/                   Improved write throughput of f_puts() and f_printf().

+/                   Changed argument of f_chdrive(), f_mkfs(), disk_read() and disk_write().

+/                   Fixed f_write() can be truncated when the file size is close to 4GB.

+/                   Fixed f_open(), f_mkdir() and f_setlabel() can return incorrect error code.

+/ Jan 15,'14 R0.10a Added arbitrary strings as drive number in the path name. (_STR_VOLUME_ID)

+/                   Added a configuration option of minimum sector size. (_MIN_SS)

+/                   2nd argument of f_rename() can have a drive number and it will be ignored.

+/                   Fixed f_mount() with forced mount fails when drive number is >= 1.

+/                   Fixed f_close() invalidates the file object without volume lock.

+/                   Fixed f_closedir() returns but the volume lock is left acquired.

+/                   Fixed creation of an entry with LFN fails on too many SFN collisions.

+/ May 19,'14 R0.10b Fixed a hard error in the disk I/O layer can collapse the directory entry.

+/                   Fixed LFN entry is not deleted on delete/rename an object with lossy converted SFN.

+/ Nov 09,'14 R0.10c Added a configuration option for the platforms without RTC. (_FS_NORTC)

+/                   Fixed volume label created by Mac OS X cannot be retrieved with f_getlabel().

+/                   Fixed a potential problem of FAT access that can appear on disk error.

+/                   Fixed null pointer dereference on attempting to delete the root direcotry.

+/---------------------------------------------------------------------------*/

+

+#include "ff.h"			/* Declarations of FatFs API */

+#include "diskio.h"		/* Declarations of disk I/O functions */

+

+

+

+

+/*--------------------------------------------------------------------------

+

+   Module Private Definitions

+

+---------------------------------------------------------------------------*/

+

+#if _FATFS != 80376	/* Revision ID */

+#error Wrong include file (ff.h).

+#endif

+

+

+/* Reentrancy related */

+#if _FS_REENTRANT

+#if _USE_LFN == 1

+#error Static LFN work area cannot be used at thread-safe configuration

+#endif

+#define	ENTER_FF(fs)		{ if (!lock_fs(fs)) return FR_TIMEOUT; }

+#define	LEAVE_FF(fs, res)	{ unlock_fs(fs, res); return res; }

+#else

+#define	ENTER_FF(fs)

+#define LEAVE_FF(fs, res)	return res

+#endif

+

+#define	ABORT(fs, res)		{ fp->err = (BYTE)(res); LEAVE_FF(fs, res); }

+

+

+/* Definitions of sector size */

+#if (_MAX_SS < _MIN_SS) || (_MAX_SS != 512 && _MAX_SS != 1024 && _MAX_SS != 2048 && _MAX_SS != 4096) || (_MIN_SS != 512 && _MIN_SS != 1024 && _MIN_SS != 2048 && _MIN_SS != 4096)

+#error Wrong sector size configuration

+#endif

+#if _MAX_SS == _MIN_SS

+#define	SS(fs)	((UINT)_MAX_SS)	/* Fixed sector size */

+#else

+#define	SS(fs)	((fs)->ssize)	/* Variable sector size */

+#endif

+

+

+/* Timestamp feature */

+#if _FS_NORTC == 1

+#if _NORTC_YEAR < 1980 || _NORTC_YEAR > 2107 || _NORTC_MON < 1 || _NORTC_MON > 12 || _NORTC_MDAY < 1 || _NORTC_MDAY > 31

+#error Invalid _FS_NORTC settings

+#endif

+#define GET_FATTIME()  ((DWORD)(_NORTC_YEAR - 1980) << 25 | (DWORD)_NORTC_MON << 21 | (DWORD)_NORTC_MDAY << 16)

+#else

+#define GET_FATTIME()	get_fattime()

+#endif

+

+

+/* File access control feature */

+#if _FS_LOCK

+#if _FS_READONLY

+#error _FS_LOCK must be 0 at read-only configuration

+#endif

+typedef struct {

+	FATFS *fs;		/* Object ID 1, volume (NULL:blank entry) */

+	DWORD clu;		/* Object ID 2, directory (0:root) */

+	WORD idx;		/* Object ID 3, directory index */

+	WORD ctr;		/* Object open counter, 0:none, 0x01..0xFF:read mode open count, 0x100:write mode */

+} FILESEM;

+#endif

+

+

+

+/* DBCS code ranges and SBCS extend character conversion table */

+

+#if _CODE_PAGE == 932	/* Japanese Shift-JIS */

+#define _DF1S	0x81	/* DBC 1st byte range 1 start */

+#define _DF1E	0x9F	/* DBC 1st byte range 1 end */

+#define _DF2S	0xE0	/* DBC 1st byte range 2 start */

+#define _DF2E	0xFC	/* DBC 1st byte range 2 end */

+#define _DS1S	0x40	/* DBC 2nd byte range 1 start */

+#define _DS1E	0x7E	/* DBC 2nd byte range 1 end */

+#define _DS2S	0x80	/* DBC 2nd byte range 2 start */

+#define _DS2E	0xFC	/* DBC 2nd byte range 2 end */

+

+#elif _CODE_PAGE == 936	/* Simplified Chinese GBK */

+#define _DF1S	0x81

+#define _DF1E	0xFE

+#define _DS1S	0x40

+#define _DS1E	0x7E

+#define _DS2S	0x80

+#define _DS2E	0xFE

+

+#elif _CODE_PAGE == 949	/* Korean */

+#define _DF1S	0x81

+#define _DF1E	0xFE

+#define _DS1S	0x41

+#define _DS1E	0x5A

+#define _DS2S	0x61

+#define _DS2E	0x7A

+#define _DS3S	0x81

+#define _DS3E	0xFE

+

+#elif _CODE_PAGE == 950	/* Traditional Chinese Big5 */

+#define _DF1S	0x81

+#define _DF1E	0xFE

+#define _DS1S	0x40

+#define _DS1E	0x7E

+#define _DS2S	0xA1

+#define _DS2E	0xFE

+

+#elif _CODE_PAGE == 437	/* U.S. (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 720	/* Arabic (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 737	/* Greek (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \

+				0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 775	/* Baltic (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 850	/* Multilingual Latin 1 (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \

+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 852	/* Latin 2 (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \

+				0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF}

+

+#elif _CODE_PAGE == 855	/* Cyrillic (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \

+				0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \

+				0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 857	/* Turkish (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \

+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 858	/* Multilingual Latin 1 + Euro (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \

+				0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 862	/* Hebrew (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 866	/* Russian (OEM) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 874	/* Thai (OEM, Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}

+

+#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \

+				0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF}

+

+#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \

+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}

+

+#elif _CODE_PAGE == 1253 /* Greek (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \

+				0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF}

+

+#elif _CODE_PAGE == 1254 /* Turkish (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \

+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F}

+

+#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 1256 /* Arabic (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF}

+

+#elif _CODE_PAGE == 1257 /* Baltic (Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \

+				0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF}

+

+#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */

+#define _DF1S	0

+#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \

+				0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \

+				0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F}

+

+#elif _CODE_PAGE == 1	/* ASCII (for only non-LFN cfg) */

+#if _USE_LFN

+#error Cannot use LFN feature without valid code page.

+#endif

+#define _DF1S	0

+

+#else

+#error Unknown code page

+

+#endif

+

+

+/* Character code support macros */

+#define IsUpper(c)	(((c)>='A')&&((c)<='Z'))

+#define IsLower(c)	(((c)>='a')&&((c)<='z'))

+#define IsDigit(c)	(((c)>='0')&&((c)<='9'))

+

+#if _DF1S		/* Code page is DBCS */

+

+#ifdef _DF2S	/* Two 1st byte areas */

+#define IsDBCS1(c)	(((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E))

+#else			/* One 1st byte area */

+#define IsDBCS1(c)	((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E)

+#endif

+

+#ifdef _DS3S	/* Three 2nd byte areas */

+#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E))

+#else			/* Two 2nd byte areas */

+#define IsDBCS2(c)	(((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E))

+#endif

+

+#else			/* Code page is SBCS */

+

+#define IsDBCS1(c)	0

+#define IsDBCS2(c)	0

+

+#endif /* _DF1S */

+

+

+/* Name status flags */

+#define NSFLAG		11		/* Index of name status byte in fn[] */

+#define NS_LOSS		0x01	/* Out of 8.3 format */

+#define NS_LFN		0x02	/* Force to create LFN entry */

+#define NS_LAST		0x04	/* Last segment */

+#define NS_BODY		0x08	/* Lower case flag (body) */

+#define NS_EXT		0x10	/* Lower case flag (ext) */

+#define NS_DOT		0x20	/* Dot entry */

+

+

+/* FAT sub-type boundaries (Differ from specs but correct for real DOS/Windows) */

+#define MIN_FAT16	4086U	/* Minimum number of clusters as FAT16 */

+#define	MIN_FAT32	65526U	/* Minimum number of clusters as FAT32 */

+

+

+/* FatFs refers the members in the FAT structures as byte array instead of

+/ structure member because the structure is not binary compatible between

+/ different platforms */

+

+#define BS_jmpBoot			0		/* x86 jump instruction (3) */

+#define BS_OEMName			3		/* OEM name (8) */

+#define BPB_BytsPerSec		11		/* Sector size [byte] (2) */

+#define BPB_SecPerClus		13		/* Cluster size [sector] (1) */

+#define BPB_RsvdSecCnt		14		/* Size of reserved area [sector] (2) */

+#define BPB_NumFATs			16		/* Number of FAT copies (1) */

+#define BPB_RootEntCnt		17		/* Number of root directory entries for FAT12/16 (2) */

+#define BPB_TotSec16		19		/* Volume size [sector] (2) */

+#define BPB_Media			21		/* Media descriptor (1) */

+#define BPB_FATSz16			22		/* FAT size [sector] (2) */

+#define BPB_SecPerTrk		24		/* Track size [sector] (2) */

+#define BPB_NumHeads		26		/* Number of heads (2) */

+#define BPB_HiddSec			28		/* Number of special hidden sectors (4) */

+#define BPB_TotSec32		32		/* Volume size [sector] (4) */

+#define BS_DrvNum			36		/* Physical drive number (2) */

+#define BS_BootSig			38		/* Extended boot signature (1) */

+#define BS_VolID			39		/* Volume serial number (4) */

+#define BS_VolLab			43		/* Volume label (8) */

+#define BS_FilSysType		54		/* File system type (1) */

+#define BPB_FATSz32			36		/* FAT size [sector] (4) */

+#define BPB_ExtFlags		40		/* Extended flags (2) */

+#define BPB_FSVer			42		/* File system version (2) */

+#define BPB_RootClus		44		/* Root directory first cluster (4) */

+#define BPB_FSInfo			48		/* Offset of FSINFO sector (2) */

+#define BPB_BkBootSec		50		/* Offset of backup boot sector (2) */

+#define BS_DrvNum32			64		/* Physical drive number (2) */

+#define BS_BootSig32		66		/* Extended boot signature (1) */

+#define BS_VolID32			67		/* Volume serial number (4) */

+#define BS_VolLab32			71		/* Volume label (8) */

+#define BS_FilSysType32		82		/* File system type (1) */

+#define	FSI_LeadSig			0		/* FSI: Leading signature (4) */

+#define	FSI_StrucSig		484		/* FSI: Structure signature (4) */

+#define	FSI_Free_Count		488		/* FSI: Number of free clusters (4) */

+#define	FSI_Nxt_Free		492		/* FSI: Last allocated cluster (4) */

+#define MBR_Table			446		/* MBR: Partition table offset (2) */

+#define	SZ_PTE				16		/* MBR: Size of a partition table entry */

+#define BS_55AA				510		/* Signature word (2) */

+

+#define	DIR_Name			0		/* Short file name (11) */

+#define	DIR_Attr			11		/* Attribute (1) */

+#define	DIR_NTres			12		/* NT flag (1) */

+#define DIR_CrtTimeTenth	13		/* Created time sub-second (1) */

+#define	DIR_CrtTime			14		/* Created time (2) */

+#define	DIR_CrtDate			16		/* Created date (2) */

+#define DIR_LstAccDate		18		/* Last accessed date (2) */

+#define	DIR_FstClusHI		20		/* Higher 16-bit of first cluster (2) */

+#define	DIR_WrtTime			22		/* Modified time (2) */

+#define	DIR_WrtDate			24		/* Modified date (2) */

+#define	DIR_FstClusLO		26		/* Lower 16-bit of first cluster (2) */

+#define	DIR_FileSize		28		/* File size (4) */

+#define	LDIR_Ord			0		/* LFN entry order and LLE flag (1) */

+#define	LDIR_Attr			11		/* LFN attribute (1) */

+#define	LDIR_Type			12		/* LFN type (1) */

+#define	LDIR_Chksum			13		/* Sum of corresponding SFN entry */

+#define	LDIR_FstClusLO		26		/* Filled by zero (0) */

+#define	SZ_DIR				32		/* Size of a directory entry */

+#define	LLE					0x40	/* Last long entry flag in LDIR_Ord */

+#define	DDE					0xE5	/* Deleted directory entry mark in DIR_Name[0] */

+#define	NDDE				0x05	/* Replacement of the character collides with DDE */

+

+

+

+

+/*------------------------------------------------------------*/

+/* Module private work area                                   */

+/*------------------------------------------------------------*/

+/* Remark: Uninitialized variables with static duration are

+/  guaranteed zero/null at start-up. If not, either the linker

+/  or start-up routine being used is out of ANSI-C standard.

+*/

+

+#if _VOLUMES < 1 || _VOLUMES > 9

+#error Wrong _VOLUMES setting

+#endif

+static FATFS *FatFs[_VOLUMES];	/* Pointer to the file system objects (logical drives) */

+static WORD Fsid;				/* File system mount ID */

+

+#if _FS_RPATH && _VOLUMES >= 2

+static BYTE CurrVol;			/* Current drive */

+#endif

+

+#if _FS_LOCK

+static FILESEM Files[_FS_LOCK];	/* Open object lock semaphores */

+#endif

+

+#if _USE_LFN == 0			/* Non LFN feature */

+#define	DEF_NAMEBUF			BYTE sfn[12]

+#define INIT_BUF(dobj)		(dobj).fn = sfn

+#define	FREE_BUF()

+#else

+#if _MAX_LFN < 12 || _MAX_LFN > 255

+#error Wrong _MAX_LFN setting

+#endif

+#if _USE_LFN == 1			/* LFN feature with static working buffer */

+static WCHAR LfnBuf[_MAX_LFN+1];

+#define	DEF_NAMEBUF			BYTE sfn[12]

+#define INIT_BUF(dobj)		{ (dobj).fn = sfn; (dobj).lfn = LfnBuf; }

+#define	FREE_BUF()

+#elif _USE_LFN == 2 		/* LFN feature with dynamic working buffer on the stack */

+#define	DEF_NAMEBUF			BYTE sfn[12]; WCHAR lbuf[_MAX_LFN+1]

+#define INIT_BUF(dobj)		{ (dobj).fn = sfn; (dobj).lfn = lbuf; }

+#define	FREE_BUF()

+#elif _USE_LFN == 3 		/* LFN feature with dynamic working buffer on the heap */

+#define	DEF_NAMEBUF			BYTE sfn[12]; WCHAR *lfn

+#define INIT_BUF(dobj)		{ lfn = ff_memalloc((_MAX_LFN + 1) * 2); if (!lfn) LEAVE_FF((dobj).fs, FR_NOT_ENOUGH_CORE); (dobj).lfn = lfn; (dobj).fn = sfn; }

+#define	FREE_BUF()			ff_memfree(lfn)

+#else

+#error Wrong _USE_LFN setting

+#endif

+#endif

+

+#ifdef _EXCVT

+static const BYTE ExCvt[] = _EXCVT;	/* Upper conversion table for extended characters */

+#endif

+

+

+

+

+

+

+/*--------------------------------------------------------------------------

+

+   Module Private Functions

+

+---------------------------------------------------------------------------*/

+

+

+/*-----------------------------------------------------------------------*/

+/* String functions                                                      */

+/*-----------------------------------------------------------------------*/

+

+/* Copy memory to memory */

+static

+void mem_cpy (void* dst, const void* src, UINT cnt) {

+	BYTE *d = (BYTE*)dst;

+	const BYTE *s = (const BYTE*)src;

+

+#if _WORD_ACCESS == 1

+	while (cnt >= sizeof (int)) {

+		*(int*)d = *(int*)s;

+		d += sizeof (int); s += sizeof (int);

+		cnt -= sizeof (int);

+	}

+#endif

+	while (cnt--)

+		*d++ = *s++;

+}

+

+/* Fill memory */

+static

+void mem_set (void* dst, int val, UINT cnt) {

+	BYTE *d = (BYTE*)dst;

+

+	while (cnt--)

+		*d++ = (BYTE)val;

+}

+

+/* Compare memory to memory */

+static

+int mem_cmp (const void* dst, const void* src, UINT cnt) {

+	const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;

+	int r = 0;

+

+	while (cnt-- && (r = *d++ - *s++) == 0) ;

+	return r;

+}

+

+/* Check if chr is contained in the string */

+static

+int chk_chr (const char* str, int chr) {

+	while (*str && *str != chr) str++;

+	return *str;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Request/Release grant to access the volume                            */

+/*-----------------------------------------------------------------------*/

+#if _FS_REENTRANT

+static

+int lock_fs (

+	FATFS* fs		/* File system object */

+)

+{

+	return ff_req_grant(fs->sobj);

+}

+

+

+static

+void unlock_fs (

+	FATFS* fs,		/* File system object */

+	FRESULT res		/* Result code to be returned */

+)

+{

+	if (fs &&

+		res != FR_NOT_ENABLED &&

+		res != FR_INVALID_DRIVE &&

+		res != FR_INVALID_OBJECT &&

+		res != FR_TIMEOUT) {

+		ff_rel_grant(fs->sobj);

+	}

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* File lock control functions                                           */

+/*-----------------------------------------------------------------------*/

+#if _FS_LOCK

+

+static

+FRESULT chk_lock (	/* Check if the file can be accessed */

+	DIR* dp,		/* Directory object pointing the file to be checked */

+	int acc			/* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */

+)

+{

+	UINT i, be;

+

+	/* Search file semaphore table */

+	for (i = be = 0; i < _FS_LOCK; i++) {

+		if (Files[i].fs) {	/* Existing entry */

+			if (Files[i].fs == dp->fs &&	 	/* Check if the object matched with an open object */

+				Files[i].clu == dp->sclust &&

+				Files[i].idx == dp->index) break;

+		} else {			/* Blank entry */

+			be = 1;

+		}

+	}

+	if (i == _FS_LOCK)	/* The object is not opened */

+		return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES;	/* Is there a blank entry for new object? */

+

+	/* The object has been opened. Reject any open against writing file and all write mode open */

+	return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;

+}

+

+

+static

+int enq_lock (void)	/* Check if an entry is available for a new object */

+{

+	UINT i;

+

+	for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;

+	return (i == _FS_LOCK) ? 0 : 1;

+}

+

+

+static

+UINT inc_lock (	/* Increment object open counter and returns its index (0:Internal error) */

+	DIR* dp,	/* Directory object pointing the file to register or increment */

+	int acc		/* Desired access (0:Read, 1:Write, 2:Delete/Rename) */

+)

+{

+	UINT i;

+

+

+	for (i = 0; i < _FS_LOCK; i++) {	/* Find the object */

+		if (Files[i].fs == dp->fs &&

+			Files[i].clu == dp->sclust &&

+			Files[i].idx == dp->index) break;

+	}

+

+	if (i == _FS_LOCK) {				/* Not opened. Register it as new. */

+		for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;

+		if (i == _FS_LOCK) return 0;	/* No free entry to register (int err) */

+		Files[i].fs = dp->fs;

+		Files[i].clu = dp->sclust;

+		Files[i].idx = dp->index;

+		Files[i].ctr = 0;

+	}

+

+	if (acc && Files[i].ctr) return 0;	/* Access violation (int err) */

+

+	Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1;	/* Set semaphore value */

+

+	return i + 1;

+}

+

+

+static

+FRESULT dec_lock (	/* Decrement object open counter */

+	UINT i			/* Semaphore index (1..) */

+)

+{

+	WORD n;

+	FRESULT res;

+

+

+	if (--i < _FS_LOCK) {	/* Shift index number origin from 0 */

+		n = Files[i].ctr;

+		if (n == 0x100) n = 0;		/* If write mode open, delete the entry */

+		if (n) n--;					/* Decrement read mode open count */

+		Files[i].ctr = n;

+		if (!n) Files[i].fs = 0;	/* Delete the entry if open count gets zero */

+		res = FR_OK;

+	} else {

+		res = FR_INT_ERR;			/* Invalid index nunber */

+	}

+	return res;

+}

+

+

+static

+void clear_lock (	/* Clear lock entries of the volume */

+	FATFS *fs

+)

+{

+	UINT i;

+

+	for (i = 0; i < _FS_LOCK; i++) {

+		if (Files[i].fs == fs) Files[i].fs = 0;

+	}

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Move/Flush disk access window in the file system object               */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY

+static

+FRESULT sync_window (

+	FATFS* fs		/* File system object */

+)

+{

+	DWORD wsect;

+	UINT nf;

+	FRESULT res = FR_OK;

+

+

+	if (fs->wflag) {	/* Write back the sector if it is dirty */

+		wsect = fs->winsect;	/* Current sector number */

+		if (disk_write(fs->drv, fs->win, wsect, 1) != RES_OK) {

+			res = FR_DISK_ERR;

+		} else {

+			fs->wflag = 0;

+			if (wsect - fs->fatbase < fs->fsize) {		/* Is it in the FAT area? */

+				for (nf = fs->n_fats; nf >= 2; nf--) {	/* Reflect the change to all FAT copies */

+					wsect += fs->fsize;

+					disk_write(fs->drv, fs->win, wsect, 1);

+				}

+			}

+		}

+	}

+	return res;

+}

+#endif

+

+

+static

+FRESULT move_window (

+	FATFS* fs,		/* File system object */

+	DWORD sector	/* Sector number to make appearance in the fs->win[] */

+)

+{

+	FRESULT res = FR_OK;

+

+

+	if (sector != fs->winsect) {	/* Window offset changed? */

+#if !_FS_READONLY

+		res = sync_window(fs);		/* Write-back changes */

+#endif

+		if (res == FR_OK) {			/* Fill sector window with new data */

+			if (disk_read(fs->drv, fs->win, sector, 1) != RES_OK) {

+				sector = 0xFFFFFFFF;	/* Invalidate window if data is not reliable */

+				res = FR_DISK_ERR;

+			}

+			fs->winsect = sector;

+		}

+	}

+	return res;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Synchronize file system and strage device                             */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY

+static

+FRESULT sync_fs (	/* FR_OK: successful, FR_DISK_ERR: failed */

+	FATFS* fs		/* File system object */

+)

+{

+	FRESULT res;

+

+

+	res = sync_window(fs);

+	if (res == FR_OK) {

+		/* Update FSINFO sector if needed */

+		if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) {

+			/* Create FSINFO structure */

+			mem_set(fs->win, 0, SS(fs));

+			ST_WORD(fs->win+BS_55AA, 0xAA55);

+			ST_DWORD(fs->win+FSI_LeadSig, 0x41615252);

+			ST_DWORD(fs->win+FSI_StrucSig, 0x61417272);

+			ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust);

+			ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust);

+			/* Write it into the FSINFO sector */

+			fs->winsect = fs->volbase + 1;

+			disk_write(fs->drv, fs->win, fs->winsect, 1);

+			fs->fsi_flag = 0;

+		}

+		/* Make sure that no pending write process in the physical drive */

+		if (disk_ioctl(fs->drv, CTRL_SYNC, 0) != RES_OK)

+			res = FR_DISK_ERR;

+	}

+

+	return res;

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Get sector# from cluster#                                             */

+/*-----------------------------------------------------------------------*/

+/* Hidden API for hacks and disk tools */

+

+DWORD clust2sect (	/* !=0: Sector number, 0: Failed - invalid cluster# */

+	FATFS* fs,		/* File system object */

+	DWORD clst		/* Cluster# to be converted */

+)

+{

+	clst -= 2;

+	if (clst >= fs->n_fatent - 2) return 0;		/* Invalid cluster# */

+	return clst * fs->csize + fs->database;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* FAT access - Read value of a FAT entry                                */

+/*-----------------------------------------------------------------------*/

+/* Hidden API for hacks and disk tools */

+

+DWORD get_fat (	/* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x0FFFFFFF:Cluster status */

+	FATFS* fs,	/* File system object */

+	DWORD clst	/* FAT item index (cluster#) to get the value */

+)

+{

+	UINT wc, bc;

+	BYTE *p;

+	DWORD val;

+

+

+	if (clst < 2 || clst >= fs->n_fatent) {	/* Check range */

+		val = 1;	/* Internal error */

+

+	} else {

+		val = 0xFFFFFFFF;	/* Default value falls on disk error */

+

+		switch (fs->fs_type) {

+		case FS_FAT12 :

+			bc = (UINT)clst; bc += bc / 2;

+			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;

+			wc = fs->win[bc++ % SS(fs)];

+			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;

+			wc |= fs->win[bc % SS(fs)] << 8;

+			val = clst & 1 ? wc >> 4 : (wc & 0xFFF);

+			break;

+

+		case FS_FAT16 :

+			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;

+			p = &fs->win[clst * 2 % SS(fs)];

+			val = LD_WORD(p);

+			break;

+

+		case FS_FAT32 :

+			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;

+			p = &fs->win[clst * 4 % SS(fs)];

+			val = LD_DWORD(p) & 0x0FFFFFFF;

+			break;

+

+		default:

+			val = 1;	/* Internal error */

+		}

+	}

+

+	return val;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* FAT access - Change value of a FAT entry                              */

+/*-----------------------------------------------------------------------*/

+/* Hidden API for hacks and disk tools */

+

+#if !_FS_READONLY

+FRESULT put_fat (

+	FATFS* fs,	/* File system object */

+	DWORD clst,	/* FAT item index (cluster#) to be set */

+	DWORD val	/* New value to mark the cluster */

+)

+{

+	UINT bc;

+	BYTE *p;

+	FRESULT res;

+

+

+	if (clst < 2 || clst >= fs->n_fatent) {	/* Check range */

+		res = FR_INT_ERR;

+

+	} else {

+		switch (fs->fs_type) {

+		case FS_FAT12 :

+			bc = (UINT)clst; bc += bc / 2;

+			res = move_window(fs, fs->fatbase + (bc / SS(fs)));

+			if (res != FR_OK) break;

+			p = &fs->win[bc++ % SS(fs)];

+			*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;

+			fs->wflag = 1;

+			res = move_window(fs, fs->fatbase + (bc / SS(fs)));

+			if (res != FR_OK) break;

+			p = &fs->win[bc % SS(fs)];

+			*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));

+			fs->wflag = 1;

+			break;

+

+		case FS_FAT16 :

+			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));

+			if (res != FR_OK) break;

+			p = &fs->win[clst * 2 % SS(fs)];

+			ST_WORD(p, (WORD)val);

+			fs->wflag = 1;

+			break;

+

+		case FS_FAT32 :

+			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));

+			if (res != FR_OK) break;

+			p = &fs->win[clst * 4 % SS(fs)];

+			val |= LD_DWORD(p) & 0xF0000000;

+			ST_DWORD(p, val);

+			fs->wflag = 1;

+			break;

+

+		default :

+			res = FR_INT_ERR;

+		}

+	}

+

+	return res;

+}

+#endif /* !_FS_READONLY */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* FAT handling - Remove a cluster chain                                 */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY

+static

+FRESULT remove_chain (

+	FATFS* fs,			/* File system object */

+	DWORD clst			/* Cluster# to remove a chain from */

+)

+{

+	FRESULT res;

+	DWORD nxt;

+#if _USE_TRIM

+	DWORD scl = clst, ecl = clst, rt[2];

+#endif

+

+	if (clst < 2 || clst >= fs->n_fatent) {	/* Check range */

+		res = FR_INT_ERR;

+

+	} else {

+		res = FR_OK;

+		while (clst < fs->n_fatent) {			/* Not a last link? */

+			nxt = get_fat(fs, clst);			/* Get cluster status */

+			if (nxt == 0) break;				/* Empty cluster? */

+			if (nxt == 1) { res = FR_INT_ERR; break; }	/* Internal error? */

+			if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }	/* Disk error? */

+			res = put_fat(fs, clst, 0);			/* Mark the cluster "empty" */

+			if (res != FR_OK) break;

+			if (fs->free_clust != 0xFFFFFFFF) {	/* Update FSINFO */

+				fs->free_clust++;

+				fs->fsi_flag |= 1;

+			}

+#if _USE_TRIM

+			if (ecl + 1 == nxt) {	/* Is next cluster contiguous? */

+				ecl = nxt;

+			} else {				/* End of contiguous clusters */ 

+				rt[0] = clust2sect(fs, scl);					/* Start sector */

+				rt[1] = clust2sect(fs, ecl) + fs->csize - 1;	/* End sector */

+				disk_ioctl(fs->drv, CTRL_TRIM, rt);				/* Erase the block */

+				scl = ecl = nxt;

+			}

+#endif

+			clst = nxt;	/* Next cluster */

+		}

+	}

+

+	return res;

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* FAT handling - Stretch or Create a cluster chain                      */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY

+static

+DWORD create_chain (	/* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */

+	FATFS* fs,			/* File system object */

+	DWORD clst			/* Cluster# to stretch. 0 means create a new chain. */

+)

+{

+	DWORD cs, ncl, scl;

+	FRESULT res;

+

+

+	if (clst == 0) {		/* Create a new chain */

+		scl = fs->last_clust;			/* Get suggested start point */

+		if (!scl || scl >= fs->n_fatent) scl = 1;

+	}

+	else {					/* Stretch the current chain */

+		cs = get_fat(fs, clst);			/* Check the cluster status */

+		if (cs < 2) return 1;			/* Invalid value */

+		if (cs == 0xFFFFFFFF) return cs;	/* A disk error occurred */

+		if (cs < fs->n_fatent) return cs;	/* It is already followed by next cluster */

+		scl = clst;

+	}

+

+	ncl = scl;				/* Start cluster */

+	for (;;) {

+		ncl++;							/* Next cluster */

+		if (ncl >= fs->n_fatent) {		/* Check wrap around */

+			ncl = 2;

+			if (ncl > scl) return 0;	/* No free cluster */

+		}

+		cs = get_fat(fs, ncl);			/* Get the cluster status */

+		if (cs == 0) break;				/* Found a free cluster */

+		if (cs == 0xFFFFFFFF || cs == 1)/* An error occurred */

+			return cs;

+		if (ncl == scl) return 0;		/* No free cluster */

+	}

+

+	res = put_fat(fs, ncl, 0x0FFFFFFF);	/* Mark the new cluster "last link" */

+	if (res == FR_OK && clst != 0) {

+		res = put_fat(fs, clst, ncl);	/* Link it to the previous one if needed */

+	}

+	if (res == FR_OK) {

+		fs->last_clust = ncl;			/* Update FSINFO */

+		if (fs->free_clust != 0xFFFFFFFF) {

+			fs->free_clust--;

+			fs->fsi_flag |= 1;

+		}

+	} else {

+		ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1;

+	}

+

+	return ncl;		/* Return new cluster number or error code */

+}

+#endif /* !_FS_READONLY */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* FAT handling - Convert offset into cluster with link map table        */

+/*-----------------------------------------------------------------------*/

+

+#if _USE_FASTSEEK

+static

+DWORD clmt_clust (	/* <2:Error, >=2:Cluster number */

+	FIL* fp,		/* Pointer to the file object */

+	DWORD ofs		/* File offset to be converted to cluster# */

+)

+{

+	DWORD cl, ncl, *tbl;

+

+

+	tbl = fp->cltbl + 1;	/* Top of CLMT */

+	cl = ofs / SS(fp->fs) / fp->fs->csize;	/* Cluster order from top of the file */

+	for (;;) {

+		ncl = *tbl++;			/* Number of cluters in the fragment */

+		if (!ncl) return 0;		/* End of table? (error) */

+		if (cl < ncl) break;	/* In this fragment? */

+		cl -= ncl; tbl++;		/* Next fragment */

+	}

+	return cl + *tbl;	/* Return the cluster number */

+}

+#endif	/* _USE_FASTSEEK */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Directory handling - Set directory index                              */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT dir_sdi (

+	DIR* dp,		/* Pointer to directory object */

+	UINT idx		/* Index of directory table */

+)

+{

+	DWORD clst, sect;

+	UINT ic;

+

+

+	dp->index = (WORD)idx;	/* Current index */

+	clst = dp->sclust;		/* Table start cluster (0:root) */

+	if (clst == 1 || clst >= dp->fs->n_fatent)	/* Check start cluster range */

+		return FR_INT_ERR;

+	if (!clst && dp->fs->fs_type == FS_FAT32)	/* Replace cluster# 0 with root cluster# if in FAT32 */

+		clst = dp->fs->dirbase;

+

+	if (clst == 0) {	/* Static table (root-directory in FAT12/16) */

+		if (idx >= dp->fs->n_rootdir)	/* Is index out of range? */

+			return FR_INT_ERR;

+		sect = dp->fs->dirbase;

+	}

+	else {				/* Dynamic table (root-directory in FAT32 or sub-directory) */

+		ic = SS(dp->fs) / SZ_DIR * dp->fs->csize;	/* Entries per cluster */

+		while (idx >= ic) {	/* Follow cluster chain */

+			clst = get_fat(dp->fs, clst);				/* Get next cluster */

+			if (clst == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error */

+			if (clst < 2 || clst >= dp->fs->n_fatent)	/* Reached to end of table or internal error */

+				return FR_INT_ERR;

+			idx -= ic;

+		}

+		sect = clust2sect(dp->fs, clst);

+	}

+	dp->clust = clst;	/* Current cluster# */

+	if (!sect) return FR_INT_ERR;

+	dp->sect = sect + idx / (SS(dp->fs) / SZ_DIR);					/* Sector# of the directory entry */

+	dp->dir = dp->fs->win + (idx % (SS(dp->fs) / SZ_DIR)) * SZ_DIR;	/* Ptr to the entry in the sector */

+

+	return FR_OK;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Directory handling - Move directory table index next                  */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT dir_next (	/* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */

+	DIR* dp,		/* Pointer to the directory object */

+	int stretch		/* 0: Do not stretch table, 1: Stretch table if needed */

+)

+{

+	DWORD clst;

+	UINT i;

+

+

+	i = dp->index + 1;

+	if (!(i & 0xFFFF) || !dp->sect)	/* Report EOT when index has reached 65535 */

+		return FR_NO_FILE;

+

+	if (!(i % (SS(dp->fs) / SZ_DIR))) {	/* Sector changed? */

+		dp->sect++;					/* Next sector */

+

+		if (!dp->clust) {		/* Static table */

+			if (i >= dp->fs->n_rootdir)	/* Report EOT if it reached end of static table */

+				return FR_NO_FILE;

+		}

+		else {					/* Dynamic table */

+			if (((i / (SS(dp->fs) / SZ_DIR)) & (dp->fs->csize - 1)) == 0) {	/* Cluster changed? */

+				clst = get_fat(dp->fs, dp->clust);				/* Get next cluster */

+				if (clst <= 1) return FR_INT_ERR;

+				if (clst == 0xFFFFFFFF) return FR_DISK_ERR;

+				if (clst >= dp->fs->n_fatent) {					/* If it reached end of dynamic table, */

+#if !_FS_READONLY

+					UINT c;

+					if (!stretch) return FR_NO_FILE;			/* If do not stretch, report EOT */

+					clst = create_chain(dp->fs, dp->clust);		/* Stretch cluster chain */

+					if (clst == 0) return FR_DENIED;			/* No free cluster */

+					if (clst == 1) return FR_INT_ERR;

+					if (clst == 0xFFFFFFFF) return FR_DISK_ERR;

+					/* Clean-up stretched table */

+					if (sync_window(dp->fs)) return FR_DISK_ERR;/* Flush disk access window */

+					mem_set(dp->fs->win, 0, SS(dp->fs));		/* Clear window buffer */

+					dp->fs->winsect = clust2sect(dp->fs, clst);	/* Cluster start sector */

+					for (c = 0; c < dp->fs->csize; c++) {		/* Fill the new cluster with 0 */

+						dp->fs->wflag = 1;

+						if (sync_window(dp->fs)) return FR_DISK_ERR;

+						dp->fs->winsect++;

+					}

+					dp->fs->winsect -= c;						/* Rewind window offset */

+#else

+					if (!stretch) return FR_NO_FILE;			/* If do not stretch, report EOT (this is to suppress warning) */

+					return FR_NO_FILE;							/* Report EOT */

+#endif

+				}

+				dp->clust = clst;				/* Initialize data for new cluster */

+				dp->sect = clust2sect(dp->fs, clst);

+			}

+		}

+	}

+

+	dp->index = (WORD)i;	/* Current index */

+	dp->dir = dp->fs->win + (i % (SS(dp->fs) / SZ_DIR)) * SZ_DIR;	/* Current entry in the window */

+

+	return FR_OK;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Directory handling - Reserve directory entry                          */

+/*-----------------------------------------------------------------------*/

+

+#if !_FS_READONLY

+static

+FRESULT dir_alloc (

+	DIR* dp,	/* Pointer to the directory object */

+	UINT nent	/* Number of contiguous entries to allocate (1-21) */

+)

+{

+	FRESULT res;

+	UINT n;

+

+

+	res = dir_sdi(dp, 0);

+	if (res == FR_OK) {

+		n = 0;

+		do {

+			res = move_window(dp->fs, dp->sect);

+			if (res != FR_OK) break;

+			if (dp->dir[0] == DDE || dp->dir[0] == 0) {	/* Is it a free entry? */

+				if (++n == nent) break;	/* A block of contiguous free entries is found */

+			} else {

+				n = 0;					/* Not a blank entry. Restart to search */

+			}

+			res = dir_next(dp, 1);		/* Next entry with table stretch enabled */

+		} while (res == FR_OK);

+	}

+	if (res == FR_NO_FILE) res = FR_DENIED;	/* No directory entry to allocate */

+	return res;

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Directory handling - Load/Store start cluster number                  */

+/*-----------------------------------------------------------------------*/

+

+static

+DWORD ld_clust (

+	FATFS* fs,	/* Pointer to the fs object */

+	BYTE* dir	/* Pointer to the directory entry */

+)

+{

+	DWORD cl;

+

+	cl = LD_WORD(dir+DIR_FstClusLO);

+	if (fs->fs_type == FS_FAT32)

+		cl |= (DWORD)LD_WORD(dir+DIR_FstClusHI) << 16;

+

+	return cl;

+}

+

+

+#if !_FS_READONLY

+static

+void st_clust (

+	BYTE* dir,	/* Pointer to the directory entry */

+	DWORD cl	/* Value to be set */

+)

+{

+	ST_WORD(dir+DIR_FstClusLO, cl);

+	ST_WORD(dir+DIR_FstClusHI, cl >> 16);

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry   */

+/*-----------------------------------------------------------------------*/

+#if _USE_LFN

+static

+const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30};	/* Offset of LFN characters in the directory entry */

+

+

+static

+int cmp_lfn (			/* 1:Matched, 0:Not matched */

+	WCHAR* lfnbuf,		/* Pointer to the LFN to be compared */

+	BYTE* dir			/* Pointer to the directory entry containing a part of LFN */

+)

+{

+	UINT i, s;

+	WCHAR wc, uc;

+

+

+	i = ((dir[LDIR_Ord] & ~LLE) - 1) * 13;	/* Get offset in the LFN buffer */

+	s = 0; wc = 1;

+	do {

+		uc = LD_WORD(dir+LfnOfs[s]);	/* Pick an LFN character from the entry */

+		if (wc) {	/* Last character has not been processed */

+			wc = ff_wtoupper(uc);		/* Convert it to upper case */

+			if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++]))	/* Compare it */

+				return 0;				/* Not matched */

+		} else {

+			if (uc != 0xFFFF) return 0;	/* Check filler */

+		}

+	} while (++s < 13);				/* Repeat until all characters in the entry are checked */

+

+	if ((dir[LDIR_Ord] & LLE) && wc && lfnbuf[i])	/* Last segment matched but different length */

+		return 0;

+

+	return 1;						/* The part of LFN matched */

+}

+

+

+

+static

+int pick_lfn (			/* 1:Succeeded, 0:Buffer overflow */

+	WCHAR* lfnbuf,		/* Pointer to the Unicode-LFN buffer */

+	BYTE* dir			/* Pointer to the directory entry */

+)

+{

+	UINT i, s;

+	WCHAR wc, uc;

+

+

+	i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13;	/* Offset in the LFN buffer */

+

+	s = 0; wc = 1;

+	do {

+		uc = LD_WORD(dir+LfnOfs[s]);		/* Pick an LFN character from the entry */

+		if (wc) {	/* Last character has not been processed */

+			if (i >= _MAX_LFN) return 0;	/* Buffer overflow? */

+			lfnbuf[i++] = wc = uc;			/* Store it */

+		} else {

+			if (uc != 0xFFFF) return 0;		/* Check filler */

+		}

+	} while (++s < 13);						/* Read all character in the entry */

+

+	if (dir[LDIR_Ord] & LLE) {				/* Put terminator if it is the last LFN part */

+		if (i >= _MAX_LFN) return 0;		/* Buffer overflow? */

+		lfnbuf[i] = 0;

+	}

+

+	return 1;

+}

+

+

+#if !_FS_READONLY

+static

+void fit_lfn (

+	const WCHAR* lfnbuf,	/* Pointer to the LFN buffer */

+	BYTE* dir,				/* Pointer to the directory entry */

+	BYTE ord,				/* LFN order (1-20) */

+	BYTE sum				/* SFN sum */

+)

+{

+	UINT i, s;

+	WCHAR wc;

+

+

+	dir[LDIR_Chksum] = sum;			/* Set check sum */

+	dir[LDIR_Attr] = AM_LFN;		/* Set attribute. LFN entry */

+	dir[LDIR_Type] = 0;

+	ST_WORD(dir+LDIR_FstClusLO, 0);

+

+	i = (ord - 1) * 13;				/* Get offset in the LFN buffer */

+	s = wc = 0;

+	do {

+		if (wc != 0xFFFF) wc = lfnbuf[i++];	/* Get an effective character */

+		ST_WORD(dir+LfnOfs[s], wc);	/* Put it */

+		if (!wc) wc = 0xFFFF;		/* Padding characters following last character */

+	} while (++s < 13);

+	if (wc == 0xFFFF || !lfnbuf[i]) ord |= LLE;	/* Bottom LFN part is the start of LFN sequence */

+	dir[LDIR_Ord] = ord;			/* Set the LFN order */

+}

+

+#endif

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Create numbered name                                                  */

+/*-----------------------------------------------------------------------*/

+#if _USE_LFN

+static

+void gen_numname (

+	BYTE* dst,			/* Pointer to the buffer to store numbered SFN */

+	const BYTE* src,	/* Pointer to SFN */

+	const WCHAR* lfn,	/* Pointer to LFN */

+	UINT seq			/* Sequence number */

+)

+{

+	BYTE ns[8], c;

+	UINT i, j;

+

+

+	mem_cpy(dst, src, 11);

+

+	if (seq > 5) {	/* On many collisions, generate a hash number instead of sequential number */

+		WCHAR wc;

+		DWORD sr = seq;

+

+		while (*lfn) {	/* Create a CRC */

+			wc = *lfn++;

+			for (i = 0; i < 16; i++) {

+				sr = (sr << 1) + (wc & 1);

+				wc >>= 1;

+				if (sr & 0x10000) sr ^= 0x11021;

+			}

+		}

+		seq = (UINT)sr;

+	}

+

+	/* itoa (hexdecimal) */

+	i = 7;

+	do {

+		c = (seq % 16) + '0';

+		if (c > '9') c += 7;

+		ns[i--] = c;

+		seq /= 16;

+	} while (seq);

+	ns[i] = '~';

+

+	/* Append the number */

+	for (j = 0; j < i && dst[j] != ' '; j++) {

+		if (IsDBCS1(dst[j])) {

+			if (j == i - 1) break;

+			j++;

+		}

+	}

+	do {

+		dst[j++] = (i < 8) ? ns[i++] : ' ';

+	} while (j < 8);

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Calculate sum of an SFN                                               */

+/*-----------------------------------------------------------------------*/

+#if _USE_LFN

+static

+BYTE sum_sfn (

+	const BYTE* dir		/* Pointer to the SFN entry */

+)

+{

+	BYTE sum = 0;

+	UINT n = 11;

+

+	do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n);

+	return sum;

+}

+#endif

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Directory handling - Find an object in the directory                  */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT dir_find (

+	DIR* dp			/* Pointer to the directory object linked to the file name */

+)

+{

+	FRESULT res;

+	BYTE c, *dir;

+#if _USE_LFN

+	BYTE a, ord, sum;

+#endif

+

+	res = dir_sdi(dp, 0);			/* Rewind directory object */

+	if (res != FR_OK) return res;

+

+#if _USE_LFN

+	ord = sum = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */

+#endif

+	do {

+		res = move_window(dp->fs, dp->sect);

+		if (res != FR_OK) break;

+		dir = dp->dir;					/* Ptr to the directory entry of current index */

+		c = dir[DIR_Name];

+		if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */

+#if _USE_LFN	/* LFN configuration */

+		a = dir[DIR_Attr] & AM_MASK;

+		if (c == DDE || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */

+			ord = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */

+		} else {

+			if (a == AM_LFN) {			/* An LFN entry is found */

+				if (dp->lfn) {

+					if (c & LLE) {		/* Is it start of LFN sequence? */

+						sum = dir[LDIR_Chksum];

+						c &= ~LLE; ord = c;	/* LFN start order */

+						dp->lfn_idx = dp->index;	/* Start index of LFN */

+					}

+					/* Check validity of the LFN entry and compare it with given name */

+					ord = (c == ord && sum == dir[LDIR_Chksum] && cmp_lfn(dp->lfn, dir)) ? ord - 1 : 0xFF;

+				}

+			} else {					/* An SFN entry is found */

+				if (!ord && sum == sum_sfn(dir)) break;	/* LFN matched? */

+				if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dir, dp->fn, 11)) break;	/* SFN matched? */

+				ord = 0xFF; dp->lfn_idx = 0xFFFF;	/* Reset LFN sequence */

+			}

+		}

+#else		/* Non LFN configuration */

+		if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dp->fn, 11)) /* Is it a valid entry? */

+			break;

+#endif

+		res = dir_next(dp, 0);		/* Next entry */

+	} while (res == FR_OK);

+

+	return res;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Read an object from the directory                                     */

+/*-----------------------------------------------------------------------*/

+#if _FS_MINIMIZE <= 1 || _USE_LABEL || _FS_RPATH >= 2

+static

+FRESULT dir_read (

+	DIR* dp,		/* Pointer to the directory object */

+	int vol			/* Filtered by 0:file/directory or 1:volume label */

+)

+{

+	FRESULT res;

+	BYTE a, c, *dir;

+#if _USE_LFN

+	BYTE ord = 0xFF, sum = 0xFF;

+#endif

+

+	res = FR_NO_FILE;

+	while (dp->sect) {

+		res = move_window(dp->fs, dp->sect);

+		if (res != FR_OK) break;

+		dir = dp->dir;					/* Ptr to the directory entry of current index */

+		c = dir[DIR_Name];

+		if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */

+		a = dir[DIR_Attr] & AM_MASK;

+#if _USE_LFN	/* LFN configuration */

+		if (c == DDE || (!_FS_RPATH && c == '.') || (int)((a & ~AM_ARC) == AM_VOL) != vol) {	/* An entry without valid data */

+			ord = 0xFF;

+		} else {

+			if (a == AM_LFN) {			/* An LFN entry is found */

+				if (c & LLE) {			/* Is it start of LFN sequence? */

+					sum = dir[LDIR_Chksum];

+					c &= ~LLE; ord = c;

+					dp->lfn_idx = dp->index;

+				}

+				/* Check LFN validity and capture it */

+				ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dp->lfn, dir)) ? ord - 1 : 0xFF;

+			} else {					/* An SFN entry is found */

+				if (ord || sum != sum_sfn(dir))	/* Is there a valid LFN? */

+					dp->lfn_idx = 0xFFFF;		/* It has no LFN. */

+				break;

+			}

+		}

+#else		/* Non LFN configuration */

+		if (c != DDE && (_FS_RPATH || c != '.') && a != AM_LFN && (int)((a & ~AM_ARC) == AM_VOL) == vol)	/* Is it a valid entry? */

+			break;

+#endif

+		res = dir_next(dp, 0);				/* Next entry */

+		if (res != FR_OK) break;

+	}

+

+	if (res != FR_OK) dp->sect = 0;

+

+	return res;

+}

+#endif	/* _FS_MINIMIZE <= 1 || _USE_LABEL || _FS_RPATH >= 2 */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Register an object to the directory                                   */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY

+static

+FRESULT dir_register (	/* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */

+	DIR* dp				/* Target directory with object name to be created */

+)

+{

+	FRESULT res;

+#if _USE_LFN	/* LFN configuration */

+	UINT n, nent;

+	BYTE sn[12], *fn, sum;

+	WCHAR *lfn;

+

+

+	fn = dp->fn; lfn = dp->lfn;

+	mem_cpy(sn, fn, 12);

+

+	if (_FS_RPATH && (sn[NSFLAG] & NS_DOT))		/* Cannot create dot entry */

+		return FR_INVALID_NAME;

+

+	if (sn[NSFLAG] & NS_LOSS) {			/* When LFN is out of 8.3 format, generate a numbered name */

+		fn[NSFLAG] = 0; dp->lfn = 0;			/* Find only SFN */

+		for (n = 1; n < 100; n++) {

+			gen_numname(fn, sn, lfn, n);	/* Generate a numbered name */

+			res = dir_find(dp);				/* Check if the name collides with existing SFN */

+			if (res != FR_OK) break;

+		}

+		if (n == 100) return FR_DENIED;		/* Abort if too many collisions */

+		if (res != FR_NO_FILE) return res;	/* Abort if the result is other than 'not collided' */

+		fn[NSFLAG] = sn[NSFLAG]; dp->lfn = lfn;

+	}

+

+	if (sn[NSFLAG] & NS_LFN) {			/* When LFN is to be created, allocate entries for an SFN + LFNs. */

+		for (n = 0; lfn[n]; n++) ;

+		nent = (n + 25) / 13;

+	} else {						/* Otherwise allocate an entry for an SFN  */

+		nent = 1;

+	}

+	res = dir_alloc(dp, nent);		/* Allocate entries */

+

+	if (res == FR_OK && --nent) {	/* Set LFN entry if needed */

+		res = dir_sdi(dp, dp->index - nent);

+		if (res == FR_OK) {

+			sum = sum_sfn(dp->fn);	/* Sum value of the SFN tied to the LFN */

+			do {					/* Store LFN entries in bottom first */

+				res = move_window(dp->fs, dp->sect);

+				if (res != FR_OK) break;

+				fit_lfn(dp->lfn, dp->dir, (BYTE)nent, sum);

+				dp->fs->wflag = 1;

+				res = dir_next(dp, 0);	/* Next entry */

+			} while (res == FR_OK && --nent);

+		}

+	}

+#else	/* Non LFN configuration */

+	res = dir_alloc(dp, 1);		/* Allocate an entry for SFN */

+#endif

+

+	if (res == FR_OK) {				/* Set SFN entry */

+		res = move_window(dp->fs, dp->sect);

+		if (res == FR_OK) {

+			mem_set(dp->dir, 0, SZ_DIR);	/* Clean the entry */

+			mem_cpy(dp->dir, dp->fn, 11);	/* Put SFN */

+#if _USE_LFN

+			dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT);	/* Put NT flag */

+#endif

+			dp->fs->wflag = 1;

+		}

+	}

+

+	return res;

+}

+#endif /* !_FS_READONLY */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Remove an object from the directory                                   */

+/*-----------------------------------------------------------------------*/

+#if !_FS_READONLY && !_FS_MINIMIZE

+static

+FRESULT dir_remove (	/* FR_OK: Successful, FR_DISK_ERR: A disk error */

+	DIR* dp				/* Directory object pointing the entry to be removed */

+)

+{

+	FRESULT res;

+#if _USE_LFN	/* LFN configuration */

+	UINT i;

+

+	i = dp->index;	/* SFN index */

+	res = dir_sdi(dp, (dp->lfn_idx == 0xFFFF) ? i : dp->lfn_idx);	/* Goto the SFN or top of the LFN entries */

+	if (res == FR_OK) {

+		do {

+			res = move_window(dp->fs, dp->sect);

+			if (res != FR_OK) break;

+			mem_set(dp->dir, 0, SZ_DIR);	/* Clear and mark the entry "deleted" */

+			*dp->dir = DDE;

+			dp->fs->wflag = 1;

+			if (dp->index >= i) break;	/* When reached SFN, all entries of the object has been deleted. */

+			res = dir_next(dp, 0);		/* Next entry */

+		} while (res == FR_OK);

+		if (res == FR_NO_FILE) res = FR_INT_ERR;

+	}

+

+#else			/* Non LFN configuration */

+	res = dir_sdi(dp, dp->index);

+	if (res == FR_OK) {

+		res = move_window(dp->fs, dp->sect);

+		if (res == FR_OK) {

+			mem_set(dp->dir, 0, SZ_DIR);	/* Clear and mark the entry "deleted" */

+			*dp->dir = DDE;

+			dp->fs->wflag = 1;

+		}

+	}

+#endif

+

+	return res;

+}

+#endif /* !_FS_READONLY */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Get file information from directory entry                             */

+/*-----------------------------------------------------------------------*/

+#if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2

+static

+void get_fileinfo (		/* No return code */

+	DIR* dp,			/* Pointer to the directory object */

+	FILINFO* fno	 	/* Pointer to the file information to be filled */

+)

+{

+	UINT i;

+	TCHAR *p, c;

+

+

+	p = fno->fname;

+	if (dp->sect) {		/* Get SFN */

+		BYTE *dir = dp->dir;

+

+		i = 0;

+		while (i < 11) {		/* Copy name body and extension */

+			c = (TCHAR)dir[i++];

+			if (c == ' ') continue;			/* Skip padding spaces */

+			if (c == NDDE) c = (TCHAR)DDE;	/* Restore replaced DDE character */

+			if (i == 9) *p++ = '.';			/* Insert a . if extension is exist */

+#if _USE_LFN

+			if (IsUpper(c) && (dir[DIR_NTres] & (i >= 9 ? NS_EXT : NS_BODY)))

+				c += 0x20;			/* To lower */

+#if _LFN_UNICODE

+			if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dir[i]))

+				c = c << 8 | dir[i++];

+			c = ff_convert(c, 1);	/* OEM -> Unicode */

+			if (!c) c = '?';

+#endif

+#endif

+			*p++ = c;

+		}

+		fno->fattrib = dir[DIR_Attr];				/* Attribute */

+		fno->fsize = LD_DWORD(dir+DIR_FileSize);	/* Size */

+		fno->fdate = LD_WORD(dir+DIR_WrtDate);		/* Date */

+		fno->ftime = LD_WORD(dir+DIR_WrtTime);		/* Time */

+	}

+	*p = 0;		/* Terminate SFN string by a \0 */

+

+#if _USE_LFN

+	if (fno->lfname) {

+		WCHAR w, *lfn;

+

+		i = 0; p = fno->lfname;

+		if (dp->sect && fno->lfsize && dp->lfn_idx != 0xFFFF) {	/* Get LFN if available */

+			lfn = dp->lfn;

+			while ((w = *lfn++) != 0) {		/* Get an LFN character */

+#if !_LFN_UNICODE

+				w = ff_convert(w, 0);		/* Unicode -> OEM */

+				if (!w) { i = 0; break; }	/* No LFN if it could not be converted */

+				if (_DF1S && w >= 0x100)	/* Put 1st byte if it is a DBC (always false on SBCS cfg) */

+					p[i++] = (TCHAR)(w >> 8);

+#endif

+				if (i >= fno->lfsize - 1) { i = 0; break; }	/* No LFN if buffer overflow */

+				p[i++] = (TCHAR)w;

+			}

+		}

+		p[i] = 0;	/* Terminate LFN string by a \0 */

+	}

+#endif

+}

+#endif /* _FS_MINIMIZE <= 1 || _FS_RPATH >= 2*/

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Pick a segment and create the object name in directory form           */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT create_name (

+	DIR* dp,			/* Pointer to the directory object */

+	const TCHAR** path	/* Pointer to pointer to the segment in the path string */

+)

+{

+#if _USE_LFN	/* LFN configuration */

+	BYTE b, cf;

+	WCHAR w, *lfn;

+	UINT i, ni, si, di;

+	const TCHAR *p;

+

+	/* Create LFN in Unicode */

+	for (p = *path; *p == '/' || *p == '\\'; p++) ;	/* Strip duplicated separator */

+	lfn = dp->lfn;

+	si = di = 0;

+	for (;;) {

+		w = p[si++];					/* Get a character */

+		if (w < ' ' || w == '/' || w == '\\') break;	/* Break on end of segment */

+		if (di >= _MAX_LFN)				/* Reject too long name */

+			return FR_INVALID_NAME;

+#if !_LFN_UNICODE

+		w &= 0xFF;

+		if (IsDBCS1(w)) {				/* Check if it is a DBC 1st byte (always false on SBCS cfg) */

+			b = (BYTE)p[si++];			/* Get 2nd byte */

+			if (!IsDBCS2(b))

+				return FR_INVALID_NAME;	/* Reject invalid sequence */

+			w = (w << 8) + b;			/* Create a DBC */

+		}

+		w = ff_convert(w, 1);			/* Convert ANSI/OEM to Unicode */

+		if (!w) return FR_INVALID_NAME;	/* Reject invalid code */

+#endif

+		if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) /* Reject illegal characters for LFN */

+			return FR_INVALID_NAME;

+		lfn[di++] = w;					/* Store the Unicode character */

+	}

+	*path = &p[si];						/* Return pointer to the next segment */

+	cf = (w < ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */

+#if _FS_RPATH

+	if ((di == 1 && lfn[di-1] == '.') || /* Is this a dot entry? */

+		(di == 2 && lfn[di-1] == '.' && lfn[di-2] == '.')) {

+		lfn[di] = 0;

+		for (i = 0; i < 11; i++)

+			dp->fn[i] = (i < di) ? '.' : ' ';

+		dp->fn[i] = cf | NS_DOT;		/* This is a dot entry */

+		return FR_OK;

+	}

+#endif

+	while (di) {						/* Strip trailing spaces and dots */

+		w = lfn[di-1];

+		if (w != ' ' && w != '.') break;

+		di--;

+	}

+	if (!di) return FR_INVALID_NAME;	/* Reject nul string */

+

+	lfn[di] = 0;						/* LFN is created */

+

+	/* Create SFN in directory form */

+	mem_set(dp->fn, ' ', 11);

+	for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;	/* Strip leading spaces and dots */

+	if (si) cf |= NS_LOSS | NS_LFN;

+	while (di && lfn[di - 1] != '.') di--;	/* Find extension (di<=si: no extension) */

+

+	b = i = 0; ni = 8;

+	for (;;) {

+		w = lfn[si++];					/* Get an LFN character */

+		if (!w) break;					/* Break on end of the LFN */

+		if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */

+			cf |= NS_LOSS | NS_LFN; continue;

+		}

+

+		if (i >= ni || si == di) {		/* Extension or end of SFN */

+			if (ni == 11) {				/* Long extension */

+				cf |= NS_LOSS | NS_LFN; break;

+			}

+			if (si != di) cf |= NS_LOSS | NS_LFN;	/* Out of 8.3 format */

+			if (si > di) break;			/* No extension */

+			si = di; i = 8; ni = 11;	/* Enter extension section */

+			b <<= 2; continue;

+		}

+

+		if (w >= 0x80) {				/* Non ASCII character */

+#ifdef _EXCVT

+			w = ff_convert(w, 0);		/* Unicode -> OEM code */

+			if (w) w = ExCvt[w - 0x80];	/* Convert extended character to upper (SBCS) */

+#else

+			w = ff_convert(ff_wtoupper(w), 0);	/* Upper converted Unicode -> OEM code */

+#endif

+			cf |= NS_LFN;				/* Force create LFN entry */

+		}

+

+		if (_DF1S && w >= 0x100) {		/* Double byte character (always false on SBCS cfg) */

+			if (i >= ni - 1) {

+				cf |= NS_LOSS | NS_LFN; i = ni; continue;

+			}

+			dp->fn[i++] = (BYTE)(w >> 8);

+		} else {						/* Single byte character */

+			if (!w || chk_chr("+,;=[]", w)) {	/* Replace illegal characters for SFN */

+				w = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */

+			} else {

+				if (IsUpper(w)) {		/* ASCII large capital */

+					b |= 2;

+				} else {

+					if (IsLower(w)) {	/* ASCII small capital */

+						b |= 1; w -= 0x20;

+					}

+				}

+			}

+		}

+		dp->fn[i++] = (BYTE)w;

+	}

+

+	if (dp->fn[0] == DDE) dp->fn[0] = NDDE;	/* If the first character collides with deleted mark, replace it with 0x05 */

+

+	if (ni == 8) b <<= 2;

+	if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03)	/* Create LFN entry when there are composite capitals */

+		cf |= NS_LFN;

+	if (!(cf & NS_LFN)) {						/* When LFN is in 8.3 format without extended character, NT flags are created */

+		if ((b & 0x03) == 0x01) cf |= NS_EXT;	/* NT flag (Extension has only small capital) */

+		if ((b & 0x0C) == 0x04) cf |= NS_BODY;	/* NT flag (Filename has only small capital) */

+	}

+

+	dp->fn[NSFLAG] = cf;	/* SFN is created */

+

+	return FR_OK;

+

+

+#else	/* Non-LFN configuration */

+	BYTE b, c, d, *sfn;

+	UINT ni, si, i;

+	const char *p;

+

+	/* Create file name in directory form */

+	for (p = *path; *p == '/' || *p == '\\'; p++) ;	/* Strip duplicated separator */

+	sfn = dp->fn;

+	mem_set(sfn, ' ', 11);

+	si = i = b = 0; ni = 8;

+#if _FS_RPATH

+	if (p[si] == '.') { /* Is this a dot entry? */

+		for (;;) {

+			c = (BYTE)p[si++];

+			if (c != '.' || si >= 3) break;

+			sfn[i++] = c;

+		}

+		if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME;

+		*path = &p[si];									/* Return pointer to the next segment */

+		sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT;	/* Set last segment flag if end of path */

+		return FR_OK;

+	}

+#endif

+	for (;;) {

+		c = (BYTE)p[si++];

+		if (c <= ' ' || c == '/' || c == '\\') break;	/* Break on end of segment */

+		if (c == '.' || i >= ni) {

+			if (ni != 8 || c != '.') return FR_INVALID_NAME;

+			i = 8; ni = 11;

+			b <<= 2; continue;

+		}

+		if (c >= 0x80) {				/* Extended character? */

+			b |= 3;						/* Eliminate NT flag */

+#ifdef _EXCVT

+			c = ExCvt[c - 0x80];		/* To upper extended characters (SBCS cfg) */

+#else

+#if !_DF1S

+			return FR_INVALID_NAME;		/* Reject extended characters (ASCII cfg) */

+#endif

+#endif

+		}

+		if (IsDBCS1(c)) {				/* Check if it is a DBC 1st byte (always false on SBCS cfg) */

+			d = (BYTE)p[si++];			/* Get 2nd byte */

+			if (!IsDBCS2(d) || i >= ni - 1)	/* Reject invalid DBC */

+				return FR_INVALID_NAME;

+			sfn[i++] = c;

+			sfn[i++] = d;

+		} else {						/* Single byte code */

+			if (chk_chr("\"*+,:;<=>\?[]|\x7F", c))	/* Reject illegal chrs for SFN */

+				return FR_INVALID_NAME;

+			if (IsUpper(c)) {			/* ASCII large capital? */

+				b |= 2;

+			} else {

+				if (IsLower(c)) {		/* ASCII small capital? */

+					b |= 1; c -= 0x20;

+				}

+			}

+			sfn[i++] = c;

+		}

+	}

+	*path = &p[si];						/* Return pointer to the next segment */

+	c = (c <= ' ') ? NS_LAST : 0;		/* Set last segment flag if end of path */

+

+	if (!i) return FR_INVALID_NAME;		/* Reject nul string */

+	if (sfn[0] == DDE) sfn[0] = NDDE;	/* When first character collides with DDE, replace it with 0x05 */

+

+	if (ni == 8) b <<= 2;

+	if ((b & 0x03) == 0x01) c |= NS_EXT;	/* NT flag (Name extension has only small capital) */

+	if ((b & 0x0C) == 0x04) c |= NS_BODY;	/* NT flag (Name body has only small capital) */

+

+	sfn[NSFLAG] = c;		/* Store NT flag, File name is created */

+

+	return FR_OK;

+#endif

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Follow a file path                                                    */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT follow_path (	/* FR_OK(0): successful, !=0: error code */

+	DIR* dp,			/* Directory object to return last directory and found object */

+	const TCHAR* path	/* Full-path string to find a file or directory */

+)

+{

+	FRESULT res;

+	BYTE *dir, ns;

+

+

+#if _FS_RPATH

+	if (*path == '/' || *path == '\\') {	/* There is a heading separator */

+		path++;	dp->sclust = 0;				/* Strip it and start from the root directory */

+	} else {								/* No heading separator */

+		dp->sclust = dp->fs->cdir;			/* Start from the current directory */

+	}

+#else

+	if (*path == '/' || *path == '\\')		/* Strip heading separator if exist */

+		path++;

+	dp->sclust = 0;							/* Always start from the root directory */

+#endif

+

+	if ((UINT)*path < ' ') {				/* Null path name is the origin directory itself */

+		res = dir_sdi(dp, 0);

+		dp->dir = 0;

+	} else {								/* Follow path */

+		for (;;) {

+			res = create_name(dp, &path);	/* Get a segment name of the path */

+			if (res != FR_OK) break;

+			res = dir_find(dp);				/* Find an object with the sagment name */

+			ns = dp->fn[NSFLAG];

+			if (res != FR_OK) {				/* Failed to find the object */

+				if (res == FR_NO_FILE) {	/* Object is not found */

+					if (_FS_RPATH && (ns & NS_DOT)) {	/* If dot entry is not exist, */

+						dp->sclust = 0; dp->dir = 0;	/* it is the root directory and stay there */

+						if (!(ns & NS_LAST)) continue;	/* Continue to follow if not last segment */

+						res = FR_OK;					/* Ended at the root directroy. Function completed. */

+					} else {							/* Could not find the object */

+						if (!(ns & NS_LAST)) res = FR_NO_PATH;	/* Adjust error code if not last segment */

+					}

+				}

+				break;

+			}

+			if (ns & NS_LAST) break;			/* Last segment matched. Function completed. */

+			dir = dp->dir;						/* Follow the sub-directory */

+			if (!(dir[DIR_Attr] & AM_DIR)) {	/* It is not a sub-directory and cannot follow */

+				res = FR_NO_PATH; break;

+			}

+			dp->sclust = ld_clust(dp->fs, dir);

+		}

+	}

+

+	return res;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Get logical drive number from path name                               */

+/*-----------------------------------------------------------------------*/

+

+static

+int get_ldnumber (		/* Returns logical drive number (-1:invalid drive) */

+	const TCHAR** path	/* Pointer to pointer to the path name */

+)

+{

+	const TCHAR *tp, *tt;

+	UINT i;

+	int vol = -1;

+

+

+	if (*path) {	/* If the pointer is not a null */

+		for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ;	/* Find ':' in the path */

+		if (*tt == ':') {	/* If a ':' is exist in the path name */

+			tp = *path;

+			i = *tp++ - '0'; 

+			if (i < 10 && tp == tt) {	/* Is there a numeric drive id? */

+				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */

+					vol = (int)i;

+					*path = ++tt;

+				}

+			} else {	/* No numeric drive number */

+#if _STR_VOLUME_ID		/* Find string drive id */

+				static const char* const str[] = {_VOLUME_STRS};

+				const char *sp;

+				char c;

+				TCHAR tc;

+

+				i = 0; tt++;

+				do {

+					sp = str[i]; tp = *path;

+					do {	/* Compare a string drive id with path name */

+						c = *sp++; tc = *tp++;

+						if (IsLower(tc)) tc -= 0x20;

+					} while (c && (TCHAR)c == tc);

+				} while ((c || tp != tt) && ++i < _VOLUMES);	/* Repeat for each id until pattern match */

+				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */

+					vol = (int)i;

+					*path = tt;

+				}

+#endif

+			}

+			return vol;

+		}

+#if _FS_RPATH && _VOLUMES >= 2

+		vol = CurrVol;	/* Current drive */

+#else

+		vol = 0;		/* Drive 0 */

+#endif

+	}

+	return vol;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Load a sector and check if it is an FAT boot sector                   */

+/*-----------------------------------------------------------------------*/

+

+static

+BYTE check_fs (	/* 0:FAT boor sector, 1:Valid boor sector but not FAT, 2:Not a boot sector, 3:Disk error */

+	FATFS* fs,	/* File system object */

+	DWORD sect	/* Sector# (lba) to check if it is an FAT boot record or not */

+)

+{

+	fs->wflag = 0; fs->winsect = 0xFFFFFFFF;	/* Invaidate window */

+	if (move_window(fs, sect) != FR_OK)			/* Load boot record */

+		return 3;

+

+	if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55)	/* Check boot record signature (always placed at offset 510 even if the sector size is >512) */

+		return 2;

+

+	if ((LD_DWORD(&fs->win[BS_FilSysType]) & 0xFFFFFF) == 0x544146)		/* Check "FAT" string */

+		return 0;

+	if ((LD_DWORD(&fs->win[BS_FilSysType32]) & 0xFFFFFF) == 0x544146)	/* Check "FAT" string */

+		return 0;

+

+	return 1;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Find logical drive and check if the volume is mounted                 */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT find_volume (	/* FR_OK(0): successful, !=0: any error occurred */

+	FATFS** rfs,		/* Pointer to pointer to the found file system object */

+	const TCHAR** path,	/* Pointer to pointer to the path name (drive number) */

+	BYTE wmode			/* !=0: Check write protection for write access */

+)

+{

+	BYTE fmt;

+	int vol;

+	DSTATUS stat;

+	DWORD bsect, fasize, tsect, sysect, nclst, szbfat;

+	WORD nrsv;

+	FATFS *fs;

+

+

+	/* Get logical drive number from the path name */

+	*rfs = 0;

+	vol = get_ldnumber(path);

+	if (vol < 0) return FR_INVALID_DRIVE;

+

+	/* Check if the file system object is valid or not */

+	fs = FatFs[vol];					/* Get pointer to the file system object */

+	if (!fs) return FR_NOT_ENABLED;		/* Is the file system object available? */

+

+	ENTER_FF(fs);						/* Lock the volume */

+	*rfs = fs;							/* Return pointer to the file system object */

+

+	if (fs->fs_type) {					/* If the volume has been mounted */

+		stat = disk_status(fs->drv);

+		if (!(stat & STA_NOINIT)) {		/* and the physical drive is kept initialized */

+			if (!_FS_READONLY && wmode && (stat & STA_PROTECT))	/* Check write protection if needed */

+				return FR_WRITE_PROTECTED;

+			return FR_OK;				/* The file system object is valid */

+		}

+	}

+

+	/* The file system object is not valid. */

+	/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */

+

+	fs->fs_type = 0;					/* Clear the file system object */

+	fs->drv = LD2PD(vol);				/* Bind the logical drive and a physical drive */

+	stat = disk_initialize(fs->drv);	/* Initialize the physical drive */

+	if (stat & STA_NOINIT)				/* Check if the initialization succeeded */

+		return FR_NOT_READY;			/* Failed to initialize due to no medium or hard error */

+	if (!_FS_READONLY && wmode && (stat & STA_PROTECT))	/* Check disk write protection if needed */

+		return FR_WRITE_PROTECTED;

+#if _MAX_SS != _MIN_SS						/* Get sector size (multiple sector size cfg only) */

+	if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK

+		|| SS(fs) < _MIN_SS || SS(fs) > _MAX_SS) return FR_DISK_ERR;

+#endif

+	/* Find an FAT partition on the drive. Supports only generic partitioning, FDISK and SFD. */

+	bsect = 0;

+	fmt = check_fs(fs, bsect);					/* Load sector 0 and check if it is an FAT boot sector as SFD */

+	if (fmt == 1 || (!fmt && (LD2PT(vol)))) {	/* Not an FAT boot sector or forced partition number */

+		UINT i;

+		DWORD br[4];

+

+		for (i = 0; i < 4; i++) {			/* Get partition offset */

+			BYTE *pt = fs->win+MBR_Table + i * SZ_PTE;

+			br[i] = pt[4] ? LD_DWORD(&pt[8]) : 0;

+		}

+		i = LD2PT(vol);						/* Partition number: 0:auto, 1-4:forced */

+		if (i) i--;

+		do {								/* Find an FAT volume */

+			bsect = br[i];

+			fmt = bsect ? check_fs(fs, bsect) : 2;	/* Check the partition */

+		} while (!LD2PT(vol) && fmt && ++i < 4);

+	}

+	if (fmt == 3) return FR_DISK_ERR;		/* An error occured in the disk I/O layer */

+	if (fmt) return FR_NO_FILESYSTEM;		/* No FAT volume is found */

+

+	/* An FAT volume is found. Following code initializes the file system object */

+

+	if (LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs))		/* (BPB_BytsPerSec must be equal to the physical sector size) */

+		return FR_NO_FILESYSTEM;

+

+	fasize = LD_WORD(fs->win+BPB_FATSz16);				/* Number of sectors per FAT */

+	if (!fasize) fasize = LD_DWORD(fs->win+BPB_FATSz32);

+	fs->fsize = fasize;

+

+	fs->n_fats = fs->win[BPB_NumFATs];					/* Number of FAT copies */

+	if (fs->n_fats != 1 && fs->n_fats != 2)				/* (Must be 1 or 2) */

+		return FR_NO_FILESYSTEM;

+	fasize *= fs->n_fats;								/* Number of sectors for FAT area */

+

+	fs->csize = fs->win[BPB_SecPerClus];				/* Number of sectors per cluster */

+	if (!fs->csize || (fs->csize & (fs->csize - 1)))	/* (Must be power of 2) */

+		return FR_NO_FILESYSTEM;

+

+	fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt);	/* Number of root directory entries */

+	if (fs->n_rootdir % (SS(fs) / SZ_DIR))				/* (Must be sector aligned) */

+		return FR_NO_FILESYSTEM;

+

+	tsect = LD_WORD(fs->win+BPB_TotSec16);				/* Number of sectors on the volume */

+	if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32);

+

+	nrsv = LD_WORD(fs->win+BPB_RsvdSecCnt);				/* Number of reserved sectors */

+	if (!nrsv) return FR_NO_FILESYSTEM;					/* (Must not be 0) */

+

+	/* Determine the FAT sub type */

+	sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZ_DIR);	/* RSV+FAT+DIR */

+	if (tsect < sysect) return FR_NO_FILESYSTEM;		/* (Invalid volume size) */

+	nclst = (tsect - sysect) / fs->csize;				/* Number of clusters */

+	if (!nclst) return FR_NO_FILESYSTEM;				/* (Invalid volume size) */

+	fmt = FS_FAT12;

+	if (nclst >= MIN_FAT16) fmt = FS_FAT16;

+	if (nclst >= MIN_FAT32) fmt = FS_FAT32;

+

+	/* Boundaries and Limits */

+	fs->n_fatent = nclst + 2;							/* Number of FAT entries */

+	fs->volbase = bsect;								/* Volume start sector */

+	fs->fatbase = bsect + nrsv; 						/* FAT start sector */

+	fs->database = bsect + sysect;						/* Data start sector */

+	if (fmt == FS_FAT32) {

+		if (fs->n_rootdir) return FR_NO_FILESYSTEM;		/* (BPB_RootEntCnt must be 0) */

+		fs->dirbase = LD_DWORD(fs->win+BPB_RootClus);	/* Root directory start cluster */

+		szbfat = fs->n_fatent * 4;						/* (Needed FAT size) */

+	} else {

+		if (!fs->n_rootdir)	return FR_NO_FILESYSTEM;	/* (BPB_RootEntCnt must not be 0) */

+		fs->dirbase = fs->fatbase + fasize;				/* Root directory start sector */

+		szbfat = (fmt == FS_FAT16) ?					/* (Needed FAT size) */

+			fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);

+	}

+	if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs))	/* (BPB_FATSz must not be less than the size needed) */

+		return FR_NO_FILESYSTEM;

+

+#if !_FS_READONLY

+	/* Initialize cluster allocation information */

+	fs->last_clust = fs->free_clust = 0xFFFFFFFF;

+

+	/* Get fsinfo if available */

+	fs->fsi_flag = 0x80;

+#if (_FS_NOFSINFO & 3) != 3

+	if (fmt == FS_FAT32				/* Enable FSINFO only if FAT32 and BPB_FSInfo is 1 */

+		&& LD_WORD(fs->win+BPB_FSInfo) == 1

+		&& move_window(fs, bsect + 1) == FR_OK)

+	{

+		fs->fsi_flag = 0;

+		if (LD_WORD(fs->win+BS_55AA) == 0xAA55	/* Load FSINFO data if available */

+			&& LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252

+			&& LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272)

+		{

+#if (_FS_NOFSINFO & 1) == 0

+			fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count);

+#endif

+#if (_FS_NOFSINFO & 2) == 0

+			fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free);

+#endif

+		}

+	}

+#endif

+#endif

+	fs->fs_type = fmt;	/* FAT sub-type */

+	fs->id = ++Fsid;	/* File system mount ID */

+#if _FS_RPATH

+	fs->cdir = 0;		/* Set current directory to root */

+#endif

+#if _FS_LOCK			/* Clear file lock semaphores */

+	clear_lock(fs);

+#endif

+

+	return FR_OK;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Check if the file/directory object is valid or not                    */

+/*-----------------------------------------------------------------------*/

+

+static

+FRESULT validate (	/* FR_OK(0): The object is valid, !=0: Invalid */

+	void* obj		/* Pointer to the object FIL/DIR to check validity */

+)

+{

+	FIL *fil = (FIL*)obj;	/* Assuming offset of .fs and .id in the FIL/DIR structure is identical */

+

+

+	if (!fil || !fil->fs || !fil->fs->fs_type || fil->fs->id != fil->id)

+		return FR_INVALID_OBJECT;

+

+	ENTER_FF(fil->fs);		/* Lock file system */

+

+	if (disk_status(fil->fs->drv) & STA_NOINIT)

+		return FR_NOT_READY;

+

+	return FR_OK;

+}

+

+

+

+

+/*--------------------------------------------------------------------------

+

+   Public Functions

+

+--------------------------------------------------------------------------*/

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Mount/Unmount a Logical Drive                                         */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_mount (

+	FATFS* fs,			/* Pointer to the file system object (NULL:unmount)*/

+	const TCHAR* path,	/* Logical drive number to be mounted/unmounted */

+	BYTE opt			/* 0:Do not mount (delayed mount), 1:Mount immediately */

+)

+{

+	FATFS *cfs;

+	int vol;

+	FRESULT res;

+	const TCHAR *rp = path;

+

+

+	vol = get_ldnumber(&rp);

+	if (vol < 0) return FR_INVALID_DRIVE;

+	cfs = FatFs[vol];					/* Pointer to fs object */

+

+	if (cfs) {

+#if _FS_LOCK

+		clear_lock(cfs);

+#endif

+#if _FS_REENTRANT						/* Discard sync object of the current volume */

+		if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;

+#endif

+		cfs->fs_type = 0;				/* Clear old fs object */

+	}

+

+	if (fs) {

+		fs->fs_type = 0;				/* Clear new fs object */

+#if _FS_REENTRANT						/* Create sync object for the new volume */

+		if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;

+#endif

+	}

+	FatFs[vol] = fs;					/* Register new fs object */

+

+	if (!fs || opt != 1) return FR_OK;	/* Do not mount now, it will be mounted later */

+

+	res = find_volume(&fs, &path, 0);	/* Force mounted the volume */

+	LEAVE_FF(fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Open or Create a File                                                 */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_open (

+	FIL* fp,			/* Pointer to the blank file object */

+	const TCHAR* path,	/* Pointer to the file name */

+	BYTE mode			/* Access mode and file open mode flags */

+)

+{

+	FRESULT res;

+	DIR dj;

+	BYTE *dir;

+	DEF_NAMEBUF;

+

+

+	if (!fp) return FR_INVALID_OBJECT;

+	fp->fs = 0;			/* Clear file object */

+

+	/* Get logical drive number */

+#if !_FS_READONLY

+	mode &= FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW;

+	res = find_volume(&dj.fs, &path, (BYTE)(mode & ~FA_READ));

+#else

+	mode &= FA_READ;

+	res = find_volume(&dj.fs, &path, 0);

+#endif

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);	/* Follow the file path */

+		dir = dj.dir;

+#if !_FS_READONLY	/* R/W configuration */

+		if (res == FR_OK) {

+			if (!dir)	/* Default directory itself */

+				res = FR_INVALID_NAME;

+#if _FS_LOCK

+			else

+				res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);

+#endif

+		}

+		/* Create or Open a file */

+		if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {

+			DWORD dw, cl;

+

+			if (res != FR_OK) {					/* No file, create new */

+				if (res == FR_NO_FILE)			/* There is no file to open, create a new entry */

+#if _FS_LOCK

+					res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;

+#else

+					res = dir_register(&dj);

+#endif

+				mode |= FA_CREATE_ALWAYS;		/* File is created */

+				dir = dj.dir;					/* New entry */

+			}

+			else {								/* Any object is already existing */

+				if (dir[DIR_Attr] & (AM_RDO | AM_DIR)) {	/* Cannot overwrite it (R/O or DIR) */

+					res = FR_DENIED;

+				} else {

+					if (mode & FA_CREATE_NEW)	/* Cannot create as new file */

+						res = FR_EXIST;

+				}

+			}

+			if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) {	/* Truncate it if overwrite mode */

+				dw = GET_FATTIME();				/* Created time */

+				ST_DWORD(dir+DIR_CrtTime, dw);

+				dir[DIR_Attr] = 0;				/* Reset attribute */

+				ST_DWORD(dir+DIR_FileSize, 0);	/* size = 0 */

+				cl = ld_clust(dj.fs, dir);		/* Get start cluster */

+				st_clust(dir, 0);				/* cluster = 0 */

+				dj.fs->wflag = 1;

+				if (cl) {						/* Remove the cluster chain if exist */

+					dw = dj.fs->winsect;

+					res = remove_chain(dj.fs, cl);

+					if (res == FR_OK) {

+						dj.fs->last_clust = cl - 1;	/* Reuse the cluster hole */

+						res = move_window(dj.fs, dw);

+					}

+				}

+			}

+		}

+		else {	/* Open an existing file */

+			if (res == FR_OK) {					/* Follow succeeded */

+				if (dir[DIR_Attr] & AM_DIR) {	/* It is a directory */

+					res = FR_NO_FILE;

+				} else {

+					if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */

+						res = FR_DENIED;

+				}

+			}

+		}

+		if (res == FR_OK) {

+			if (mode & FA_CREATE_ALWAYS)		/* Set file change flag if created or overwritten */

+				mode |= FA__WRITTEN;

+			fp->dir_sect = dj.fs->winsect;		/* Pointer to the directory entry */

+			fp->dir_ptr = dir;

+#if _FS_LOCK

+			fp->lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);

+			if (!fp->lockid) res = FR_INT_ERR;

+#endif

+		}

+

+#else				/* R/O configuration */

+		if (res == FR_OK) {					/* Follow succeeded */

+			dir = dj.dir;

+			if (!dir) {						/* Current directory itself */

+				res = FR_INVALID_NAME;

+			} else {

+				if (dir[DIR_Attr] & AM_DIR)	/* It is a directory */

+					res = FR_NO_FILE;

+			}

+		}

+#endif

+		FREE_BUF();

+

+		if (res == FR_OK) {

+			fp->flag = mode;					/* File access mode */

+			fp->err = 0;						/* Clear error flag */

+			fp->sclust = ld_clust(dj.fs, dir);	/* File start cluster */

+			fp->fsize = LD_DWORD(dir+DIR_FileSize);	/* File size */

+			fp->fptr = 0;						/* File pointer */

+			fp->dsect = 0;

+#if _USE_FASTSEEK

+			fp->cltbl = 0;						/* Normal seek mode */

+#endif

+			fp->fs = dj.fs;	 					/* Validate file object */

+			fp->id = fp->fs->id;

+		}

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Read File                                                             */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_read (

+	FIL* fp, 		/* Pointer to the file object */

+	void* buff,		/* Pointer to data buffer */

+	UINT btr,		/* Number of bytes to read */

+	UINT* br		/* Pointer to number of bytes read */

+)

+{

+	FRESULT res;

+	DWORD clst, sect, remain;

+	UINT rcnt, cc;

+	BYTE csect, *rbuff = (BYTE*)buff;

+

+

+	*br = 0;	/* Clear read byte counter */

+

+	res = validate(fp);							/* Check validity */

+	if (res != FR_OK) LEAVE_FF(fp->fs, res);

+	if (fp->err)								/* Check error */

+		LEAVE_FF(fp->fs, (FRESULT)fp->err);

+	if (!(fp->flag & FA_READ)) 					/* Check access mode */

+		LEAVE_FF(fp->fs, FR_DENIED);

+	remain = fp->fsize - fp->fptr;

+	if (btr > remain) btr = (UINT)remain;		/* Truncate btr by remaining bytes */

+

+	for ( ;  btr;								/* Repeat until all data read */

+		rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {

+		if ((fp->fptr % SS(fp->fs)) == 0) {		/* On the sector boundary? */

+			csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1));	/* Sector offset in the cluster */

+			if (!csect) {						/* On the cluster boundary? */

+				if (fp->fptr == 0) {			/* On the top of the file? */

+					clst = fp->sclust;			/* Follow from the origin */

+				} else {						/* Middle or end of the file */

+#if _USE_FASTSEEK

+					if (fp->cltbl)

+						clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */

+					else

+#endif

+						clst = get_fat(fp->fs, fp->clust);	/* Follow cluster chain on the FAT */

+				}

+				if (clst < 2) ABORT(fp->fs, FR_INT_ERR);

+				if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+				fp->clust = clst;				/* Update current cluster */

+			}

+			sect = clust2sect(fp->fs, fp->clust);	/* Get current sector */

+			if (!sect) ABORT(fp->fs, FR_INT_ERR);

+			sect += csect;

+			cc = btr / SS(fp->fs);				/* When remaining bytes >= sector size, */

+			if (cc) {							/* Read maximum contiguous sectors directly */

+				if (csect + cc > fp->fs->csize)	/* Clip at cluster boundary */

+					cc = fp->fs->csize - csect;

+				if (disk_read(fp->fs->drv, rbuff, sect, cc) != RES_OK)

+					ABORT(fp->fs, FR_DISK_ERR);

+#if !_FS_READONLY && _FS_MINIMIZE <= 2			/* Replace one of the read sectors with cached data if it contains a dirty sector */

+#if _FS_TINY

+				if (fp->fs->wflag && fp->fs->winsect - sect < cc)

+					mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs));

+#else

+				if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc)

+					mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs));

+#endif

+#endif

+				rcnt = SS(fp->fs) * cc;			/* Number of bytes transferred */

+				continue;

+			}

+#if !_FS_TINY

+			if (fp->dsect != sect) {			/* Load data sector if not in cache */

+#if !_FS_READONLY

+				if (fp->flag & FA__DIRTY) {		/* Write-back dirty sector cache */

+					if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+						ABORT(fp->fs, FR_DISK_ERR);

+					fp->flag &= ~FA__DIRTY;

+				}

+#endif

+				if (disk_read(fp->fs->drv, fp->buf, sect, 1) != RES_OK)	/* Fill sector cache */

+					ABORT(fp->fs, FR_DISK_ERR);

+			}

+#endif

+			fp->dsect = sect;

+		}

+		rcnt = SS(fp->fs) - ((UINT)fp->fptr % SS(fp->fs));	/* Get partial sector data from sector buffer */

+		if (rcnt > btr) rcnt = btr;

+#if _FS_TINY

+		if (move_window(fp->fs, fp->dsect) != FR_OK)		/* Move sector window */

+			ABORT(fp->fs, FR_DISK_ERR);

+		mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */

+#else

+		mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt);	/* Pick partial sector */

+#endif

+	}

+

+	LEAVE_FF(fp->fs, FR_OK);

+}

+

+

+

+

+#if !_FS_READONLY

+/*-----------------------------------------------------------------------*/

+/* Write File                                                            */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_write (

+	FIL* fp,			/* Pointer to the file object */

+	const void *buff,	/* Pointer to the data to be written */

+	UINT btw,			/* Number of bytes to write */

+	UINT* bw			/* Pointer to number of bytes written */

+)

+{

+	FRESULT res;

+	DWORD clst, sect;

+	UINT wcnt, cc;

+	const BYTE *wbuff = (const BYTE*)buff;

+	BYTE csect;

+

+

+	*bw = 0;	/* Clear write byte counter */

+

+	res = validate(fp);						/* Check validity */

+	if (res != FR_OK) LEAVE_FF(fp->fs, res);

+	if (fp->err)							/* Check error */

+		LEAVE_FF(fp->fs, (FRESULT)fp->err);

+	if (!(fp->flag & FA_WRITE))				/* Check access mode */

+		LEAVE_FF(fp->fs, FR_DENIED);

+	if (fp->fptr + btw < fp->fptr) btw = 0;	/* File size cannot reach 4GB */

+

+	for ( ;  btw;							/* Repeat until all data written */

+		wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) {

+		if ((fp->fptr % SS(fp->fs)) == 0) {	/* On the sector boundary? */

+			csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1));	/* Sector offset in the cluster */

+			if (!csect) {					/* On the cluster boundary? */

+				if (fp->fptr == 0) {		/* On the top of the file? */

+					clst = fp->sclust;		/* Follow from the origin */

+					if (clst == 0)			/* When no cluster is allocated, */

+						clst = create_chain(fp->fs, 0);	/* Create a new cluster chain */

+				} else {					/* Middle or end of the file */

+#if _USE_FASTSEEK

+					if (fp->cltbl)

+						clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */

+					else

+#endif

+						clst = create_chain(fp->fs, fp->clust);	/* Follow or stretch cluster chain on the FAT */

+				}

+				if (clst == 0) break;		/* Could not allocate a new cluster (disk full) */

+				if (clst == 1) ABORT(fp->fs, FR_INT_ERR);

+				if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+				fp->clust = clst;			/* Update current cluster */

+				if (fp->sclust == 0) fp->sclust = clst;	/* Set start cluster if the first write */

+			}

+#if _FS_TINY

+			if (fp->fs->winsect == fp->dsect && sync_window(fp->fs))	/* Write-back sector cache */

+				ABORT(fp->fs, FR_DISK_ERR);

+#else

+			if (fp->flag & FA__DIRTY) {		/* Write-back sector cache */

+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+					ABORT(fp->fs, FR_DISK_ERR);

+				fp->flag &= ~FA__DIRTY;

+			}

+#endif

+			sect = clust2sect(fp->fs, fp->clust);	/* Get current sector */

+			if (!sect) ABORT(fp->fs, FR_INT_ERR);

+			sect += csect;

+			cc = btw / SS(fp->fs);			/* When remaining bytes >= sector size, */

+			if (cc) {						/* Write maximum contiguous sectors directly */

+				if (csect + cc > fp->fs->csize)	/* Clip at cluster boundary */

+					cc = fp->fs->csize - csect;

+				if (disk_write(fp->fs->drv, wbuff, sect, cc) != RES_OK)

+					ABORT(fp->fs, FR_DISK_ERR);

+#if _FS_MINIMIZE <= 2

+#if _FS_TINY

+				if (fp->fs->winsect - sect < cc) {	/* Refill sector cache if it gets invalidated by the direct write */

+					mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs));

+					fp->fs->wflag = 0;

+				}

+#else

+				if (fp->dsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */

+					mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs));

+					fp->flag &= ~FA__DIRTY;

+				}

+#endif

+#endif

+				wcnt = SS(fp->fs) * cc;		/* Number of bytes transferred */

+				continue;

+			}

+#if _FS_TINY

+			if (fp->fptr >= fp->fsize) {	/* Avoid silly cache filling at growing edge */

+				if (sync_window(fp->fs)) ABORT(fp->fs, FR_DISK_ERR);

+				fp->fs->winsect = sect;

+			}

+#else

+			if (fp->dsect != sect) {		/* Fill sector cache with file data */

+				if (fp->fptr < fp->fsize &&

+					disk_read(fp->fs->drv, fp->buf, sect, 1) != RES_OK)

+						ABORT(fp->fs, FR_DISK_ERR);

+			}

+#endif

+			fp->dsect = sect;

+		}

+		wcnt = SS(fp->fs) - ((UINT)fp->fptr % SS(fp->fs));/* Put partial sector into file I/O buffer */

+		if (wcnt > btw) wcnt = btw;

+#if _FS_TINY

+		if (move_window(fp->fs, fp->dsect) != FR_OK)	/* Move sector window */

+			ABORT(fp->fs, FR_DISK_ERR);

+		mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */

+		fp->fs->wflag = 1;

+#else

+		mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt);	/* Fit partial sector */

+		fp->flag |= FA__DIRTY;

+#endif

+	}

+

+	if (fp->fptr > fp->fsize) fp->fsize = fp->fptr;	/* Update file size if needed */

+	fp->flag |= FA__WRITTEN;						/* Set file change flag */

+

+	LEAVE_FF(fp->fs, FR_OK);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Synchronize the File                                                  */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_sync (

+	FIL* fp		/* Pointer to the file object */

+)

+{

+	FRESULT res;

+	DWORD tm;

+	BYTE *dir;

+

+

+	res = validate(fp);					/* Check validity of the object */

+	if (res == FR_OK) {

+		if (fp->flag & FA__WRITTEN) {	/* Has the file been written? */

+			/* Write-back dirty buffer */

+#if !_FS_TINY

+			if (fp->flag & FA__DIRTY) {

+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+					LEAVE_FF(fp->fs, FR_DISK_ERR);

+				fp->flag &= ~FA__DIRTY;

+			}

+#endif

+			/* Update the directory entry */

+			res = move_window(fp->fs, fp->dir_sect);

+			if (res == FR_OK) {

+				dir = fp->dir_ptr;

+				dir[DIR_Attr] |= AM_ARC;					/* Set archive bit */

+				ST_DWORD(dir+DIR_FileSize, fp->fsize);		/* Update file size */

+				st_clust(dir, fp->sclust);					/* Update start cluster */

+				tm = GET_FATTIME();							/* Update updated time */

+				ST_DWORD(dir+DIR_WrtTime, tm);

+				ST_WORD(dir+DIR_LstAccDate, 0);

+				fp->flag &= ~FA__WRITTEN;

+				fp->fs->wflag = 1;

+				res = sync_fs(fp->fs);

+			}

+		}

+	}

+

+	LEAVE_FF(fp->fs, res);

+}

+

+#endif /* !_FS_READONLY */

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Close File                                                            */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_close (

+	FIL *fp		/* Pointer to the file object to be closed */

+)

+{

+	FRESULT res;

+

+

+#if !_FS_READONLY

+	res = f_sync(fp);					/* Flush cached data */

+	if (res == FR_OK)

+#endif

+	{

+		res = validate(fp);				/* Lock volume */

+		if (res == FR_OK) {

+#if _FS_REENTRANT

+			FATFS *fs = fp->fs;

+#endif

+#if _FS_LOCK

+			res = dec_lock(fp->lockid);	/* Decrement file open counter */

+			if (res == FR_OK)

+#endif

+				fp->fs = 0;				/* Invalidate file object */

+#if _FS_REENTRANT

+			unlock_fs(fs, FR_OK);		/* Unlock volume */

+#endif

+		}

+	}

+	return res;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Change Current Directory or Current Drive, Get Current Directory      */

+/*-----------------------------------------------------------------------*/

+

+#if _FS_RPATH >= 1

+#if _VOLUMES >= 2

+FRESULT f_chdrive (

+	const TCHAR* path		/* Drive number */

+)

+{

+	int vol;

+

+

+	vol = get_ldnumber(&path);

+	if (vol < 0) return FR_INVALID_DRIVE;

+

+	CurrVol = (BYTE)vol;

+

+	return FR_OK;

+}

+#endif

+

+

+FRESULT f_chdir (

+	const TCHAR* path	/* Pointer to the directory path */

+)

+{

+	FRESULT res;

+	DIR dj;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 0);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);		/* Follow the path */

+		FREE_BUF();

+		if (res == FR_OK) {					/* Follow completed */

+			if (!dj.dir) {

+				dj.fs->cdir = dj.sclust;	/* Start directory itself */

+			} else {

+				if (dj.dir[DIR_Attr] & AM_DIR)	/* Reached to the directory */

+					dj.fs->cdir = ld_clust(dj.fs, dj.dir);

+				else

+					res = FR_NO_PATH;		/* Reached but a file */

+			}

+		}

+		if (res == FR_NO_FILE) res = FR_NO_PATH;

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+#if _FS_RPATH >= 2

+FRESULT f_getcwd (

+	TCHAR* buff,	/* Pointer to the directory path */

+	UINT len		/* Size of path */

+)

+{

+	FRESULT res;

+	DIR dj;

+	UINT i, n;

+	DWORD ccl;

+	TCHAR *tp;

+	FILINFO fno;

+	DEF_NAMEBUF;

+

+

+	*buff = 0;

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, (const TCHAR**)&buff, 0);	/* Get current volume */

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		i = len;			/* Bottom of buffer (directory stack base) */

+		dj.sclust = dj.fs->cdir;			/* Start to follow upper directory from current directory */

+		while ((ccl = dj.sclust) != 0) {	/* Repeat while current directory is a sub-directory */

+			res = dir_sdi(&dj, 1);			/* Get parent directory */

+			if (res != FR_OK) break;

+			res = dir_read(&dj, 0);

+			if (res != FR_OK) break;

+			dj.sclust = ld_clust(dj.fs, dj.dir);	/* Goto parent directory */

+			res = dir_sdi(&dj, 0);

+			if (res != FR_OK) break;

+			do {							/* Find the entry links to the child directory */

+				res = dir_read(&dj, 0);

+				if (res != FR_OK) break;

+				if (ccl == ld_clust(dj.fs, dj.dir)) break;	/* Found the entry */

+				res = dir_next(&dj, 0);	

+			} while (res == FR_OK);

+			if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */

+			if (res != FR_OK) break;

+#if _USE_LFN

+			fno.lfname = buff;

+			fno.lfsize = i;

+#endif

+			get_fileinfo(&dj, &fno);		/* Get the directory name and push it to the buffer */

+			tp = fno.fname;

+#if _USE_LFN

+			if (*buff) tp = buff;

+#endif

+			for (n = 0; tp[n]; n++) ;

+			if (i < n + 3) {

+				res = FR_NOT_ENOUGH_CORE; break;

+			}

+			while (n) buff[--i] = tp[--n];

+			buff[--i] = '/';

+		}

+		tp = buff;

+		if (res == FR_OK) {

+#if _VOLUMES >= 2

+			*tp++ = '0' + CurrVol;			/* Put drive number */

+			*tp++ = ':';

+#endif

+			if (i == len) {					/* Root-directory */

+				*tp++ = '/';

+			} else {						/* Sub-directroy */

+				do		/* Add stacked path str */

+					*tp++ = buff[i++];

+				while (i < len);

+			}

+		}

+		*tp = 0;

+		FREE_BUF();

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+#endif /* _FS_RPATH >= 2 */

+#endif /* _FS_RPATH >= 1 */

+

+

+

+#if _FS_MINIMIZE <= 2

+/*-----------------------------------------------------------------------*/

+/* Seek File R/W Pointer                                                 */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_lseek (

+	FIL* fp,		/* Pointer to the file object */

+	DWORD ofs		/* File pointer from top of file */

+)

+{

+	FRESULT res;

+

+

+	res = validate(fp);					/* Check validity of the object */

+	if (res != FR_OK) LEAVE_FF(fp->fs, res);

+	if (fp->err)						/* Check error */

+		LEAVE_FF(fp->fs, (FRESULT)fp->err);

+

+#if _USE_FASTSEEK

+	if (fp->cltbl) {	/* Fast seek */

+		DWORD cl, pcl, ncl, tcl, dsc, tlen, ulen, *tbl;

+

+		if (ofs == CREATE_LINKMAP) {	/* Create CLMT */

+			tbl = fp->cltbl;

+			tlen = *tbl++; ulen = 2;	/* Given table size and required table size */

+			cl = fp->sclust;			/* Top of the chain */

+			if (cl) {

+				do {

+					/* Get a fragment */

+					tcl = cl; ncl = 0; ulen += 2;	/* Top, length and used items */

+					do {

+						pcl = cl; ncl++;

+						cl = get_fat(fp->fs, cl);

+						if (cl <= 1) ABORT(fp->fs, FR_INT_ERR);

+						if (cl == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+					} while (cl == pcl + 1);

+					if (ulen <= tlen) {		/* Store the length and top of the fragment */

+						*tbl++ = ncl; *tbl++ = tcl;

+					}

+				} while (cl < fp->fs->n_fatent);	/* Repeat until end of chain */

+			}

+			*fp->cltbl = ulen;	/* Number of items used */

+			if (ulen <= tlen)

+				*tbl = 0;		/* Terminate table */

+			else

+				res = FR_NOT_ENOUGH_CORE;	/* Given table size is smaller than required */

+

+		} else {						/* Fast seek */

+			if (ofs > fp->fsize)		/* Clip offset at the file size */

+				ofs = fp->fsize;

+			fp->fptr = ofs;				/* Set file pointer */

+			if (ofs) {

+				fp->clust = clmt_clust(fp, ofs - 1);

+				dsc = clust2sect(fp->fs, fp->clust);

+				if (!dsc) ABORT(fp->fs, FR_INT_ERR);

+				dsc += (ofs - 1) / SS(fp->fs) & (fp->fs->csize - 1);

+				if (fp->fptr % SS(fp->fs) && dsc != fp->dsect) {	/* Refill sector cache if needed */

+#if !_FS_TINY

+#if !_FS_READONLY

+					if (fp->flag & FA__DIRTY) {		/* Write-back dirty sector cache */

+						if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+							ABORT(fp->fs, FR_DISK_ERR);

+						fp->flag &= ~FA__DIRTY;

+					}

+#endif

+					if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK)	/* Load current sector */

+						ABORT(fp->fs, FR_DISK_ERR);

+#endif

+					fp->dsect = dsc;

+				}

+			}

+		}

+	} else

+#endif

+

+	/* Normal Seek */

+	{

+		DWORD clst, bcs, nsect, ifptr;

+

+		if (ofs > fp->fsize					/* In read-only mode, clip offset with the file size */

+#if !_FS_READONLY

+			 && !(fp->flag & FA_WRITE)

+#endif

+			) ofs = fp->fsize;

+

+		ifptr = fp->fptr;

+		fp->fptr = nsect = 0;

+		if (ofs) {

+			bcs = (DWORD)fp->fs->csize * SS(fp->fs);	/* Cluster size (byte) */

+			if (ifptr > 0 &&

+				(ofs - 1) / bcs >= (ifptr - 1) / bcs) {	/* When seek to same or following cluster, */

+				fp->fptr = (ifptr - 1) & ~(bcs - 1);	/* start from the current cluster */

+				ofs -= fp->fptr;

+				clst = fp->clust;

+			} else {									/* When seek to back cluster, */

+				clst = fp->sclust;						/* start from the first cluster */

+#if !_FS_READONLY

+				if (clst == 0) {						/* If no cluster chain, create a new chain */

+					clst = create_chain(fp->fs, 0);

+					if (clst == 1) ABORT(fp->fs, FR_INT_ERR);

+					if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+					fp->sclust = clst;

+				}

+#endif

+				fp->clust = clst;

+			}

+			if (clst != 0) {

+				while (ofs > bcs) {						/* Cluster following loop */

+#if !_FS_READONLY

+					if (fp->flag & FA_WRITE) {			/* Check if in write mode or not */

+						clst = create_chain(fp->fs, clst);	/* Force stretch if in write mode */

+						if (clst == 0) {				/* When disk gets full, clip file size */

+							ofs = bcs; break;

+						}

+					} else

+#endif

+						clst = get_fat(fp->fs, clst);	/* Follow cluster chain if not in write mode */

+					if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+					if (clst <= 1 || clst >= fp->fs->n_fatent) ABORT(fp->fs, FR_INT_ERR);

+					fp->clust = clst;

+					fp->fptr += bcs;

+					ofs -= bcs;

+				}

+				fp->fptr += ofs;

+				if (ofs % SS(fp->fs)) {

+					nsect = clust2sect(fp->fs, clst);	/* Current sector */

+					if (!nsect) ABORT(fp->fs, FR_INT_ERR);

+					nsect += ofs / SS(fp->fs);

+				}

+			}

+		}

+		if (fp->fptr % SS(fp->fs) && nsect != fp->dsect) {	/* Fill sector cache if needed */

+#if !_FS_TINY

+#if !_FS_READONLY

+			if (fp->flag & FA__DIRTY) {			/* Write-back dirty sector cache */

+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+					ABORT(fp->fs, FR_DISK_ERR);

+				fp->flag &= ~FA__DIRTY;

+			}

+#endif

+			if (disk_read(fp->fs->drv, fp->buf, nsect, 1) != RES_OK)	/* Fill sector cache */

+				ABORT(fp->fs, FR_DISK_ERR);

+#endif

+			fp->dsect = nsect;

+		}

+#if !_FS_READONLY

+		if (fp->fptr > fp->fsize) {			/* Set file change flag if the file size is extended */

+			fp->fsize = fp->fptr;

+			fp->flag |= FA__WRITTEN;

+		}

+#endif

+	}

+

+	LEAVE_FF(fp->fs, res);

+}

+

+

+

+#if _FS_MINIMIZE <= 1

+/*-----------------------------------------------------------------------*/

+/* Create a Directory Object                                             */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_opendir (

+	DIR* dp,			/* Pointer to directory object to create */

+	const TCHAR* path	/* Pointer to the directory path */

+)

+{

+	FRESULT res;

+	FATFS* fs;

+	DEF_NAMEBUF;

+

+

+	if (!dp) return FR_INVALID_OBJECT;

+

+	/* Get logical drive number */

+	res = find_volume(&fs, &path, 0);

+	if (res == FR_OK) {

+		dp->fs = fs;

+		INIT_BUF(*dp);

+		res = follow_path(dp, path);			/* Follow the path to the directory */

+		FREE_BUF();

+		if (res == FR_OK) {						/* Follow completed */

+			if (dp->dir) {						/* It is not the origin directory itself */

+				if (dp->dir[DIR_Attr] & AM_DIR)	/* The object is a sub directory */

+					dp->sclust = ld_clust(fs, dp->dir);

+				else							/* The object is a file */

+					res = FR_NO_PATH;

+			}

+			if (res == FR_OK) {

+				dp->id = fs->id;

+				res = dir_sdi(dp, 0);			/* Rewind directory */

+#if _FS_LOCK

+				if (res == FR_OK) {

+					if (dp->sclust) {

+						dp->lockid = inc_lock(dp, 0);	/* Lock the sub directory */

+						if (!dp->lockid)

+							res = FR_TOO_MANY_OPEN_FILES;

+					} else {

+						dp->lockid = 0;	/* Root directory need not to be locked */

+					}

+				}

+#endif

+			}

+		}

+		if (res == FR_NO_FILE) res = FR_NO_PATH;

+	}

+	if (res != FR_OK) dp->fs = 0;		/* Invalidate the directory object if function faild */

+

+	LEAVE_FF(fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Close Directory                                                       */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_closedir (

+	DIR *dp		/* Pointer to the directory object to be closed */

+)

+{

+	FRESULT res;

+

+

+	res = validate(dp);

+	if (res == FR_OK) {

+#if _FS_REENTRANT

+		FATFS *fs = dp->fs;

+#endif

+#if _FS_LOCK

+		if (dp->lockid)				/* Decrement sub-directory open counter */

+			res = dec_lock(dp->lockid);

+		if (res == FR_OK)

+#endif

+			dp->fs = 0;				/* Invalidate directory object */

+#if _FS_REENTRANT

+		unlock_fs(fs, FR_OK);		/* Unlock volume */

+#endif

+	}

+	return res;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Read Directory Entries in Sequence                                    */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_readdir (

+	DIR* dp,			/* Pointer to the open directory object */

+	FILINFO* fno		/* Pointer to file information to return */

+)

+{

+	FRESULT res;

+	DEF_NAMEBUF;

+

+

+	res = validate(dp);						/* Check validity of the object */

+	if (res == FR_OK) {

+		if (!fno) {

+			res = dir_sdi(dp, 0);			/* Rewind the directory object */

+		} else {

+			INIT_BUF(*dp);

+			res = dir_read(dp, 0);			/* Read an item */

+			if (res == FR_NO_FILE) {		/* Reached end of directory */

+				dp->sect = 0;

+				res = FR_OK;

+			}

+			if (res == FR_OK) {				/* A valid entry is found */

+				get_fileinfo(dp, fno);		/* Get the object information */

+				res = dir_next(dp, 0);		/* Increment index for next */

+				if (res == FR_NO_FILE) {

+					dp->sect = 0;

+					res = FR_OK;

+				}

+			}

+			FREE_BUF();

+		}

+	}

+

+	LEAVE_FF(dp->fs, res);

+}

+

+

+

+#if _FS_MINIMIZE == 0

+/*-----------------------------------------------------------------------*/

+/* Get File Status                                                       */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_stat (

+	const TCHAR* path,	/* Pointer to the file path */

+	FILINFO* fno		/* Pointer to file information to return */

+)

+{

+	FRESULT res;

+	DIR dj;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 0);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);	/* Follow the file path */

+		if (res == FR_OK) {				/* Follow completed */

+			if (dj.dir) {		/* Found an object */

+				if (fno) get_fileinfo(&dj, fno);

+			} else {			/* It is root directory */

+				res = FR_INVALID_NAME;

+			}

+		}

+		FREE_BUF();

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+#if !_FS_READONLY

+/*-----------------------------------------------------------------------*/

+/* Get Number of Free Clusters                                           */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_getfree (

+	const TCHAR* path,	/* Path name of the logical drive number */

+	DWORD* nclst,		/* Pointer to a variable to return number of free clusters */

+	FATFS** fatfs		/* Pointer to return pointer to corresponding file system object */

+)

+{

+	FRESULT res;

+	FATFS *fs;

+	DWORD n, clst, sect, stat;

+	UINT i;

+	BYTE fat, *p;

+

+

+	/* Get logical drive number */

+	res = find_volume(fatfs, &path, 0);

+	fs = *fatfs;

+	if (res == FR_OK) {

+		/* If free_clust is valid, return it without full cluster scan */

+		if (fs->free_clust <= fs->n_fatent - 2) {

+			*nclst = fs->free_clust;

+		} else {

+			/* Get number of free clusters */

+			fat = fs->fs_type;

+			n = 0;

+			if (fat == FS_FAT12) {

+				clst = 2;

+				do {

+					stat = get_fat(fs, clst);

+					if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }

+					if (stat == 1) { res = FR_INT_ERR; break; }

+					if (stat == 0) n++;

+				} while (++clst < fs->n_fatent);

+			} else {

+				clst = fs->n_fatent;

+				sect = fs->fatbase;

+				i = 0; p = 0;

+				do {

+					if (!i) {

+						res = move_window(fs, sect++);

+						if (res != FR_OK) break;

+						p = fs->win;

+						i = SS(fs);

+					}

+					if (fat == FS_FAT16) {

+						if (LD_WORD(p) == 0) n++;

+						p += 2; i -= 2;

+					} else {

+						if ((LD_DWORD(p) & 0x0FFFFFFF) == 0) n++;

+						p += 4; i -= 4;

+					}

+				} while (--clst);

+			}

+			fs->free_clust = n;

+			fs->fsi_flag |= 1;

+			*nclst = n;

+		}

+	}

+	LEAVE_FF(fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Truncate File                                                         */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_truncate (

+	FIL* fp		/* Pointer to the file object */

+)

+{

+	FRESULT res;

+	DWORD ncl;

+

+

+	res = validate(fp);						/* Check validity of the object */

+	if (res == FR_OK) {

+		if (fp->err) {						/* Check error */

+			res = (FRESULT)fp->err;

+		} else {

+			if (!(fp->flag & FA_WRITE))		/* Check access mode */

+				res = FR_DENIED;

+		}

+	}

+	if (res == FR_OK) {

+		if (fp->fsize > fp->fptr) {

+			fp->fsize = fp->fptr;	/* Set file size to current R/W point */

+			fp->flag |= FA__WRITTEN;

+			if (fp->fptr == 0) {	/* When set file size to zero, remove entire cluster chain */

+				res = remove_chain(fp->fs, fp->sclust);

+				fp->sclust = 0;

+			} else {				/* When truncate a part of the file, remove remaining clusters */

+				ncl = get_fat(fp->fs, fp->clust);

+				res = FR_OK;

+				if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;

+				if (ncl == 1) res = FR_INT_ERR;

+				if (res == FR_OK && ncl < fp->fs->n_fatent) {

+					res = put_fat(fp->fs, fp->clust, 0x0FFFFFFF);

+					if (res == FR_OK) res = remove_chain(fp->fs, ncl);

+				}

+			}

+#if !_FS_TINY

+			if (res == FR_OK && (fp->flag & FA__DIRTY)) {

+				if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK)

+					res = FR_DISK_ERR;

+				else

+					fp->flag &= ~FA__DIRTY;

+			}

+#endif

+		}

+		if (res != FR_OK) fp->err = (FRESULT)res;

+	}

+

+	LEAVE_FF(fp->fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Delete a File or Directory                                            */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_unlink (

+	const TCHAR* path		/* Pointer to the file or directory path */

+)

+{

+	FRESULT res;

+	DIR dj, sdj;

+	BYTE *dir;

+	DWORD dclst = 0;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 1);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);		/* Follow the file path */

+		if (_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT))

+			res = FR_INVALID_NAME;			/* Cannot remove dot entry */

+#if _FS_LOCK

+		if (res == FR_OK) res = chk_lock(&dj, 2);	/* Cannot remove open object */

+#endif

+		if (res == FR_OK) {					/* The object is accessible */

+			dir = dj.dir;

+			if (!dir) {

+				res = FR_INVALID_NAME;		/* Cannot remove the origin directory */

+			} else {

+				if (dir[DIR_Attr] & AM_RDO)

+					res = FR_DENIED;		/* Cannot remove R/O object */

+			}

+			//if (res == FR_OK && (dir[DIR_Attr] & AM_DIR)) {	/* Is it a sub-dir? */

+			if (res == FR_OK) {

+				dclst = ld_clust(dj.fs, dir);

+				if (dir[DIR_Attr] & AM_DIR) {	/* Is it a sub-dir? */

+					if (!dclst) {

+						res = FR_INT_ERR;

+					} else {					/* Make sure the sub-directory is empty */

+						mem_cpy(&sdj, &dj, sizeof (DIR));

+						sdj.sclust = dclst;

+						res = dir_sdi(&sdj, 2);		/* Exclude dot entries */

+						if (res == FR_OK) {

+							res = dir_read(&sdj, 0);	/* Read an item */

+							if (res == FR_OK		/* Not empty directory */

+#if _FS_RPATH

+								|| dclst == dj.fs->cdir	/* or current directory */

+#endif

+							) res = FR_DENIED;

+							if (res == FR_NO_FILE) res = FR_OK;	/* It is empty */

+						}

+					}

+				}

+			}

+			if (res == FR_OK) {

+				res = dir_remove(&dj);		/* Remove the directory entry */

+				if (res == FR_OK && dclst)	/* Remove the cluster chain if exist */

+					res = remove_chain(dj.fs, dclst);

+				if (res == FR_OK) res = sync_fs(dj.fs);

+			}

+		}

+		FREE_BUF();

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Create a Directory                                                    */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_mkdir (

+	const TCHAR* path		/* Pointer to the directory path */

+)

+{

+	FRESULT res;

+	DIR dj;

+	BYTE *dir, n;

+	DWORD dsc, dcl, pcl, tm = GET_FATTIME();

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 1);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);			/* Follow the file path */

+		if (res == FR_OK) res = FR_EXIST;		/* Any object with same name is already existing */

+		if (_FS_RPATH && res == FR_NO_FILE && (dj.fn[NSFLAG] & NS_DOT))

+			res = FR_INVALID_NAME;

+		if (res == FR_NO_FILE) {				/* Can create a new directory */

+			dcl = create_chain(dj.fs, 0);		/* Allocate a cluster for the new directory table */

+			res = FR_OK;

+			if (dcl == 0) res = FR_DENIED;		/* No space to allocate a new cluster */

+			if (dcl == 1) res = FR_INT_ERR;

+			if (dcl == 0xFFFFFFFF) res = FR_DISK_ERR;

+			if (res == FR_OK)					/* Flush FAT */

+				res = sync_window(dj.fs);

+			if (res == FR_OK) {					/* Initialize the new directory table */

+				dsc = clust2sect(dj.fs, dcl);

+				dir = dj.fs->win;

+				mem_set(dir, 0, SS(dj.fs));

+				mem_set(dir+DIR_Name, ' ', 11);	/* Create "." entry */

+				dir[DIR_Name] = '.';

+				dir[DIR_Attr] = AM_DIR;

+				ST_DWORD(dir+DIR_WrtTime, tm);

+				st_clust(dir, dcl);

+				mem_cpy(dir+SZ_DIR, dir, SZ_DIR); 	/* Create ".." entry */

+				dir[SZ_DIR+1] = '.'; pcl = dj.sclust;

+				if (dj.fs->fs_type == FS_FAT32 && pcl == dj.fs->dirbase)

+					pcl = 0;

+				st_clust(dir+SZ_DIR, pcl);

+				for (n = dj.fs->csize; n; n--) {	/* Write dot entries and clear following sectors */

+					dj.fs->winsect = dsc++;

+					dj.fs->wflag = 1;

+					res = sync_window(dj.fs);

+					if (res != FR_OK) break;

+					mem_set(dir, 0, SS(dj.fs));

+				}

+			}

+			if (res == FR_OK) res = dir_register(&dj);	/* Register the object to the directoy */

+			if (res != FR_OK) {

+				remove_chain(dj.fs, dcl);			/* Could not register, remove cluster chain */

+			} else {

+				dir = dj.dir;

+				dir[DIR_Attr] = AM_DIR;				/* Attribute */

+				ST_DWORD(dir+DIR_WrtTime, tm);		/* Created time */

+				st_clust(dir, dcl);					/* Table start cluster */

+				dj.fs->wflag = 1;

+				res = sync_fs(dj.fs);

+			}

+		}

+		FREE_BUF();

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Change Attribute                                                      */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_chmod (

+	const TCHAR* path,	/* Pointer to the file path */

+	BYTE value,			/* Attribute bits */

+	BYTE mask			/* Attribute mask to change */

+)

+{

+	FRESULT res;

+	DIR dj;

+	BYTE *dir;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 1);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);		/* Follow the file path */

+		FREE_BUF();

+		if (_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT))

+			res = FR_INVALID_NAME;

+		if (res == FR_OK) {

+			dir = dj.dir;

+			if (!dir) {						/* Is it a root directory? */

+				res = FR_INVALID_NAME;

+			} else {						/* File or sub directory */

+				mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC;	/* Valid attribute mask */

+				dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask);	/* Apply attribute change */

+				dj.fs->wflag = 1;

+				res = sync_fs(dj.fs);

+			}

+		}

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Rename File/Directory                                                 */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_rename (

+	const TCHAR* path_old,	/* Pointer to the object to be renamed */

+	const TCHAR* path_new	/* Pointer to the new name */

+)

+{

+	FRESULT res;

+	DIR djo, djn;

+	BYTE buf[21], *dir;

+	DWORD dw;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number of the source object */

+	res = find_volume(&djo.fs, &path_old, 1);

+	if (res == FR_OK) {

+		djn.fs = djo.fs;

+		INIT_BUF(djo);

+		res = follow_path(&djo, path_old);		/* Check old object */

+		if (_FS_RPATH && res == FR_OK && (djo.fn[NSFLAG] & NS_DOT))

+			res = FR_INVALID_NAME;

+#if _FS_LOCK

+		if (res == FR_OK) res = chk_lock(&djo, 2);

+#endif

+		if (res == FR_OK) {						/* Old object is found */

+			if (!djo.dir) {						/* Is root dir? */

+				res = FR_NO_FILE;

+			} else {

+				mem_cpy(buf, djo.dir+DIR_Attr, 21);		/* Save the object information except name */

+				mem_cpy(&djn, &djo, sizeof (DIR));		/* Duplicate the directory object */

+				if (get_ldnumber(&path_new) >= 0)		/* Snip drive number off and ignore it */

+					res = follow_path(&djn, path_new);	/* and make sure if new object name is not conflicting */

+				else

+					res = FR_INVALID_DRIVE;

+				if (res == FR_OK) res = FR_EXIST;		/* The new object name is already existing */

+				if (res == FR_NO_FILE) { 				/* It is a valid path and no name collision */

+/* Start of critical section that any interruption can cause a cross-link */

+					res = dir_register(&djn);			/* Register the new entry */

+					if (res == FR_OK) {

+						dir = djn.dir;					/* Copy object information except name */

+						mem_cpy(dir+13, buf+2, 19);

+						dir[DIR_Attr] = buf[0] | AM_ARC;

+						djo.fs->wflag = 1;

+						if ((dir[DIR_Attr] & AM_DIR) && djo.sclust != djn.sclust) {	/* Update .. entry in the directory if needed */

+							dw = clust2sect(djo.fs, ld_clust(djo.fs, dir));

+							if (!dw) {

+								res = FR_INT_ERR;

+							} else {

+								res = move_window(djo.fs, dw);

+								dir = djo.fs->win+SZ_DIR;	/* .. entry */

+								if (res == FR_OK && dir[1] == '.') {

+									st_clust(dir, djn.sclust);

+									djo.fs->wflag = 1;

+								}

+							}

+						}

+						if (res == FR_OK) {

+							res = dir_remove(&djo);		/* Remove old entry */

+							if (res == FR_OK)

+								res = sync_fs(djo.fs);

+						}

+					}

+/* End of critical section */

+				}

+			}

+		}

+		FREE_BUF();

+	}

+

+	LEAVE_FF(djo.fs, res);

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Change Timestamp                                                      */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_utime (

+	const TCHAR* path,	/* Pointer to the file/directory name */

+	const FILINFO* fno	/* Pointer to the time stamp to be set */

+)

+{

+	FRESULT res;

+	DIR dj;

+	BYTE *dir;

+	DEF_NAMEBUF;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 1);

+	if (res == FR_OK) {

+		INIT_BUF(dj);

+		res = follow_path(&dj, path);	/* Follow the file path */

+		FREE_BUF();

+		if (_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT))

+			res = FR_INVALID_NAME;

+		if (res == FR_OK) {

+			dir = dj.dir;

+			if (!dir) {					/* Root directory */

+				res = FR_INVALID_NAME;

+			} else {					/* File or sub-directory */

+				ST_WORD(dir+DIR_WrtTime, fno->ftime);

+				ST_WORD(dir+DIR_WrtDate, fno->fdate);

+				dj.fs->wflag = 1;

+				res = sync_fs(dj.fs);

+			}

+		}

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+#endif /* !_FS_READONLY */

+#endif /* _FS_MINIMIZE == 0 */

+#endif /* _FS_MINIMIZE <= 1 */

+#endif /* _FS_MINIMIZE <= 2 */

+

+

+

+#if _USE_LABEL

+/*-----------------------------------------------------------------------*/

+/* Get volume label                                                      */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_getlabel (

+	const TCHAR* path,	/* Path name of the logical drive number */

+	TCHAR* label,		/* Pointer to a buffer to return the volume label */

+	DWORD* vsn			/* Pointer to a variable to return the volume serial number */

+)

+{

+	FRESULT res;

+	DIR dj;

+	UINT i, j;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &path, 0);

+

+	/* Get volume label */

+	if (res == FR_OK && label) {

+		dj.sclust = 0;					/* Open root directory */

+		res = dir_sdi(&dj, 0);

+		if (res == FR_OK) {

+			res = dir_read(&dj, 1);		/* Get an entry with AM_VOL */

+			if (res == FR_OK) {			/* A volume label is exist */

+#if _USE_LFN && _LFN_UNICODE

+				WCHAR w;

+				i = j = 0;

+				do {

+					w = (i < 11) ? dj.dir[i++] : ' ';

+					if (IsDBCS1(w) && i < 11 && IsDBCS2(dj.dir[i]))

+						w = w << 8 | dj.dir[i++];

+					label[j++] = ff_convert(w, 1);	/* OEM -> Unicode */

+				} while (j < 11);

+#else

+				mem_cpy(label, dj.dir, 11);

+#endif

+				j = 11;

+				do {

+					label[j] = 0;

+					if (!j) break;

+				} while (label[--j] == ' ');

+			}

+			if (res == FR_NO_FILE) {	/* No label, return nul string */

+				label[0] = 0;

+				res = FR_OK;

+			}

+		}

+	}

+

+	/* Get volume serial number */

+	if (res == FR_OK && vsn) {

+		res = move_window(dj.fs, dj.fs->volbase);

+		if (res == FR_OK) {

+			i = dj.fs->fs_type == FS_FAT32 ? BS_VolID32 : BS_VolID;

+			*vsn = LD_DWORD(&dj.fs->win[i]);

+		}

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+

+

+#if !_FS_READONLY

+/*-----------------------------------------------------------------------*/

+/* Set volume label                                                      */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_setlabel (

+	const TCHAR* label	/* Pointer to the volume label to set */

+)

+{

+	FRESULT res;

+	DIR dj;

+	BYTE vn[11];

+	UINT i, j, sl;

+	WCHAR w;

+	DWORD tm;

+

+

+	/* Get logical drive number */

+	res = find_volume(&dj.fs, &label, 1);

+	if (res) LEAVE_FF(dj.fs, res);

+

+	/* Create a volume label in directory form */

+	vn[0] = 0;

+	for (sl = 0; label[sl]; sl++) ;				/* Get name length */

+	for ( ; sl && label[sl-1] == ' '; sl--) ;	/* Remove trailing spaces */

+	if (sl) {	/* Create volume label in directory form */

+		i = j = 0;

+		do {

+#if _USE_LFN && _LFN_UNICODE

+			w = ff_convert(ff_wtoupper(label[i++]), 0);

+#else

+			w = (BYTE)label[i++];

+			if (IsDBCS1(w))

+				w = (j < 10 && i < sl && IsDBCS2(label[i])) ? w << 8 | (BYTE)label[i++] : 0;

+#if _USE_LFN

+			w = ff_convert(ff_wtoupper(ff_convert(w, 1)), 0);

+#else

+			if (IsLower(w)) w -= 0x20;			/* To upper ASCII characters */

+#ifdef _EXCVT

+			if (w >= 0x80) w = ExCvt[w - 0x80];	/* To upper extended characters (SBCS cfg) */

+#else

+			if (!_DF1S && w >= 0x80) w = 0;		/* Reject extended characters (ASCII cfg) */

+#endif

+#endif

+#endif

+			if (!w || chk_chr("\"*+,.:;<=>\?[]|\x7F", w) || j >= (UINT)((w >= 0x100) ? 10 : 11)) /* Reject invalid characters for volume label */

+				LEAVE_FF(dj.fs, FR_INVALID_NAME);

+			if (w >= 0x100) vn[j++] = (BYTE)(w >> 8);

+			vn[j++] = (BYTE)w;

+		} while (i < sl);

+		while (j < 11) vn[j++] = ' ';

+	}

+

+	/* Set volume label */

+	dj.sclust = 0;					/* Open root directory */

+	res = dir_sdi(&dj, 0);

+	if (res == FR_OK) {

+		res = dir_read(&dj, 1);		/* Get an entry with AM_VOL */

+		if (res == FR_OK) {			/* A volume label is found */

+			if (vn[0]) {

+				mem_cpy(dj.dir, vn, 11);	/* Change the volume label name */

+				tm = GET_FATTIME();

+				ST_DWORD(dj.dir+DIR_WrtTime, tm);

+			} else {

+				dj.dir[0] = DDE;			/* Remove the volume label */

+			}

+			dj.fs->wflag = 1;

+			res = sync_fs(dj.fs);

+		} else {					/* No volume label is found or error */

+			if (res == FR_NO_FILE) {

+				res = FR_OK;

+				if (vn[0]) {				/* Create volume label as new */

+					res = dir_alloc(&dj, 1);	/* Allocate an entry for volume label */

+					if (res == FR_OK) {

+						mem_set(dj.dir, 0, SZ_DIR);	/* Set volume label */

+						mem_cpy(dj.dir, vn, 11);

+						dj.dir[DIR_Attr] = AM_VOL;

+						tm = GET_FATTIME();

+						ST_DWORD(dj.dir+DIR_WrtTime, tm);

+						dj.fs->wflag = 1;

+						res = sync_fs(dj.fs);

+					}

+				}

+			}

+		}

+	}

+

+	LEAVE_FF(dj.fs, res);

+}

+

+#endif /* !_FS_READONLY */

+#endif /* _USE_LABEL */

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Forward data to the stream directly (available on only tiny cfg)      */

+/*-----------------------------------------------------------------------*/

+#if _USE_FORWARD && _FS_TINY

+

+FRESULT f_forward (

+	FIL* fp, 						/* Pointer to the file object */

+	UINT (*func)(const BYTE*,UINT),	/* Pointer to the streaming function */

+	UINT btf,						/* Number of bytes to forward */

+	UINT* bf						/* Pointer to number of bytes forwarded */

+)

+{

+	FRESULT res;

+	DWORD remain, clst, sect;

+	UINT rcnt;

+	BYTE csect;

+

+

+	*bf = 0;	/* Clear transfer byte counter */

+

+	res = validate(fp);								/* Check validity of the object */

+	if (res != FR_OK) LEAVE_FF(fp->fs, res);

+	if (fp->err)									/* Check error */

+		LEAVE_FF(fp->fs, (FRESULT)fp->err);

+	if (!(fp->flag & FA_READ))						/* Check access mode */

+		LEAVE_FF(fp->fs, FR_DENIED);

+

+	remain = fp->fsize - fp->fptr;

+	if (btf > remain) btf = (UINT)remain;			/* Truncate btf by remaining bytes */

+

+	for ( ;  btf && (*func)(0, 0);					/* Repeat until all data transferred or stream becomes busy */

+		fp->fptr += rcnt, *bf += rcnt, btf -= rcnt) {

+		csect = (BYTE)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1));	/* Sector offset in the cluster */

+		if ((fp->fptr % SS(fp->fs)) == 0) {			/* On the sector boundary? */

+			if (!csect) {							/* On the cluster boundary? */

+				clst = (fp->fptr == 0) ?			/* On the top of the file? */

+					fp->sclust : get_fat(fp->fs, fp->clust);

+				if (clst <= 1) ABORT(fp->fs, FR_INT_ERR);

+				if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR);

+				fp->clust = clst;					/* Update current cluster */

+			}

+		}

+		sect = clust2sect(fp->fs, fp->clust);		/* Get current data sector */

+		if (!sect) ABORT(fp->fs, FR_INT_ERR);

+		sect += csect;

+		if (move_window(fp->fs, sect) != FR_OK)		/* Move sector window */

+			ABORT(fp->fs, FR_DISK_ERR);

+		fp->dsect = sect;

+		rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs));	/* Forward data from sector window */

+		if (rcnt > btf) rcnt = btf;

+		rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt);

+		if (!rcnt) ABORT(fp->fs, FR_INT_ERR);

+	}

+

+	LEAVE_FF(fp->fs, FR_OK);

+}

+#endif /* _USE_FORWARD */

+

+

+

+#if _USE_MKFS && !_FS_READONLY

+/*-----------------------------------------------------------------------*/

+/* Create File System on the Drive                                       */

+/*-----------------------------------------------------------------------*/

+#define N_ROOTDIR	512		/* Number of root directory entries for FAT12/16 */

+#define N_FATS		1		/* Number of FATs (1 or 2) */

+

+

+FRESULT f_mkfs (

+	const TCHAR* path,	/* Logical drive number */

+	BYTE sfd,			/* Partitioning rule 0:FDISK, 1:SFD */

+	UINT au				/* Size of allocation unit in unit of byte or sector */

+)

+{

+	static const WORD vst[] = { 1024,   512,  256,  128,   64,    32,   16,    8,    4,    2,   0};

+	static const WORD cst[] = {32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512};

+	int vol;

+	BYTE fmt, md, sys, *tbl, pdrv, part;

+	DWORD n_clst, vs, n, wsect;

+	UINT i;

+	DWORD b_vol, b_fat, b_dir, b_data;	/* LBA */

+	DWORD n_vol, n_rsv, n_fat, n_dir;	/* Size */

+	FATFS *fs;

+	DSTATUS stat;

+

+

+	/* Check mounted drive and clear work area */

+	if (sfd > 1) return FR_INVALID_PARAMETER;

+	vol = get_ldnumber(&path);

+	if (vol < 0) return FR_INVALID_DRIVE;

+	fs = FatFs[vol];

+	if (!fs) return FR_NOT_ENABLED;

+	fs->fs_type = 0;

+	pdrv = LD2PD(vol);	/* Physical drive */

+	part = LD2PT(vol);	/* Partition (0:auto detect, 1-4:get from partition table)*/

+

+	/* Get disk statics */

+	stat = disk_initialize(pdrv);

+	if (stat & STA_NOINIT) return FR_NOT_READY;

+	if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;

+#if _MAX_SS != _MIN_SS		/* Get disk sector size */

+	if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS || SS(fs) < _MIN_SS)

+		return FR_DISK_ERR;

+#endif

+	if (_MULTI_PARTITION && part) {

+		/* Get partition information from partition table in the MBR */

+		if (disk_read(pdrv, fs->win, 0, 1) != RES_OK) return FR_DISK_ERR;

+		if (LD_WORD(fs->win+BS_55AA) != 0xAA55) return FR_MKFS_ABORTED;

+		tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE];

+		if (!tbl[4]) return FR_MKFS_ABORTED;	/* No partition? */

+		b_vol = LD_DWORD(tbl+8);	/* Volume start sector */

+		n_vol = LD_DWORD(tbl+12);	/* Volume size */

+	} else {

+		/* Create a partition in this function */

+		if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &n_vol) != RES_OK || n_vol < 128)

+			return FR_DISK_ERR;

+		b_vol = (sfd) ? 0 : 63;		/* Volume start sector */

+		n_vol -= b_vol;				/* Volume size */

+	}

+

+	if (au & (au - 1)) au = 0;

+	if (!au) {						/* AU auto selection */

+		vs = n_vol / (2000 / (SS(fs) / 512));

+		for (i = 0; vs < vst[i]; i++) ;

+		au = cst[i];

+	}

+	if (au >= _MIN_SS) au /= SS(fs);	/* Number of sectors per cluster */

+	if (!au) au = 1;

+	if (au > 128) au = 128;

+

+	/* Pre-compute number of clusters and FAT sub-type */

+	n_clst = n_vol / au;

+	fmt = FS_FAT12;

+	if (n_clst >= MIN_FAT16) fmt = FS_FAT16;

+	if (n_clst >= MIN_FAT32) fmt = FS_FAT32;

+

+	/* Determine offset and size of FAT structure */

+	if (fmt == FS_FAT32) {

+		n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs);

+		n_rsv = 32;

+		n_dir = 0;

+	} else {

+		n_fat = (fmt == FS_FAT12) ? (n_clst * 3 + 1) / 2 + 3 : (n_clst * 2) + 4;

+		n_fat = (n_fat + SS(fs) - 1) / SS(fs);

+		n_rsv = 1;

+		n_dir = (DWORD)N_ROOTDIR * SZ_DIR / SS(fs);

+	}

+	b_fat = b_vol + n_rsv;				/* FAT area start sector */

+	b_dir = b_fat + n_fat * N_FATS;		/* Directory area start sector */

+	b_data = b_dir + n_dir;				/* Data area start sector */

+	if (n_vol < b_data + au - b_vol) return FR_MKFS_ABORTED;	/* Too small volume */

+

+	/* Align data start sector to erase block boundary (for flash memory media) */

+	if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &n) != RES_OK || !n || n > 32768) n = 1;

+	n = (b_data + n - 1) & ~(n - 1);	/* Next nearest erase block from current data start */

+	n = (n - b_data) / N_FATS;

+	if (fmt == FS_FAT32) {		/* FAT32: Move FAT offset */

+		n_rsv += n;

+		b_fat += n;

+	} else {					/* FAT12/16: Expand FAT size */

+		n_fat += n;

+	}

+

+	/* Determine number of clusters and final check of validity of the FAT sub-type */

+	n_clst = (n_vol - n_rsv - n_fat * N_FATS - n_dir) / au;

+	if (   (fmt == FS_FAT16 && n_clst < MIN_FAT16)

+		|| (fmt == FS_FAT32 && n_clst < MIN_FAT32))

+		return FR_MKFS_ABORTED;

+

+	/* Determine system ID in the partition table */

+	if (fmt == FS_FAT32) {

+		sys = 0x0C;		/* FAT32X */

+	} else {

+		if (fmt == FS_FAT12 && n_vol < 0x10000) {

+			sys = 0x01;	/* FAT12(<65536) */

+		} else {

+			sys = (n_vol < 0x10000) ? 0x04 : 0x06;	/* FAT16(<65536) : FAT12/16(>=65536) */

+		}

+	}

+

+	if (_MULTI_PARTITION && part) {

+		/* Update system ID in the partition table */

+		tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE];

+		tbl[4] = sys;

+		if (disk_write(pdrv, fs->win, 0, 1) != RES_OK)	/* Write it to teh MBR */

+			return FR_DISK_ERR;

+		md = 0xF8;

+	} else {

+		if (sfd) {	/* No partition table (SFD) */

+			md = 0xF0;

+		} else {	/* Create partition table (FDISK) */

+			mem_set(fs->win, 0, SS(fs));

+			tbl = fs->win+MBR_Table;	/* Create partition table for single partition in the drive */

+			tbl[1] = 1;						/* Partition start head */

+			tbl[2] = 1;						/* Partition start sector */

+			tbl[3] = 0;						/* Partition start cylinder */

+			tbl[4] = sys;					/* System type */

+			tbl[5] = 254;					/* Partition end head */

+			n = (b_vol + n_vol) / 63 / 255;

+			tbl[6] = (BYTE)(n >> 2 | 63);	/* Partition end sector */

+			tbl[7] = (BYTE)n;				/* End cylinder */

+			ST_DWORD(tbl+8, 63);			/* Partition start in LBA */

+			ST_DWORD(tbl+12, n_vol);		/* Partition size in LBA */

+			ST_WORD(fs->win+BS_55AA, 0xAA55);	/* MBR signature */

+			if (disk_write(pdrv, fs->win, 0, 1) != RES_OK)	/* Write it to the MBR */

+				return FR_DISK_ERR;

+			md = 0xF8;

+		}

+	}

+

+	/* Create BPB in the VBR */

+	tbl = fs->win;							/* Clear sector */

+	mem_set(tbl, 0, SS(fs));

+	mem_cpy(tbl, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code, OEM name */

+	i = SS(fs);								/* Sector size */

+	ST_WORD(tbl+BPB_BytsPerSec, i);

+	tbl[BPB_SecPerClus] = (BYTE)au;			/* Sectors per cluster */

+	ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv);		/* Reserved sectors */

+	tbl[BPB_NumFATs] = N_FATS;				/* Number of FATs */

+	i = (fmt == FS_FAT32) ? 0 : N_ROOTDIR;	/* Number of root directory entries */

+	ST_WORD(tbl+BPB_RootEntCnt, i);

+	if (n_vol < 0x10000) {					/* Number of total sectors */

+		ST_WORD(tbl+BPB_TotSec16, n_vol);

+	} else {

+		ST_DWORD(tbl+BPB_TotSec32, n_vol);

+	}

+	tbl[BPB_Media] = md;					/* Media descriptor */

+	ST_WORD(tbl+BPB_SecPerTrk, 63);			/* Number of sectors per track */

+	ST_WORD(tbl+BPB_NumHeads, 255);			/* Number of heads */

+	ST_DWORD(tbl+BPB_HiddSec, b_vol);		/* Hidden sectors */

+	n = GET_FATTIME();						/* Use current time as VSN */

+	if (fmt == FS_FAT32) {

+		ST_DWORD(tbl+BS_VolID32, n);		/* VSN */

+		ST_DWORD(tbl+BPB_FATSz32, n_fat);	/* Number of sectors per FAT */

+		ST_DWORD(tbl+BPB_RootClus, 2);		/* Root directory start cluster (2) */

+		ST_WORD(tbl+BPB_FSInfo, 1);			/* FSINFO record offset (VBR+1) */

+		ST_WORD(tbl+BPB_BkBootSec, 6);		/* Backup boot record offset (VBR+6) */

+		tbl[BS_DrvNum32] = 0x80;			/* Drive number */

+		tbl[BS_BootSig32] = 0x29;			/* Extended boot signature */

+		mem_cpy(tbl+BS_VolLab32, "NO NAME    " "FAT32   ", 19);	/* Volume label, FAT signature */

+	} else {

+		ST_DWORD(tbl+BS_VolID, n);			/* VSN */

+		ST_WORD(tbl+BPB_FATSz16, n_fat);	/* Number of sectors per FAT */

+		tbl[BS_DrvNum] = 0x80;				/* Drive number */

+		tbl[BS_BootSig] = 0x29;				/* Extended boot signature */

+		mem_cpy(tbl+BS_VolLab, "NO NAME    " "FAT     ", 19);	/* Volume label, FAT signature */

+	}

+	ST_WORD(tbl+BS_55AA, 0xAA55);			/* Signature (Offset is fixed here regardless of sector size) */

+	if (disk_write(pdrv, tbl, b_vol, 1) != RES_OK)	/* Write it to the VBR sector */

+		return FR_DISK_ERR;

+	if (fmt == FS_FAT32)					/* Write backup VBR if needed (VBR+6) */

+		disk_write(pdrv, tbl, b_vol + 6, 1);

+

+	/* Initialize FAT area */

+	wsect = b_fat;

+	for (i = 0; i < N_FATS; i++) {		/* Initialize each FAT copy */

+		mem_set(tbl, 0, SS(fs));			/* 1st sector of the FAT  */

+		n = md;								/* Media descriptor byte */

+		if (fmt != FS_FAT32) {

+			n |= (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00;

+			ST_DWORD(tbl+0, n);				/* Reserve cluster #0-1 (FAT12/16) */

+		} else {

+			n |= 0xFFFFFF00;

+			ST_DWORD(tbl+0, n);				/* Reserve cluster #0-1 (FAT32) */

+			ST_DWORD(tbl+4, 0xFFFFFFFF);

+			ST_DWORD(tbl+8, 0x0FFFFFFF);	/* Reserve cluster #2 for root directory */

+		}

+		if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK)

+			return FR_DISK_ERR;

+		mem_set(tbl, 0, SS(fs));			/* Fill following FAT entries with zero */

+		for (n = 1; n < n_fat; n++) {		/* This loop may take a time on FAT32 volume due to many single sector writes */

+			if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK)

+				return FR_DISK_ERR;

+		}

+	}

+

+	/* Initialize root directory */

+	i = (fmt == FS_FAT32) ? au : (UINT)n_dir;

+	do {

+		if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK)

+			return FR_DISK_ERR;

+	} while (--i);

+

+#if _USE_TRIM	/* Erase data area if needed */

+	{

+		DWORD eb[2];

+

+		eb[0] = wsect; eb[1] = wsect + (n_clst - ((fmt == FS_FAT32) ? 1 : 0)) * au - 1;

+		disk_ioctl(pdrv, CTRL_TRIM, eb);

+	}

+#endif

+

+	/* Create FSINFO if needed */

+	if (fmt == FS_FAT32) {

+		ST_DWORD(tbl+FSI_LeadSig, 0x41615252);

+		ST_DWORD(tbl+FSI_StrucSig, 0x61417272);

+		ST_DWORD(tbl+FSI_Free_Count, n_clst - 1);	/* Number of free clusters */

+		ST_DWORD(tbl+FSI_Nxt_Free, 2);				/* Last allocated cluster# */

+		ST_WORD(tbl+BS_55AA, 0xAA55);

+		disk_write(pdrv, tbl, b_vol + 1, 1);	/* Write original (VBR+1) */

+		disk_write(pdrv, tbl, b_vol + 7, 1);	/* Write backup (VBR+7) */

+	}

+

+	return (disk_ioctl(pdrv, CTRL_SYNC, 0) == RES_OK) ? FR_OK : FR_DISK_ERR;

+}

+

+

+

+#if _MULTI_PARTITION

+/*-----------------------------------------------------------------------*/

+/* Divide Physical Drive                                                 */

+/*-----------------------------------------------------------------------*/

+

+FRESULT f_fdisk (

+	BYTE pdrv,			/* Physical drive number */

+	const DWORD szt[],	/* Pointer to the size table for each partitions */

+	void* work			/* Pointer to the working buffer */

+)

+{

+	UINT i, n, sz_cyl, tot_cyl, b_cyl, e_cyl, p_cyl;

+	BYTE s_hd, e_hd, *p, *buf = (BYTE*)work;

+	DSTATUS stat;

+	DWORD sz_disk, sz_part, s_part;

+

+

+	stat = disk_initialize(pdrv);

+	if (stat & STA_NOINIT) return FR_NOT_READY;

+	if (stat & STA_PROTECT) return FR_WRITE_PROTECTED;

+	if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_disk)) return FR_DISK_ERR;

+

+	/* Determine CHS in the table regardless of the drive geometry */

+	for (n = 16; n < 256 && sz_disk / n / 63 > 1024; n *= 2) ;

+	if (n == 256) n--;

+	e_hd = n - 1;

+	sz_cyl = 63 * n;

+	tot_cyl = sz_disk / sz_cyl;

+

+	/* Create partition table */

+	mem_set(buf, 0, _MAX_SS);

+	p = buf + MBR_Table; b_cyl = 0;

+	for (i = 0; i < 4; i++, p += SZ_PTE) {

+		p_cyl = (szt[i] <= 100U) ? (DWORD)tot_cyl * szt[i] / 100 : szt[i] / sz_cyl;

+		if (!p_cyl) continue;

+		s_part = (DWORD)sz_cyl * b_cyl;

+		sz_part = (DWORD)sz_cyl * p_cyl;

+		if (i == 0) {	/* Exclude first track of cylinder 0 */

+			s_hd = 1;

+			s_part += 63; sz_part -= 63;

+		} else {

+			s_hd = 0;

+		}

+		e_cyl = b_cyl + p_cyl - 1;

+		if (e_cyl >= tot_cyl) return FR_INVALID_PARAMETER;

+

+		/* Set partition table */

+		p[1] = s_hd;						/* Start head */

+		p[2] = (BYTE)((b_cyl >> 2) + 1);	/* Start sector */

+		p[3] = (BYTE)b_cyl;					/* Start cylinder */

+		p[4] = 0x06;						/* System type (temporary setting) */

+		p[5] = e_hd;						/* End head */

+		p[6] = (BYTE)((e_cyl >> 2) + 63);	/* End sector */

+		p[7] = (BYTE)e_cyl;					/* End cylinder */

+		ST_DWORD(p + 8, s_part);			/* Start sector in LBA */

+		ST_DWORD(p + 12, sz_part);			/* Partition size */

+

+		/* Next partition */

+		b_cyl += p_cyl;

+	}

+	ST_WORD(p, 0xAA55);

+

+	/* Write it to the MBR */

+	return (disk_write(pdrv, buf, 0, 1) != RES_OK || disk_ioctl(pdrv, CTRL_SYNC, 0) != RES_OK) ? FR_DISK_ERR : FR_OK;

+}

+

+

+#endif /* _MULTI_PARTITION */

+#endif /* _USE_MKFS && !_FS_READONLY */

+

+

+

+

+#if _USE_STRFUNC

+/*-----------------------------------------------------------------------*/

+/* Get a string from the file                                            */

+/*-----------------------------------------------------------------------*/

+

+TCHAR* f_gets (

+	TCHAR* buff,	/* Pointer to the string buffer to read */

+	int len,		/* Size of string buffer (characters) */

+	FIL* fp			/* Pointer to the file object */

+)

+{

+	int n = 0;

+	TCHAR c, *p = buff;

+	BYTE s[2];

+	UINT rc;

+

+

+	while (n < len - 1) {	/* Read characters until buffer gets filled */

+#if _USE_LFN && _LFN_UNICODE

+#if _STRF_ENCODE == 3		/* Read a character in UTF-8 */

+		f_read(fp, s, 1, &rc);

+		if (rc != 1) break;

+		c = s[0];

+		if (c >= 0x80) {

+			if (c < 0xC0) continue;	/* Skip stray trailer */

+			if (c < 0xE0) {			/* Two-byte sequence */

+				f_read(fp, s, 1, &rc);

+				if (rc != 1) break;

+				c = (c & 0x1F) << 6 | (s[0] & 0x3F);

+				if (c < 0x80) c = '?';

+			} else {

+				if (c < 0xF0) {		/* Three-byte sequence */

+					f_read(fp, s, 2, &rc);

+					if (rc != 2) break;

+					c = c << 12 | (s[0] & 0x3F) << 6 | (s[1] & 0x3F);

+					if (c < 0x800) c = '?';

+				} else {			/* Reject four-byte sequence */

+					c = '?';

+				}

+			}

+		}

+#elif _STRF_ENCODE == 2		/* Read a character in UTF-16BE */

+		f_read(fp, s, 2, &rc);

+		if (rc != 2) break;

+		c = s[1] + (s[0] << 8);

+#elif _STRF_ENCODE == 1		/* Read a character in UTF-16LE */

+		f_read(fp, s, 2, &rc);

+		if (rc != 2) break;

+		c = s[0] + (s[1] << 8);

+#else						/* Read a character in ANSI/OEM */

+		f_read(fp, s, 1, &rc);

+		if (rc != 1) break;

+		c = s[0];

+		if (IsDBCS1(c)) {

+			f_read(fp, s, 1, &rc);

+			if (rc != 1) break;

+			c = (c << 8) + s[0];

+		}

+		c = ff_convert(c, 1);	/* OEM -> Unicode */

+		if (!c) c = '?';

+#endif

+#else						/* Read a character without conversion */

+		f_read(fp, s, 1, &rc);

+		if (rc != 1) break;

+		c = s[0];

+#endif

+		if (_USE_STRFUNC == 2 && c == '\r') continue;	/* Strip '\r' */

+		*p++ = c;

+		n++;

+		if (c == '\n') break;		/* Break on EOL */

+	}

+	*p = 0;

+	return n ? buff : 0;			/* When no data read (eof or error), return with error. */

+}

+

+

+

+#if !_FS_READONLY

+#include <stdarg.h>

+/*-----------------------------------------------------------------------*/

+/* Put a character to the file                                           */

+/*-----------------------------------------------------------------------*/

+

+typedef struct {

+	FIL* fp;

+	int idx, nchr;

+	BYTE buf[64];

+} putbuff;

+

+

+static

+void putc_bfd (

+	putbuff* pb,

+	TCHAR c

+)

+{

+	UINT bw;

+	int i;

+

+

+	if (_USE_STRFUNC == 2 && c == '\n')	 /* LF -> CRLF conversion */

+		putc_bfd(pb, '\r');

+

+	i = pb->idx;	/* Buffer write index (-1:error) */

+	if (i < 0) return;

+

+#if _USE_LFN && _LFN_UNICODE

+#if _STRF_ENCODE == 3			/* Write a character in UTF-8 */

+	if (c < 0x80) {				/* 7-bit */

+		pb->buf[i++] = (BYTE)c;

+	} else {

+		if (c < 0x800) {		/* 11-bit */

+			pb->buf[i++] = (BYTE)(0xC0 | c >> 6);

+		} else {				/* 16-bit */

+			pb->buf[i++] = (BYTE)(0xE0 | c >> 12);

+			pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F));

+		}

+		pb->buf[i++] = (BYTE)(0x80 | (c & 0x3F));

+	}

+#elif _STRF_ENCODE == 2			/* Write a character in UTF-16BE */

+	pb->buf[i++] = (BYTE)(c >> 8);

+	pb->buf[i++] = (BYTE)c;

+#elif _STRF_ENCODE == 1			/* Write a character in UTF-16LE */

+	pb->buf[i++] = (BYTE)c;

+	pb->buf[i++] = (BYTE)(c >> 8);

+#else							/* Write a character in ANSI/OEM */

+	c = ff_convert(c, 0);	/* Unicode -> OEM */

+	if (!c) c = '?';

+	if (c >= 0x100)

+		pb->buf[i++] = (BYTE)(c >> 8);

+	pb->buf[i++] = (BYTE)c;

+#endif

+#else							/* Write a character without conversion */

+	pb->buf[i++] = (BYTE)c;

+#endif

+

+	if (i >= (int)(sizeof pb->buf) - 3) {	/* Write buffered characters to the file */

+		f_write(pb->fp, pb->buf, (UINT)i, &bw);

+		i = (bw == (UINT)i) ? 0 : -1;

+	}

+	pb->idx = i;

+	pb->nchr++;

+}

+

+

+

+int f_putc (

+	TCHAR c,	/* A character to be output */

+	FIL* fp		/* Pointer to the file object */

+)

+{

+	putbuff pb;

+	UINT nw;

+

+

+	pb.fp = fp;			/* Initialize output buffer */

+	pb.nchr = pb.idx = 0;

+

+	putc_bfd(&pb, c);	/* Put a character */

+

+	if (   pb.idx >= 0	/* Flush buffered characters to the file */

+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK

+		&& (UINT)pb.idx == nw) return pb.nchr;

+	return EOF;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Put a string to the file                                              */

+/*-----------------------------------------------------------------------*/

+

+int f_puts (

+	const TCHAR* str,	/* Pointer to the string to be output */

+	FIL* fp				/* Pointer to the file object */

+)

+{

+	putbuff pb;

+	UINT nw;

+

+

+	pb.fp = fp;				/* Initialize output buffer */

+	pb.nchr = pb.idx = 0;

+

+	while (*str)			/* Put the string */

+		putc_bfd(&pb, *str++);

+

+	if (   pb.idx >= 0		/* Flush buffered characters to the file */

+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK

+		&& (UINT)pb.idx == nw) return pb.nchr;

+	return EOF;

+}

+

+

+

+

+/*-----------------------------------------------------------------------*/

+/* Put a formatted string to the file                                    */

+/*-----------------------------------------------------------------------*/

+

+int f_printf (

+	FIL* fp,			/* Pointer to the file object */

+	const TCHAR* fmt,	/* Pointer to the format string */

+	...					/* Optional arguments... */

+)

+{

+	va_list arp;

+	BYTE f, r;

+	UINT nw, i, j, w;

+	DWORD v;

+	TCHAR c, d, s[16], *p;

+	putbuff pb;

+

+

+	pb.fp = fp;				/* Initialize output buffer */

+	pb.nchr = pb.idx = 0;

+

+	va_start(arp, fmt);

+

+	for (;;) {

+		c = *fmt++;

+		if (c == 0) break;			/* End of string */

+		if (c != '%') {				/* Non escape character */

+			putc_bfd(&pb, c);

+			continue;

+		}

+		w = f = 0;

+		c = *fmt++;

+		if (c == '0') {				/* Flag: '0' padding */

+			f = 1; c = *fmt++;

+		} else {

+			if (c == '-') {			/* Flag: left justified */

+				f = 2; c = *fmt++;

+			}

+		}

+		while (IsDigit(c)) {		/* Precision */

+			w = w * 10 + c - '0';

+			c = *fmt++;

+		}

+		if (c == 'l' || c == 'L') {	/* Prefix: Size is long int */

+			f |= 4; c = *fmt++;

+		}

+		if (!c) break;

+		d = c;

+		if (IsLower(d)) d -= 0x20;

+		switch (d) {				/* Type is... */

+		case 'S' :					/* String */

+			p = va_arg(arp, TCHAR*);

+			for (j = 0; p[j]; j++) ;

+			if (!(f & 2)) {

+				while (j++ < w) putc_bfd(&pb, ' ');

+			}

+			while (*p) putc_bfd(&pb, *p++);

+			while (j++ < w) putc_bfd(&pb, ' ');

+			continue;

+		case 'C' :					/* Character */

+			putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue;

+		case 'B' :					/* Binary */

+			r = 2; break;

+		case 'O' :					/* Octal */

+			r = 8; break;

+		case 'D' :					/* Signed decimal */

+		case 'U' :					/* Unsigned decimal */

+			r = 10; break;

+		case 'X' :					/* Hexdecimal */

+			r = 16; break;

+		default:					/* Unknown type (pass-through) */

+			putc_bfd(&pb, c); continue;

+		}

+

+		/* Get an argument and put it in numeral */

+		v = (f & 4) ? (DWORD)va_arg(arp, long) : ((d == 'D') ? (DWORD)(long)va_arg(arp, int) : (DWORD)va_arg(arp, unsigned int));

+		if (d == 'D' && (v & 0x80000000)) {

+			v = 0 - v;

+			f |= 8;

+		}

+		i = 0;

+		do {

+			d = (TCHAR)(v % r); v /= r;

+			if (d > 9) d += (c == 'x') ? 0x27 : 0x07;

+			s[i++] = d + '0';

+		} while (v && i < sizeof s / sizeof s[0]);

+		if (f & 8) s[i++] = '-';

+		j = i; d = (f & 1) ? '0' : ' ';

+		while (!(f & 2) && j++ < w) putc_bfd(&pb, d);

+		do putc_bfd(&pb, s[--i]); while (i);

+		while (j++ < w) putc_bfd(&pb, d);

+	}

+

+	va_end(arp);

+

+	if (   pb.idx >= 0		/* Flush buffered characters to the file */

+		&& f_write(pb.fp, pb.buf, (UINT)pb.idx, &nw) == FR_OK

+		&& (UINT)pb.idx == nw) return pb.nchr;

+	return EOF;

+}

+

+#endif /* !_FS_READONLY */

+#endif /* _USE_STRFUNC */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/ff.h b/testhal/STM32/STM32F4xx/USB_HOST/ff.h
new file mode 100644
index 0000000..5eaad5f
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/ff.h
@@ -0,0 +1,341 @@
+/*---------------------------------------------------------------------------/

+/  FatFs - FAT file system module include file  R0.10c    (C)ChaN, 2014

+/----------------------------------------------------------------------------/

+/ FatFs module is a generic FAT file system module for small embedded systems.

+/ This is a free software that opened for education, research and commercial

+/ developments under license policy of following terms.

+/

+/  Copyright (C) 2014, ChaN, all right reserved.

+/

+/ * The FatFs module is a free software and there is NO WARRANTY.

+/ * No restriction on use. You can use, modify and redistribute it for

+/   personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY.

+/ * Redistributions of source code must retain the above copyright notice.

+/

+/----------------------------------------------------------------------------*/

+

+#ifndef _FATFS

+#define _FATFS	80376	/* Revision ID */

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+

+#include "integer.h"	/* Basic integer types */

+#include "ffconf.h"		/* FatFs configuration options */

+#if _FATFS != _FFCONF

+#error Wrong configuration file (ffconf.h).

+#endif

+

+

+

+/* Definitions of volume management */

+

+#if _MULTI_PARTITION		/* Multiple partition configuration */

+typedef struct {

+	BYTE pd;	/* Physical drive number */

+	BYTE pt;	/* Partition: 0:Auto detect, 1-4:Forced partition) */

+} PARTITION;

+extern PARTITION VolToPart[];	/* Volume - Partition resolution table */

+#define LD2PD(vol) (VolToPart[vol].pd)	/* Get physical drive number */

+#define LD2PT(vol) (VolToPart[vol].pt)	/* Get partition index */

+

+#else							/* Single partition configuration */

+#define LD2PD(vol) (BYTE)(vol)	/* Each logical drive is bound to the same physical drive number */

+#define LD2PT(vol) 0			/* Find first valid partition or in SFD */

+

+#endif

+

+

+

+/* Type of path name strings on FatFs API */

+

+#if _LFN_UNICODE			/* Unicode string */

+#if !_USE_LFN

+#error _LFN_UNICODE must be 0 at non-LFN cfg.

+#endif

+#ifndef _INC_TCHAR

+typedef WCHAR TCHAR;

+#define _T(x) L ## x

+#define _TEXT(x) L ## x

+#endif

+

+#else						/* ANSI/OEM string */

+#ifndef _INC_TCHAR

+typedef char TCHAR;

+#define _T(x) x

+#define _TEXT(x) x

+#endif

+

+#endif

+

+

+

+/* File system object structure (FATFS) */

+

+typedef struct {

+	BYTE	fs_type;		/* FAT sub-type (0:Not mounted) */

+	BYTE	drv;			/* Physical drive number */

+	BYTE	csize;			/* Sectors per cluster (1,2,4...128) */

+	BYTE	n_fats;			/* Number of FAT copies (1 or 2) */

+	BYTE	wflag;			/* win[] flag (b0:dirty) */

+	BYTE	fsi_flag;		/* FSINFO flags (b7:disabled, b0:dirty) */

+	WORD	id;				/* File system mount ID */

+	WORD	n_rootdir;		/* Number of root directory entries (FAT12/16) */

+#if _MAX_SS != _MIN_SS

+	WORD	ssize;			/* Bytes per sector (512, 1024, 2048 or 4096) */

+#endif

+#if _FS_REENTRANT

+	_SYNC_t	sobj;			/* Identifier of sync object */

+#endif

+#if !_FS_READONLY

+	DWORD	last_clust;		/* Last allocated cluster */

+	DWORD	free_clust;		/* Number of free clusters */

+#endif

+#if _FS_RPATH

+	DWORD	cdir;			/* Current directory start cluster (0:root) */

+#endif

+	DWORD	n_fatent;		/* Number of FAT entries, = number of clusters + 2 */

+	DWORD	fsize;			/* Sectors per FAT */

+	DWORD	volbase;		/* Volume start sector */

+	DWORD	fatbase;		/* FAT start sector */

+	DWORD	dirbase;		/* Root directory start sector (FAT32:Cluster#) */

+	DWORD	database;		/* Data start sector */

+	DWORD	winsect;		/* Current sector appearing in the win[] */

+	BYTE	win[_MAX_SS];	/* Disk access window for Directory, FAT (and file data at tiny cfg) */

+} FATFS;

+

+

+

+/* File object structure (FIL) */

+

+typedef struct {

+	FATFS*	fs;				/* Pointer to the related file system object (**do not change order**) */

+	WORD	id;				/* Owner file system mount ID (**do not change order**) */

+	BYTE	flag;			/* Status flags */

+	BYTE	err;			/* Abort flag (error code) */

+	DWORD	fptr;			/* File read/write pointer (Zeroed on file open) */

+	DWORD	fsize;			/* File size */

+	DWORD	sclust;			/* File start cluster (0:no cluster chain, always 0 when fsize is 0) */

+	DWORD	clust;			/* Current cluster of fpter (not valid when fprt is 0) */

+	DWORD	dsect;			/* Sector number appearing in buf[] (0:invalid) */

+#if !_FS_READONLY

+	DWORD	dir_sect;		/* Sector number containing the directory entry */

+	BYTE*	dir_ptr;		/* Pointer to the directory entry in the win[] */

+#endif

+#if _USE_FASTSEEK

+	DWORD*	cltbl;			/* Pointer to the cluster link map table (Nulled on file open) */

+#endif

+#if _FS_LOCK

+	UINT	lockid;			/* File lock ID origin from 1 (index of file semaphore table Files[]) */

+#endif

+#if !_FS_TINY

+	BYTE	buf[_MAX_SS];	/* File private data read/write window */

+#endif

+} FIL;

+

+

+

+/* Directory object structure (DIR) */

+

+typedef struct {

+	FATFS*	fs;				/* Pointer to the owner file system object (**do not change order**) */

+	WORD	id;				/* Owner file system mount ID (**do not change order**) */

+	WORD	index;			/* Current read/write index number */

+	DWORD	sclust;			/* Table start cluster (0:Root dir) */

+	DWORD	clust;			/* Current cluster */

+	DWORD	sect;			/* Current sector */

+	BYTE*	dir;			/* Pointer to the current SFN entry in the win[] */

+	BYTE*	fn;				/* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */

+#if _FS_LOCK

+	UINT	lockid;			/* File lock ID (index of file semaphore table Files[]) */

+#endif

+#if _USE_LFN

+	WCHAR*	lfn;			/* Pointer to the LFN working buffer */

+	WORD	lfn_idx;		/* Last matched LFN index number (0xFFFF:No LFN) */

+#endif

+} DIR;

+

+

+

+/* File status structure (FILINFO) */

+

+typedef struct {

+	DWORD	fsize;			/* File size */

+	WORD	fdate;			/* Last modified date */

+	WORD	ftime;			/* Last modified time */

+	BYTE	fattrib;		/* Attribute */

+	TCHAR	fname[13];		/* Short file name (8.3 format) */

+#if _USE_LFN

+	TCHAR*	lfname;			/* Pointer to the LFN buffer */

+	UINT 	lfsize;			/* Size of LFN buffer in TCHAR */

+#endif

+} FILINFO;

+

+

+

+/* File function return code (FRESULT) */

+

+typedef enum {

+	FR_OK = 0,				/* (0) Succeeded */

+	FR_DISK_ERR,			/* (1) A hard error occurred in the low level disk I/O layer */

+	FR_INT_ERR,				/* (2) Assertion failed */

+	FR_NOT_READY,			/* (3) The physical drive cannot work */

+	FR_NO_FILE,				/* (4) Could not find the file */

+	FR_NO_PATH,				/* (5) Could not find the path */

+	FR_INVALID_NAME,		/* (6) The path name format is invalid */

+	FR_DENIED,				/* (7) Access denied due to prohibited access or directory full */

+	FR_EXIST,				/* (8) Access denied due to prohibited access */

+	FR_INVALID_OBJECT,		/* (9) The file/directory object is invalid */

+	FR_WRITE_PROTECTED,		/* (10) The physical drive is write protected */

+	FR_INVALID_DRIVE,		/* (11) The logical drive number is invalid */

+	FR_NOT_ENABLED,			/* (12) The volume has no work area */

+	FR_NO_FILESYSTEM,		/* (13) There is no valid FAT volume */

+	FR_MKFS_ABORTED,		/* (14) The f_mkfs() aborted due to any parameter error */

+	FR_TIMEOUT,				/* (15) Could not get a grant to access the volume within defined period */

+	FR_LOCKED,				/* (16) The operation is rejected according to the file sharing policy */

+	FR_NOT_ENOUGH_CORE,		/* (17) LFN working buffer could not be allocated */

+	FR_TOO_MANY_OPEN_FILES,	/* (18) Number of open files > _FS_SHARE */

+	FR_INVALID_PARAMETER	/* (19) Given parameter is invalid */

+} FRESULT;

+

+

+

+/*--------------------------------------------------------------*/

+/* FatFs module application interface                           */

+

+FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode);				/* Open or create a file */

+FRESULT f_close (FIL* fp);											/* Close an open file object */

+FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br);			/* Read data from a file */

+FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw);	/* Write data to a file */

+FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf);	/* Forward data to the stream */

+FRESULT f_lseek (FIL* fp, DWORD ofs);								/* Move file pointer of a file object */

+FRESULT f_truncate (FIL* fp);										/* Truncate file */

+FRESULT f_sync (FIL* fp);											/* Flush cached data of a writing file */

+FRESULT f_opendir (DIR* dp, const TCHAR* path);						/* Open a directory */

+FRESULT f_closedir (DIR* dp);										/* Close an open directory */

+FRESULT f_readdir (DIR* dp, FILINFO* fno);							/* Read a directory item */

+FRESULT f_mkdir (const TCHAR* path);								/* Create a sub directory */

+FRESULT f_unlink (const TCHAR* path);								/* Delete an existing file or directory */

+FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new);	/* Rename/Move a file or directory */

+FRESULT f_stat (const TCHAR* path, FILINFO* fno);					/* Get file status */

+FRESULT f_chmod (const TCHAR* path, BYTE value, BYTE mask);			/* Change attribute of the file/dir */

+FRESULT f_utime (const TCHAR* path, const FILINFO* fno);			/* Change times-tamp of the file/dir */

+FRESULT f_chdir (const TCHAR* path);								/* Change current directory */

+FRESULT f_chdrive (const TCHAR* path);								/* Change current drive */

+FRESULT f_getcwd (TCHAR* buff, UINT len);							/* Get current directory */

+FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs);	/* Get number of free clusters on the drive */

+FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn);	/* Get volume label */

+FRESULT f_setlabel (const TCHAR* label);							/* Set volume label */

+FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt);			/* Mount/Unmount a logical drive */

+FRESULT f_mkfs (const TCHAR* path, BYTE sfd, UINT au);				/* Create a file system on the volume */

+FRESULT f_fdisk (BYTE pdrv, const DWORD szt[], void* work);			/* Divide a physical drive into some partitions */

+int f_putc (TCHAR c, FIL* fp);										/* Put a character to the file */

+int f_puts (const TCHAR* str, FIL* cp);								/* Put a string to the file */

+int f_printf (FIL* fp, const TCHAR* str, ...);						/* Put a formatted string to the file */

+TCHAR* f_gets (TCHAR* buff, int len, FIL* fp);						/* Get a string from the file */

+

+#define f_eof(fp) ((int)((fp)->fptr == (fp)->fsize))

+#define f_error(fp) ((fp)->err)

+#define f_tell(fp) ((fp)->fptr)

+#define f_size(fp) ((fp)->fsize)

+

+#ifndef EOF

+#define EOF (-1)

+#endif

+

+

+

+

+/*--------------------------------------------------------------*/

+/* Additional user defined functions                            */

+

+/* RTC function */

+#if !_FS_READONLY && !_FS_NORTC

+DWORD get_fattime (void);

+#endif

+

+/* Unicode support functions */

+#if _USE_LFN							/* Unicode - OEM code conversion */

+WCHAR ff_convert (WCHAR chr, UINT dir);	/* OEM-Unicode bidirectional conversion */

+WCHAR ff_wtoupper (WCHAR chr);			/* Unicode upper-case conversion */

+#if _USE_LFN == 3						/* Memory functions */

+void* ff_memalloc (UINT msize);			/* Allocate memory block */

+void ff_memfree (void* mblock);			/* Free memory block */

+#endif

+#endif

+

+/* Sync functions */

+#if _FS_REENTRANT

+int ff_cre_syncobj (BYTE vol, _SYNC_t* sobj);	/* Create a sync object */

+int ff_req_grant (_SYNC_t sobj);				/* Lock sync object */

+void ff_rel_grant (_SYNC_t sobj);				/* Unlock sync object */

+int ff_del_syncobj (_SYNC_t sobj);				/* Delete a sync object */

+#endif

+

+

+

+

+/*--------------------------------------------------------------*/

+/* Flags and offset address                                     */

+

+

+/* File access control and file status flags (FIL.flag) */

+

+#define	FA_READ				0x01

+#define	FA_OPEN_EXISTING	0x00

+

+#if !_FS_READONLY

+#define	FA_WRITE			0x02

+#define	FA_CREATE_NEW		0x04

+#define	FA_CREATE_ALWAYS	0x08

+#define	FA_OPEN_ALWAYS		0x10

+#define FA__WRITTEN			0x20

+#define FA__DIRTY			0x40

+#endif

+

+

+/* FAT sub type (FATFS.fs_type) */

+

+#define FS_FAT12	1

+#define FS_FAT16	2

+#define FS_FAT32	3

+

+

+/* File attribute bits for directory entry */

+

+#define	AM_RDO	0x01	/* Read only */

+#define	AM_HID	0x02	/* Hidden */

+#define	AM_SYS	0x04	/* System */

+#define	AM_VOL	0x08	/* Volume label */

+#define AM_LFN	0x0F	/* LFN entry */

+#define AM_DIR	0x10	/* Directory */

+#define AM_ARC	0x20	/* Archive */

+#define AM_MASK	0x3F	/* Mask of defined bits */

+

+

+/* Fast seek feature */

+#define CREATE_LINKMAP	0xFFFFFFFF

+

+

+

+/*--------------------------------*/

+/* Multi-byte word access macros  */

+

+#if _WORD_ACCESS == 1	/* Enable word access to the FAT structure */

+#define	LD_WORD(ptr)		(WORD)(*(WORD*)(BYTE*)(ptr))

+#define	LD_DWORD(ptr)		(DWORD)(*(DWORD*)(BYTE*)(ptr))

+#define	ST_WORD(ptr,val)	*(WORD*)(BYTE*)(ptr)=(WORD)(val)

+#define	ST_DWORD(ptr,val)	*(DWORD*)(BYTE*)(ptr)=(DWORD)(val)

+#else					/* Use byte-by-byte access to the FAT structure */

+#define	LD_WORD(ptr)		(WORD)(((WORD)*((BYTE*)(ptr)+1)<<8)|(WORD)*(BYTE*)(ptr))

+#define	LD_DWORD(ptr)		(DWORD)(((DWORD)*((BYTE*)(ptr)+3)<<24)|((DWORD)*((BYTE*)(ptr)+2)<<16)|((WORD)*((BYTE*)(ptr)+1)<<8)|*(BYTE*)(ptr))

+#define	ST_WORD(ptr,val)	*(BYTE*)(ptr)=(BYTE)(val); *((BYTE*)(ptr)+1)=(BYTE)((WORD)(val)>>8)

+#define	ST_DWORD(ptr,val)	*(BYTE*)(ptr)=(BYTE)(val); *((BYTE*)(ptr)+1)=(BYTE)((WORD)(val)>>8); *((BYTE*)(ptr)+2)=(BYTE)((DWORD)(val)>>16); *((BYTE*)(ptr)+3)=(BYTE)((DWORD)(val)>>24)

+#endif

+

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _FATFS */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/ffconf.h b/testhal/STM32/STM32F4xx/USB_HOST/ffconf.h
new file mode 100644
index 0000000..0ae6f01
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/ffconf.h
@@ -0,0 +1,271 @@
+/*---------------------------------------------------------------------------/

+/  FatFs - FAT file system module configuration file  R0.10c (C)ChaN, 2014

+/---------------------------------------------------------------------------*/

+#include "ch.h"

+

+#define _FFCONF 80376	/* Revision ID */

+

+/*---------------------------------------------------------------------------/

+/ Functions and Buffer Configurations

+/---------------------------------------------------------------------------*/

+

+#define	_FS_TINY		0

+/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)

+/  At the tiny configuration, size of the file object (FIL) is reduced _MAX_SS

+/  bytes. Instead of private sector buffer eliminated from the file object,

+/  common sector buffer in the file system object (FATFS) is used for the file

+/  data transfer. */

+

+

+#define _FS_READONLY	0

+/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)

+/  Read-only configuration removes basic writing API functions, f_write(),

+/  f_sync(), f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(),

+/  f_getfree() and optional writing functions as well. */

+

+

+#define _FS_MINIMIZE	0

+/* This option defines minimization level to remove some API functions.

+/

+/   0: All basic functions are enabled.

+/   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_chmod(), f_utime(),

+/      f_truncate() and f_rename() function are removed.

+/   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.

+/   3: f_lseek() function is removed in addition to 2. */

+

+

+#define	_USE_STRFUNC	0

+/* This option switches string functions, f_gets(), f_putc(), f_puts() and

+/  f_printf().

+/

+/  0: Disable string functions.

+/  1: Enable without LF-CRLF conversion.

+/  2: Enable with LF-CRLF conversion. */

+

+

+#define	_USE_MKFS		0

+/* This option switches f_mkfs() function. (0:Disable or 1:Enable)

+/  To enable it, also _FS_READONLY need to be set to 0. */

+

+

+#define	_USE_FASTSEEK	0

+/* This option switches fast seek feature. (0:Disable or 1:Enable) */

+

+

+#define _USE_LABEL		0

+/* This option switches volume label functions, f_getlabel() and f_setlabel().

+/  (0:Disable or 1:Enable) */

+

+

+#define	_USE_FORWARD	0

+/* This option switches f_forward() function. (0:Disable or 1:Enable) */

+/* To enable it, also _FS_TINY need to be set to 1. */

+

+

+/*---------------------------------------------------------------------------/

+/ Locale and Namespace Configurations

+/---------------------------------------------------------------------------*/

+

+#define _CODE_PAGE	437

+/* This option specifies the OEM code page to be used on the target system.

+/  Incorrect setting of the code page can cause a file open failure.

+/

+/   932  - Japanese Shift_JIS (DBCS, OEM, Windows)

+/   936  - Simplified Chinese GBK (DBCS, OEM, Windows)

+/   949  - Korean (DBCS, OEM, Windows)

+/   950  - Traditional Chinese Big5 (DBCS, OEM, Windows)

+/   1250 - Central Europe (Windows)

+/   1251 - Cyrillic (Windows)

+/   1252 - Latin 1 (Windows)

+/   1253 - Greek (Windows)

+/   1254 - Turkish (Windows)

+/   1255 - Hebrew (Windows)

+/   1256 - Arabic (Windows)

+/   1257 - Baltic (Windows)

+/   1258 - Vietnam (OEM, Windows)

+/   437  - U.S. (OEM)

+/   720  - Arabic (OEM)

+/   737  - Greek (OEM)

+/   775  - Baltic (OEM)

+/   850  - Multilingual Latin 1 (OEM)

+/   858  - Multilingual Latin 1 + Euro (OEM)

+/   852  - Latin 2 (OEM)

+/   855  - Cyrillic (OEM)

+/   866  - Russian (OEM)

+/   857  - Turkish (OEM)

+/   862  - Hebrew (OEM)

+/   874  - Thai (OEM, Windows)

+/   1    - ASCII (No extended character. Valid for only non-LFN configuration.) */

+

+

+#define	_USE_LFN	0

+#define	_MAX_LFN	255

+/* The _USE_LFN option switches the LFN feature.

+/

+/   0: Disable LFN feature. _MAX_LFN has no effect.

+/   1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.

+/   2: Enable LFN with dynamic working buffer on the STACK.

+/   3: Enable LFN with dynamic working buffer on the HEAP.

+/

+/  When enable the LFN feature, Unicode handling functions (option/unicode.c) must

+/  be added to the project. The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes.

+/  When use stack for the working buffer, take care on stack overflow. When use heap

+/  memory for the working buffer, memory management functions, ff_memalloc() and

+/  ff_memfree(), must be added to the project. */

+

+

+#define	_LFN_UNICODE	0

+/* This option switches character encoding on the API. (0:ANSI/OEM or 1:Unicode)

+/  To use Unicode string for the path name, enable LFN feature and set _LFN_UNICODE

+/  to 1. This option also affects behavior of string I/O functions. */

+

+

+#define _STRF_ENCODE	3

+/* When _LFN_UNICODE is 1, this option selects the character encoding on the file to

+/  be read/written via string I/O functions, f_gets(), f_putc(), f_puts and f_printf().

+/

+/  0: ANSI/OEM

+/  1: UTF-16LE

+/  2: UTF-16BE

+/  3: UTF-8

+/

+/  When _LFN_UNICODE is 0, this option has no effect. */

+

+

+#define _FS_RPATH	0

+/* This option configures relative path feature.

+/

+/   0: Disable relative path feature and remove related functions.

+/   1: Enable relative path feature. f_chdir() and f_chdrive() are available.

+/   2: f_getcwd() function is available in addition to 1.

+/

+/  Note that directory items read via f_readdir() are affected by this option. */

+

+

+/*---------------------------------------------------------------------------/

+/ Drive/Volume Configurations

+/---------------------------------------------------------------------------*/

+

+#define _VOLUMES	1

+/* Number of volumes (logical drives) to be used. */

+

+

+#define _STR_VOLUME_ID	0

+#define _VOLUME_STRS	"RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3"

+/* _STR_VOLUME_ID option switches string volume ID feature.

+/  When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive

+/  number in the path name. _VOLUME_STRS defines the drive ID strings for each

+/  logical drives. Number of items must be equal to _VOLUMES. Valid characters for

+/  the drive ID strings are: A-Z and 0-9. */

+

+

+#define	_MULTI_PARTITION	0

+/* This option switches multi-partition feature. By default (0), each logical drive

+/  number is bound to the same physical drive number and only an FAT volume found on

+/  the physical drive will be mounted. When multi-partition feature is enabled (1),

+/  each logical drive number is bound to arbitrary physical drive and partition

+/  listed in the VolToPart[]. Also f_fdisk() funciton will be enabled. */

+

+

+#define	_MIN_SS		512

+#define	_MAX_SS		512

+/* These options configure the range of sector size to be supported. (512, 1024,

+/  2048 or 4096) Always set both 512 for most systems, all type of memory cards and

+/  harddisk. But a larger value may be required for on-board flash memory and some

+/  type of optical media. When _MAX_SS is larger than _MIN_SS, FatFs is configured

+/  to variable sector size and GET_SECTOR_SIZE command must be implemented to the

+/  disk_ioctl() function. */

+

+

+#define	_USE_TRIM	0

+/* This option switches ATA-TRIM feature. (0:Disable or 1:Enable)

+/  To enable Trim feature, also CTRL_TRIM command should be implemented to the

+/  disk_ioctl() function. */

+

+

+#define _FS_NOFSINFO	0

+/* If you need to know correct free space on the FAT32 volume, set bit 0 of this

+/  option, and f_getfree() function at first time after volume mount will force

+/  a full FAT scan. Bit 1 controls the use of last allocated cluster number.

+/

+/  bit0=0: Use free cluster count in the FSINFO if available.

+/  bit0=1: Do not trust free cluster count in the FSINFO.

+/  bit1=0: Use last allocated cluster number in the FSINFO if available.

+/  bit1=1: Do not trust last allocated cluster number in the FSINFO.

+*/

+

+

+

+/*---------------------------------------------------------------------------/

+/ System Configurations

+/---------------------------------------------------------------------------*/

+

+#define _FS_NORTC	0

+#define _NORTC_MON	11

+#define _NORTC_MDAY	9

+#define _NORTC_YEAR	2014

+/* The _FS_NORTC option switches timestamp feature. If the system does not have

+/  an RTC function or valid timestamp is not needed, set _FS_NORTC to 1 to disable

+/  the timestamp feature. All objects modified by FatFs will have a fixed timestamp

+/  defined by _NORTC_MON, _NORTC_MDAY and _NORTC_YEAR.

+/  When timestamp feature is enabled (_FS_NORTC	== 0), get_fattime() function need

+/  to be added to the project to read current time form RTC. _NORTC_MON,

+/  _NORTC_MDAY and _NORTC_YEAR have no effect. 

+/  These options have no effect at read-only configuration (_FS_READONLY == 1). */

+

+

+#define	_FS_LOCK	0

+/* The _FS_LOCK option switches file lock feature to control duplicated file open

+/  and illegal operation to open objects. This option must be 0 when _FS_READONLY

+/  is 1.

+/

+/  0:  Disable file lock feature. To avoid volume corruption, application program

+/      should avoid illegal open, remove and rename to the open objects.

+/  >0: Enable file lock feature. The value defines how many files/sub-directories

+/      can be opened simultaneously under file lock control. Note that the file

+/      lock feature is independent of re-entrancy. */

+

+

+#define _FS_REENTRANT	0

+#define _FS_TIMEOUT		S2ST(10)

+typedef	semaphore_t * 	_SYNC_t;

+/* The _FS_REENTRANT option switches the re-entrancy (thread safe) of the FatFs

+/  module itself. Note that regardless of this option, file access to different

+/  volume is always re-entrant and volume control functions, f_mount(), f_mkfs()

+/  and f_fdisk() function, are always not re-entrant. Only file/directory access

+/  to the same volume is under control of this feature.

+/

+/   0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.

+/   1: Enable re-entrancy. Also user provided synchronization handlers,

+/      ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()

+/      function, must be added to the project. Samples are available in

+/      option/syscall.c.

+/

+/  The _FS_TIMEOUT defines timeout period in unit of time tick.

+/  The _SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,

+/  SemaphoreHandle_t and etc.. */

+

+

+#define _WORD_ACCESS	0

+/* The _WORD_ACCESS option is an only platform dependent option. It defines

+/  which access method is used to the word data on the FAT volume.

+/

+/   0: Byte-by-byte access. Always compatible with all platforms.

+/   1: Word access. Do not choose this unless under both the following conditions.

+/

+/  * Address misaligned memory access is always allowed to ALL instructions.

+/  * Byte order on the memory is little-endian.

+/

+/  If it is the case, _WORD_ACCESS can also be set to 1 to reduce code size.

+/  Following table shows allowable settings of some processor types.

+/

+/   ARM7TDMI    0           ColdFire    0           V850E       0

+/   Cortex-M3   0           Z80         0/1         V850ES      0/1

+/   Cortex-M0   0           x86         0/1         TLCS-870    0/1

+/   AVR         0/1         RX600(LE)   0/1         TLCS-900    0/1

+/   AVR32       0           RL78        0           R32C        0

+/   PIC18       0/1         SH-2        0           M16C        0/1

+/   PIC24       0           H8S         0           MSP430      0

+/   PIC32       0           H8/300H     0           8051        0/1

+*/

+

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/halconf.h b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h
new file mode 100644
index 0000000..332a95a
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/halconf.h
@@ -0,0 +1,343 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+/**

+ * @file    templates/halconf.h

+ * @brief   HAL configuration header.

+ * @details HAL configuration file, this file allows to enable or disable the

+ *          various device drivers from your application. You may also use

+ *          this file in order to override the device drivers default settings.

+ *

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+#include "mcuconf.h"

+

+/**

+ * @brief   Enables the PAL subsystem.

+ */

+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

+#define HAL_USE_PAL                 TRUE

+#endif

+

+/**

+ * @brief   Enables the ADC subsystem.

+ */

+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

+#define HAL_USE_ADC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the CAN subsystem.

+ */

+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

+#define HAL_USE_CAN                 FALSE

+#endif

+

+/**

+ * @brief   Enables the DAC subsystem.

+ */

+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

+#define HAL_USE_DAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the EXT subsystem.

+ */

+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

+#define HAL_USE_EXT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the GPT subsystem.

+ */

+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

+#define HAL_USE_GPT                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2C subsystem.

+ */

+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

+#define HAL_USE_I2C                 FALSE

+#endif

+

+/**

+ * @brief   Enables the I2S subsystem.

+ */

+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

+#define HAL_USE_I2S                 FALSE

+#endif

+

+/**

+ * @brief   Enables the ICU subsystem.

+ */

+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

+#define HAL_USE_ICU                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MAC subsystem.

+ */

+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

+#define HAL_USE_MAC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the MMC_SPI subsystem.

+ */

+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_MMC_SPI             FALSE

+#endif

+

+/**

+ * @brief   Enables the PWM subsystem.

+ */

+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

+#define HAL_USE_PWM                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RTC subsystem.

+ */

+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

+#define HAL_USE_RTC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SDC subsystem.

+ */

+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

+#define HAL_USE_SDC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the SERIAL subsystem.

+ */

+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL              TRUE

+#endif

+

+/**

+ * @brief   Enables the SERIAL over USB subsystem.

+ */

+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

+#define HAL_USE_SERIAL_USB          FALSE

+#endif

+

+/**

+ * @brief   Enables the SPI subsystem.

+ */

+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

+#define HAL_USE_SPI                 FALSE

+#endif

+

+/**

+ * @brief   Enables the UART subsystem.

+ */

+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

+#define HAL_USE_UART                FALSE

+#endif

+

+/**

+ * @brief   Enables the USB subsystem.

+ */

+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

+#define HAL_USE_USB                 FALSE

+#endif

+

+/**

+ * @brief   Enables the WDG subsystem.

+ */

+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

+#define HAL_USE_WDG                 FALSE

+#endif

+

+/*===========================================================================*/

+/* ADC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)

+#define ADC_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define ADC_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* CAN driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Sleep mode related APIs inclusion switch.

+ */

+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)

+#define CAN_USE_SLEEP_MODE          TRUE

+#endif

+

+/*===========================================================================*/

+/* I2C driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the mutual exclusion APIs on the I2C bus.

+ */

+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define I2C_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+/*===========================================================================*/

+/* MAC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)

+#define MAC_USE_ZERO_COPY           FALSE

+#endif

+

+/**

+ * @brief   Enables an event sources for incoming packets.

+ */

+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)

+#define MAC_USE_EVENTS              TRUE

+#endif

+

+/*===========================================================================*/

+/* MMC_SPI driver related settings.                                          */

+/*===========================================================================*/

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ *          This option is recommended also if the SPI driver does not

+ *          use a DMA channel and heavily loads the CPU.

+ */

+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)

+#define MMC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SDC driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Number of initialization attempts before rejecting the card.

+ * @note    Attempts are performed at 10mS intervals.

+ */

+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)

+#define SDC_INIT_RETRY              100

+#endif

+

+/**

+ * @brief   Include support for MMC cards.

+ * @note    MMC support is not yet implemented so this option must be kept

+ *          at @p FALSE.

+ */

+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)

+#define SDC_MMC_SUPPORT             FALSE

+#endif

+

+/**

+ * @brief   Delays insertions.

+ * @details If enabled this options inserts delays into the MMC waiting

+ *          routines releasing some extra CPU time for the threads with

+ *          lower priority, this may slow down the driver a bit however.

+ */

+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)

+#define SDC_NICE_WAITING            TRUE

+#endif

+

+/*===========================================================================*/

+/* SERIAL driver related settings.                                           */

+/*===========================================================================*/

+

+/**

+ * @brief   Default bit rate.

+ * @details Configuration parameter, this is the baud rate selected for the

+ *          default configuration.

+ */

+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)

+#define SERIAL_DEFAULT_BITRATE      115200

+#endif

+

+/**

+ * @brief   Serial buffers size.

+ * @details Configuration parameter, you can change the depth of the queue

+ *          buffers depending on the requirements of your application.

+ * @note    The default is 64 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_BUFFERS_SIZE         64

+#endif

+

+/*===========================================================================*/

+/* SERIAL_USB driver related setting.                                        */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial over USB buffers size.

+ * @details Configuration parameter, the buffer size must be a multiple of

+ *          the USB data endpoint maximum packet size.

+ * @note    The default is 64 bytes for both the transmission and receive

+ *          buffers.

+ */

+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)

+#define SERIAL_USB_BUFFERS_SIZE     256

+#endif

+

+/*===========================================================================*/

+/* SPI driver related settings.                                              */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables synchronous APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)

+#define SPI_USE_WAIT                TRUE

+#endif

+

+/**

+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define SPI_USE_MUTUAL_EXCLUSION    TRUE

+#endif

+

+#include "halconf_community.h"

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/halconf_community.h b/testhal/STM32/STM32F4xx/USB_HOST/halconf_community.h
new file mode 100644
index 0000000..7ea0e06
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/halconf_community.h
@@ -0,0 +1,195 @@
+/*

+    ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _HALCONF_COMMUNITY_H_

+#define _HALCONF_COMMUNITY_H_

+

+/**

+ * @brief   Enables the community overlay.

+ */

+#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)

+#define HAL_USE_COMMUNITY           TRUE

+#endif

+

+/**

+ * @brief   Enables the FSMC subsystem.

+ */

+#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)

+#define HAL_USE_FSMC                FALSE

+#endif

+

+/**

+ * @brief   Enables the NAND subsystem.

+ */

+#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)

+#define HAL_USE_NAND                FALSE

+#endif

+

+/**

+ * @brief   Enables the 1-wire subsystem.

+ */

+#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)

+#define HAL_USE_ONEWIRE             FALSE

+#endif

+

+/**

+ * @brief   Enables the EICU subsystem.

+ */

+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)

+#define HAL_USE_EICU                FALSE

+#endif

+

+/**

+ * @brief   Enables the CRC subsystem.

+ */

+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)

+#define HAL_USE_CRC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the IWDG subsystem.

+ */

+#if !defined(HAL_USE_IWDG) || defined(__DOXYGEN__)

+#define HAL_USE_IWDG               FALSE

+#endif

+

+/**

+ * @brief   Enables the TIMCAP subsystem.

+ */

+#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)

+#define HAL_USE_TIMCAP            FALSE

+#endif

+

+/**

+ * @brief   Enables the USBH subsystem.

+ */

+#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)

+#define HAL_USE_USBH                 TRUE

+#endif

+

+

+/*===========================================================================*/

+/* USBH driver related settings.                                         */

+/*===========================================================================*/

+

+/* main driver */

+#define HAL_USBH_PORT_DEBOUNCE_TIME					200

+#define HAL_USBH_PORT_RESET_TIMEOUT					500

+#define HAL_USBH_DEVICE_ADDRESS_STABILIZATION		20

+

+/* MSD */

+#define HAL_USBH_USE_MSD					1

+

+#define HAL_USBHMSD_MAX_LUNS				1

+#define HAL_USBHMSD_MAX_INSTANCES			1

+

+/* IAD */

+#define HAL_USBH_USE_FTDI					1

+

+#define HAL_USBHFTDI_MAX_PORTS				1

+#define HAL_USBHFTDI_MAX_INSTANCES			1

+#define HAL_USBHFTDI_DEFAULT_SPEED			9600

+#define HAL_USBHFTDI_DEFAULT_FRAMING		(USBHFTDI_FRAMING_DATABITS_8 | USBHFTDI_FRAMING_PARITY_NONE | USBHFTDI_FRAMING_STOP_BITS_1)

+#define HAL_USBHFTDI_DEFAULT_HANDSHAKE		USBHFTDI_HANDSHAKE_NONE

+#define HAL_USBHFTDI_DEFAULT_XON			0x11

+#define HAL_USBHFTDI_DEFAULT_XOFF			0x13

+

+

+/* IAD */

+#define HAL_USBH_USE_IAD					0

+

+/* UVC */

+#define HAL_USBH_USE_UVC					0

+

+#define HAL_USBHUVC_MAX_INSTANCES			1

+#define HAL_USBHUVC_MAX_MAILBOX_SZ			70

+#define HAL_USBHUVC_WORK_RAM_SIZE			20000

+#define HAL_USBHUVC_STATUS_PACKETS_COUNT	10

+

+

+/* HUB */

+#define HAL_USBH_USE_HUB					1

+

+#define HAL_USBHHUB_MAX_INSTANCES			1

+#define HAL_USBHHUB_MAX_PORTS				6

+

+

+/* debug */

+#define USBH_DEBUG_ENABLE					1

+#define USBH_DEBUG_USBHD					USBHD1

+#define USBH_DEBUG_SD						SD2

+#define USBH_DEBUG_BUFFER					25000

+

+#define USBH_DEBUG_ENABLE_TRACE				0

+#define USBH_DEBUG_ENABLE_INFO				1

+#define USBH_DEBUG_ENABLE_WARNINGS			1

+#define USBH_DEBUG_ENABLE_ERRORS			1

+

+#define USBH_LLD_DEBUG_ENABLE_TRACE			0

+#define USBH_LLD_DEBUG_ENABLE_INFO			1

+#define USBH_LLD_DEBUG_ENABLE_WARNINGS		1

+#define USBH_LLD_DEBUG_ENABLE_ERRORS		1

+

+#define USBHHUB_DEBUG_ENABLE_TRACE			0

+#define USBHHUB_DEBUG_ENABLE_INFO			1

+#define USBHHUB_DEBUG_ENABLE_WARNINGS		1

+#define USBHHUB_DEBUG_ENABLE_ERRORS			1

+

+#define USBHMSD_DEBUG_ENABLE_TRACE			0

+#define USBHMSD_DEBUG_ENABLE_INFO			1

+#define USBHMSD_DEBUG_ENABLE_WARNINGS		1

+#define USBHMSD_DEBUG_ENABLE_ERRORS			1

+

+#define USBHUVC_DEBUG_ENABLE_TRACE			0

+#define USBHUVC_DEBUG_ENABLE_INFO			1

+#define USBHUVC_DEBUG_ENABLE_WARNINGS		1

+#define USBHUVC_DEBUG_ENABLE_ERRORS			1

+

+#define USBHFTDI_DEBUG_ENABLE_TRACE			0

+#define USBHFTDI_DEBUG_ENABLE_INFO			1

+#define USBHFTDI_DEBUG_ENABLE_WARNINGS		1

+#define USBHFTDI_DEBUG_ENABLE_ERRORS		1

+

+/*===========================================================================*/

+/* FSMCNAND driver related settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.

+ * @note    Disabling this option saves both code and data space.

+ */

+#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)

+#define NAND_USE_MUTUAL_EXCLUSION   TRUE

+#endif

+

+/*===========================================================================*/

+/* 1-wire driver related settings.                                           */

+/*===========================================================================*/

+/**

+ * @brief   Enables strong pull up feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_STRONG_PULLUP   FALSE

+

+/**

+ * @brief   Enables search ROM feature.

+ * @note    Disabling this option saves both code and data space.

+ */

+#define ONEWIRE_USE_SEARCH_ROM      TRUE

+

+#endif /* _HALCONF_COMMUNITY_H_ */

+

+/** @} */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/integer.h b/testhal/STM32/STM32F4xx/USB_HOST/integer.h
new file mode 100644
index 0000000..074a46b
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/integer.h
@@ -0,0 +1,33 @@
+/*-------------------------------------------*/

+/* Integer type definitions for FatFs module */

+/*-------------------------------------------*/

+

+#ifndef _FF_INTEGER

+#define _FF_INTEGER

+

+#ifdef _WIN32	/* FatFs development platform */

+

+#include <windows.h>

+#include <tchar.h>

+

+#else			/* Embedded platform */

+

+/* This type MUST be 8 bit */

+typedef unsigned char	BYTE;

+

+/* These types MUST be 16 bit */

+typedef short			SHORT;

+typedef unsigned short	WORD;

+typedef unsigned short	WCHAR;

+

+/* These types MUST be 16 bit or 32 bit */

+typedef int				INT;

+typedef unsigned int	UINT;

+

+/* These types MUST be 32 bit */

+typedef long			LONG;

+typedef unsigned long	DWORD;

+

+#endif

+

+#endif

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/main.c b/testhal/STM32/STM32F4xx/USB_HOST/main.c
new file mode 100644
index 0000000..bfb318f
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/main.c
@@ -0,0 +1,488 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#include "ch.h"

+#include "hal.h"

+#include "ff.h"

+#include "usbh.h"

+#include <string.h>

+

+

+

+#if HAL_USBH_USE_FTDI

+#include "usbh/dev/ftdi.h"

+#include "test.h"

+#include "shell.h"

+#include "chprintf.h"

+

+static THD_WORKING_AREA(waTestFTDI, 1024);

+

+#define SHELL_WA_SIZE   THD_WORKING_AREA_SIZE(2048)

+#define TEST_WA_SIZE    THD_WORKING_AREA_SIZE(256)

+

+static uint8_t buf[] =

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"

+    "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef";

+

+static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {

+  size_t n, size;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: mem\r\n");

+    return;

+  }

+  n = chHeapStatus(NULL, &size);

+  chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX());

+  chprintf(chp, "heap fragments   : %u\r\n", n);

+  chprintf(chp, "heap free total  : %u bytes\r\n", size);

+}

+

+static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {

+  static const char *states[] = {CH_STATE_NAMES};

+  thread_t *tp;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: threads\r\n");

+    return;

+  }

+  chprintf(chp, "    addr    stack prio refs     state\r\n");

+  tp = chRegFirstThread();

+  do {

+    chprintf(chp, "%08lx %08lx %4lu %4lu %9s\r\n",

+            (uint32_t)tp, (uint32_t)tp->p_ctx.r13,

+            (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),

+            states[tp->p_state]);

+    tp = chRegNextThread(tp);

+  } while (tp != NULL);

+}

+

+static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {

+  thread_t *tp;

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: test\r\n");

+    return;

+  }

+  tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),

+                           TestThread, chp);

+  if (tp == NULL) {

+    chprintf(chp, "out of memory\r\n");

+    return;

+  }

+  chThdWait(tp);

+}

+

+static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) {

+

+  (void)argv;

+  if (argc > 0) {

+    chprintf(chp, "Usage: write\r\n");

+    return;

+  }

+

+  while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) != Q_TIMEOUT) {

+	//flush

+  }

+

+  while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) {

+    chSequentialStreamWrite(&FTDIPD[0], buf, sizeof buf - 1);

+  }

+  chprintf(chp, "\r\n\nstopped\r\n");

+}

+

+static const ShellCommand commands[] = {

+	{"mem", cmd_mem},

+	{"threads", cmd_threads},

+	{"test", cmd_test},

+	{"write", cmd_write},

+	{NULL, NULL}

+};

+

+static const ShellConfig shell_cfg1 = {

+	(BaseSequentialStream *)&FTDIPD[0],

+	commands

+};

+

+static void ThreadTestFTDI(void *p) {

+	(void)p;

+	USBHFTDIPortDriver *const ftdipp = &FTDIPD[0];

+

+	shellInit();

+

+start:

+	while (ftdipp->state != USBHFTDIP_STATE_ACTIVE) {

+		chThdSleepMilliseconds(100);

+	}

+

+	usbDbgPuts("FTDI: Connected");

+

+	USBHFTDIPortConfig config = {

+		115200,

+		USBHFTDI_FRAMING_DATABITS_8 | USBHFTDI_FRAMING_PARITY_NONE | USBHFTDI_FRAMING_STOP_BITS_1,

+		USBHFTDI_HANDSHAKE_NONE,

+		0,

+		0

+	};

+

+	usbhftdipStart(ftdipp, &config);

+

+	//loopback

+	if (0) {

+		for(;;) {

+			msg_t m = chSequentialStreamGet(ftdipp);

+			if (m < MSG_OK) {

+				usbDbgPuts("FTDI: Disconnected");

+				goto start;

+			}

+			chSequentialStreamPut(ftdipp, (uint8_t)m);

+			if (m == 'q')

+				break;

+		}

+	}

+

+	//shell test

+	if (1) {

+		thread_t *shelltp = NULL;

+		for(;;) {

+			if (ftdipp->state != USBHFTDIP_STATE_READY)

+				goto start;

+			if (!shelltp) {

+				shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);

+			} else if (chThdTerminatedX(shelltp)) {

+				chThdRelease(shelltp);

+				if (ftdipp->state != USBHFTDIP_STATE_READY)

+					goto start;

+				break;

+			}

+			chThdSleepMilliseconds(100);

+		}

+	}

+

+	//FTDI uart RX to debug TX bridge

+	if (0) {

+		for(;;) {

+			msg_t m = chSequentialStreamGet(ftdipp);

+			if (m < MSG_OK) {

+				usbDbgPuts("FTDI: Disconnected");

+				goto start;

+			}

+			sdPut(&USBH_DEBUG_SD, (uint8_t)m);

+			if (m == 'q')

+				break;

+		}

+	}

+

+	//write speed test

+	if (1) {

+		usbhftdipStop(ftdipp);

+		config.speed = 3000000;

+		usbhftdipStart(ftdipp, &config);

+

+		systime_t st, et;

+		int i;

+		for (i = 0; i < 5; i++) {

+			uint32_t bytes = config.speed / 10;

+			uint32_t times = bytes / 1024;

+			st = chVTGetSystemTimeX();

+			while (times--) {

+				if (chSequentialStreamWrite(ftdipp, buf, 1024) < 1024) {

+					usbDbgPuts("FTDI: Disconnected");

+					goto start;

+				}

+				bytes -= 1024;

+			}

+			if (bytes) {

+				if (chSequentialStreamWrite(ftdipp, buf, bytes) < bytes) {

+					usbDbgPuts("FTDI: Disconnected");

+					goto start;

+				}

+			}

+			et = chVTGetSystemTimeX();

+			usbDbgPrintf("\tRate=%uB/s", (config.speed * 100) / (et - st));

+		}

+	}

+

+	//single character write test (tests the timer)

+	if (0) {

+		for (;;) {

+			if (chSequentialStreamPut(ftdipp, 'A') != MSG_OK) {

+				usbDbgPuts("FTDI: Disconnected");

+				goto start;

+			}

+			chThdSleepMilliseconds(100);

+		}

+	}

+

+	usbhftdipStop(ftdipp);

+

+	usbDbgPuts("FTDI: Tests done, restarting in 3s");

+	chThdSleepMilliseconds(3000);

+

+	goto start;

+}

+#endif

+

+

+

+#if HAL_USBH_USE_MSD

+#include "usbh/dev/msd.h"

+#include "ff.h"

+

+static FATFS MSDLUN0FS;

+static uint8_t fbuff[10240];

+static FIL file;

+

+static FRESULT scan_files(BaseSequentialStream *chp, char *path) {

+  FRESULT res;

+  FILINFO fno;

+  DIR dir;

+  int i;

+  char *fn;

+

+#if _USE_LFN

+  fno.lfname = 0;

+  fno.lfsize = 0;

+#endif

+  res = f_opendir(&dir, path);

+  if (res == FR_OK) {

+    i = strlen(path);

+    for (;;) {

+      res = f_readdir(&dir, &fno);

+      if (res != FR_OK || fno.fname[0] == 0)

+        break;

+      if (fno.fname[0] == '.')

+        continue;

+      fn = fno.fname;

+      if (fno.fattrib & AM_DIR) {

+        path[i++] = '/';

+        strcpy(&path[i], fn);

+        res = scan_files(chp, path);

+        if (res != FR_OK)

+          break;

+        path[--i] = 0;

+      } else {

+    	  usbDbgPrintf("FS: %s/%s", path, fn);

+      }

+    }

+  }

+  return res;

+}

+static THD_WORKING_AREA(waTestMSD, 1024);

+static void ThreadTestMSD(void *p) {

+	(void)p;

+

+	FATFS *fsp;

+	uint32_t clusters;

+	FRESULT res;

+	BaseSequentialStream * const chp = (BaseSequentialStream *)&USBH_DEBUG_SD;

+	blkstate_t state;

+	systime_t st, et;

+	uint32_t j;

+

+start:

+	for(;;) {

+		chThdSleepMilliseconds(100);

+

+		chSysLock();

+		state = blkGetDriverState(&MSBLKD[0]);

+		chSysUnlock();

+		if (state != BLK_READY)

+			continue;

+

+		//raw read test

+		if (1) {

+#define RAW_READ_SZ_MB		1

+#define NBLOCKS				(sizeof(fbuff) / 512)

+#define NITERATIONS			((RAW_READ_SZ_MB * 1024UL * 1024UL) / sizeof(fbuff))

+			uint32_t start = 0;

+			chThdSetPriority(HIGHPRIO);

+			usbDbgPrintf("BLK: Raw read test (%dMB, %dB blocks)", RAW_READ_SZ_MB, sizeof(fbuff));

+			st = chVTGetSystemTime();

+			for (j = 0; j < NITERATIONS; j++) {

+				blkRead(&MSBLKD[0], start, fbuff, NBLOCKS);

+				start += NBLOCKS;

+			}

+			et = chVTGetSystemTime();

+			usbDbgPrintf("BLK: Raw read in %d ms, %dkB/s",

+					et - st,

+					(RAW_READ_SZ_MB * 1024UL * 1000) / (et - st));

+			chThdSetPriority(NORMALPRIO);

+		}

+

+		usbDbgPuts("FS: Block driver ready, try mount...");

+

+		res = f_mount(&MSDLUN0FS, "0:", 1);

+		if (res != FR_OK) {

+			usbDbgPuts("FS: Can't mount. Check file system.");

+			continue;

+		}

+		usbDbgPuts("FS: Mounted.");

+

+		res = f_getfree("0:", &clusters, &fsp);

+		if (res != FR_OK) {

+			usbDbgPuts("FS: f_getfree() failed");

+			continue;

+		}

+

+		usbDbgPrintf("FS: %lu free clusters, %lu sectors per cluster, %lu bytes free",

+				clusters, (uint32_t)MSDLUN0FS.csize,

+				clusters * (uint32_t)MSDLUN0FS.csize * MSBLKD[0].info.blk_size);

+

+		break;

+	}

+

+	//FATFS test

+	if (1) {

+		UINT bw;

+		const uint8_t *src;

+		const uint8_t *const start = (uint8_t *)0x08000000;

+		const uint8_t *const top = (uint8_t *)0x08020000;

+

+		//write test

+		if (1) {

+			usbDbgPuts("FS: Write test (create file /test.dat, 1MB)");

+			f_open(&file, "/test.dat", FA_CREATE_ALWAYS | FA_WRITE);

+			src = start;

+			st = chVTGetSystemTime();

+			for (j = 0; j < 2048; j++) {

+				if (f_write(&file, src, 512, &bw) != FR_OK)

+					goto start;

+				src += bw;

+				if (src >= top)

+					src = start;

+			}

+			et = chVTGetSystemTime();

+			usbDbgPrintf("FS: Written 1MB in %d ms, %dkB/s",

+					et - st,

+					(1024UL*1000) / (et - st));

+			f_close(&file);

+		}

+

+		//read test

+		if (1) {

+			usbDbgPuts("FS: Read test (read file /test.dat, 1MB, compare)");

+			f_open(&file, "/test.dat", FA_READ);

+			src = start;

+			st = chVTGetSystemTime();

+			for (j = 0; j < 2048; j++) {

+				if (f_read(&file, fbuff, 512, &bw) != FR_OK)

+					goto start;

+				if (memcmp(src, fbuff, bw)) {

+					usbDbgPrintf("Compare error @%08x", (uint32_t)src);

+					goto start;

+				}

+				src += bw;

+				if (src >= top)

+					src = start;

+			}

+			et = chVTGetSystemTime();

+			usbDbgPrintf("FS: Read 1MB in %d ms, %dkB/s",

+					et - st,

+					(1024UL*1000) / (et - st));

+			f_close(&file);

+		}

+

+		//scan files test

+		if (1) {

+			usbDbgPuts("FS: Scan files test");

+			fbuff[0] = 0;

+			scan_files(chp, (char *)fbuff);

+		}

+	}

+

+	usbDbgPuts("FS: Tests done, restarting in 3s");

+	chThdSleepMilliseconds(3000);

+

+	goto start;

+

+}

+#endif

+

+

+

+

+

+

+int main(void) {

+

+	halInit();

+	usbhInit();

+	chSysInit();

+

+	//PA2(TX) and PA3(RX) are routed to USART2

+	sdStart(&SD2, NULL);

+	palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7));

+	palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7));

+

+#if STM32_USBH_USE_OTG1

+	//VBUS - configured in board.h

+	//USB_FS - configured in board.h

+#endif

+

+#if STM32_USBH_USE_OTG2

+	//USB_HS

+	//TODO: Initialize Pads

+#endif

+

+#if HAL_USBH_USE_MSD

+	usbhmsdObjectInit(&USBHMSD[0]);

+	usbhmsdLUNObjectInit(&MSBLKD[0]);

+	chThdCreateStatic(waTestMSD, sizeof(waTestMSD), NORMALPRIO, ThreadTestMSD, 0);

+#endif

+#if HAL_USBH_USE_FTDI

+	usbhftdiObjectInit(&USBHFTDID[0]);

+	usbhftdipObjectInit(&FTDIPD[0]);

+	chThdCreateStatic(waTestFTDI, sizeof(waTestFTDI), NORMALPRIO, ThreadTestFTDI, 0);

+#endif

+

+	//turn on USB power

+	palClearPad(GPIOC, GPIOC_OTG_FS_POWER_ON);

+

+	//start

+#if STM32_USBH_USE_OTG1

+	usbhStart(&USBHD1);

+#endif

+#if STM32_USBH_USE_OTG2

+	usbhStart(&USBHD2);

+#endif

+

+	for(;;) {

+#if STM32_USBH_USE_OTG1

+		usbhMainLoop(&USBHD1);

+#endif

+#if STM32_USBH_USE_OTG2

+		usbhMainLoop(&USBHD2);

+#endif

+		chThdSleepMilliseconds(100);

+	}

+}

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h
new file mode 100644
index 0000000..39a3ef6
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf.h
@@ -0,0 +1,324 @@
+/*

+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

+

+    Licensed under the Apache License, Version 2.0 (the "License");

+    you may not use this file except in compliance with the License.

+    You may obtain a copy of the License at

+

+        http://www.apache.org/licenses/LICENSE-2.0

+

+    Unless required by applicable law or agreed to in writing, software

+    distributed under the License is distributed on an "AS IS" BASIS,

+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

+    See the License for the specific language governing permissions and

+    limitations under the License.

+*/

+

+#ifndef _MCUCONF_H_

+#define _MCUCONF_H_

+

+/*

+ * STM32F4xx drivers configuration.

+ * The following settings override the default settings present in

+ * the various device driver implementation headers.

+ * Note that the settings for each driver only have effect if the whole

+ * driver is enabled in halconf.h.

+ *

+ * IRQ priorities:

+ * 15...0       Lowest...Highest.

+ *

+ * DMA priorities:

+ * 0...3        Lowest...Highest.

+ */

+

+#define STM32F4xx_MCUCONF

+

+/*

+ * HAL driver system settings.

+ */

+#define STM32_NO_INIT                       FALSE

+#define STM32_HSI_ENABLED                   TRUE

+#define STM32_LSI_ENABLED                   TRUE

+#define STM32_HSE_ENABLED                   TRUE

+#define STM32_LSE_ENABLED                   FALSE

+#define STM32_CLOCK48_REQUIRED              TRUE

+#define STM32_SW                            STM32_SW_PLL

+#define STM32_PLLSRC                        STM32_PLLSRC_HSE

+#define STM32_PLLM_VALUE                    8

+#define STM32_PLLN_VALUE                    336

+#define STM32_PLLP_VALUE                    2

+#define STM32_PLLQ_VALUE                    7

+#define STM32_HPRE                          STM32_HPRE_DIV1

+#define STM32_PPRE1                         STM32_PPRE1_DIV4

+#define STM32_PPRE2                         STM32_PPRE2_DIV2

+#define STM32_RTCSEL                        STM32_RTCSEL_LSI

+#define STM32_RTCPRE_VALUE                  8

+#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI

+#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1

+#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK

+#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5

+#define STM32_I2SSRC                        STM32_I2SSRC_CKIN

+#define STM32_PLLI2SN_VALUE                 192

+#define STM32_PLLI2SR_VALUE                 5

+#define STM32_PVD_ENABLE                    FALSE

+#define STM32_PLS                           STM32_PLS_LEV0

+#define STM32_BKPRAM_ENABLE                 FALSE

+

+/*

+ * ADC driver system settings.

+ */

+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4

+#define STM32_ADC_USE_ADC1                  FALSE

+#define STM32_ADC_USE_ADC2                  FALSE

+#define STM32_ADC_USE_ADC3                  FALSE

+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)

+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)

+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)

+#define STM32_ADC_ADC1_DMA_PRIORITY         2

+#define STM32_ADC_ADC2_DMA_PRIORITY         2

+#define STM32_ADC_ADC3_DMA_PRIORITY         2

+#define STM32_ADC_IRQ_PRIORITY              6

+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6

+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6

+

+/*

+ * CAN driver system settings.

+ */

+#define STM32_CAN_USE_CAN1                  FALSE

+#define STM32_CAN_USE_CAN2                  FALSE

+#define STM32_CAN_CAN1_IRQ_PRIORITY         11

+#define STM32_CAN_CAN2_IRQ_PRIORITY         11

+

+/*

+ * DAC driver system settings.

+ */

+#define STM32_DAC_DUAL_MODE                 FALSE

+#define STM32_DAC_USE_DAC1_CH1              FALSE

+#define STM32_DAC_USE_DAC1_CH2              FALSE

+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10

+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2

+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)

+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)

+

+/*

+ * EXT driver system settings.

+ */

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6

+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15

+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15

+

+/*

+ * GPT driver system settings.

+ */

+#define STM32_GPT_USE_TIM1                  FALSE

+#define STM32_GPT_USE_TIM2                  FALSE

+#define STM32_GPT_USE_TIM3                  FALSE

+#define STM32_GPT_USE_TIM4                  FALSE

+#define STM32_GPT_USE_TIM5                  FALSE

+#define STM32_GPT_USE_TIM6                  FALSE

+#define STM32_GPT_USE_TIM7                  FALSE

+#define STM32_GPT_USE_TIM8                  FALSE

+#define STM32_GPT_USE_TIM9                  FALSE

+#define STM32_GPT_USE_TIM11                 FALSE

+#define STM32_GPT_USE_TIM12                 FALSE

+#define STM32_GPT_USE_TIM14                 FALSE

+#define STM32_GPT_TIM1_IRQ_PRIORITY         7

+#define STM32_GPT_TIM2_IRQ_PRIORITY         7

+#define STM32_GPT_TIM3_IRQ_PRIORITY         7

+#define STM32_GPT_TIM4_IRQ_PRIORITY         7

+#define STM32_GPT_TIM5_IRQ_PRIORITY         7

+#define STM32_GPT_TIM6_IRQ_PRIORITY         7

+#define STM32_GPT_TIM7_IRQ_PRIORITY         7

+#define STM32_GPT_TIM8_IRQ_PRIORITY         7

+#define STM32_GPT_TIM9_IRQ_PRIORITY         7

+#define STM32_GPT_TIM11_IRQ_PRIORITY        7

+#define STM32_GPT_TIM12_IRQ_PRIORITY        7

+#define STM32_GPT_TIM14_IRQ_PRIORITY        7

+

+/*

+ * I2C driver system settings.

+ */

+#define STM32_I2C_USE_I2C1                  FALSE

+#define STM32_I2C_USE_I2C2                  FALSE

+#define STM32_I2C_USE_I2C3                  FALSE

+#define STM32_I2C_BUSY_TIMEOUT              50

+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)

+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_I2C_I2C1_IRQ_PRIORITY         5

+#define STM32_I2C_I2C2_IRQ_PRIORITY         5

+#define STM32_I2C_I2C3_IRQ_PRIORITY         5

+#define STM32_I2C_I2C1_DMA_PRIORITY         3

+#define STM32_I2C_I2C2_DMA_PRIORITY         3

+#define STM32_I2C_I2C3_DMA_PRIORITY         3

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

+

+/*

+ * ICU driver system settings.

+ */

+#define STM32_ICU_USE_TIM1                  FALSE

+#define STM32_ICU_USE_TIM2                  FALSE

+#define STM32_ICU_USE_TIM3                  FALSE

+#define STM32_ICU_USE_TIM4                  FALSE

+#define STM32_ICU_USE_TIM5                  FALSE

+#define STM32_ICU_USE_TIM8                  FALSE

+#define STM32_ICU_USE_TIM9                  FALSE

+#define STM32_ICU_TIM1_IRQ_PRIORITY         7

+#define STM32_ICU_TIM2_IRQ_PRIORITY         7

+#define STM32_ICU_TIM3_IRQ_PRIORITY         7

+#define STM32_ICU_TIM4_IRQ_PRIORITY         7

+#define STM32_ICU_TIM5_IRQ_PRIORITY         7

+#define STM32_ICU_TIM8_IRQ_PRIORITY         7

+#define STM32_ICU_TIM9_IRQ_PRIORITY         7

+

+/*

+ * MAC driver system settings.

+ */

+#define STM32_MAC_TRANSMIT_BUFFERS          2

+#define STM32_MAC_RECEIVE_BUFFERS           4

+#define STM32_MAC_BUFFERS_SIZE              1522

+#define STM32_MAC_PHY_TIMEOUT               100

+#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE

+#define STM32_MAC_ETH1_IRQ_PRIORITY         13

+#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0

+

+/*

+ * PWM driver system settings.

+ */

+#define STM32_PWM_USE_ADVANCED              FALSE

+#define STM32_PWM_USE_TIM1                  FALSE

+#define STM32_PWM_USE_TIM2                  FALSE

+#define STM32_PWM_USE_TIM3                  FALSE

+#define STM32_PWM_USE_TIM4                  FALSE

+#define STM32_PWM_USE_TIM5                  FALSE

+#define STM32_PWM_USE_TIM8                  FALSE

+#define STM32_PWM_USE_TIM9                  FALSE

+#define STM32_PWM_TIM1_IRQ_PRIORITY         7

+#define STM32_PWM_TIM2_IRQ_PRIORITY         7

+#define STM32_PWM_TIM3_IRQ_PRIORITY         7

+#define STM32_PWM_TIM4_IRQ_PRIORITY         7

+#define STM32_PWM_TIM5_IRQ_PRIORITY         7

+#define STM32_PWM_TIM8_IRQ_PRIORITY         7

+#define STM32_PWM_TIM9_IRQ_PRIORITY         7

+

+/*

+ * SDC driver system settings.

+ */

+#define STM32_SDC_SDIO_DMA_PRIORITY         3

+#define STM32_SDC_SDIO_IRQ_PRIORITY         9

+#define STM32_SDC_WRITE_TIMEOUT_MS          250

+#define STM32_SDC_READ_TIMEOUT_MS           25

+#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10

+#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE

+#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)

+

+/*

+ * SERIAL driver system settings.

+ */

+#define STM32_SERIAL_USE_USART1             FALSE

+#define STM32_SERIAL_USE_USART2             TRUE

+#define STM32_SERIAL_USE_USART3             FALSE

+#define STM32_SERIAL_USE_UART4              FALSE

+#define STM32_SERIAL_USE_UART5              FALSE

+#define STM32_SERIAL_USE_USART6             FALSE

+#define STM32_SERIAL_USART1_PRIORITY        12

+#define STM32_SERIAL_USART2_PRIORITY        12

+#define STM32_SERIAL_USART3_PRIORITY        12

+#define STM32_SERIAL_UART4_PRIORITY         12

+#define STM32_SERIAL_UART5_PRIORITY         12

+#define STM32_SERIAL_USART6_PRIORITY        12

+

+/*

+ * SPI driver system settings.

+ */

+#define STM32_SPI_USE_SPI1                  FALSE

+#define STM32_SPI_USE_SPI2                  FALSE

+#define STM32_SPI_USE_SPI3                  FALSE

+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)

+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)

+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)

+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)

+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)

+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)

+#define STM32_SPI_SPI1_DMA_PRIORITY         1

+#define STM32_SPI_SPI2_DMA_PRIORITY         1

+#define STM32_SPI_SPI3_DMA_PRIORITY         1

+#define STM32_SPI_SPI1_IRQ_PRIORITY         10

+#define STM32_SPI_SPI2_IRQ_PRIORITY         10

+#define STM32_SPI_SPI3_IRQ_PRIORITY         10

+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

+

+/*

+ * ST driver system settings.

+ */

+#define STM32_ST_IRQ_PRIORITY               8

+#define STM32_ST_USE_TIMER                  2

+

+/*

+ * UART driver system settings.

+ */

+#define STM32_UART_USE_USART1               FALSE

+#define STM32_UART_USE_USART2               FALSE

+#define STM32_UART_USE_USART3               FALSE

+#define STM32_UART_USE_UART4                FALSE

+#define STM32_UART_USE_UART5                FALSE

+#define STM32_UART_USE_USART6               FALSE

+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)

+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)

+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)

+#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)

+#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)

+#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)

+#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)

+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)

+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)

+#define STM32_UART_USART1_IRQ_PRIORITY      12

+#define STM32_UART_USART2_IRQ_PRIORITY      12

+#define STM32_UART_USART3_IRQ_PRIORITY      12

+#define STM32_UART_UART4_IRQ_PRIORITY       12

+#define STM32_UART_UART5_IRQ_PRIORITY       12

+#define STM32_UART_USART6_IRQ_PRIORITY      12

+#define STM32_UART_USART1_DMA_PRIORITY      0

+#define STM32_UART_USART2_DMA_PRIORITY      0

+#define STM32_UART_USART3_DMA_PRIORITY      0

+#define STM32_UART_UART4_DMA_PRIORITY       0

+#define STM32_UART_UART5_DMA_PRIORITY       0

+#define STM32_UART_USART6_DMA_PRIORITY      0

+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

+

+/*

+ * USB driver system settings.

+ */

+#define STM32_USB_USE_OTG1                  FALSE

+#define STM32_USB_USE_OTG2                  FALSE

+#define STM32_USB_OTG1_IRQ_PRIORITY         14

+#define STM32_USB_OTG2_IRQ_PRIORITY         14

+#define STM32_USB_OTG1_RX_FIFO_SIZE         512

+#define STM32_USB_OTG2_RX_FIFO_SIZE         1024

+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO

+#define STM32_USB_OTG_THREAD_STACK_SIZE     128

+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0

+

+#include "mcuconf_community.h"

+

+#endif /* _MCUCONF_H_ */

diff --git a/testhal/STM32/STM32F4xx/USB_HOST/mcuconf_community.h b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf_community.h
new file mode 100644
index 0000000..888662f
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/mcuconf_community.h
@@ -0,0 +1,66 @@
+/*
+    ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * FSMC driver system settings.
+ */
+#define STM32_FSMC_USE_FSMC1                FALSE
+#define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
+
+/*
+ * FSMC NAND driver system settings.
+ */
+#define STM32_NAND_USE_FSMC_NAND1           FALSE
+#define STM32_NAND_USE_FSMC_NAND2           FALSE
+#define STM32_NAND_USE_EXT_INT              FALSE
+#define STM32_NAND_DMA_STREAM               STM32_DMA_STREAM_ID(2, 7)
+#define STM32_NAND_DMA_PRIORITY             0
+#define STM32_NAND_DMA_ERROR_HOOK(nandp)    osalSysHalt("DMA failure")
+
+/*
+ * FSMC SRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SRAM                 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM1           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM2           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM3           FLASE
+#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
+
+/*
+ * FSMC SDRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SDRAM                FALSE
+
+
+/*
+ * USBH driver system settings.
+ */
+
+#define STM32_OTG1_CHANNELS_NUMBER		8
+#define STM32_OTG2_CHANNELS_NUMBER		12
+
+#define STM32_USBH_USE_OTG1				1
+#define STM32_OTG1_RXFIFO_SIZE			1024
+#define STM32_OTG1_PTXFIFO_SIZE			128
+#define STM32_OTG1_NPTXFIFO_SIZE		128
+
+#define STM32_USBH_USE_OTG2				0
+#define STM32_OTG2_RXFIFO_SIZE			2048
+#define STM32_OTG2_PTXFIFO_SIZE			1024
+#define STM32_OTG2_NPTXFIFO_SIZE		1024
+
+#define STM32_USBH_MIN_QSPACE			4
+#define STM32_USBH_CHANNELS_NP 			4
diff --git a/testhal/STM32/STM32F4xx/USB_HOST/readme.txt b/testhal/STM32/STM32F4xx/USB_HOST/readme.txt
new file mode 100644
index 0000000..793da2e
--- /dev/null
+++ b/testhal/STM32/STM32F4xx/USB_HOST/readme.txt
@@ -0,0 +1,25 @@
+*****************************************************************************

+** ChibiOS/RT port for ARM-Cortex-M4 STM32F407.                            **

+*****************************************************************************

+

+** TARGET **

+

+The demo runs on an ST STM32F4-Discovery board.

+

+** The Demo **

+

+

+** Build Procedure **

+

+The demo has been tested by using the free Codesourcery GCC-based toolchain

+and YAGARTO. just modify the TRGT line in the makefile in order to use

+different GCC toolchains.

+

+** Notes **

+

+Some files used by the demo are not part of ChibiOS/RT but are copyright of

+ST Microelectronics and are licensed under a different license.

+Also note that not all the files present in the ST library are distributed

+with ChibiOS/RT, you can find the whole library on the ST web site:

+

+                             http://www.st.com