diff options
| author | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-03 22:28:33 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-10-03 22:28:33 +0200 |
| commit | d4291fcd8f674512eed82ffd979996d47319712b (patch) | |
| tree | 22c21b29afc393b5813b58776cfa728e90f1b916 | |
| parent | 75027a647490d62d875c8012c0eac83a441304a8 (diff) | |
| parent | ea844db44656f481cda59bc71234d54be37ed5bf (diff) | |
| download | ChibiOS-Contrib-d4291fcd8f674512eed82ffd979996d47319712b.tar.gz ChibiOS-Contrib-d4291fcd8f674512eed82ffd979996d47319712b.tar.bz2 ChibiOS-Contrib-d4291fcd8f674512eed82ffd979996d47319712b.zip | |
Merge pull request #200 from dismirlian/segger_systemview
SEGGER RTT/SystemView bindings
24 files changed, 3358 insertions, 0 deletions
diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.cproject b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.cproject new file mode 100644 index 0000000..c55778f --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.cproject @@ -0,0 +1,56 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="0.114656749"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.114656749" moduleId="org.eclipse.cdt.core.settings" name="Default"> + <externalSettings/> + <extensions> + <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + </extensions> + </storageModule> + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> + <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.114656749" name="Default" optionalBuildProperties="" parent="org.eclipse.cdt.build.core.prefbase.cfg"> + <folderInfo id="0.114656749." name="/" resourcePath=""> + <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain"> + <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.1182750861.169007201" name=""/> + <builder autoBuildTarget="all" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.579570726" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/> + <tool id="org.eclipse.cdt.build.core.settings.holder.libs.2143276802" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/> + <tool id="org.eclipse.cdt.build.core.settings.holder.1873650595" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder"> + <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1337802279" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> + </tool> + <tool id="org.eclipse.cdt.build.core.settings.holder.1707090075" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder"> + <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.338985256" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> + </tool> + <tool id="org.eclipse.cdt.build.core.settings.holder.1165165914" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder"> + <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.714476670" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> + </tool> + </toolChain> + </folderInfo> + </configuration> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> + <storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/> + </cconfiguration> + </storageModule> + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> + <project id="RT-STM32F407-DISCOVERY-RTT+SystemView.null.1703860681" name="RT-STM32F407-DISCOVERY-RTT+SystemView"/> + </storageModule> + <storageModule moduleId="scannerConfiguration"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> + <scannerConfigBuildInfo instanceId="0.114656749"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/> + </scannerConfigBuildInfo> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> + <storageModule moduleId="refreshScope" versionNumber="2"> + <configuration configurationName="Default"> + <resource resourceType="PROJECT" workspacePath="/RT-STM32F407-DISCOVERY-RTT+SystemView"/> + </configuration> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> +</cproject> diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.project b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.project new file mode 100644 index 0000000..fb45ef6 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.project @@ -0,0 +1,105 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>RT-STM32F407-DISCOVERY-RTT+SystemView</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.autoBuildTarget</key> + <value>all</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value>-j1</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.cleanBuildTarget</key> + <value>clean</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.fullBuildTarget</key> + <value>all</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <triggers>full,incremental,</triggers> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>board</name> + <type>2</type> + <locationURI>$%7BPARENT-4-PROJECT_LOC%7D/ChibiOS/os/hal/boards/ST_STM32F4_DISCOVERY</locationURI> + </link> + <link> + <name>contrib-ext</name> + <type>2</type> + <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/ext</locationURI> + </link> + <link> + <name>contrib-os</name> + <type>2</type> + <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/os</locationURI> + </link> + <link> + <name>os</name> + <type>2</type> + <locationURI>$%7BPARENT-4-PROJECT_LOC%7D/ChibiOS/os</locationURI> + </link> + <link> + <name>test</name> + <type>2</type> + <locationURI>$%7BPARENT-4-PROJECT_LOC%7D/ChibiOS/test</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/language.settings.xml b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/language.settings.xml new file mode 100644 index 0000000..85cd90e --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/language.settings.xml @@ -0,0 +1,11 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<project> + <configuration id="0.114656749" name="Default"> + <extension point="org.eclipse.cdt.core.LanguageSettingsProvider"> + <provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/> + <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> + <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> + <provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser" keep-relative-paths="false" name="CDT GCC Build Output Parser" parameter="arm-none-eabi-gcc" prefer-non-shared="true"/> + </extension> + </configuration> +</project> diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/org.eclipse.cdt.core.prefs b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/org.eclipse.cdt.core.prefs new file mode 100644 index 0000000..eaa66d6 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/.settings/org.eclipse.cdt.core.prefs @@ -0,0 +1,6 @@ +eclipse.preferences.version=1 +environment/project/0.114656749/PATH/delimiter=; +environment/project/0.114656749/PATH/operation=replace +environment/project/0.114656749/PATH/value=${PATH};D\:\\toolchains\\gcc-arm-none-eabi-8-2019-q3-update-win32\\bin;D\:\\toolchains\\msys64\\usr\\bin +environment/project/0.114656749/append=true +environment/project/0.114656749/appendContributed=true diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/Makefile b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/Makefile new file mode 100644 index 0000000..f9e1493 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/Makefile @@ -0,0 +1,193 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -Og -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = hard +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m4 + +# Imported source files and paths. +CHIBIOS := ../../../../Chibios +CHIBIOS_CONTRIB := ../../../ + +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk +include $(CHIBIOS_CONTRIB)/os/various/segger_bindings/segger_rtt.mk +include $(CHIBIOS_CONTRIB)/os/various/segger_bindings/segger_systemview.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +# +# Custom rules +############################################################################## diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_RTT_Conf.h b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_RTT_Conf.h new file mode 100644 index 0000000..5aa7a69 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_RTT_Conf.h @@ -0,0 +1,123 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* conditions are met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this list of conditions and the following disclaimer. * +* * +* o Redistributions in binary form must reproduce the above * +* copyright notice, this list of conditions and the following * +* disclaimer in the documentation and/or other materials provided * +* with the distribution. * +* * +* o Neither the name of SEGGER Microcontroller GmbH * +* nor the names of its contributors may be used to endorse or * +* promote products derived from this software without specific * +* prior written permission. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 6.44i * +* * +********************************************************************** +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 13430 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include <intrinsics.h> +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (2) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (2) // Max. number of down-buffers (H->T) available on this target (Default: 3) + +#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) + +#define SEGGER_RTT_PRINTF_BUFFER_SIZE (128u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) + +#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +#if !defined(SEGGER_RTT_ASM) +#include "ch.h" +#define SEGGER_RTT_LOCK() do { \ + syssts_t LockState = chSysGetStatusAndLockX() +#define SEGGER_RTT_UNLOCK() chSysRestoreStatusX(LockState); \ + } while(0) +#endif +#endif +/*************************** End of file ****************************/ diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_SYSVIEW_Conf.h b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_SYSVIEW_Conf.h new file mode 100644 index 0000000..397aa07 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/SEGGER_SYSVIEW_Conf.h @@ -0,0 +1,174 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER SystemView * Real-time application analysis * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* conditions are met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this list of conditions and the following disclaimer. * +* * +* o Redistributions in binary form must reproduce the above * +* copyright notice, this list of conditions and the following * +* disclaimer in the documentation and/or other materials provided * +* with the distribution. * +* * +* o Neither the name of SEGGER Microcontroller GmbH * +* nor the names of its contributors may be used to endorse or * +* promote products derived from this software without specific * +* prior written permission. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* SystemView version: V2.52h * +* * +********************************************************************** +-------------------------- END-OF-HEADER ----------------------------- + +File : SEGGER_SYSVIEW_Conf.h +Purpose : SEGGER SystemView configuration. +Revision: $Rev: 13453 $ +*/ + +#ifndef SEGGER_SYSVIEW_CONF_H +#define SEGGER_SYSVIEW_CONF_H + +/********************************************************************* +* +* Defines, fixed +* +********************************************************************** +*/ +// +// Constants for known core configuration +// +#define SEGGER_SYSVIEW_CORE_OTHER 0 +#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1 +#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7 +#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX + +#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__) + #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__ICCARM__) + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__))) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__CC_ARM) + #if (defined(__TARGET_ARCH_6S_M)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__TI_ARM__) + #ifdef __TI_ARM_V6M0__ + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__ICCRX__) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX +#elif defined(__RX) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX +#endif + +#ifndef SEGGER_SYSVIEW_CORE + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ +/********************************************************************* +* +* SystemView buffer configuration +*/ +#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 100000 // Number of bytes that SystemView uses for the buffer. +#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection + +#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack + +#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode + +/********************************************************************* +* +* SystemView timestamp configuration +*/ +#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3 + #define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter. + #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source +#else + #define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function + #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp() +#endif + +/********************************************************************* +* +* SystemView Id configuration +*/ +#define SEGGER_SYSVIEW_ID_BASE 0x20000000 // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM) +#define SEGGER_SYSVIEW_ID_SHIFT 2 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned) + +/********************************************************************* +* +* SystemView interrupt configuration +*/ +#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3 + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector) +#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0 + #if defined(__ICCARM__) + #if (__VER__ > 6100000) + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead. + #else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access. + #endif + #else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector) + #endif +#else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function. +#endif + +#endif // SEGGER_SYSVIEW_CONF_H + +/*************************** End of file ****************************/ diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/chconf.h b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/chconf.h new file mode 100644 index 0000000..a593552 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/chconf.h @@ -0,0 +1,723 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 10000 +#endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#if !defined(CH_CFG_INTERVALS_SIZE) +#define CH_CFG_INTERVALS_SIZE 32 +#endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_TIME_TYPES_SIZE) +#define CH_CFG_TIME_TYPES_SIZE 32 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#if !defined(CH_CFG_TIME_QUANTUM) +#define CH_CFG_TIME_QUANTUM 0 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#if !defined(CH_CFG_NO_IDLE_THREAD) +#define CH_CFG_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_OPTIMIZE_SPEED) +#define CH_CFG_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TM) +#define CH_CFG_USE_TM TRUE +#endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_REGISTRY) +#define CH_CFG_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES TRUE +#endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#if !defined(CH_CFG_USE_CONDVARS) +#define CH_CFG_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#if !defined(CH_CFG_USE_DYNAMIC) +#define CH_CFG_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_MASK) +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +#endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#if !defined(CH_DBG_TRACE_BUFFER_SIZE) +#define CH_DBG_TRACE_BUFFER_SIZE 128 +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#if !defined(CH_DBG_THREADS_PROFILING) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define _CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define _CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define _CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define _CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define _CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define _CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + + + +/*===========================================================================*/ +/* Other configurations */ +/*===========================================================================*/ +#if !defined(_FROM_ASM_) +#include "SEGGER_SYSVIEW_ChibiOS.h" +#endif + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/halconf.h b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/halconf.h new file mode 100644 index 0000000..149ded3 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/halconf.h @@ -0,0 +1,525 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_0_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 64 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/mcuconf.h b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/mcuconf.h new file mode 100644 index 0000000..2662296 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/cfg/mcuconf.h @@ -0,0 +1,352 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 1000 +#define STM32_SDC_READ_TIMEOUT_MS 1000 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_HOST_WAKEUP_DURATION 2 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */ diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/main.c b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/main.c new file mode 100644 index 0000000..f4c5684 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/main.c @@ -0,0 +1,104 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" +#include "rt_test_root.h" +#include "oslib_test_root.h" +#include "SEGGER_SYSVIEW_ChibiOS.h" +#include "SEGGER_RTT_streams.h" + +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (true) { + palSetPad(GPIOD, GPIOD_LED3); /* Orange. */ + chThdSleepMilliseconds(500); + palClearPad(GPIOD, GPIOD_LED3); /* Orange. */ + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * This is optional. You need to initialize this if you will be using the + * RTT sequential streams (RTTD0). You *don't* need to use them; you can + * use RTT directly (call SEGGER_RTT_xxxx) without any initialization. + * + * + * Initialize RTT (channel 0). The output can be seen on Telnet por 19201. + */ + rttInit(); + rttSetUpFlags(&RTTD0, RTT_MODE_FLAGS_BLOCK_IF_FIFO_FULL); + + /* + * Start SystemView + */ + SYSVIEW_ChibiOS_Start(STM32_SYSCLK, STM32_SYSCLK, "I#44=OSTick,I#54=USART2"); + + /* + * Activates the serial driver 2 using the driver default configuration. + * PA2(TX) and PA3(RX) are routed to USART2. + */ + sdStart(&SD2, NULL); + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + + streamWrite(&SD2, (const uint8_t *)"Hello From SD2!\r\n", 17); + streamWrite(&RTTD0, (const uint8_t *)"Hello From RTT!\r\n", 17); + + /* + * Creates the example thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (true) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + SEGGER_SYSVIEW_PrintfHost("Test begins with output on SD2\r\n"); + test_execute((BaseSequentialStream *)&SD2, &rt_test_suite); + test_execute((BaseSequentialStream *)&SD2, &oslib_test_suite); + + SEGGER_SYSVIEW_PrintfHost("Test begins with output on RTT\r\n"); + test_execute((BaseSequentialStream *)&RTTD0, &rt_test_suite); + test_execute((BaseSequentialStream *)&RTTD0, &oslib_test_suite); + } + chThdSleepMilliseconds(500); + } +} diff --git a/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/readme.txt b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/readme.txt new file mode 100644 index 0000000..1e088b7 --- /dev/null +++ b/demos/STM32/RT-STM32F407-DISCOVERY-RTT+SystemView/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M4 STM32F407. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F4-Discovery board. + +** The Demo ** + + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. just modify the TRGT line in the makefile in order to use +different GCC toolchains. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/ext/.gitignore b/ext/.gitignore new file mode 100644 index 0000000..2ef4973 --- /dev/null +++ b/ext/.gitignore @@ -0,0 +1 @@ +SEGGER
\ No newline at end of file diff --git a/ext/SEGGER-RTT_6.44i+SystemView_2.52h.7z b/ext/SEGGER-RTT_6.44i+SystemView_2.52h.7z Binary files differnew file mode 100644 index 0000000..df1159f --- /dev/null +++ b/ext/SEGGER-RTT_6.44i+SystemView_2.52h.7z diff --git a/ext/readme.txt b/ext/readme.txt new file mode 100644 index 0000000..dcf5e8d --- /dev/null +++ b/ext/readme.txt @@ -0,0 +1,7 @@ +All the code contained under ./ext is not part of the ChibiOS/ChibiOS-Contrib +project and supplied as-is without any additional warranty by ChibiOS/ +ChibiOS-Contrib. For ownership and copyright statements see the license +details inside the code. + +Some modules may contain changes from the ChibiOS-Contrib team in order to +increase compatibility or usability with ChibiOS itself. diff --git a/os/various/segger_bindings/RTT/SEGGER_RTT_streams.c b/os/various/segger_bindings/RTT/SEGGER_RTT_streams.c new file mode 100644 index 0000000..253a2f1 --- /dev/null +++ b/os/various/segger_bindings/RTT/SEGGER_RTT_streams.c @@ -0,0 +1,116 @@ +/* + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio + Copyright (C) 2019 Diego Ismirlian, (dismirlian(at)google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "SEGGER_RTT_streams.h" + +RTTDriver RTTD0; +static bool rtt_global_init; + +static size_t _write(RTTDriver *rttdp, const uint8_t *bp, size_t n) { + return SEGGER_RTT_Write(rttdp->up_buffer_index, bp, n); +} + +static size_t _read(RTTDriver *rttdp, uint8_t *bp, size_t n) { + (void)rttdp, (void)bp, (void)n; + /* TODO: implement */ + return 0; +} + +static msg_t _put(RTTDriver *rttdp, uint8_t b) { + if (SEGGER_RTT_PutChar(rttdp->up_buffer_index, b) == 1) { + return MSG_OK; + } + return MSG_TIMEOUT; +} + +static msg_t _get(RTTDriver *rttdp) { + (void)rttdp; + /* TODO: implement */ + return MSG_TIMEOUT; +} + +static const struct RTTDriverVMT vmt = { + (size_t)0, + (size_t (*)(void *, const uint8_t *, size_t))_write, + (size_t (*)(void *, uint8_t *, size_t))_read, + (msg_t (*)(void *, uint8_t))_put, + (msg_t (*)(void *))_get, +}; + +static inline void _object_init(RTTDriver *rttdp) { + rttdp->state = RTT_STATE_READY; + rttdp->vmt = &vmt; +} + +void rttInit(void) { + osalDbgAssert(rtt_global_init == false, "double init"); + SEGGER_RTT_LOCK(); + SEGGER_RTT_Init(); + RTTD0.up_buffer_index = 0; + RTTD0.down_buffer_index = 0; + _object_init(&RTTD0); + rtt_global_init = true; + RTTD0.state = RTT_STATE_READY; + SEGGER_RTT_UNLOCK(); +} + +void rttObjectInit(RTTDriver *rttdp, const RTTConfig *cfg) { + osalDbgCheck(rttdp); + osalDbgAssert(rtt_global_init, "uninitialized"); + osalDbgAssert(rttdp != &RTTD0, "RTTD0 is automatically initialized on rttInit"); + + int idx; + + SEGGER_RTT_LOCK(); + if (cfg->down.size) { + idx = SEGGER_RTT_AllocDownBuffer(cfg->name, cfg->down.buff, cfg->down.size, cfg->down.flags); + osalDbgAssert(idx > 0, "can't alloc down buffer"); + rttdp->down_buffer_index = (unsigned)idx; + } else { + rttdp->down_buffer_index = 0; + } + + if (cfg->up.size) { + idx = SEGGER_RTT_AllocUpBuffer(cfg->name, cfg->up.buff, cfg->up.size, cfg->up.flags); + osalDbgAssert(idx > 0, "can't alloc up buffer"); + rttdp->up_buffer_index = (unsigned)idx; + } else { + rttdp->up_buffer_index = 0; + } + + _object_init(rttdp); + SEGGER_RTT_UNLOCK(); +} + +void rttSetUpFlags(RTTDriver *rttdp, rtt_mode_flags_t flags) { + int ret = SEGGER_RTT_SetFlagsUpBuffer(rttdp->up_buffer_index, (unsigned)flags); + osalDbgAssert(ret >= 0, "error"); +} + +void rttSetDownFlags(RTTDriver *rttdp, rtt_mode_flags_t flags) { + int ret = SEGGER_RTT_SetFlagsDownBuffer(rttdp->down_buffer_index, (unsigned)flags); + osalDbgAssert(ret >= 0, "error"); +} + +void rttStart(RTTDriver *rttdp) { + osalDbgCheck(rttdp); + osalDbgAssert(rtt_global_init, "uninitialized"); + osalDbgAssert((rttdp->state == RTT_STATE_ACTIVE) + || (rttdp->state == RTT_STATE_READY), "wrong state"); + rttdp->state = RTT_STATE_READY; +} diff --git a/os/various/segger_bindings/RTT/SEGGER_RTT_streams.h b/os/various/segger_bindings/RTT/SEGGER_RTT_streams.h new file mode 100644 index 0000000..3ee679c --- /dev/null +++ b/os/various/segger_bindings/RTT/SEGGER_RTT_streams.h @@ -0,0 +1,107 @@ +/* + ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio + Copyright (C) 2015..2017 Diego Ismirlian, (dismirlian (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef SEGGER_RTT_streams_H_ +#define SEGGER_RTT_streams_H_ + +#include "hal.h" +#include "SEGGER_RTT.h" + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +typedef enum { + RTT_STATE_UNINIT = 0, + RTT_STATE_STOP = 1, + RTT_STATE_ACTIVE = 2, + RTT_STATE_READY = 3 +} rtt_state_t; + +typedef enum { + RTT_MODE_FLAGS_NO_BLOCK_SKIP = SEGGER_RTT_MODE_NO_BLOCK_SKIP, + RTT_MODE_FLAGS_NO_BLOCK_TRIM = SEGGER_RTT_MODE_NO_BLOCK_TRIM, + RTT_MODE_FLAGS_BLOCK_IF_FIFO_FULL = SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL, +} rtt_mode_flags_t; + +#define _rtt_driver_methods \ + _base_sequential_stream_methods + +struct RTTDriverVMT { + _rtt_driver_methods +}; + +typedef struct RTTDriver RTTDriver; +typedef struct RTTConfig RTTConfig; +typedef struct RTTBufferConfig RTTBufferConfig; + +struct RTTDriver { + /* inherited from abstract asyncrhonous channel driver */ + const struct RTTDriverVMT *vmt; + _base_sequential_stream_data + + rtt_state_t state; + unsigned int up_buffer_index; + unsigned int down_buffer_index; +}; + +struct RTTBufferConfig { + void *buff; + unsigned int size; + rtt_mode_flags_t flags; +}; + +struct RTTConfig { + const char *name; + RTTBufferConfig up; + RTTBufferConfig down; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ +#define rttGetState(rttdp) ((rttdp)->state) +#define rttGetUpBufferIndex(rttdp) ((rttdp)->up_buffer_index) +#define rttGetDownBufferIndex(rttdp) ((rttdp)->down_buffer_index) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ +extern RTTDriver RTTD0; + +#ifdef __cplusplus +extern "C" { +#endif + /* RTT device driver */ + void rttInit(void); + void rttObjectInit(RTTDriver *rttdp, const RTTConfig *cfg); + void rttStart(RTTDriver *rttdp); + void rttSetUpFlags(RTTDriver *rttdp, rtt_mode_flags_t flags); + void rttSetDownFlags(RTTDriver *rttdp, rtt_mode_flags_t flags); +#ifdef __cplusplus +} +#endif + +#endif /* SEGGER_RTT_streams_H_ */ diff --git a/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.c b/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.c new file mode 100644 index 0000000..ba1d403 --- /dev/null +++ b/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.c @@ -0,0 +1,114 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + Copyright (C) 2019 Diego Ismirlian, (dismirlian (at) google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "SEGGER_SYSVIEW.h" +#include "hal.h" + +#include <string.h> + +static systime_t start; +static const char *isr_desc; + +thread_t *chRegFirstThreadI(void) { + thread_t *tp; + + chDbgCheckClassI(); + + tp = ch.rlist.newer; +#if CH_CFG_USE_DYNAMIC == TRUE + tp->refs++; +#endif + + return tp; +} + +thread_t *chRegNextThreadI(thread_t *tp) { + thread_t *ntp; + + chDbgCheckClassI(); + + ntp = tp->newer; + /*lint -save -e9087 -e740 [11.3, 1.3] Cast required by list handling.*/ + if (ntp == (thread_t *)&ch.rlist) { + /*lint -restore*/ + ntp = NULL; + } +#if CH_CFG_USE_DYNAMIC == TRUE + else { + chDbgAssert(ntp->refs < (trefs_t)255, "too many references"); + ntp->refs++; + } +#endif + +#if CH_CFG_USE_DYNAMIC == TRUE + chDbgAssert(tp->refs > (trefs_t)0, "not referenced"); + tp->refs--; +#endif + + return ntp; +} + +static void _cbSendTaskList(void) { + thread_t *tp; + syssts_t sts = chSysGetStatusAndLockX(); + tp = chRegFirstThreadI(); + do { + SYSVIEW_ChibiOS_SendTaskInfo(tp); + tp = chRegNextThreadI(tp); + } while (tp != NULL); + chSysRestoreStatusX(sts); +} + +static U64 _cbGetTime(void) { + return TIME_I2US(chVTTimeElapsedSinceX(start)); +} + +static void _cbSendSystemDesc(void) { + SEGGER_SYSVIEW_SendSysDesc("O=ChibiOS"); + SEGGER_SYSVIEW_SendSysDesc(isr_desc); +} + +static const SEGGER_SYSVIEW_OS_API os_api = { + _cbGetTime, + _cbSendTaskList, +}; + +void SYSVIEW_ChibiOS_Start(U32 SysFreq, U32 CPUFreq, const char *isr_description) { + start = chVTGetSystemTimeX(); + isr_desc = isr_description; + SEGGER_SYSVIEW_Init(SysFreq, CPUFreq, &os_api, _cbSendSystemDesc); + SEGGER_SYSVIEW_Start(); +} + +void SYSVIEW_ChibiOS_SendTaskInfo(const void *_tp) { + const thread_t *const tp = (const thread_t *)_tp; + SEGGER_SYSVIEW_TASKINFO TaskInfo; + + //Fill all elements with 0 to allow extending the structure + //in future version without breaking the code + memset(&TaskInfo, 0, sizeof(TaskInfo)); + TaskInfo.TaskID = (U32)tp; + TaskInfo.sName = tp->name; + TaskInfo.Prio = (U32)tp->prio; +#if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || (CH_CFG_USE_DYNAMIC == TRUE) + TaskInfo.StackBase = (U32)tp->wabase; + TaskInfo.StackSize = (U32)tp->ctx.sp - (U32)tp->wabase; +#else + TaskInfo.StackBase = 0U; + TaskInfo.StackSize = (U32)tp->wabase; +#endif + SEGGER_SYSVIEW_SendTaskInfo(&TaskInfo); +} diff --git a/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.h b/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.h new file mode 100644 index 0000000..be73a4f --- /dev/null +++ b/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.h @@ -0,0 +1,284 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + Copyright (C) 2019 Diego Ismirlian, (dismirlian(at)google's mail) + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * To use: + * + * 1) + * #include this file at the bottom of chconf.h. You may need to + * redefine some of the hooks in chconf.h, for example + * + * CH_CFG_THREAD_INIT_HOOK => _CH_CFG_THREAD_INIT_HOOK. + * + * If you don't use those hooks in your original code, you may just delete + * them from chconf.h + * + * + * 2) + * Copy the SEGGER_RTT_Conf.h and SEGGER_SYSVIEW_Conf.h files from the + * segger_bindings/example_configurations/ directory to the project's + * cfg directory. + * + * You can tune the config files to suit your needs; see the SEGGER RTT and + * SystemView documentation for details. + * + * + * 3) + * Add the following call to main(): + * SYSVIEW_ChibiOS_Start(STM32_SYSCLK, STM32_SYSCLK, "I#15=SysTick"); + * + * The first parameter, SysFreq, is the time base for all the timestamps. It + * must match SEGGER_SYSVIEW_GET_TIMESTAMP in SEGGER_SYSVIEW_Conf.h. By + * default, SEGGER_SYSVIEW_GET_TIMESTAMP is configured to use the DWT cycle + * counter, so this parameter should match the CPU frequency (eg. + * STM32_SYSCLK). + * + * The second parameter, CPUFreq, appears to be just for information. + * + * The third parameter can be used to name the interrupts in the system. + * For example, on the Cortex-M*, when using the classic periodic tick for + * ChibiOS (CH_CFG_ST_TIMEDELTA == 0), this parameter should include + * "I#15=OSTick" (interrupt #15 is the SysTick). When using the tick-less + * mode, this parameter could be tuned to show the ISR name of the timer + * module used as the OS timer. + * + * Also, you can include all other interrupts in this configuration string + * (eg. "I#15=OSTick,I#54=USART2"). + * + * See the SystemView documentation for more details. + * + * + * 4) + * Copy the file SYSVIEW_ChibiOS.txt (in the segger_bindings directory) to + * the following directory: + * + * Path\to\SystemView\Description\ + * + * This will allow SystemView to map the ChibiOS's task state values to names. + * + */ + +#ifndef SYSVIEW_CHIBIOS_H +#define SYSVIEW_CHIBIOS_H + +#include "SEGGER_SYSVIEW.h" +void SYSVIEW_ChibiOS_SendTaskInfo(const void *_tp); +void SYSVIEW_ChibiOS_Start(U32 SysFreq, U32 CPUFreq, const char *isr_description); + +/********************************************************************/ +/* Checks */ +/********************************************************************/ +#if !(CH_CFG_USE_REGISTRY == TRUE) +#error "SYSVIEW integration requires CH_CFG_USE_REGISTRY" +#endif + +#if defined(CH_CFG_THREAD_INIT_HOOK) +#error "SYSVIEW integration: rename CH_CFG_THREAD_INIT_HOOK to _CH_CFG_THREAD_INIT_HOOK" +#endif + +#if defined(CH_CFG_THREAD_READY_HOOK) +#error "SYSVIEW integration: rename CH_CFG_THREAD_READY_HOOK to _CH_CFG_THREAD_READY_HOOK" +#endif + +#if defined(CH_CFG_CONTEXT_SWITCH_HOOK) +#error "SYSVIEW integration: rename CH_CFG_CONTEXT_SWITCH_HOOK to _CH_CFG_CONTEXT_SWITCH_HOOK" +#endif + +#if defined(CH_CFG_THREAD_EXIT_HOOK) +#error "SYSVIEW integration: rename CH_CFG_THREAD_EXIT_HOOK to _CH_CFG_THREAD_EXIT_HOOK" +#endif + +#if defined(CH_CFG_IRQ_PROLOGUE_HOOK) +#error "SYSVIEW integration: rename CH_CFG_IRQ_PROLOGUE_HOOK to _CH_CFG_IRQ_PROLOGUE_HOOK" +#endif + +#if defined(CH_CFG_IRQ_EPILOGUE_HOOK) +#error "SYSVIEW integration: rename CH_CFG_IRQ_EPILOGUE_HOOK to _CH_CFG_IRQ_EPILOGUE_HOOK" +#endif + +#if defined(CH_CFG_SYSTEM_HALT_HOOK) +#error "SYSVIEW integration: rename CH_CFG_SYSTEM_HALT_HOOK to _CH_CFG_SYSTEM_HALT_HOOK" +#endif + +#if !defined(_CH_CFG_THREAD_INIT_HOOK) +#define _CH_CFG_THREAD_INIT_HOOK(tp) do {} while(0) +#endif + +#if !defined(_CH_CFG_THREAD_READY_HOOK) +#define _CH_CFG_THREAD_READY_HOOK(tp) do {} while(0) +#endif + +#if !defined(_CH_CFG_CONTEXT_SWITCH_HOOK) +#define _CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) do {} while(0) +#endif + +#if !defined(_CH_CFG_THREAD_EXIT_HOOK) +#define _CH_CFG_THREAD_EXIT_HOOK(tp) do {} while(0) +#endif + +#if !defined(_CH_CFG_IRQ_PROLOGUE_HOOK) +#define _CH_CFG_IRQ_PROLOGUE_HOOK() do {} while(0) +#endif + +#if !defined(_CH_CFG_IRQ_EPILOGUE_HOOK) +#define _CH_CFG_IRQ_EPILOGUE_HOOK() do {} while(0) +#endif + +#if !defined(_CH_CFG_SYSTEM_HALT_HOOK) +#define _CH_CFG_SYSTEM_HALT_HOOK(reason) do {} while(0) +#endif + +/* CH_CFG_THREAD_INIT_HOOK: + * + * We report the thread creation and we immediately send the TaskInfo + * structure, so that SystemView can show it as early as possible. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + _CH_CFG_THREAD_INIT_HOOK(tp); \ + SEGGER_SYSVIEW_OnTaskCreate((U32)tp); \ + SYSVIEW_ChibiOS_SendTaskInfo((const void *)tp); \ +} + +/* CH_CFG_THREAD_READY_HOOK: + * + * This is an *extra* hook, not present in the "stock" ChibiOS code. It is + * important if you want SystemView to show all the ready threads, even if + * they are not executing. + * + * The hook should be placed just before the return lines of the chSchReadyI + * and the chSchReadyAheadI functions, in chschd.c: + * + * thread_t *chSchReadyAheadI(thread_t *tp) { + * ... + * CH_CFG_THREAD_READY_HOOK(tp); + * return tp; + * } + * + * thread_t *chSchReadyI(thread_t *tp) { + * ... + * CH_CFG_THREAD_READY_HOOK(tp); + * return tp; + * } + */ +#define CH_CFG_THREAD_READY_HOOK(tp) { \ + _CH_CFG_THREAD_READY_HOOK(tp); \ + SEGGER_SYSVIEW_OnTaskStartReady((U32)tp); \ +} + +/* CH_CFG_CONTEXT_SWITCH_HOOK: + * + * This hook is called when switching context from Thread to Thread, or by the + * tail ISR exit sequence (see comments at CH_CFG_IRQ_EPILOGUE_HOOK). + * + * First, we report the switching-out of the "old" thread (otp), and then the + * switching-in of the "new" thread. Unfortunately, SystemView treats the idle + * thread as a special case, so we need to do some ugly handling here. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + if (otp->prio != IDLEPRIO) { \ + SEGGER_SYSVIEW_OnTaskStopReady((U32)otp, otp->state); \ + } \ + if (ntp->prio == IDLEPRIO) { \ + SEGGER_SYSVIEW_OnIdle(); \ + } else { \ + SEGGER_SYSVIEW_OnTaskStartExec((U32)ntp); \ + } \ + _CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp); \ +} + +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + _CH_CFG_THREAD_EXIT_HOOK(tp); \ + SEGGER_SYSVIEW_OnTaskStopExec(); \ +} + +/* CH_CFG_IRQ_PROLOGUE_HOOK: + * + * For the ARM Cortex-M* architectures, the PORT_IRQ_PROLOGUE doesn't contain + * any code, so the timestamp shown by SystemView for the ISR entry is quite + * accurate. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + SEGGER_SYSVIEW_RecordEnterISR(); \ + _CH_CFG_IRQ_PROLOGUE_HOOK(); \ +} + +/* CH_CFG_IRQ_EPILOGUE_HOOK: + * + * When the ISR is at the tail, and preemption is required, we tell SystemView + * that we exit the ISR to the scheduler first so that the code between + * CH_CFG_IRQ_EPILOGUE_HOOK and the actual context switch will be shown as + * "scheduler". Otherwise, that time will be shown as belonging to the thread + * that was running before the first ISR. If the ISR is not at the tail, we + * simply tell SystemView that the ISR has been exited. If the ISR is at the + * tail but preemption is not required, we tell Systemview that we exit the ISR + * so that it shows that the last thread resumes execution. + * + * When the ISR is at the tail, and preemption is required, this hook will + * be immediately followed by CH_CFG_CONTEXT_SWITCH_HOOK (see + * _port_switch_from_isr()). + * + * Actually, this hook runs a bit early in the ISR exit sequence, so the + * scheduler time shown by SystemView will be underestimated. The ideal place + * to place these calls would be at _port_irq_epilogue. + * + * Note: Unfortunately, this hook is specific to the Cortex-M architecture + * until ChibiOS gets a generic "_isr_is_tail()" macro/function. + */ +#if defined(__GNUC__) +# if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) +# define _isr_is_tail() (_saved_lr != (regarm_t)0xFFFFFFF1U) +# elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)) +# define _isr_is_tail() ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) +# else +# error "SYSVIEW integration: unsupported architecture" +# endif +#elif defined(__ICCARM__) +# if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) +# define _isr_is_tail() (_saved_lr != (regarm_t)0xFFFFFFF1U) +# elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__))) +# define _isr_is_tail() ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) +# else +# error "SYSVIEW integration: unsupported architecture" +# endif +#elif defined(__CC_ARM) +# if (defined __TARGET_ARCH_6S_M) +# define _isr_is_tail() (_saved_lr != (regarm_t)0xFFFFFFF1U) +# elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) +# define _isr_is_tail() ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) +# else +# error "SYSVIEW integration: unsupported architecture" +# endif +#else +# error "SYSVIEW integration: unsupported compiler" +#endif + +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + _CH_CFG_IRQ_EPILOGUE_HOOK(); \ + port_lock_from_isr(); \ + _dbg_enter_lock(); \ + if (_isr_is_tail() && chSchIsPreemptionRequired()) { \ + SEGGER_SYSVIEW_RecordExitISRToScheduler(); \ + } else { \ + SEGGER_SYSVIEW_RecordExitISR(); \ + } \ + _dbg_leave_lock(); \ +} + +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + _CH_CFG_SYSTEM_HALT_HOOK(reason); \ + SEGGER_SYSVIEW_Error(reason); \ +} + +#endif diff --git a/os/various/segger_bindings/SYSTEMVIEW/SYSVIEW_ChibiOS.txt b/os/various/segger_bindings/SYSTEMVIEW/SYSVIEW_ChibiOS.txt new file mode 100644 index 0000000..a0e97db --- /dev/null +++ b/os/various/segger_bindings/SYSTEMVIEW/SYSVIEW_ChibiOS.txt @@ -0,0 +1,8 @@ +# This file describes the ChibiOS Tasks' states. +# Put this file in the following directory: +# Path\to\SystemView\Description\ + +# +# Task States +# +TaskState 0xFF 0=Ready, 1=Current, 2=Wait start, 3=Suspended, 4=Wait queue, 5=Wait semaphore, 6=Wait mutex, 7=Wait condvar, 8=Sleeping, 9=Wait thread, 10=Wait one event, 11=Wait several events, 12=Send message queue, 13=Wait answer, 14=Wait message, 15=Terminated diff --git a/os/various/segger_bindings/example_configurations/SEGGER_RTT_Conf.h b/os/various/segger_bindings/example_configurations/SEGGER_RTT_Conf.h new file mode 100644 index 0000000..5aa7a69 --- /dev/null +++ b/os/various/segger_bindings/example_configurations/SEGGER_RTT_Conf.h @@ -0,0 +1,123 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER RTT * Real Time Transfer for embedded targets * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* conditions are met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this list of conditions and the following disclaimer. * +* * +* o Redistributions in binary form must reproduce the above * +* copyright notice, this list of conditions and the following * +* disclaimer in the documentation and/or other materials provided * +* with the distribution. * +* * +* o Neither the name of SEGGER Microcontroller GmbH * +* nor the names of its contributors may be used to endorse or * +* promote products derived from this software without specific * +* prior written permission. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* RTT version: 6.44i * +* * +********************************************************************** +---------------------------END-OF-HEADER------------------------------ +File : SEGGER_RTT_Conf.h +Purpose : Implementation of SEGGER real-time transfer (RTT) which + allows real-time communication on targets which support + debugger memory accesses while the CPU is running. +Revision: $Rev: 13430 $ + +*/ + +#ifndef SEGGER_RTT_CONF_H +#define SEGGER_RTT_CONF_H + +#ifdef __IAR_SYSTEMS_ICC__ + #include <intrinsics.h> +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ + +#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (2) // Max. number of up-buffers (T->H) available on this target (Default: 3) +#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (2) // Max. number of down-buffers (H->T) available on this target (Default: 3) + +#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k) +#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) + +#define SEGGER_RTT_PRINTF_BUFFER_SIZE (128u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) + +#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0) + +/********************************************************************* +* +* RTT memcpy configuration +* +* memcpy() is good for large amounts of data, +* but the overhead is big for small amounts, which are usually stored via RTT. +* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. +* +* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. +* This is may be required with memory access restrictions, +* such as on Cortex-A devices with MMU. +*/ +#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop +// +// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets +// +//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) +// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) +//#endif + +// +// Target is not allowed to perform other RTT operations while string still has not been stored completely. +// Otherwise we would probably end up with a mixed string in the buffer. +// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. +#if !defined(SEGGER_RTT_ASM) +#include "ch.h" +#define SEGGER_RTT_LOCK() do { \ + syssts_t LockState = chSysGetStatusAndLockX() +#define SEGGER_RTT_UNLOCK() chSysRestoreStatusX(LockState); \ + } while(0) +#endif +#endif +/*************************** End of file ****************************/ diff --git a/os/various/segger_bindings/example_configurations/SEGGER_SYSVIEW_Conf.h b/os/various/segger_bindings/example_configurations/SEGGER_SYSVIEW_Conf.h new file mode 100644 index 0000000..8d8ffa2 --- /dev/null +++ b/os/various/segger_bindings/example_configurations/SEGGER_SYSVIEW_Conf.h @@ -0,0 +1,174 @@ +/********************************************************************* +* SEGGER Microcontroller GmbH * +* The Embedded Experts * +********************************************************************** +* * +* (c) 1995 - 2019 SEGGER Microcontroller GmbH * +* * +* www.segger.com Support: support@segger.com * +* * +********************************************************************** +* * +* SEGGER SystemView * Real-time application analysis * +* * +********************************************************************** +* * +* All rights reserved. * +* * +* SEGGER strongly recommends to not make any changes * +* to or modify the source code of this software in order to stay * +* compatible with the RTT protocol and J-Link. * +* * +* Redistribution and use in source and binary forms, with or * +* without modification, are permitted provided that the following * +* conditions are met: * +* * +* o Redistributions of source code must retain the above copyright * +* notice, this list of conditions and the following disclaimer. * +* * +* o Redistributions in binary form must reproduce the above * +* copyright notice, this list of conditions and the following * +* disclaimer in the documentation and/or other materials provided * +* with the distribution. * +* * +* o Neither the name of SEGGER Microcontroller GmbH * +* nor the names of its contributors may be used to endorse or * +* promote products derived from this software without specific * +* prior written permission. * +* * +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * +* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +* DAMAGE. * +* * +********************************************************************** +* * +* SystemView version: V2.52h * +* * +********************************************************************** +-------------------------- END-OF-HEADER ----------------------------- + +File : SEGGER_SYSVIEW_Conf.h +Purpose : SEGGER SystemView configuration. +Revision: $Rev: 13453 $ +*/ + +#ifndef SEGGER_SYSVIEW_CONF_H +#define SEGGER_SYSVIEW_CONF_H + +/********************************************************************* +* +* Defines, fixed +* +********************************************************************** +*/ +// +// Constants for known core configuration +// +#define SEGGER_SYSVIEW_CORE_OTHER 0 +#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1 +#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7 +#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX + +#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__) + #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__ICCARM__) + #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__))) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__CC_ARM) + #if (defined(__TARGET_ARCH_6S_M)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__TI_ARM__) + #ifdef __TI_ARM_V6M0__ + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0 + #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__)) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3 + #endif +#elif defined(__ICCRX__) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX +#elif defined(__RX) + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX +#endif + +#ifndef SEGGER_SYSVIEW_CORE + #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER +#endif + +/********************************************************************* +* +* Defines, configurable +* +********************************************************************** +*/ +/********************************************************************* +* +* SystemView buffer configuration +*/ +#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 2048 // Number of bytes that SystemView uses for the buffer. +#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection + +#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack + +#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode + +/********************************************************************* +* +* SystemView timestamp configuration +*/ +#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3 + #define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter. + #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source +#else + #define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function + #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp() +#endif + +/********************************************************************* +* +* SystemView Id configuration +*/ +#define SEGGER_SYSVIEW_ID_BASE 0x20000000 // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM) +#define SEGGER_SYSVIEW_ID_SHIFT 2 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned) + +/********************************************************************* +* +* SystemView interrupt configuration +*/ +#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3 + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector) +#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0 + #if defined(__ICCARM__) + #if (__VER__ > 6100000) + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead. + #else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access. + #endif + #else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector) + #endif +#else + #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function. +#endif + +#endif // SEGGER_SYSVIEW_CONF_H + +/*************************** End of file ****************************/ diff --git a/os/various/segger_bindings/segger_rtt.mk b/os/various/segger_bindings/segger_rtt.mk new file mode 100644 index 0000000..b2f1840 --- /dev/null +++ b/os/various/segger_bindings/segger_rtt.mk @@ -0,0 +1,14 @@ +# SEGGER RTT files. +SEGGERASMSRC = $(CHIBIOS_CONTRIB)/ext/SEGGER/RTT/SEGGER_RTT_ASM_ARMv7M.s +SEGGERRTTCSRC = $(CHIBIOS_CONTRIB)/ext/SEGGER/RTT/SEGGER_RTT.c \ + $(CHIBIOS_CONTRIB)/ext/SEGGER/RTT/SEGGER_RTT_printf.c \ + $(CHIBIOS_CONTRIB)/os/various/segger_bindings/RTT/SEGGER_RTT_streams.c +SEGGERRTTINC = $(CHIBIOS_CONTRIB)/ext/SEGGER/RTT \ + $(CHIBIOS_CONTRIB)/os/various/segger_bindings/RTT + + +SEGGER_RTT_ACTIVE = 1 + +ALLASMSRC += $(SEGGERASMSRC) +ALLCSRC += $(SEGGERRTTCSRC) +ALLINC += $(SEGGERRTTINC)
\ No newline at end of file diff --git a/os/various/segger_bindings/segger_systemview.mk b/os/various/segger_bindings/segger_systemview.mk new file mode 100644 index 0000000..577c6ed --- /dev/null +++ b/os/various/segger_bindings/segger_systemview.mk @@ -0,0 +1,13 @@ +# Compiler options here. +ifeq ($(SEGGER_RTT_ACTIVE),) + $(error "SEGGER SystemView needs segger_rtt.mk") +endif + +# SEGGER RTT files. +SEGGERSYSTEMVIEWCSRC = $(CHIBIOS_CONTRIB)/ext/SEGGER/SYSTEMVIEW/SEGGER_SYSVIEW.c \ + $(CHIBIOS_CONTRIB)/os/various/segger_bindings/SYSTEMVIEW/SEGGER_SYSVIEW_ChibiOS.c +SEGGERSYSTEMVIEWINC = $(CHIBIOS_CONTRIB)/ext/SEGGER/SYSTEMVIEW \ + $(CHIBIOS_CONTRIB)/os/various/segger_bindings/SYSTEMVIEW + +ALLCSRC += $(SEGGERSYSTEMVIEWCSRC) +ALLINC += $(SEGGERSYSTEMVIEWINC)
\ No newline at end of file |