aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTexZK <texzk@email.it>2015-07-07 23:53:21 +0200
committerTexZK <texzk@email.it>2015-07-07 23:53:21 +0200
commit3f88eaa27a9ac41a294c5cf6c2de27c47ced9ad0 (patch)
tree95948926588d7ccf908c82b48540eca713fcaf52
parent3ac6c611847f1f20a89315d6d66bc138145ad62d (diff)
downloadChibiOS-Contrib-3f88eaa27a9ac41a294c5cf6c2de27c47ced9ad0.tar.gz
ChibiOS-Contrib-3f88eaa27a9ac41a294c5cf6c2de27c47ced9ad0.tar.bz2
ChibiOS-Contrib-3f88eaa27a9ac41a294c5cf6c2de27c47ced9ad0.zip
Added shell commands to control triple buffer demo
Diffstat
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile448
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h10
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/halconf.h680
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/main.c499
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/mcuconf.h707
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.c628
-rw-r--r--demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.h50
-rw-r--r--demos/various/RT-Win32-TriBuf/main.c20
-rw-r--r--os/various/tribuf.c4
9 files changed, 1681 insertions, 1365 deletions
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile
index 3ba803b..ac6db0e 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/Makefile
@@ -1,223 +1,225 @@
-##############################################################################
-# Build global options
-# NOTE: Can be overridden externally.
-#
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
- USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
- USE_COPT =
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
- USE_CPPOPT = -fno-rtti
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
- USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
- USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
- USE_LTO = no
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
- USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
- USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
- USE_SMART_BUILD = yes
-endif
-
-#
-# Build global options
-##############################################################################
-
-##############################################################################
-# Architecture or project specific options
-#
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
- USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
- USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
-ifeq ($(USE_FPU),)
- USE_FPU = no
-endif
-
-#
-# Architecture or project specific options
-##############################################################################
-
-##############################################################################
-# Project, sources and paths
-#
-
-# Define project name here
-PROJECT = ch
-
-# Imported source files and paths
-CHIBIOS = ../../../..
-# Startup files.
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
-# HAL-OSAL files (optional).
-include $(CHIBIOS)/community/os/hal/hal.mk
-include $(CHIBIOS)/community/os/hal/ports/STM32/STM32F4xx/platform.mk
-include $(CHIBIOS)/os/hal/boards/ST_STM32F429I_DISCOVERY/board.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files (optional).
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/rt/test.mk
-
-# Define linker script file here
-LDSCRIPT = $(STARTUPLD)/STM32F429xI.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(STARTUPSRC) \
- $(KERNSRC) \
- $(PORTSRC) \
- $(OSALSRC) \
- $(HALSRC) \
- $(PLATFORMSRC) \
- $(BOARDSRC) \
- $(TESTSRC) \
- $(CHIBIOS)/os/hal/lib/streams/memstreams.c \
- $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
- $(CHIBIOS)/community/os/various/tribuf.c \
- ./main.c \
- # eol
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC =
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCPPSRC =
-
-# List ASM source files here
-ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
-
-INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
- $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
- $(CHIBIOS)/os/various \
- $(CHIBIOS)/os/hal/lib/streams \
- $(CHIBIOS)/community/os/various \
- # eol
-
-#
-# Project, sources and paths
-##############################################################################
-
-##############################################################################
-# Compiler settings
-#
-
-MCU = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-# runtime support makes code size explode.
-LD = $(TRGT)gcc
-#LD = $(TRGT)g++
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-AR = $(TRGT)ar
-OD = $(TRGT)objdump
-SZ = $(TRGT)size
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wstrict-prototypes
-
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra
-
-#
-# Compiler settings
-##############################################################################
-
-##############################################################################
-# Start of user section
-#
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List all user directories here
-UINCDIR =
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-#
-# End of user defines
-##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
+##############################################################################
+# Build global options
+# NOTE: Can be overridden externally.
+#
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+ USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+ USE_COPT =
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+ USE_CPPOPT = -fno-rtti
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+ USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+ USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+ USE_LTO = no
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+ USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+ USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+ USE_SMART_BUILD = yes
+endif
+
+#
+# Build global options
+##############################################################################
+
+##############################################################################
+# Architecture or project specific options
+#
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+ USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+ USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
+#
+# Architecture or project specific options
+##############################################################################
+
+##############################################################################
+# Project, sources and paths
+#
+
+# Define project name here
+PROJECT = ch
+
+# Imported source files and paths
+CHIBIOS = ../../../..
+# Startup files.
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/community/os/hal/hal.mk
+include $(CHIBIOS)/community/os/hal/ports/STM32/STM32F4xx/platform.mk
+include $(CHIBIOS)/os/hal/boards/ST_STM32F429I_DISCOVERY/board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+include $(CHIBIOS)/test/rt/test.mk
+
+# Define linker script file here
+LDSCRIPT = $(STARTUPLD)/STM32F429xI.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+ $(KERNSRC) \
+ $(PORTSRC) \
+ $(OSALSRC) \
+ $(HALSRC) \
+ $(PLATFORMSRC) \
+ $(BOARDSRC) \
+ $(TESTSRC) \
+ $(CHIBIOS)/os/various/shell.c \
+ $(CHIBIOS)/os/hal/lib/streams/memstreams.c \
+ $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
+ $(CHIBIOS)/community/os/various/tribuf.c \
+ ./usbcfg.c \
+ ./main.c \
+ # eol
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC =
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACSRC =
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+ACPPSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCSRC =
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+# option that results in lower performance and larger code size.
+TCPPSRC =
+
+# List ASM source files here
+ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+
+INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
+ $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
+ $(CHIBIOS)/os/various \
+ $(CHIBIOS)/os/hal/lib/streams \
+ $(CHIBIOS)/community/os/various \
+ # eol
+
+#
+# Project, sources and paths
+##############################################################################
+
+##############################################################################
+# Compiler settings
+#
+
+MCU = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+# runtime support makes code size explode.
+LD = $(TRGT)gcc
+#LD = $(TRGT)g++
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+AR = $(TRGT)ar
+OD = $(TRGT)objdump
+SZ = $(TRGT)size
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -DTHUMB
+
+# Define C warning options here
+CWARN = -Wall -Wextra -Wstrict-prototypes
+
+# Define C++ warning options here
+CPPWARN = -Wall -Wextra
+
+#
+# Compiler settings
+##############################################################################
+
+##############################################################################
+# Start of user section
+#
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List all user directories here
+UINCDIR =
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+#
+# End of user defines
+##############################################################################
+
+RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
index a03c007..9e83c6b 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/chconf.h
@@ -182,7 +182,7 @@
*
* @note The default is @p TRUE.
*/
-#define CH_CFG_USE_MUTEXES FALSE
+#define CH_CFG_USE_MUTEXES TRUE
/**
* @brief Enables recursive behavior on mutexes.
@@ -220,7 +220,7 @@
*
* @note The default is @p TRUE.
*/
-#define CH_CFG_USE_EVENTS FALSE
+#define CH_CFG_USE_EVENTS TRUE
/**
* @brief Events Flags APIs with timeout.
@@ -277,7 +277,7 @@
*
* @note The default is @p TRUE.
*/
-#define CH_CFG_USE_MEMCORE FALSE
+#define CH_CFG_USE_MEMCORE TRUE
/**
* @brief Heap Allocator APIs.
@@ -289,7 +289,7 @@
* @p CH_CFG_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
-#define CH_CFG_USE_HEAP FALSE
+#define CH_CFG_USE_HEAP TRUE
/**
* @brief Memory Pools Allocator APIs.
@@ -309,7 +309,7 @@
* @note Requires @p CH_CFG_USE_WAITEXIT.
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
*/
-#define CH_CFG_USE_DYNAMIC FALSE
+#define CH_CFG_USE_DYNAMIC TRUE
/** @} */
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/halconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/halconf.h
index cdc503f..2e601fc 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/halconf.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/halconf.h
@@ -1,340 +1,340 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file templates/halconf.h
- * @brief HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- * various device drivers from your application. You may also use
- * this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-#include "mcuconf.h"
-
-/**
- * @brief Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL TRUE
-#endif
-
-/**
- * @brief Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC FALSE
-#endif
-
-/**
- * @brief Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN FALSE
-#endif
-
-/**
- * @brief Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC FALSE
-#endif
-
-/**
- * @brief Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT FALSE
-#endif
-
-/**
- * @brief Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT FALSE
-#endif
-
-/**
- * @brief Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C FALSE
-#endif
-
-/**
- * @brief Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S FALSE
-#endif
-
-/**
- * @brief Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU FALSE
-#endif
-
-/**
- * @brief Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC FALSE
-#endif
-
-/**
- * @brief Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI FALSE
-#endif
-
-/**
- * @brief Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM FALSE
-#endif
-
-/**
- * @brief Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC FALSE
-#endif
-
-/**
- * @brief Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC FALSE
-#endif
-
-/**
- * @brief Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL TRUE
-#endif
-
-/**
- * @brief Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB FALSE
-#endif
-
-/**
- * @brief Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI TRUE
-#endif
-
-/**
- * @brief Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART FALSE
-#endif
-
-/**
- * @brief Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT TRUE
-#endif
-
-/**
- * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE TRUE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY FALSE
-#endif
-
-/**
- * @brief Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- * routines releasing some extra CPU time for the threads with
- * lower priority, this may slow down the driver a bit however.
- * This option is recommended also if the SPI driver does not
- * use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Number of initialization attempts before rejecting the card.
- * @note Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY 100
-#endif
-
-/**
- * @brief Include support for MMC cards.
- * @note MMC support is not yet implemented so this option must be kept
- * at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT FALSE
-#endif
-
-/**
- * @brief Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- * routines releasing some extra CPU time for the threads with
- * lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- * default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE 38400
-#endif
-
-/**
- * @brief Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- * buffers depending on the requirements of your application.
- * @note The default is 64 bytes for both the transmission and receive
- * buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE 16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting. */
-/*===========================================================================*/
-
-/**
- * @brief Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- * the USB data endpoint maximum packet size.
- * @note The default is 64 bytes for both the transmission and receive
- * buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE 256
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT TRUE
-#endif
-
-/**
- * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* Community drivers' includes */
-/*===========================================================================*/
-
-#include "halconf_community.h"
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB TRUE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB TRUE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 115200
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting. */
+/*===========================================================================*/
+
+/**
+ * @brief Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ * the USB data endpoint maximum packet size.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE 256
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* Community drivers' includes */
+/*===========================================================================*/
+
+#include "halconf_community.h"
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/main.c b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/main.c
index 012b2ed..145e068 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/main.c
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/main.c
@@ -16,19 +16,19 @@
#include "ch.h"
#include "hal.h"
+#include "test.h"
#include "chprintf.h"
-#if HAL_USE_SERIAL_USB
+#include "shell.h"
+#if (HAL_USE_SERIAL_USB == TRUE)
#include "usbcfg.h"
#endif
#include "tribuf.h"
+#include <string.h>
+#include <stdlib.h>
-/*===========================================================================*/
-/* MISCELLANEOUS */
-/*===========================================================================*/
-
-#if HAL_USE_SERIAL_USB
+#if (HAL_USE_SERIAL_USB == TRUE)
/* Virtual serial port over USB.*/
SerialUSBDriver SDU1;
static BaseSequentialStream *const chout = (BaseSequentialStream *)&SDU1;
@@ -36,58 +36,33 @@ static BaseSequentialStream *const chout = (BaseSequentialStream *)&SDU1;
static BaseSequentialStream *const chout = (BaseSequentialStream *)&SD1;
#endif
-/*
- * Red LED blinker thread, times are in milliseconds.
- */
-static THD_WORKING_AREA(waThread1, 128);
-static THD_FUNCTION(Thread1, arg) {
-
- (void)arg;
-
- chRegSetThreadName("blinker1");
- while (true) {
- palClearPad(GPIOG, GPIOG_LED4_RED);
- chThdSleepMilliseconds(500);
- palSetPad(GPIOG, GPIOG_LED4_RED);
- chThdSleepMilliseconds(500);
- }
-}
-
-/*
- * Green LED blinker thread, times are in milliseconds.
- */
-static THD_WORKING_AREA(waThread2, 128);
-static THD_FUNCTION(Thread2, arg) {
-
- (void)arg;
-
- chRegSetThreadName("blinker2");
- while (true) {
- palClearPad(GPIOG, GPIOG_LED3_GREEN);
- chThdSleepMilliseconds(250);
- palSetPad(GPIOG, GPIOG_LED3_GREEN);
- chThdSleepMilliseconds(250);
- }
-}
-
/*===========================================================================*/
-/* TriBuf related. */
+/* Triple buffer related. */
/*===========================================================================*/
-#define WRITER_DELAY 10
-#define READER_DELAY 20
-
-#define WRITER_STACK_SIZE 256
-#define READER_STACK_SIZE 256
+#define READER_STACK_SIZE 256
+#define READER_WA_SIZE THD_WORKING_AREA_SIZE(READER_STACK_SIZE)
+#define READER_DELAY_MS 200
+#define READER_PRIORITY (NORMALPRIO + 2)
+#define WRITER_STACK_SIZE 256
+#define WRITER_WA_SIZE THD_WORKING_AREA_SIZE(WRITER_STACK_SIZE)
+#define WRITER_DELAY_MS 100
#define WRITER_PRIORITY (NORMALPRIO + 1)
-#define READER_PRIORITY (NORMALPRIO + 2)
-static thread_t *writertp;
-static thread_t *readertp;
+static thread_t *reader_tp;
+static uint16_t reader_delay = READER_DELAY_MS;
+static tprio_t reader_priority = READER_PRIORITY;
+static bool reader_suspend = false;
+static systime_t reader_timeout = TIME_INFINITE;
+
+static thread_t *writer_tp;
+static uint16_t writer_delay = WRITER_DELAY_MS;
+static tprio_t writer_priority = WRITER_PRIORITY;
+static bool writer_suspend = false;
-static tribuf_t tribuf;
-static char buffers[3];
+static tribuf_t tribuf_handler;
+static char buffer_a, buffer_b, buffer_c;
static const char text[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ\r\n";
@@ -99,11 +74,20 @@ static char read_front(void) {
const char *front;
msg_t error;
- error = tribufWaitReadyTimeout(&tribuf, MS2ST(1000));
- if (error == MSG_TIMEOUT)
- chSysHalt("ERROR: read_front() timed out");
- tribufSwapFront(&tribuf);
- front = (const char *)tribufGetFront(&tribuf);
+ /* Wait until a new front buffer gets available with prepared data */
+ chSysLock();
+ error = tribufWaitReadyTimeoutS(&tribuf_handler, reader_timeout);
+ if (error == MSG_TIMEOUT) {
+ chSysUnlock();
+ return (reader_timeout == TIME_IMMEDIATE) ? '.' : '@';
+ }
+ chSysUnlock();
+
+ /* Retrieve the new front buffer */
+ tribufSwapFront(&tribuf_handler);
+ front = (const char *)tribufGetFront(&tribuf_handler);
+
+ /* Read data from the new front buffer */
return front[0];
}
@@ -114,9 +98,49 @@ static void write_back(char c) {
char *back;
- back = (char *)tribufGetBack(&tribuf);
+ /* Retrieve the current back buffer */
+ back = (char *)tribufGetBack(&tribuf_handler);
+
+ /* Prepare data onto the current back buffer */
back[0] = c;
- tribufSwapBack(&tribuf);
+
+ /* Exchange the prepared buffer with a new one */
+ tribufSwapBack(&tribuf_handler);
+}
+
+/*
+ * Reads the front buffer and prints it.
+ */
+static THD_WORKING_AREA(reader_wa, READER_STACK_SIZE);
+static THD_FUNCTION(reader_thread, arg) {
+
+ thread_reference_t thread_ref;
+ tprio_t old_priority;
+ char c;
+ (void)arg;
+
+ chRegSetThreadName("reader_thread");
+ old_priority = chThdGetPriorityX();
+
+ for (;;) {
+ c = read_front();
+ chprintf(chout, "%c", c);
+
+ osalSysLock();
+ palTogglePad(GPIOG, GPIOG_LED3_GREEN);
+ if (old_priority != reader_priority) {
+ chThdSetPriority(reader_priority);
+ }
+ if (reader_suspend) {
+ thread_ref = NULL;
+ osalThreadSuspendS(&thread_ref);
+ reader_suspend = false;
+ } else {
+ osalThreadSleepS(MS2ST(reader_delay));
+ }
+ old_priority = chThdGetPriorityX();
+ osalSysUnlock();
+ }
}
/*
@@ -125,37 +149,315 @@ static void write_back(char c) {
static THD_WORKING_AREA(writer_wa, WRITER_STACK_SIZE);
static THD_FUNCTION(writer_thread, arg) {
- const uint32_t delay = (uint32_t)(msg_t)arg;
+ thread_reference_t thread_ref;
+ tprio_t old_priority;
size_t i;
char c;
+ (void)arg;
chRegSetThreadName("writer_thread");
+ old_priority = chThdGetPriorityX();
+
for (;;) {
for (i = 0; i < sizeof(text); ++i) {
c = text[i];
write_back(c);
- chThdSleepMilliseconds(delay);
+
+ osalSysLock();
+ palTogglePad(GPIOG, GPIOG_LED4_RED);
+ if (old_priority != writer_priority) {
+ chThdSetPriority(writer_priority);
+ }
+ if (writer_suspend) {
+ thread_ref = NULL;
+ osalThreadSuspendS(&thread_ref);
+ writer_suspend = false;
+ } else {
+ osalThreadSleepS(MS2ST(writer_delay));
+ }
+ osalSysUnlock();
}
}
}
-/*
- * Reads the front buffer and prints it.
- */
-static THD_WORKING_AREA(reader_wa, READER_STACK_SIZE);
-static THD_FUNCTION(reader_thread, arg) {
+/*===========================================================================*/
+/* Command line related. */
+/*===========================================================================*/
- const uint32_t delay = (uint32_t)(msg_t)arg;
- char c;
+#define streq(s1, s2) (strcmp((s1), (s2)) == 0)
- chRegSetThreadName("reader_thread");
- for (;;) {
- c = read_front();
- chprintf(chout, "%c", c);
- chThdSleepMilliseconds(delay);
+#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(2048)
+#define TEST_WA_SIZE THD_WORKING_AREA_SIZE(256)
+
+static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ size_t n, size;
+ (void)argv;
+
+ if (argc > 0) {
+ chprintf(chp, "Usage: mem\r\n");
+ return;
+ }
+
+ n = chHeapStatus(NULL, &size);
+ chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX());
+ chprintf(chp, "heap fragments : %u\r\n", n);
+ chprintf(chp, "heap free total : %u bytes\r\n", size);
+}
+
+static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ static const char *states[] = {CH_STATE_NAMES};
+ thread_t *tp;
+ (void)argv;
+
+ if (argc > 0) {
+ chprintf(chp, "Usage: threads\r\n");
+ return;
+ }
+
+ chprintf(chp, " addr stack prio refs state name\r\n");
+ tp = chRegFirstThread();
+ do {
+ chprintf(chp, "%08lx %08lx %4lu %4lu %9s %s\r\n",
+ (uint32_t)tp, (uint32_t)tp->p_ctx.r13,
+ (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
+ states[tp->p_state], tp->p_name);
+ tp = chRegNextThread(tp);
+ } while (tp != NULL);
+}
+
+static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ thread_t *tp;
+ (void)argv;
+
+ if (argc > 0) {
+ chprintf(chp, "Usage: test\r\n");
+ return;
+ }
+
+ tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(),
+ TestThread, chp);
+ if (tp == NULL) {
+ chprintf(chp, "out of memory\r\n");
+ return;
+ }
+ chThdWait(tp);
+}
+
+static void cmd_reset(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ (void)argv;
+
+ if (argc > 0) {
+ chprintf(chp, "Usage: reset\r\n");
+ return;
+ }
+
+ chprintf(chp, "Will reset in 200ms\r\n");
+ chThdSleepMilliseconds(200);
+ NVIC_SystemReset();
+}
+
+static void cmd_run(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ thread_reference_t thread_ref;
+ const char *const usage = "Usage: run (reader|writer)\r\n";
+
+ if (argc != 1) {
+ chprintf(chp, usage);
+ return;
+ }
+
+ if (streq(argv[0], "reader")) {
+ osalSysLock();
+ if (reader_suspend) {
+ thread_ref = (thread_reference_t)reader_tp;
+ osalThreadResumeS(&thread_ref, MSG_OK);
+ }
+ osalSysUnlock();
+ }
+ else if (streq(argv[0], "writer")) {
+ osalSysLock();
+ if (writer_suspend) {
+ thread_ref = (thread_reference_t)writer_tp;
+ osalThreadResumeS(&thread_ref, MSG_OK);
+ }
+ osalSysUnlock();
+ }
+ else {
+ chprintf(chp, usage);
}
}
+static void cmd_stop(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ const char *const usage = "Usage: stop (reader|writer)\r\n";
+
+ if (argc != 1) {
+ chprintf(chp, usage);
+ return;
+ }
+
+ if (streq(argv[0], "reader")) {
+ osalSysLock();
+ reader_suspend = true;
+ osalSysUnlock();
+ }
+ else if (streq(argv[0], "writer")) {
+ osalSysLock();
+ writer_suspend = true;
+ osalSysUnlock();
+ }
+ else {
+ chprintf(chp, usage);
+ }
+}
+
+static void cmd_delay(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ const char *const usage = "Usage: delay (reader|writer) DELAY_MS\r\n";
+ uint16_t delay;
+
+ if (argc != 2) {
+ chprintf(chp, usage);
+ return;
+ }
+ delay = (uint16_t)atoi(argv[1]);
+
+ if (streq(argv[0], "reader")) {
+ osalSysLock();
+ reader_delay = delay;
+ osalSysUnlock();
+ }
+ else if (streq(argv[0], "writer")) {
+ osalSysLock();
+ writer_delay = delay;
+ osalSysUnlock();
+ }
+ else {
+ chprintf(chp, usage);
+ }
+}
+
+static void cmd_priority(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ const char *const usage =
+ "Usage: priority (reader|writer) THREAD_PRIORITY\r\n";
+ tprio_t priority;
+
+ if (argc != 2) {
+ chprintf(chp, usage);
+ return;
+ }
+ priority = (tprio_t)atoi(argv[1]);
+
+ if (streq(argv[0], "reader")) {
+ osalSysLock();
+ reader_priority = priority;
+ osalSysUnlock();
+ }
+ else if (streq(argv[0], "writer")) {
+ osalSysLock();
+ writer_priority = priority;
+ osalSysUnlock();
+ }
+ else {
+ chprintf(chp, usage);
+ }
+}
+
+static void cmd_timeout(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ const char *const usage = "Usage: timeout TIMEOUT_MS\r\n";
+ systime_t timeout;
+
+ if (argc != 1) {
+ chprintf(chp, usage);
+ return;
+ }
+
+ if (streq(argv[0], "-"))
+ timeout = TIME_IMMEDIATE;
+ else if (streq(argv[0], "*"))
+ timeout = TIME_INFINITE;
+ else
+ timeout = (systime_t)atoi(argv[0]);
+
+ osalSysLock();
+ reader_timeout = timeout;
+ osalSysUnlock();
+}
+
+static void cmd_params(BaseSequentialStream *chp, int argc, char *argv[]) {
+
+ const char *const usage = "Usage: params\r\n";
+
+ uint32_t reader_delay_;
+ uint32_t reader_priority_;
+ uint32_t reader_suspend_;
+ uint32_t reader_timeout_;
+
+ uint32_t writer_delay_;
+ uint32_t writer_priority_;
+ uint32_t writer_suspend_;
+
+ (void)argv;
+ if (argc != 0) {
+ chprintf(chp, usage);
+ return;
+ }
+
+ osalSysLock();
+ reader_delay_ = (uint32_t)reader_delay;
+ reader_priority_ = (uint32_t)reader_priority;
+ reader_suspend_ = (uint32_t)reader_suspend;
+ reader_timeout_ = (uint32_t)reader_timeout;
+
+ writer_delay_ = (uint32_t)writer_delay;
+ writer_priority_ = (uint32_t)writer_priority;
+ writer_suspend_ = (uint32_t)writer_suspend;
+ osalSysUnlock();
+
+ chprintf(chp, "reader_delay %U\r\n", reader_delay_);
+ chprintf(chp, "reader_priority %U\r\n", reader_priority_);
+ chprintf(chp, "reader_suspend %U\r\n", reader_suspend_);
+ if (reader_timeout_ == TIME_IMMEDIATE)
+ chprintf(chp, "reader_timeout -\r\n");
+ if (reader_timeout_ == TIME_INFINITE)
+ chprintf(chp, "reader_timeout *\r\n");
+ else
+ chprintf(chp, "reader_timeout %U\r\n", reader_timeout_);
+
+ chprintf(chp, "writer_delay %U\r\n", writer_delay_);
+ chprintf(chp, "writer_priority %U\r\n", writer_priority_);
+ chprintf(chp, "writer_suspend %U\r\n", writer_suspend_);
+}
+
+static const ShellCommand commands[] = {
+ {"mem", cmd_mem},
+ {"threads", cmd_threads},
+ {"test", cmd_test},
+ {"reset", cmd_reset},
+ {"run", cmd_run},
+ {"stop", cmd_stop},
+ {"delay", cmd_delay},
+ {"priority", cmd_priority},
+ {"timeout", cmd_timeout},
+ {"params", cmd_params},
+ {NULL, NULL}
+};
+
+static const ShellConfig shell_cfg1 = {
+#if (HAL_USE_SERIAL_USB == TRUE)
+ (BaseSequentialStream *)&SDU1,
+#else
+ (BaseSequentialStream *)&SD1,
+#endif
+ commands
+};
+
/*===========================================================================*/
/* Initialization and main thread. */
/*===========================================================================*/
@@ -165,6 +467,8 @@ static THD_FUNCTION(reader_thread, arg) {
*/
int main(void) {
+ thread_t *shelltp = NULL;
+
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
@@ -175,7 +479,7 @@ int main(void) {
halInit();
chSysInit();
-#if HAL_USE_SERIAL_USB
+#if (HAL_USE_SERIAL_USB == TRUE)
/*
* Initializes a serial-over-USB CDC driver.
*/
@@ -199,30 +503,41 @@ int main(void) {
#endif /* HAL_USE_SERIAL_USB */
/*
- * Creating the blinker threads.
- */
- chThdCreateStatic(waThread1, sizeof(waThread1),
- NORMALPRIO + 10, Thread1, NULL);
- chThdCreateStatic(waThread2, sizeof(waThread2),
- NORMALPRIO + 10, Thread2, NULL);
-
- /*
* Writer and reader threads started for triple buffer demo.
*/
- tribufObjectInit(&tribuf, &buffers[0], &buffers[1], &buffers[2]);
-
- readertp = chThdCreateStatic(reader_wa, sizeof(reader_wa),
- READER_PRIORITY,
- reader_thread, (void *)READER_DELAY);
+ tribufObjectInit(&tribuf_handler, &buffer_a, &buffer_b, &buffer_c);
- writertp = chThdCreateStatic(writer_wa, sizeof(writer_wa),
- WRITER_PRIORITY,
- writer_thread, (void *)WRITER_DELAY);
+ reader_tp = chThdCreateStatic(reader_wa, READER_WA_SIZE,
+ reader_priority, reader_thread, NULL);
- /* TODO: Add shell commands with varying thread creation and delays */
- for (;;)
- chThdSleepMilliseconds(1000);
+ writer_tp = chThdCreateStatic(writer_wa, WRITER_WA_SIZE,
+ writer_priority, writer_thread, NULL);
+ /*
+ * Normal main() thread activity, in this demo it just performs
+ * a shell respawn upon its termination.
+ */
+ for (;;) {
+ if (!shelltp) {
+#if (HAL_USE_SERIAL_USB == TRUE)
+ if (SDU1.config->usbp->state == USB_ACTIVE) {
+ /* Spawns a new shell.*/
+ shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);
+ }
+#else
+ shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);
+#endif
+ }
+ else {
+ /* If the previous shell exited.*/
+ if (chThdTerminatedX(shelltp)) {
+ /* Recovers memory of the previous shell.*/
+ chThdRelease(shelltp);
+ shelltp = NULL;
+ }
+ }
+ chThdSleepMilliseconds(500);
+ }
return 0;
}
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/mcuconf.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/mcuconf.h
index 197312a..0438c01 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/mcuconf.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/mcuconf.h
@@ -1,360 +1,347 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0 Lowest...Highest.
- *
- * DMA priorities:
- * 0...3 Lowest...Highest.
- */
-
-#define STM32F4xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT FALSE
-#define STM32_HSI_ENABLED TRUE
-#define STM32_LSI_ENABLED TRUE
-#define STM32_HSE_ENABLED TRUE
-#define STM32_LSE_ENABLED FALSE
-#define STM32_CLOCK48_REQUIRED TRUE
-#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE 8
-#define STM32_PLLN_VALUE 336
-#define STM32_PLLP_VALUE 2
-#define STM32_PLLQ_VALUE 7
-#define STM32_HPRE STM32_HPRE_DIV1
-#define STM32_PPRE1 STM32_PPRE1_DIV4
-#define STM32_PPRE2 STM32_PPRE2_DIV2
-#define STM32_RTCSEL STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE 8
-#define STM32_MCO1SEL STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE 192
-#define STM32_PLLI2SR_VALUE 5
-#define STM32_PVD_ENABLE FALSE
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE FALSE
-#define STM32_SAISRC STM32_SAISRC_PLL
-#define STM32_PLLSAIN_VALUE 192
-#define STM32_PLLSAIQ_VALUE 7
-#define STM32_PLLSAIR_VALUE 4
-#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1 FALSE
-#define STM32_ADC_USE_ADC2 FALSE
-#define STM32_ADC_USE_ADC3 FALSE
-#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY 2
-#define STM32_ADC_ADC2_DMA_PRIORITY 2
-#define STM32_ADC_ADC3_DMA_PRIORITY 2
-#define STM32_ADC_IRQ_PRIORITY 6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1 FALSE
-#define STM32_CAN_USE_CAN2 FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY 11
-#define STM32_CAN_CAN2_IRQ_PRIORITY 11
-
-/*
- * DAC driver system settings.
- */
-#define STM32_DAC_DUAL_MODE FALSE
-#define STM32_DAC_USE_DAC1_CH1 FALSE
-#define STM32_DAC_USE_DAC1_CH2 FALSE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
-#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
-#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
-#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
-#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1 FALSE
-#define STM32_GPT_USE_TIM2 FALSE
-#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_USE_TIM4 FALSE
-#define STM32_GPT_USE_TIM5 FALSE
-#define STM32_GPT_USE_TIM6 FALSE
-#define STM32_GPT_USE_TIM7 FALSE
-#define STM32_GPT_USE_TIM8 FALSE
-#define STM32_GPT_USE_TIM9 FALSE
-#define STM32_GPT_USE_TIM11 FALSE
-#define STM32_GPT_USE_TIM12 FALSE
-#define STM32_GPT_USE_TIM14 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY 7
-#define STM32_GPT_TIM2_IRQ_PRIORITY 7
-#define STM32_GPT_TIM3_IRQ_PRIORITY 7
-#define STM32_GPT_TIM4_IRQ_PRIORITY 7
-#define STM32_GPT_TIM5_IRQ_PRIORITY 7
-#define STM32_GPT_TIM6_IRQ_PRIORITY 7
-#define STM32_GPT_TIM7_IRQ_PRIORITY 7
-#define STM32_GPT_TIM8_IRQ_PRIORITY 7
-#define STM32_GPT_TIM9_IRQ_PRIORITY 7
-#define STM32_GPT_TIM11_IRQ_PRIORITY 7
-#define STM32_GPT_TIM12_IRQ_PRIORITY 7
-#define STM32_GPT_TIM14_IRQ_PRIORITY 7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1 FALSE
-#define STM32_I2C_USE_I2C2 FALSE
-#define STM32_I2C_USE_I2C3 FALSE
-#define STM32_I2C_BUSY_TIMEOUT 50
-#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY 5
-#define STM32_I2C_I2C2_IRQ_PRIORITY 5
-#define STM32_I2C_I2C3_IRQ_PRIORITY 5
-#define STM32_I2C_I2C1_DMA_PRIORITY 3
-#define STM32_I2C_I2C2_DMA_PRIORITY 3
-#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1 FALSE
-#define STM32_ICU_USE_TIM2 FALSE
-#define STM32_ICU_USE_TIM3 FALSE
-#define STM32_ICU_USE_TIM4 FALSE
-#define STM32_ICU_USE_TIM5 FALSE
-#define STM32_ICU_USE_TIM8 FALSE
-#define STM32_ICU_USE_TIM9 FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY 7
-#define STM32_ICU_TIM2_IRQ_PRIORITY 7
-#define STM32_ICU_TIM3_IRQ_PRIORITY 7
-#define STM32_ICU_TIM4_IRQ_PRIORITY 7
-#define STM32_ICU_TIM5_IRQ_PRIORITY 7
-#define STM32_ICU_TIM8_IRQ_PRIORITY 7
-#define STM32_ICU_TIM9_IRQ_PRIORITY 7
-
-/*
- * MAC driver system settings.
- */
-#define STM32_MAC_TRANSMIT_BUFFERS 2
-#define STM32_MAC_RECEIVE_BUFFERS 4
-#define STM32_MAC_BUFFERS_SIZE 1522
-#define STM32_MAC_PHY_TIMEOUT 100
-#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
-#define STM32_MAC_ETH1_IRQ_PRIORITY 13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED FALSE
-#define STM32_PWM_USE_TIM1 FALSE
-#define STM32_PWM_USE_TIM2 FALSE
-#define STM32_PWM_USE_TIM3 FALSE
-#define STM32_PWM_USE_TIM4 FALSE
-#define STM32_PWM_USE_TIM5 FALSE
-#define STM32_PWM_USE_TIM8 FALSE
-#define STM32_PWM_USE_TIM9 FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY 7
-#define STM32_PWM_TIM2_IRQ_PRIORITY 7
-#define STM32_PWM_TIM3_IRQ_PRIORITY 7
-#define STM32_PWM_TIM4_IRQ_PRIORITY 7
-#define STM32_PWM_TIM5_IRQ_PRIORITY 7
-#define STM32_PWM_TIM8_IRQ_PRIORITY 7
-#define STM32_PWM_TIM9_IRQ_PRIORITY 7
-
-/*
- * SDC driver system settings.
- */
-#define STM32_SDC_SDIO_DMA_PRIORITY 3
-#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#define STM32_SDC_WRITE_TIMEOUT_MS 250
-#define STM32_SDC_READ_TIMEOUT_MS 25
-#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
-#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
-#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1 TRUE
-#define STM32_SERIAL_USE_USART2 FALSE
-#define STM32_SERIAL_USE_USART3 FALSE
-#define STM32_SERIAL_USE_UART4 FALSE
-#define STM32_SERIAL_USE_UART5 FALSE
-#define STM32_SERIAL_USE_USART6 FALSE
-#define STM32_SERIAL_USART1_PRIORITY 12
-#define STM32_SERIAL_USART2_PRIORITY 12
-#define STM32_SERIAL_USART3_PRIORITY 12
-#define STM32_SERIAL_UART4_PRIORITY 12
-#define STM32_SERIAL_UART5_PRIORITY 12
-#define STM32_SERIAL_USART6_PRIORITY 12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1 FALSE
-#define STM32_SPI_USE_SPI2 FALSE
-#define STM32_SPI_USE_SPI3 FALSE
-#define STM32_SPI_USE_SPI4 FALSE
-#define STM32_SPI_USE_SPI5 TRUE
-#define STM32_SPI_USE_SPI6 FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
-#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
-#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
-#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
-#define STM32_SPI_SPI1_DMA_PRIORITY 1
-#define STM32_SPI_SPI2_DMA_PRIORITY 1
-#define STM32_SPI_SPI3_DMA_PRIORITY 1
-#define STM32_SPI_SPI4_DMA_PRIORITY 1
-#define STM32_SPI_SPI5_DMA_PRIORITY 1
-#define STM32_SPI_SPI6_DMA_PRIORITY 1
-#define STM32_SPI_SPI1_IRQ_PRIORITY 10
-#define STM32_SPI_SPI2_IRQ_PRIORITY 10
-#define STM32_SPI_SPI3_IRQ_PRIORITY 10
-#define STM32_SPI_SPI4_IRQ_PRIORITY 10
-#define STM32_SPI_SPI5_IRQ_PRIORITY 10
-#define STM32_SPI_SPI6_IRQ_PRIORITY 10
-#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY 8
-#define STM32_ST_USE_TIMER 2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1 FALSE
-#define STM32_UART_USE_USART2 FALSE
-#define STM32_UART_USE_USART3 FALSE
-#define STM32_UART_USE_UART4 FALSE
-#define STM32_UART_USE_UART5 FALSE
-#define STM32_UART_USE_USART6 FALSE
-#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
-#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
-#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART1_IRQ_PRIORITY 12
-#define STM32_UART_USART2_IRQ_PRIORITY 12
-#define STM32_UART_USART3_IRQ_PRIORITY 12
-#define STM32_UART_UART4_IRQ_PRIORITY 12
-#define STM32_UART_UART5_IRQ_PRIORITY 12
-#define STM32_UART_USART6_IRQ_PRIORITY 12
-#define STM32_UART_USART1_DMA_PRIORITY 0
-#define STM32_UART_USART2_DMA_PRIORITY 0
-#define STM32_UART_USART3_DMA_PRIORITY 0
-#define STM32_UART_UART4_DMA_PRIORITY 0
-#define STM32_UART_UART5_DMA_PRIORITY 0
-#define STM32_UART_USART6_DMA_PRIORITY 0
-#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_OTG1 FALSE
-#define STM32_USB_USE_OTG2 FALSE
-#define STM32_USB_OTG1_IRQ_PRIORITY 14
-#define STM32_USB_OTG2_IRQ_PRIORITY 14
-#define STM32_USB_OTG1_RX_FIFO_SIZE 512
-#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
-#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE 128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
-
-/*
- * LTDC driver system settings.
- */
-#define STM32_LTDC_USE_LTDC TRUE
-#define STM32_LTDC_EV_IRQ_PRIORITY 11
-#define STM32_LTDC_ER_IRQ_PRIORITY 11
-
-/*
- * DMA2D driver system settings.
- */
-#define STM32_DMA2D_USE_DMA2D TRUE
-#define STM32_DMA2D_IRQ_PRIORITY 11
-
-/*
- * Header for community drivers.
- */
-#include "mcuconf_community.h"
-
-#endif /* _MCUCONF_H_ */
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+/*
+ * STM32F4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#define STM32F4xx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_HSI_ENABLED TRUE
+#define STM32_LSI_ENABLED TRUE
+#define STM32_HSE_ENABLED TRUE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_CLOCK48_REQUIRED TRUE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLM_VALUE 8
+#define STM32_PLLN_VALUE 336
+#define STM32_PLLP_VALUE 2
+#define STM32_PLLQ_VALUE 7
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV4
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_RTCSEL STM32_RTCSEL_LSI
+#define STM32_RTCPRE_VALUE 8
+#define STM32_MCO1SEL STM32_MCO1SEL_HSI
+#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
+#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
+#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
+#define STM32_I2SSRC STM32_I2SSRC_CKIN
+#define STM32_PLLI2SN_VALUE 192
+#define STM32_PLLI2SR_VALUE 5
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_BKPRAM_ENABLE FALSE
+#define STM32_SAISRC STM32_SAISRC_PLL
+#define STM32_PLLSAIN_VALUE 192
+#define STM32_PLLSAIQ_VALUE 7
+#define STM32_PLLSAIR_VALUE 4
+#define STM32_PLLSAIR_POST STM32_SAIR_DIV4
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_USE_ADC2 FALSE
+#define STM32_ADC_USE_ADC3 FALSE
+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
+#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC2_DMA_PRIORITY 2
+#define STM32_ADC_ADC3_DMA_PRIORITY 2
+#define STM32_ADC_IRQ_PRIORITY 6
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_USE_CAN2 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+#define STM32_CAN_CAN2_IRQ_PRIORITY 11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE FALSE
+#define STM32_DAC_USE_DAC1_CH1 FALSE
+#define STM32_DAC_USE_DAC1_CH2 FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
+#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM6 FALSE
+#define STM32_GPT_USE_TIM7 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_USE_TIM9 FALSE
+#define STM32_GPT_USE_TIM11 FALSE
+#define STM32_GPT_USE_TIM12 FALSE
+#define STM32_GPT_USE_TIM14 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM6_IRQ_PRIORITY 7
+#define STM32_GPT_TIM7_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+#define STM32_GPT_TIM9_IRQ_PRIORITY 7
+#define STM32_GPT_TIM11_IRQ_PRIORITY 7
+#define STM32_GPT_TIM12_IRQ_PRIORITY 7
+#define STM32_GPT_TIM14_IRQ_PRIORITY 7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_USE_I2C3 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
+#define STM32_I2C_I2C2_IRQ_PRIORITY 5
+#define STM32_I2C_I2C3_IRQ_PRIORITY 5
+#define STM32_I2C_I2C1_DMA_PRIORITY 3
+#define STM32_I2C_I2C2_DMA_PRIORITY 3
+#define STM32_I2C_I2C3_DMA_PRIORITY 3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 FALSE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_USE_TIM9 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+#define STM32_ICU_TIM9_IRQ_PRIORITY 7
+
+/*
+ * MAC driver system settings.
+ */
+#define STM32_MAC_TRANSMIT_BUFFERS 2
+#define STM32_MAC_RECEIVE_BUFFERS 4
+#define STM32_MAC_BUFFERS_SIZE 1522
+#define STM32_MAC_PHY_TIMEOUT 100
+#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
+#define STM32_MAC_ETH1_IRQ_PRIORITY 13
+#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_USE_TIM9 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+#define STM32_PWM_TIM9_IRQ_PRIORITY 7
+
+/*
+ * SDC driver system settings.
+ */
+#define STM32_SDC_SDIO_DMA_PRIORITY 3
+#define STM32_SDC_SDIO_IRQ_PRIORITY 9
+#define STM32_SDC_WRITE_TIMEOUT_MS 250
+#define STM32_SDC_READ_TIMEOUT_MS 25
+#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10
+#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
+#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USE_USART6 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+#define STM32_SERIAL_USART6_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_USE_SPI4 FALSE
+#define STM32_SPI_USE_SPI5 FALSE
+#define STM32_SPI_USE_SPI6 FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
+#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
+#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
+#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
+#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI4_DMA_PRIORITY 1
+#define STM32_SPI_SPI5_DMA_PRIORITY 1
+#define STM32_SPI_SPI6_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_SPI4_IRQ_PRIORITY 10
+#define STM32_SPI_SPI5_IRQ_PRIORITY 10
+#define STM32_SPI_SPI6_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USE_UART4 FALSE
+#define STM32_UART_USE_UART5 FALSE
+#define STM32_UART_USE_USART6 FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_UART4_IRQ_PRIORITY 12
+#define STM32_UART_UART5_IRQ_PRIORITY 12
+#define STM32_UART_USART6_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_UART4_DMA_PRIORITY 0
+#define STM32_UART_UART5_DMA_PRIORITY 0
+#define STM32_UART_USART6_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_OTG1 FALSE
+#define STM32_USB_USE_OTG2 TRUE
+#define STM32_USB_OTG1_IRQ_PRIORITY 14
+#define STM32_USB_OTG2_IRQ_PRIORITY 14
+#define STM32_USB_OTG1_RX_FIFO_SIZE 512
+#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
+#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
+#define STM32_USB_OTG_THREAD_STACK_SIZE 128
+#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
+
+/*
+ * Header for community drivers.
+ */
+#include "mcuconf_community.h"
+
+#endif /* _MCUCONF_H_ */
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.c b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.c
index 7da120e..9f95a2a 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.c
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.c
@@ -1,314 +1,314 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "ch.h"
-#include "hal.h"
-
-/*
- * Endpoints to be used for USBD2.
- */
-#define USBD2_DATA_REQUEST_EP 1
-#define USBD2_DATA_AVAILABLE_EP 1
-#define USBD2_INTERRUPT_REQUEST_EP 2
-
-/*
- * USB Device Descriptor.
- */
-static const uint8_t vcom_device_descriptor_data[18] = {
- USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */
- 0x02, /* bDeviceClass (CDC). */
- 0x00, /* bDeviceSubClass. */
- 0x00, /* bDeviceProtocol. */
- 0x40, /* bMaxPacketSize. */
- 0x0483, /* idVendor (ST). */
- 0x5740, /* idProduct. */
- 0x0200, /* bcdDevice. */
- 1, /* iManufacturer. */
- 2, /* iProduct. */
- 3, /* iSerialNumber. */
- 1) /* bNumConfigurations. */
-};
-
-/*
- * Device Descriptor wrapper.
- */
-static const USBDescriptor vcom_device_descriptor = {
- sizeof vcom_device_descriptor_data,
- vcom_device_descriptor_data
-};
-
-/* Configuration Descriptor tree for a CDC.*/
-static const uint8_t vcom_configuration_descriptor_data[67] = {
- /* Configuration Descriptor.*/
- USB_DESC_CONFIGURATION(67, /* wTotalLength. */
- 0x02, /* bNumInterfaces. */
- 0x01, /* bConfigurationValue. */
- 0, /* iConfiguration. */
- 0xC0, /* bmAttributes (self powered). */
- 50), /* bMaxPower (100mA). */
- /* Interface Descriptor.*/
- USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */
- 0x00, /* bAlternateSetting. */
- 0x01, /* bNumEndpoints. */
- 0x02, /* bInterfaceClass (Communications
- Interface Class, CDC section
- 4.2). */
- 0x02, /* bInterfaceSubClass (Abstract
- Control Model, CDC section 4.3). */
- 0x01, /* bInterfaceProtocol (AT commands,
- CDC section 4.4). */
- 0), /* iInterface. */
- /* Header Functional Descriptor (CDC section 5.2.3).*/
- USB_DESC_BYTE (5), /* bLength. */
- USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
- USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header
- Functional Descriptor. */
- USB_DESC_BCD (0x0110), /* bcdCDC. */
- /* Call Management Functional Descriptor. */
- USB_DESC_BYTE (5), /* bFunctionLength. */
- USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
- USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management
- Functional Descriptor). */
- USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */
- USB_DESC_BYTE (0x01), /* bDataInterface. */
- /* ACM Functional Descriptor.*/
- USB_DESC_BYTE (4), /* bFunctionLength. */
- USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
- USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract
- Control Management Descriptor). */
- USB_DESC_BYTE (0x02), /* bmCapabilities. */
- /* Union Functional Descriptor.*/
- USB_DESC_BYTE (5), /* bFunctionLength. */
- USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
- USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union
- Functional Descriptor). */
- USB_DESC_BYTE (0x00), /* bMasterInterface (Communication
- Class Interface). */
- USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class
- Interface). */
- /* Endpoint 2 Descriptor.*/
- USB_DESC_ENDPOINT (USBD2_INTERRUPT_REQUEST_EP|0x80,
- 0x03, /* bmAttributes (Interrupt). */
- 0x0008, /* wMaxPacketSize. */
- 0xFF), /* bInterval. */
- /* Interface Descriptor.*/
- USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */
- 0x00, /* bAlternateSetting. */
- 0x02, /* bNumEndpoints. */
- 0x0A, /* bInterfaceClass (Data Class
- Interface, CDC section 4.5). */
- 0x00, /* bInterfaceSubClass (CDC section
- 4.6). */
- 0x00, /* bInterfaceProtocol (CDC section
- 4.7). */
- 0x00), /* iInterface. */
- /* Endpoint 3 Descriptor.*/
- USB_DESC_ENDPOINT (USBD2_DATA_AVAILABLE_EP, /* bEndpointAddress.*/
- 0x02, /* bmAttributes (Bulk). */
- 0x0040, /* wMaxPacketSize. */
- 0x00), /* bInterval. */
- /* Endpoint 1 Descriptor.*/
- USB_DESC_ENDPOINT (USBD2_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/
- 0x02, /* bmAttributes (Bulk). */
- 0x0040, /* wMaxPacketSize. */
- 0x00) /* bInterval. */
-};
-
-/*
- * Configuration Descriptor wrapper.
- */
-static const USBDescriptor vcom_configuration_descriptor = {
- sizeof vcom_configuration_descriptor_data,
- vcom_configuration_descriptor_data
-};
-
-/*
- * U.S. English language identifier.
- */
-static const uint8_t vcom_string0[] = {
- USB_DESC_BYTE(4), /* bLength. */
- USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
- USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */
-};
-
-/*
- * Vendor string.
- */
-static const uint8_t vcom_string1[] = {
- USB_DESC_BYTE(38), /* bLength. */
- USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
- 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0,
- 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0,
- 'c', 0, 's', 0
-};
-
-/*
- * Device Description string.
- */
-static const uint8_t vcom_string2[] = {
- USB_DESC_BYTE(56), /* bLength. */
- USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
- 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0,
- 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0,
- 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0,
- 'o', 0, 'r', 0, 't', 0
-};
-
-/*
- * Serial Number string.
- */
-static const uint8_t vcom_string3[] = {
- USB_DESC_BYTE(8), /* bLength. */
- USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
- '0' + CH_KERNEL_MAJOR, 0,
- '0' + CH_KERNEL_MINOR, 0,
- '0' + CH_KERNEL_PATCH, 0
-};
-
-/*
- * Strings wrappers array.
- */
-static const USBDescriptor vcom_strings[] = {
- {sizeof vcom_string0, vcom_string0},
- {sizeof vcom_string1, vcom_string1},
- {sizeof vcom_string2, vcom_string2},
- {sizeof vcom_string3, vcom_string3}
-};
-
-/*
- * Handles the GET_DESCRIPTOR callback. All required descriptors must be
- * handled here.
- */
-static const USBDescriptor *get_descriptor(USBDriver *usbp,
- uint8_t dtype,
- uint8_t dindex,
- uint16_t lang) {
-
- (void)usbp;
- (void)lang;
- switch (dtype) {
- case USB_DESCRIPTOR_DEVICE:
- return &vcom_device_descriptor;
- case USB_DESCRIPTOR_CONFIGURATION:
- return &vcom_configuration_descriptor;
- case USB_DESCRIPTOR_STRING:
- if (dindex < 4)
- return &vcom_strings[dindex];
- }
- return NULL;
-}
-
-/**
- * @brief IN EP1 state.
- */
-static USBInEndpointState ep1instate;
-
-/**
- * @brief OUT EP1 state.
- */
-static USBOutEndpointState ep1outstate;
-
-/**
- * @brief EP1 initialization structure (both IN and OUT).
- */
-static const USBEndpointConfig ep1config = {
- USB_EP_MODE_TYPE_BULK,
- NULL,
- sduDataTransmitted,
- sduDataReceived,
- 0x0040,
- 0x0040,
- &ep1instate,
- &ep1outstate,
- 2,
- NULL
-};
-
-/**
- * @brief IN EP2 state.
- */
-static USBInEndpointState ep2instate;
-
-/**
- * @brief EP2 initialization structure (IN only).
- */
-static const USBEndpointConfig ep2config = {
- USB_EP_MODE_TYPE_INTR,
- NULL,
- sduInterruptTransmitted,
- NULL,
- 0x0010,
- 0x0000,
- &ep2instate,
- NULL,
- 1,
- NULL
-};
-
-/*
- * Handles the USB driver global events.
- */
-static void usb_event(USBDriver *usbp, usbevent_t event) {
- extern SerialUSBDriver SDU1;
-
- switch (event) {
- case USB_EVENT_RESET:
- return;
- case USB_EVENT_ADDRESS:
- return;
- case USB_EVENT_CONFIGURED:
- chSysLockFromISR();
-
- /* Enables the endpoints specified into the configuration.
- Note, this callback is invoked from an ISR so I-Class functions
- must be used.*/
- usbInitEndpointI(usbp, USBD2_DATA_REQUEST_EP, &ep1config);
- usbInitEndpointI(usbp, USBD2_INTERRUPT_REQUEST_EP, &ep2config);
-
- /* Resetting the state of the CDC subsystem.*/
- sduConfigureHookI(&SDU1);
-
- chSysUnlockFromISR();
- return;
- case USB_EVENT_SUSPEND:
- return;
- case USB_EVENT_WAKEUP:
- return;
- case USB_EVENT_STALLED:
- return;
- }
- return;
-}
-
-/*
- * USB driver configuration.
- */
-const USBConfig usbcfg = {
- usb_event,
- get_descriptor,
- sduRequestsHook,
- NULL
-};
-
-/*
- * Serial over USB driver configuration.
- */
-const SerialUSBConfig serusbcfg = {
- &USBD2,
- USBD2_DATA_REQUEST_EP,
- USBD2_DATA_AVAILABLE_EP,
- USBD2_INTERRUPT_REQUEST_EP
-};
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*
+ * Endpoints to be used for USBD2.
+ */
+#define USBD2_DATA_REQUEST_EP 1
+#define USBD2_DATA_AVAILABLE_EP 1
+#define USBD2_INTERRUPT_REQUEST_EP 2
+
+/*
+ * USB Device Descriptor.
+ */
+static const uint8_t vcom_device_descriptor_data[18] = {
+ USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */
+ 0x02, /* bDeviceClass (CDC). */
+ 0x00, /* bDeviceSubClass. */
+ 0x00, /* bDeviceProtocol. */
+ 0x40, /* bMaxPacketSize. */
+ 0x0483, /* idVendor (ST). */
+ 0x5740, /* idProduct. */
+ 0x0200, /* bcdDevice. */
+ 1, /* iManufacturer. */
+ 2, /* iProduct. */
+ 3, /* iSerialNumber. */
+ 1) /* bNumConfigurations. */
+};
+
+/*
+ * Device Descriptor wrapper.
+ */
+static const USBDescriptor vcom_device_descriptor = {
+ sizeof vcom_device_descriptor_data,
+ vcom_device_descriptor_data
+};
+
+/* Configuration Descriptor tree for a CDC.*/
+static const uint8_t vcom_configuration_descriptor_data[67] = {
+ /* Configuration Descriptor.*/
+ USB_DESC_CONFIGURATION(67, /* wTotalLength. */
+ 0x02, /* bNumInterfaces. */
+ 0x01, /* bConfigurationValue. */
+ 0, /* iConfiguration. */
+ 0xC0, /* bmAttributes (self powered). */
+ 50), /* bMaxPower (100mA). */
+ /* Interface Descriptor.*/
+ USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */
+ 0x00, /* bAlternateSetting. */
+ 0x01, /* bNumEndpoints. */
+ 0x02, /* bInterfaceClass (Communications
+ Interface Class, CDC section
+ 4.2). */
+ 0x02, /* bInterfaceSubClass (Abstract
+ Control Model, CDC section 4.3). */
+ 0x01, /* bInterfaceProtocol (AT commands,
+ CDC section 4.4). */
+ 0), /* iInterface. */
+ /* Header Functional Descriptor (CDC section 5.2.3).*/
+ USB_DESC_BYTE (5), /* bLength. */
+ USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
+ USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header
+ Functional Descriptor. */
+ USB_DESC_BCD (0x0110), /* bcdCDC. */
+ /* Call Management Functional Descriptor. */
+ USB_DESC_BYTE (5), /* bFunctionLength. */
+ USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
+ USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management
+ Functional Descriptor). */
+ USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */
+ USB_DESC_BYTE (0x01), /* bDataInterface. */
+ /* ACM Functional Descriptor.*/
+ USB_DESC_BYTE (4), /* bFunctionLength. */
+ USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
+ USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract
+ Control Management Descriptor). */
+ USB_DESC_BYTE (0x02), /* bmCapabilities. */
+ /* Union Functional Descriptor.*/
+ USB_DESC_BYTE (5), /* bFunctionLength. */
+ USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
+ USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union
+ Functional Descriptor). */
+ USB_DESC_BYTE (0x00), /* bMasterInterface (Communication
+ Class Interface). */
+ USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class
+ Interface). */
+ /* Endpoint 2 Descriptor.*/
+ USB_DESC_ENDPOINT (USBD2_INTERRUPT_REQUEST_EP|0x80,
+ 0x03, /* bmAttributes (Interrupt). */
+ 0x0008, /* wMaxPacketSize. */
+ 0xFF), /* bInterval. */
+ /* Interface Descriptor.*/
+ USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */
+ 0x00, /* bAlternateSetting. */
+ 0x02, /* bNumEndpoints. */
+ 0x0A, /* bInterfaceClass (Data Class
+ Interface, CDC section 4.5). */
+ 0x00, /* bInterfaceSubClass (CDC section
+ 4.6). */
+ 0x00, /* bInterfaceProtocol (CDC section
+ 4.7). */
+ 0x00), /* iInterface. */
+ /* Endpoint 3 Descriptor.*/
+ USB_DESC_ENDPOINT (USBD2_DATA_AVAILABLE_EP, /* bEndpointAddress.*/
+ 0x02, /* bmAttributes (Bulk). */
+ 0x0040, /* wMaxPacketSize. */
+ 0x00), /* bInterval. */
+ /* Endpoint 1 Descriptor.*/
+ USB_DESC_ENDPOINT (USBD2_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/
+ 0x02, /* bmAttributes (Bulk). */
+ 0x0040, /* wMaxPacketSize. */
+ 0x00) /* bInterval. */
+};
+
+/*
+ * Configuration Descriptor wrapper.
+ */
+static const USBDescriptor vcom_configuration_descriptor = {
+ sizeof vcom_configuration_descriptor_data,
+ vcom_configuration_descriptor_data
+};
+
+/*
+ * U.S. English language identifier.
+ */
+static const uint8_t vcom_string0[] = {
+ USB_DESC_BYTE(4), /* bLength. */
+ USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
+ USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */
+};
+
+/*
+ * Vendor string.
+ */
+static const uint8_t vcom_string1[] = {
+ USB_DESC_BYTE(38), /* bLength. */
+ USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
+ 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0,
+ 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0,
+ 'c', 0, 's', 0
+};
+
+/*
+ * Device Description string.
+ */
+static const uint8_t vcom_string2[] = {
+ USB_DESC_BYTE(56), /* bLength. */
+ USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
+ 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0,
+ 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0,
+ 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0,
+ 'o', 0, 'r', 0, 't', 0
+};
+
+/*
+ * Serial Number string.
+ */
+static const uint8_t vcom_string3[] = {
+ USB_DESC_BYTE(8), /* bLength. */
+ USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
+ '0' + CH_KERNEL_MAJOR, 0,
+ '0' + CH_KERNEL_MINOR, 0,
+ '0' + CH_KERNEL_PATCH, 0
+};
+
+/*
+ * Strings wrappers array.
+ */
+static const USBDescriptor vcom_strings[] = {
+ {sizeof vcom_string0, vcom_string0},
+ {sizeof vcom_string1, vcom_string1},
+ {sizeof vcom_string2, vcom_string2},
+ {sizeof vcom_string3, vcom_string3}
+};
+
+/*
+ * Handles the GET_DESCRIPTOR callback. All required descriptors must be
+ * handled here.
+ */
+static const USBDescriptor *get_descriptor(USBDriver *usbp,
+ uint8_t dtype,
+ uint8_t dindex,
+ uint16_t lang) {
+
+ (void)usbp;
+ (void)lang;
+ switch (dtype) {
+ case USB_DESCRIPTOR_DEVICE:
+ return &vcom_device_descriptor;
+ case USB_DESCRIPTOR_CONFIGURATION:
+ return &vcom_configuration_descriptor;
+ case USB_DESCRIPTOR_STRING:
+ if (dindex < 4)
+ return &vcom_strings[dindex];
+ }
+ return NULL;
+}
+
+/**
+ * @brief IN EP1 state.
+ */
+static USBInEndpointState ep1instate;
+
+/**
+ * @brief OUT EP1 state.
+ */
+static USBOutEndpointState ep1outstate;
+
+/**
+ * @brief EP1 initialization structure (both IN and OUT).
+ */
+static const USBEndpointConfig ep1config = {
+ USB_EP_MODE_TYPE_BULK,
+ NULL,
+ sduDataTransmitted,
+ sduDataReceived,
+ 0x0040,
+ 0x0040,
+ &ep1instate,
+ &ep1outstate,
+ 2,
+ NULL
+};
+
+/**
+ * @brief IN EP2 state.
+ */
+static USBInEndpointState ep2instate;
+
+/**
+ * @brief EP2 initialization structure (IN only).
+ */
+static const USBEndpointConfig ep2config = {
+ USB_EP_MODE_TYPE_INTR,
+ NULL,
+ sduInterruptTransmitted,
+ NULL,
+ 0x0010,
+ 0x0000,
+ &ep2instate,
+ NULL,
+ 1,
+ NULL
+};
+
+/*
+ * Handles the USB driver global events.
+ */
+static void usb_event(USBDriver *usbp, usbevent_t event) {
+ extern SerialUSBDriver SDU1;
+
+ switch (event) {
+ case USB_EVENT_RESET:
+ return;
+ case USB_EVENT_ADDRESS:
+ return;
+ case USB_EVENT_CONFIGURED:
+ chSysLockFromISR();
+
+ /* Enables the endpoints specified into the configuration.
+ Note, this callback is invoked from an ISR so I-Class functions
+ must be used.*/
+ usbInitEndpointI(usbp, USBD2_DATA_REQUEST_EP, &ep1config);
+ usbInitEndpointI(usbp, USBD2_INTERRUPT_REQUEST_EP, &ep2config);
+
+ /* Resetting the state of the CDC subsystem.*/
+ sduConfigureHookI(&SDU1);
+
+ chSysUnlockFromISR();
+ return;
+ case USB_EVENT_SUSPEND:
+ return;
+ case USB_EVENT_WAKEUP:
+ return;
+ case USB_EVENT_STALLED:
+ return;
+ }
+ return;
+}
+
+/*
+ * USB driver configuration.
+ */
+const USBConfig usbcfg = {
+ usb_event,
+ get_descriptor,
+ sduRequestsHook,
+ NULL
+};
+
+/*
+ * Serial over USB driver configuration.
+ */
+const SerialUSBConfig serusbcfg = {
+ &USBD2,
+ USBD2_DATA_REQUEST_EP,
+ USBD2_DATA_AVAILABLE_EP,
+ USBD2_INTERRUPT_REQUEST_EP
+};
diff --git a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.h b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.h
index 8307241..2ffaa17 100644
--- a/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.h
+++ b/demos/STM32/RT-STM32F429-DISCOVERY-TRIBUF/usbcfg.h
@@ -1,25 +1,25 @@
-/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _USBCFG_H_
-#define _USBCFG_H_
-
-extern const USBConfig usbcfg;
-extern SerialUSBConfig serusbcfg;
-
-#endif /* _USBCFG_H_ */
-
-/** @} */
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _USBCFG_H_
+#define _USBCFG_H_
+
+extern const USBConfig usbcfg;
+extern SerialUSBConfig serusbcfg;
+
+#endif /* _USBCFG_H_ */
+
+/** @} */
diff --git a/demos/various/RT-Win32-TriBuf/main.c b/demos/various/RT-Win32-TriBuf/main.c
index 75fa1a5..bab25cd 100644
--- a/demos/various/RT-Win32-TriBuf/main.c
+++ b/demos/various/RT-Win32-TriBuf/main.c
@@ -25,8 +25,8 @@
/* TriBuf related. */
/*===========================================================================*/
-#define WRITER_DELAY 10
-#define READER_DELAY 20
+#define WRITER_DELAY_MS 10
+#define READER_DELAY_MS 20
#define WRITER_STACK_SIZE 4096
#define READER_STACK_SIZE 4096
@@ -50,11 +50,16 @@ static char read_front(void) {
const char *front;
msg_t error;
+ /* Wait until a new front buffer gets available with prepared data */
error = tribufWaitReadyTimeout(&tribuf, MS2ST(1000));
if (error == MSG_TIMEOUT)
chSysHalt("ERROR: read_front() timed out");
+
+ /* Retrieve the new front buffer */
tribufSwapFront(&tribuf);
front = (const char *)tribufGetFront(&tribuf);
+
+ /* Read data from the new front buffer */
return front[0];
}
@@ -65,8 +70,13 @@ static void write_back(char c) {
char *back;
+ /* Retrieve the current back buffer */
back = (char *)tribufGetBack(&tribuf);
+
+ /* Prepare data onto the current back buffer */
back[0] = c;
+
+ /* Exchange the prepared buffer with a new one */
tribufSwapBack(&tribuf);
}
@@ -133,14 +143,14 @@ int main(void) {
readertp = chThdCreateStatic(reader_wa, sizeof(reader_wa),
READER_PRIORITY,
- reader_thread, (void *)READER_DELAY);
+ reader_thread, (void *)READER_DELAY_MS);
writertp = chThdCreateStatic(writer_wa, sizeof(writer_wa),
WRITER_PRIORITY,
- writer_thread, (void *)WRITER_DELAY);
+ writer_thread, (void *)WRITER_DELAY_MS);
/*
- * Reads from the front buffer.
+ * Let the threads process data.
*/
for (;;)
chThdSleepMilliseconds(1000);
diff --git a/os/various/tribuf.c b/os/various/tribuf.c
index 689f583..80eb258 100644
--- a/os/various/tribuf.c
+++ b/os/various/tribuf.c
@@ -205,7 +205,9 @@ void tribufSwapBack(tribuf_t *handler) {
osalSysLock();
tribufSwapBackI(handler);
- chSchRescheduleS();
+#if (TRIBUF_USE_WAIT == TRUE)
+ osalOsRescheduleS();
+#endif
osalSysUnlock();
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-01-27 07:19:24 +0000