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| author | cpldcpu <cpldcpu@gmail.com> | 2013-11-04 00:22:17 +0100 |
|---|---|---|
| committer | cpldcpu <cpldcpu@gmail.com> | 2013-11-04 00:22:17 +0100 |
| commit | f3456ea1cfc56ebfa1fcea33be93856c0a71df37 (patch) | |
| tree | 40fdff10bbd1bb0229cbb27062790ea87a18c041 /firmware/usbdrv/usbdrvasm12.inc | |
| parent | 5b7617bfb1763f14a9e1e8792447d75cd076d2fa (diff) | |
| download | micronucleus-f3456ea1cfc56ebfa1fcea33be93856c0a71df37.tar.gz micronucleus-f3456ea1cfc56ebfa1fcea33be93856c0a71df37.tar.bz2 micronucleus-f3456ea1cfc56ebfa1fcea33be93856c0a71df37.zip | |
Updated USB Driver, nanite, oscal
Diffstat (limited to 'firmware/usbdrv/usbdrvasm12.inc')
| -rw-r--r-- | firmware/usbdrv/usbdrvasm12.inc | 45 |
1 files changed, 1 insertions, 44 deletions
diff --git a/firmware/usbdrv/usbdrvasm12.inc b/firmware/usbdrv/usbdrvasm12.inc index 78a14e0..d3bd056 100644 --- a/firmware/usbdrv/usbdrvasm12.inc +++ b/firmware/usbdrv/usbdrvasm12.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbdrvasm12.inc 740 2009-04-13 18:23:31Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the @@ -41,50 +40,8 @@ DATAx (rx) to ACK/NAK/STALL (tx) 2 7.5 16-60 USB_INTR_VECTOR: ;order of registers pushed: YL, SREG [sofError], YH, shift, x1, x2, x3, cnt push YL ;2 [35] push only what is necessary to sync with edge ASAP - in YL, SREG ;1 [37] push YL ;2 [39] - - in YL, TIMSK - cpi YL, 0 - breq compare2 ; don't go to app if equal (possible bootloader) - - ; prep and jump to app vector - pop YL - out SREG, YL - pop YL - rjmp __vectors - 2 - -compare2: - in YL, TCNT2 - cpi YL, 0xFF - breq bootloaderExt0 ; don't go to app if equal (bootloader) - - ; prep and jump to app vector - pop YL - out SREG, YL - pop YL - - ; some errors with 1 nop - ;nop - ;nop - ;nop - ;nop - ;nop - ;nop - ;nop - ;nop - ;nop - ;nop - - - rjmp __vectors - 2 - - -bootloaderExt0: - ldi YL, 0 - - ;---------------------------------------------------------------------------- ; Synchronize with sync pattern: ;---------------------------------------------------------------------------- @@ -432,4 +389,4 @@ skipAddrAssign: out USBOUT, x1 ;[16] <-- out J (idle) -- end of SE0 (EOP signal) out USBDDR, x2 ;[17] <-- release bus now out USBOUT, x3 ;[18] <-- ensure no pull-up resistors are active - rjmp doReturn
\ No newline at end of file + rjmp doReturn |