firmware: v2.03 release

13 files changed, 1085 insertions, 234 deletions

diff --git a/Readme.txt b/Readme.txt
index 6b3841a..e85e82f 100644
--- a/Readme.txt
+++ b/Readme.txt
@@ -1,4 +1,4 @@
-Micronucleus V2.02
+Micronucleus V2.03
 ==================
 
 Micronucleus is a bootloader designed for AVR ATtiny microcontrollers with a minimal usb interface, cross platform libusb-based program upload tool, and a strong emphasis on bootloader compactness. To the authors knowledge this is, by far, the smallest USB bootloader for AVR ATtiny
@@ -44,12 +44,12 @@ To allow maximum flexibility, micronucleus supports a configuration system. To c
 
 Currently, the following configurations are included and tested. Please check the subfolders /firmware/configurations/ for details. Hex files can be found in /releases.
 
-t84_default     -   ATtiny84A default configuration     -   1538 bytes
-t841_default    -   ATtiny841 default configuration     -   1590 bytes
-t85_default     -   ATtiny85  default configuration     -   1592 bytes
-t85_aggressive  -   ATtiny85  smaller size - critical   -   1422 bytes
-t167_default    -   ATtiny167 default (uses xtal)       -   1418 bytes
-Nanite841       -   Nanite841 firmware                  -   1614 bytes
+t84_default     -   ATtiny84A default configuration     -   1544 bytes
+t841_default    -   ATtiny841 default configuration     -   1596 bytes
+t85_default     -   ATtiny85  default configuration     -   1598 bytes
+t85_aggressive  -   ATtiny85  smaller size - critical   -   1428 bytes
+t167_default    -   ATtiny167 default (uses xtal)       -   1424 bytes
+Nanite841       -   Nanite841 firmware                  -   1620 bytes
 
 You can add your own configuration by adding a new folder to /firmware/configurations/. The folder has to contain a customized "Makefile.inc" and "bootloaderconfig.h". Feel free to supply a pull request if you added and tested a previously unsupported device.
 
@@ -114,13 +114,17 @@ Changes
     - Fixes timing bug with Windows 10 USB drivers. Some Win 10 drivers reduce the
       delay between reset and the first data packet to 20 ms. This led to an issue 
       with osccalASM.S, which did not terminate correctly.
-  
+
+• v2.03 February 13th, 2016
+    - Added page buffer clearing if a new block transfer is initiated. This fixes a 
+      critical, but extremely rare bug that could lead to bricking of the
+      device if micronucleus is restarted after an USB error.       
  
 Credits
 =======
 
 Firmware:
- • Micronucleus V2.01            (c) 2015 Tim Bo"scke - cpldcpu@gmail.com
+ • Micronucleus V2.03            (c) 2016 Tim Bo"scke - cpldcpu@gmail.com
                                  (c) 2014 Shay Green
  • Original Micronucleus         (c) 2012 Jenna Fox
  • Based on USBaspLoader-tiny85  (c) 2012 Louis Beaudoin
diff --git a/firmware/configuration/BitBoss/Makefile.inc b/firmware/configuration/BitBoss/Makefile.inc
new file mode 100644
index 0000000..e147248
--- /dev/null
+++ b/firmware/configuration/BitBoss/Makefile.inc
@@ -0,0 +1,60 @@
+# Name: Makefile
+# Project: Micronucleus
+# License: GNU GPL v2 (see License.txt)
+#
+# Controller type: ATtiny 841 
+# Configuration:   Default configuration - 12 Mhz RC oscillator
+# Last Change:     Mar 16,2014
+ 
+
+F_CPU = 12000000
+DEVICE = attiny841
+
+# hexadecimal address for bootloader section to begin. To calculate the best value:
+# - make clean; make main.hex; ### output will list data: 2124 (or something like that)
+# - for the size of your device (8kb = 1024 * 8 = 8192) subtract above value 2124... = 6068
+# - How many pages in is that? 6068 / 64 (tiny85 page size in bytes) = 94.8125
+# - round that down to 94 - our new bootloader address is 94 * 64 = 6016, in hex = 1780
+BOOTLOADER_ADDRESS = 1980
+
+FUSEOPT = -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xfe:m
+FUSEOPT_DISABLERESET =  # TODO
+
+#---------------------------------------------------------------------
+# ATtiny841
+#---------------------------------------------------------------------
+# Fuse extended byte:
+# 0xFE = 1 1 1 1   1 1 1 0
+#                        ^
+#                        |
+#                        +---- SELFPRGEN (enable self programming flash)
+#
+# Fuse high byte:
+# 0xdd = 1 1 0 1   1 1 0 1
+#        ^ ^ ^ ^   ^ \-+-/ 
+#        | | | |   |   +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V)
+#        | | | |   +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved)
+#        | | | +-------------- WDTON (watchdog timer always on -> disable)
+#        | | +---------------- SPIEN (enable serial programming -> enabled)
+#        | +------------------ DWEN (debug wire enable)
+#        +-------------------- RSTDISBL (disable external reset -> enabled)
+#
+# Fuse high byte ("no reset": external reset disabled, can't program through SPI anymore)
+# 0x5d = 0 1 0 1   1 1 0 1
+#        ^ ^ ^ ^   ^ \-+-/ 
+#        | | | |   |   +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V)
+#        | | | |   +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved)
+#        | | | +-------------- WDTON (watchdog timer always on -> disable)
+#        | | +---------------- SPIEN (enable serial programming -> enabled)
+#        | +------------------ DWEN (debug wire enable)
+#        +-------------------- RSTDISBL (disable external reset -> disabled!)
+#
+# Fuse low byte:
+# 0xe2 = 1 1 1 0   0 0 1 0
+#        ^ ^ \+/   \--+--/
+#        | |  |       +------- CKSEL 3..0 (clock selection -> RC Oscillator)
+#        | |  +--------------- SUT 1..0 (BOD enabled, fast rising power)
+#        | +------------------ CKOUT (clock output on CKOUT pin -> disabled)
+#        +-------------------- CKDIV8 (divide clock by 8 -> don't divide)
+
+
diff --git a/firmware/configuration/BitBoss/bootloaderconfig.h b/firmware/configuration/BitBoss/bootloaderconfig.h
new file mode 100644
index 0000000..0e6d6af
--- /dev/null
+++ b/firmware/configuration/BitBoss/bootloaderconfig.h
@@ -0,0 +1,267 @@
+/* Name: bootloaderconfig.h
+ * Micronucleus configuration file. 
+ * This file (together with some settings in Makefile.inc) configures the boot loader
+ * according to the hardware.
+ * 
+ * Controller type: ATtiny 841 - 12 MHz
+ * Configuration:   Default configuration
+ *       USB D- :   PB0
+ *       USB D+ :   PB1
+ *       Entry  :   Always
+ *       LED    :   PB2, Active Low
+ *       OSCCAL :   Revert to precalibrated value (8 MHz)
+ * Note: can use 12 MHz V-USB without PLL due to stable RC-osc in ATTiny841
+ *       Flash write time may be too low.
+ * Last Change:     Mar 16,2014
+ *
+ * License: GNU GPL v2 (see License.txt
+ */
+
+#ifndef __bootloaderconfig_h_included__
+#define __bootloaderconfig_h_included__
+
+/* ------------------------------------------------------------------------- */
+/*                       Hardware configuration.                             */
+/*      Change this according to your CPU and USB configuration              */
+/* ------------------------------------------------------------------------- */
+
+#define USB_CFG_IOPORTNAME      B
+  /* This is the port where the USB bus is connected. When you configure it to
+   * "B", the registers PORTB, PINB and DDRB will be used.
+   */
+
+#define USB_CFG_DMINUS_BIT      0
+/* This is the bit number in USB_CFG_IOPORT where the USB D- line is connected.
+ * This may be any bit in the port.
+ */
+#define USB_CFG_DPLUS_BIT       1
+/* This is the bit number in USB_CFG_IOPORT where the USB D+ line is connected.
+ * This may be any bit in the port, but must be configured as a pin change interrupt.
+ */
+
+#define USB_CFG_CLOCK_KHZ       (F_CPU/1000)
+/* Clock rate of the AVR in kHz. Legal values are 12000, 12800, 15000, 16000,
+ * 16500, 18000 and 20000. The 12.8 MHz and 16.5 MHz versions of the code
+ * require no crystal, they tolerate +/- 1% deviation from the nominal
+ * frequency. All other rates require a precision of 2000 ppm and thus a
+ * crystal!
+ * Since F_CPU should be defined to your actual clock rate anyway, you should
+ * not need to modify this setting.
+ */
+
+/* ------------- Set up interrupt configuration (CPU specific) --------------   */
+/* The register names change quite a bit in the ATtiny family. Pay attention    */
+/* to the manual. Note that the interrupt flag system is still used even though */
+/* interrupts are disabled. So this has to be configured correctly.             */
+
+
+// setup interrupt for Pin Change for D+
+#define USB_INTR_CFG            PCMSK1
+#define USB_INTR_CFG_SET        (1 << USB_CFG_DPLUS_BIT)
+#define USB_INTR_CFG_CLR        0
+#define USB_INTR_ENABLE         GIMSK
+#define USB_INTR_ENABLE_BIT     PCIE1
+#define USB_INTR_PENDING        GIFR
+#define USB_INTR_PENDING_BIT    PCIF1
+#define USB_INTR_VECTOR         PCINT1_vect
+    
+/* ------------------------------------------------------------------------- */
+/*       Configuration relevant to the CPU the bootloader is running on      */
+/* ------------------------------------------------------------------------- */
+
+// how many milliseconds should host wait till it sends another erase or write?
+// needs to be above 4.5 (and a whole integer) as avr freezes for 4.5ms
+
+// Set bit 7 to reduce wait time for page erase by factor of four
+#define MICRONUCLEUS_WRITE_SLEEP 128 + 5
+
+// ATtiny841 does not know OSCCAL
+#ifndef OSCCAL
+#define OSCCAL OSCCAL0
+#endif
+
+/* ---------------------- feature / code size options ---------------------- */
+/*               Configure the behavior of the bootloader here               */
+/* ------------------------------------------------------------------------- */
+
+/*
+ *  Define Bootloader entry condition
+ * 
+ *  If the entry condition is not met, the bootloader will not be activated and the user program
+ *  is executed directly after a reset. If no user program has been loaded, the bootloader
+ *  is always active.
+ * 
+ *  ENTRY_ALWAYS        Always activate the bootloader after reset. Requires the least
+ *                      amount of code.
+ *
+ *  ENTRY_WATCHDOG      Activate the bootloader after a watchdog reset. This can be used
+ *                      to enter the bootloader from the user program.
+ *                      Adds 22 bytes.
+ *
+ *  ENTRY_EXT_RESET     Activate the bootloader after an external reset was issued by 
+ *                      pulling the reset pin low. It may be necessary to add an external
+ *                      pull-up resistor to the reset pin if this entry method appears to
+ *                      behave unreliably.
+ *                      Adds 22 bytes.
+ *
+ *  ENTRY_JUMPER        Activate the bootloader when a specific pin is pulled low by an 
+ *                      external jumper. 
+ *                      Adds 34 bytes.
+ *
+ *       JUMPER_PIN     Pin the jumper is connected to. (e.g. PB0)
+ *       JUMPER_PORT    Port out register for the jumper (e.g. PORTB)  
+ *       JUMPER_DDR     Port data direction register for the jumper (e.g. DDRB)  
+ *       JUMPER_INP     Port inout register for the jumper (e.g. PINB)  
+ * 
+ */
+
+#define ENTRYMODE ENTRY_JUMPER
+
+#define JUMPER_PIN    PA0
+#define JUMPER_PORT   PORTA 
+#define JUMPER_DDR    DDRA 
+#define JUMPER_INP    PINA 
+ 
+/*
+  Internal implementation, don't change this unless you want to add an entrymode.
+*/ 
+ 
+#define ENTRY_ALWAYS    1
+#define ENTRY_WATCHDOG  2
+#define ENTRY_EXT_RESET 3
+#define ENTRY_JUMPER    4
+
+#if ENTRYMODE==ENTRY_ALWAYS
+  #define bootLoaderInit()
+  #define bootLoaderExit()
+  #define bootLoaderStartCondition() 1
+#elif ENTRYMODE==ENTRY_WATCHDOG
+  #define bootLoaderInit()
+  #define bootLoaderExit()
+  #define bootLoaderStartCondition() (MCUSR&_BV(WDRF))
+#elif ENTRYMODE==ENTRY_EXT_RESET
+  #define bootLoaderInit()
+  #define bootLoaderExit()
+  #define bootLoaderStartCondition() (MCUSR&_BV(EXTRF))
+#elif ENTRYMODE==ENTRY_JUMPER
+  // Enable pull up on jumper pin and delay to stabilize input    
+  #define bootLoaderInit()   {JUMPER_DDR&=~_BV(JUMPER_PIN);JUMPER_PORT|=_BV(JUMPER_PIN);_delay_ms(1);}
+  #define bootLoaderExit()   {JUMPER_PORT&=~_BV(JUMPER_PIN);}
+  #define bootLoaderStartCondition() (!(JUMPER_INP&_BV(JUMPER_PIN)))
+#else
+   #error "No entry mode defined"
+#endif
+
+/*
+ * Define bootloader timeout value. 
+ * 
+ *  The bootloader will only time out if a user program was loaded.
+ * 
+ *  AUTO_EXIT_NO_USB_MS        The bootloader will exit after this delay if no USB is connected.
+ *                             Set to 0 to disable
+ *                             Adds ~6 bytes.
+ *                             (This will wait for an USB SE0 reset from the host)
+ *
+ *  AUTO_EXIT_MS               The bootloader will exit after this delay if no USB communication
+ *                             from the host tool was received.
+ *                             Set to 0 to disable
+ *  
+ *  All values are approx. in milliseconds
+ */
+
+#define AUTO_EXIT_NO_USB_MS    0
+#define AUTO_EXIT_MS           6000
+
+ /*
+ *  Defines the setting of the RC-oscillator calibration after quitting the bootloader. (OSCCAL)
+ * 
+ *  OSCCAL_RESTORE_DEFAULT    Set this to '1' to revert to OSCCAL factore calibration after bootlaoder exit.
+ *                            This is 8 MHz +/-2% on most devices or 16 MHz on the ATtiny 85 with activated PLL.
+ *                            Adds ~14 bytes.
+ *
+ *  OSCCAL_SAVE_CALIB         Set this to '1' to save the OSCCAL calibration during program upload.
+ *                            This value will be reloaded after reset and will also be used for the user
+ *                            program unless "OSCCAL_RESTORE_DEFAULT" is active. This allows calibrate the internal
+ *                            RC oscillator to the F_CPU target frequency +/-1% from the USB timing. Please note
+ *                            that only true if the ambient temperature does not change.
+ *                            Adds ~38 bytes.
+ *
+ *  OSCCAL_HAVE_XTAL          Set this to '1' if you have an external crystal oscillator. In this case no attempt
+ *                            will be made to calibrate the oscillator. You should deactivate both options above
+ *                            if you use this to avoid redundant code.
+ *
+ *  If both options are selected, OSCCAL_RESTORE_DEFAULT takes precedence.
+ *
+ *  If no option is selected, OSCCAL will be left untouched and stays at either factory calibration or F_CPU depending
+ *  on whether the bootloader was activated. This will take the least memory. You can use this if your program
+ *  comes with its own OSCCAL calibration or an external clock source is used. 
+ */
+ 
+#define OSCCAL_ENTRY_ALWAYS
+#define OSCCAL_SAVE_CALIB 1
+#define OSCCAL_HAVE_XTAL 0
+  
+/*  
+ *  Defines handling of an indicator LED while the bootloader is active.  
+ * 
+ *  LED_MODE                  Define behavior of attached LED or suppress LED code.
+ *
+ *          NONE              Do not generate LED code (gains 18 bytes).
+ *          ACTIVE_HIGH       LED is on when output pin is high. This will toggle bettwen 1 and 0.
+ *          ACTIVE_LOW        LED is on when output pin is low.  This will toggle between Z and 0.
+ *
+ *  LED_DDR,LED_PORT,LED_PIN  Where is your LED connected?
+ *
+ */ 
+
+#define LED_MODE    ACTIVE_HIGH
+
+#define LED_DDR     DDRB
+#define LED_PORT    PORTB
+#define LED_PIN     PB2
+
+/*
+ *  This is the implementation of the LED code. Change the configuration above unless you want to 
+ *  change the led behavior
+ *
+ *  LED_INIT                  Called once after bootloader entry
+ *  LED_EXIT                  Called once during bootloader exit
+ *  LED_MACRO                 Called in the main loop with the idle counter as parameter.
+ *                            Use to define pattern.
+*/
+
+#define NONE        0
+#define ACTIVE_HIGH 1
+#define ACTIVE_LOW  2
+
+#if LED_MODE==ACTIVE_HIGH
+  #define LED_INIT(x)   LED_DDR   = _BV(LED_PIN); 
+  #define LED_EXIT(x)   {LED_DDR  &=~_BV(LED_PIN);LED_PORT  &=~_BV(LED_PIN);}
+  #define LED_MACRO(x)  if ( x & 0x4c ) {LED_PORT&=~_BV(LED_PIN);} else {LED_PORT|=_BV(LED_PIN);}
+#elif LED_MODE==ACTIVE_LOW
+  #define LED_INIT(x)   LED_PORT &=~_BV(LED_PIN);   
+  #define LED_EXIT(x)   LED_DDR  &=~_BV(LED_PIN);
+  #define LED_MACRO(x)  if ( x & 0x4c ) {LED_DDR&=~_BV(LED_PIN);} else {LED_DDR|=_BV(LED_PIN);}  
+#elif LED_MODE==NONE
+  #define LED_INIT(x)
+  #define LED_EXIT(x)
+  #define LED_MACRO(x)
+#endif
+
+/* --------------------------------------------------------------------------- */
+/* Micronucleus internal configuration. Do not change anything below this line */
+/* --------------------------------------------------------------------------- */
+
+// Microcontroller vectortable entries in the flash
+#define RESET_VECTOR_OFFSET         0
+
+// number of bytes before the boot loader vectors to store the tiny application vector table
+#define TINYVECTOR_RESET_OFFSET     4
+#define TINYVECTOR_OSCCAL_OFFSET    6
+
+/* ------------------------------------------------------------------------ */
+// postscript are the few bytes at the end of programmable memory which store tinyVectors
+#define POSTSCRIPT_SIZE 6
+#define PROGMEM_SIZE (BOOTLOADER_ADDRESS - POSTSCRIPT_SIZE) /* max size of user program */
+
+#endif /* __bootloader_h_included__ */
diff --git a/firmware/main.c b/firmware/main.c
index bcfa91e..8221105 100644
--- a/firmware/main.c
+++ b/firmware/main.c
@@ -1,7 +1,7 @@
 /* 
- * Project: Micronucleus -  v2.1
+ * Project: Micronucleus -  v2.3
  *
- * Micronucleus V2.1             (c) 2015 Tim Bo"scke - cpldcpu@gmail.com
+ * Micronucleus V2.3             (c) 2016 Tim Bo"scke - cpldcpu@gmail.com
  *                               (c) 2014 Shay Green
  * Original Micronucleus         (c) 2012 Jenna Fox
  *
@@ -12,7 +12,7 @@
  */
  
 #define MICRONUCLEUS_VERSION_MAJOR 2
-#define MICRONUCLEUS_VERSION_MINOR 2
+#define MICRONUCLEUS_VERSION_MINOR 3
 
 #include <avr/io.h>
 #include <avr/pgmspace.h>
@@ -175,6 +175,12 @@ static uint8_t usbFunctionSetup(uint8_t data[8]) {
         if ( currentAddress.w != 0 ) {
             currentAddress.b[0]=rq->wIndex.bytes[0] & (~ (SPM_PAGESIZE-1));     
             currentAddress.b[1]=rq->wIndex.bytes[1];     
+            
+            // clear page buffer as a precaution before filling the buffer in case 
+            // a previous write operation failed and there is still something in the buffer.         
+            __SPM_REG=(_BV(CTPB)|_BV(__SPM_ENABLE));
+            asm volatile("spm");
+            
         }        
     } else if (rq->bRequest == cmd_write_data) { // Write data
       writeWordToPageBuffer(rq->wValue.word);
diff --git a/firmware/out b/firmware/out
new file mode 100644
index 0000000..976c81c
--- /dev/null
+++ b/firmware/out
@@ -0,0 +1,256 @@
+:20000000BFCC37C036C035C034C033C032C031C030C02FC02EC02DC02CC02BC02AC029C045
+:2000200028C027C026C025C024C023C022C021C020C01FC01EC01DC01CC01BC011241FBE59
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+:20006000A0E3B1E001C01D92A633B207E1F7B9D181C5C6CF00C000C000C000C000C000C0AD
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diff --git a/firmware/out_borked.hex b/firmware/out_borked.hex
new file mode 100644
index 0000000..98126e7
--- /dev/null
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diff --git a/firmware/releases/Nanite841.hex b/firmware/releases/Nanite841.hex
index c9a0475..48bdfc8 100644
--- a/firmware/releases/Nanite841.hex
+++ b/firmware/releases/Nanite841.hex
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diff --git a/firmware/releases/t167_default.hex b/firmware/releases/t167_default.hex
index 57d0e1d..a664128 100644
--- a/firmware/releases/t167_default.hex
+++ b/firmware/releases/t167_default.hex
@@ -1,6 +1,6 @@
 :103A000018C0000039FA80059487090212000101EC
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diff --git a/firmware/releases/t45_default.hex b/firmware/releases/t45_default.hex
index d24cfb4..07c497e 100644
--- a/firmware/releases/t45_default.hex
+++ b/firmware/releases/t45_default.hex
@@ -1,6 +1,6 @@
 :1009800017C0097A40059206090212000101008091
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diff --git a/firmware/releases/t841_default.hex b/firmware/releases/t841_default.hex
index 92ef227..c9cd4b0 100644
--- a/firmware/releases/t841_default.hex
+++ b/firmware/releases/t841_default.hex
@@ -1,6 +1,6 @@
 :1019800017C0197A10859315090212000101008011
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diff --git a/firmware/releases/t84_default.hex b/firmware/releases/t84_default.hex
index dc3534c..d8cfd3f 100644
--- a/firmware/releases/t84_default.hex
+++ b/firmware/releases/t84_default.hex
@@ -1,6 +1,6 @@
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diff --git a/firmware/releases/t85_aggressive.hex b/firmware/releases/t85_aggressive.hex
index 5373ae9..d918965 100644
--- a/firmware/releases/t85_aggressive.hex
+++ b/firmware/releases/t85_aggressive.hex
@@ -1,6 +1,6 @@
 :101A400017C01A3A4005930B0902120001010080E9
 :101A50003209040000000000000012011001FF0024
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 :0400000300001A409F
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diff --git a/firmware/releases/t85_default.hex b/firmware/releases/t85_default.hex
index b16e589..5c1544b 100644
--- a/firmware/releases/t85_default.hex
+++ b/firmware/releases/t85_default.hex
@@ -1,6 +1,6 @@
 :1019800017C0197A4005930B09021200010100806B
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