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author | James <james.mckenzie@citrix.com> | 2013-10-18 12:17:17 +0100 |
---|---|---|
committer | James <james.mckenzie@citrix.com> | 2013-10-18 12:17:17 +0100 |
commit | 3c24b4b41abf56cfd3cdcd998b77514d9ba55a6c (patch) | |
tree | 80e482555b70b57e701d603aa352b4ecbd3206c1 /quartus/saa5050.vhd | |
parent | 2deecc29d2b390a23eeebc54b1db28326b9bcd4e (diff) | |
download | bbc_de1-3c24b4b41abf56cfd3cdcd998b77514d9ba55a6c.tar.gz bbc_de1-3c24b4b41abf56cfd3cdcd998b77514d9ba55a6c.tar.bz2 bbc_de1-3c24b4b41abf56cfd3cdcd998b77514d9ba55a6c.zip |
revert fixes
Diffstat (limited to 'quartus/saa5050.vhd')
-rw-r--r-- | quartus/saa5050.vhd | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/quartus/saa5050.vhd b/quartus/saa5050.vhd index 5fa1b2c..57dd999 100644 --- a/quartus/saa5050.vhd +++ b/quartus/saa5050.vhd @@ -85,7 +85,6 @@ port ( );
end entity;
--- altera message_off 10036
architecture rtl of saa5050 is
component saa5050_rom IS
@@ -156,7 +155,7 @@ begin flash <= flash_counter(5) and flash_counter(4);
-- Sync inputs
- process(DI_CLOCK,nRESET,DI_CLKEN)
+ process(DI_CLOCK,nRESET)
begin
if nRESET = '0' then
di_r <= (others => '0');
@@ -170,7 +169,7 @@ begin end process;
-- Register data into pixel clock domain
- process(CLOCK,nRESET,CLKEN)
+ process(CLOCK,nRESET)
begin
if nRESET = '0' then
code <= (others => '0');
@@ -189,7 +188,7 @@ begin gfx & code & std_logic_vector(line_addr);
-- Character row and pixel counters
- process(CLOCK,nRESET,CLKEN)
+ process(CLOCK,nRESET)
begin
if nRESET = '0' then
dew_latch <= '0';
@@ -261,7 +260,7 @@ begin end process;
-- Shift register
- process(CLOCK,nRESET,CLKEN)
+ process(CLOCK,nRESET)
begin
if nRESET = '0' then
shift_reg <= (others => '0');
@@ -293,7 +292,7 @@ begin end process;
-- Control character handling
- process(CLOCK,nRESET,CLKEN)
+ process(CLOCK,nRESET)
begin
if nRESET = '0' then
fg <= (others => '1');
@@ -364,7 +363,7 @@ begin end process;
-- Output
- process(CLOCK,nRESET,CLKEN,shift_reg,flash,conceal,is_flash)
+ process(CLOCK,nRESET)
variable pixel : std_logic;
begin
pixel := shift_reg(5) and not ((flash and is_flash) or conceal);
|