diff options
| author | root <root@lab.panaceas.james.local> | 2013-10-18 13:38:03 +0100 |
|---|---|---|
| committer | root <root@lab.panaceas.james.local> | 2013-10-18 13:38:03 +0100 |
| commit | fdc9f05a49927558ed70b0a4c645780cbedee706 (patch) | |
| tree | 520aaaa6b00d7b26b01878d28cd4aec9b9f64da2 | |
| parent | e76089009e2def48d0334acacd3218dfd8f512f8 (diff) | |
| download | bbc_de1-fdc9f05a49927558ed70b0a4c645780cbedee706.tar.gz bbc_de1-fdc9f05a49927558ed70b0a4c645780cbedee706.tar.bz2 bbc_de1-fdc9f05a49927558ed70b0a4c645780cbedee706.zip | |
working
| -rw-r--r-- | quartus/bbc_micro_de1.qsf | 996 | ||||
| -rw-r--r-- | quartus/bbc_micro_de1.vhd | 62 | ||||
| -rw-r--r-- | quartus/saa5050.vhd | 2 |
3 files changed, 546 insertions, 514 deletions
diff --git a/quartus/bbc_micro_de1.qsf b/quartus/bbc_micro_de1.qsf index 53ab492..6f8c902 100644 --- a/quartus/bbc_micro_de1.qsf +++ b/quartus/bbc_micro_de1.qsf @@ -36,503 +36,503 @@ # -------------------------------------------------------------------------- #
-set_global_assignment -name FAMILY "Cyclone II"
-set_global_assignment -name DEVICE EP2C20F484C7
+set_global_assignment -name FAMILY "Cyclone II" +set_global_assignment -name DEVICE EP2C20F484C7 set_global_assignment -name TOP_LEVEL_ENTITY bbc_micro_de1
-set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1
-set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:48:44 JULY 12, 2011"
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 9.1 +set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:48:44 JULY 12, 2011" set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1" -set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
-set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
-set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
-set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-set_location_assignment PIN_A13 -to GPIO_0[0]
-set_location_assignment PIN_B13 -to GPIO_0[1]
-set_location_assignment PIN_A14 -to GPIO_0[2]
-set_location_assignment PIN_B14 -to GPIO_0[3]
-set_location_assignment PIN_A15 -to GPIO_0[4]
-set_location_assignment PIN_B15 -to GPIO_0[5]
-set_location_assignment PIN_A16 -to GPIO_0[6]
-set_location_assignment PIN_B16 -to GPIO_0[7]
-set_location_assignment PIN_A17 -to GPIO_0[8]
-set_location_assignment PIN_B17 -to GPIO_0[9]
-set_location_assignment PIN_A18 -to GPIO_0[10]
-set_location_assignment PIN_B18 -to GPIO_0[11]
-set_location_assignment PIN_A19 -to GPIO_0[12]
-set_location_assignment PIN_B19 -to GPIO_0[13]
-set_location_assignment PIN_A20 -to GPIO_0[14]
-set_location_assignment PIN_B20 -to GPIO_0[15]
-set_location_assignment PIN_C21 -to GPIO_0[16]
-set_location_assignment PIN_C22 -to GPIO_0[17]
-set_location_assignment PIN_D21 -to GPIO_0[18]
-set_location_assignment PIN_D22 -to GPIO_0[19]
-set_location_assignment PIN_E21 -to GPIO_0[20]
-set_location_assignment PIN_E22 -to GPIO_0[21]
-set_location_assignment PIN_F21 -to GPIO_0[22]
-set_location_assignment PIN_F22 -to GPIO_0[23]
-set_location_assignment PIN_G21 -to GPIO_0[24]
-set_location_assignment PIN_G22 -to GPIO_0[25]
-set_location_assignment PIN_J21 -to GPIO_0[26]
-set_location_assignment PIN_J22 -to GPIO_0[27]
-set_location_assignment PIN_K21 -to GPIO_0[28]
-set_location_assignment PIN_K22 -to GPIO_0[29]
-set_location_assignment PIN_J19 -to GPIO_0[30]
-set_location_assignment PIN_J20 -to GPIO_0[31]
-set_location_assignment PIN_J18 -to GPIO_0[32]
-set_location_assignment PIN_K20 -to GPIO_0[33]
-set_location_assignment PIN_L19 -to GPIO_0[34]
-set_location_assignment PIN_L18 -to GPIO_0[35]
-set_location_assignment PIN_H12 -to GPIO_1[0]
-set_location_assignment PIN_H13 -to GPIO_1[1]
-set_location_assignment PIN_H14 -to GPIO_1[2]
-set_location_assignment PIN_G15 -to GPIO_1[3]
-set_location_assignment PIN_E14 -to GPIO_1[4]
-set_location_assignment PIN_E15 -to GPIO_1[5]
-set_location_assignment PIN_F15 -to GPIO_1[6]
-set_location_assignment PIN_G16 -to GPIO_1[7]
-set_location_assignment PIN_F12 -to GPIO_1[8]
-set_location_assignment PIN_F13 -to GPIO_1[9]
-set_location_assignment PIN_C14 -to GPIO_1[10]
-set_location_assignment PIN_D14 -to GPIO_1[11]
-set_location_assignment PIN_D15 -to GPIO_1[12]
-set_location_assignment PIN_D16 -to GPIO_1[13]
-set_location_assignment PIN_C17 -to GPIO_1[14]
-set_location_assignment PIN_C18 -to GPIO_1[15]
-set_location_assignment PIN_C19 -to GPIO_1[16]
-set_location_assignment PIN_C20 -to GPIO_1[17]
-set_location_assignment PIN_D19 -to GPIO_1[18]
-set_location_assignment PIN_D20 -to GPIO_1[19]
-set_location_assignment PIN_E20 -to GPIO_1[20]
-set_location_assignment PIN_F20 -to GPIO_1[21]
-set_location_assignment PIN_E19 -to GPIO_1[22]
-set_location_assignment PIN_E18 -to GPIO_1[23]
-set_location_assignment PIN_G20 -to GPIO_1[24]
-set_location_assignment PIN_G18 -to GPIO_1[25]
-set_location_assignment PIN_G17 -to GPIO_1[26]
-set_location_assignment PIN_H17 -to GPIO_1[27]
-set_location_assignment PIN_J15 -to GPIO_1[28]
-set_location_assignment PIN_H18 -to GPIO_1[29]
-set_location_assignment PIN_N22 -to GPIO_1[30]
-set_location_assignment PIN_N21 -to GPIO_1[31]
-set_location_assignment PIN_P15 -to GPIO_1[32]
-set_location_assignment PIN_N15 -to GPIO_1[33]
-set_location_assignment PIN_P17 -to GPIO_1[34]
-set_location_assignment PIN_P18 -to GPIO_1[35]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[7]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[8]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[9]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[10]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[11]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[12]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[13]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[14]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[15]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[16]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[17]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[18]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[19]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[20]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[21]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[22]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[23]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[24]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[25]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[26]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[27]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[28]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[29]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[30]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[31]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[32]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[33]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[34]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[35]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[7]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[8]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[9]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[10]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[11]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[12]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[13]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[14]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[15]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[16]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[17]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[18]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[19]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[20]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[21]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[22]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[23]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[24]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[25]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[26]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[27]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[28]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[29]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[30]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[31]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[32]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[33]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[34]
-set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[35]
-set_location_assignment PIN_L22 -to SW[0]
-set_location_assignment PIN_L21 -to SW[1]
-set_location_assignment PIN_M22 -to SW[2]
-set_location_assignment PIN_V12 -to SW[3]
-set_location_assignment PIN_W12 -to SW[4]
-set_location_assignment PIN_U12 -to SW[5]
-set_location_assignment PIN_U11 -to SW[6]
-set_location_assignment PIN_M2 -to SW[7]
-set_location_assignment PIN_M1 -to SW[8]
-set_location_assignment PIN_L2 -to SW[9]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[7]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[8]
-set_instance_assignment -name IO_STANDARD LVTTL -to SW[9]
-set_location_assignment PIN_J2 -to HEX0[0]
-set_location_assignment PIN_J1 -to HEX0[1]
-set_location_assignment PIN_H2 -to HEX0[2]
-set_location_assignment PIN_H1 -to HEX0[3]
-set_location_assignment PIN_F2 -to HEX0[4]
-set_location_assignment PIN_F1 -to HEX0[5]
-set_location_assignment PIN_E2 -to HEX0[6]
-set_location_assignment PIN_E1 -to HEX1[0]
-set_location_assignment PIN_H6 -to HEX1[1]
-set_location_assignment PIN_H5 -to HEX1[2]
-set_location_assignment PIN_H4 -to HEX1[3]
-set_location_assignment PIN_G3 -to HEX1[4]
-set_location_assignment PIN_D2 -to HEX1[5]
-set_location_assignment PIN_D1 -to HEX1[6]
-set_location_assignment PIN_G5 -to HEX2[0]
-set_location_assignment PIN_G6 -to HEX2[1]
-set_location_assignment PIN_C2 -to HEX2[2]
-set_location_assignment PIN_C1 -to HEX2[3]
-set_location_assignment PIN_E3 -to HEX2[4]
-set_location_assignment PIN_E4 -to HEX2[5]
-set_location_assignment PIN_D3 -to HEX2[6]
-set_location_assignment PIN_F4 -to HEX3[0]
-set_location_assignment PIN_D5 -to HEX3[1]
-set_location_assignment PIN_D6 -to HEX3[2]
-set_location_assignment PIN_J4 -to HEX3[3]
-set_location_assignment PIN_L8 -to HEX3[4]
-set_location_assignment PIN_F3 -to HEX3[5]
-set_location_assignment PIN_D4 -to HEX3[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[6]
-set_location_assignment PIN_R22 -to KEY[0]
-set_location_assignment PIN_R21 -to KEY[1]
-set_location_assignment PIN_T22 -to KEY[2]
-set_location_assignment PIN_T21 -to KEY[3]
-set_location_assignment PIN_R20 -to LEDR[0]
-set_location_assignment PIN_R19 -to LEDR[1]
-set_location_assignment PIN_U19 -to LEDR[2]
-set_location_assignment PIN_Y19 -to LEDR[3]
-set_location_assignment PIN_T18 -to LEDR[4]
-set_location_assignment PIN_V19 -to LEDR[5]
-set_location_assignment PIN_Y18 -to LEDR[6]
-set_location_assignment PIN_U18 -to LEDR[7]
-set_location_assignment PIN_R18 -to LEDR[8]
-set_location_assignment PIN_R17 -to LEDR[9]
-set_location_assignment PIN_U22 -to LEDG[0]
-set_location_assignment PIN_U21 -to LEDG[1]
-set_location_assignment PIN_V22 -to LEDG[2]
-set_location_assignment PIN_V21 -to LEDG[3]
-set_location_assignment PIN_W22 -to LEDG[4]
-set_location_assignment PIN_W21 -to LEDG[5]
-set_location_assignment PIN_Y22 -to LEDG[6]
-set_location_assignment PIN_Y21 -to LEDG[7]
-set_instance_assignment -name IO_STANDARD LVTTL -to KEY[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to KEY[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to KEY[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to KEY[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[7]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[8]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[9]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[4]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[5]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[6]
-set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[7]
-set_location_assignment PIN_D12 -to CLOCK_27[0]
-set_location_assignment PIN_E12 -to CLOCK_27[1]
-set_location_assignment PIN_B12 -to CLOCK_24[0]
-set_location_assignment PIN_A12 -to CLOCK_24[1]
-set_location_assignment PIN_L1 -to CLOCK_50
-set_location_assignment PIN_M21 -to EXT_CLOCK
-set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_27[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_50
-set_instance_assignment -name IO_STANDARD LVTTL -to EXT_CLOCK
-set_location_assignment PIN_H15 -to PS2_CLK
-set_location_assignment PIN_J14 -to PS2_DAT
-set_location_assignment PIN_F14 -to UART_RXD
-set_location_assignment PIN_G12 -to UART_TXD
-set_instance_assignment -name IO_STANDARD LVTTL -to PS2_CLK
-set_instance_assignment -name IO_STANDARD LVTTL -to PS2_DAT
-set_instance_assignment -name IO_STANDARD LVTTL -to UART_RXD
-set_instance_assignment -name IO_STANDARD LVTTL -to UART_TXD
-set_location_assignment PIN_E8 -to TDI
-set_location_assignment PIN_D8 -to TCS
-set_location_assignment PIN_C7 -to TCK
-set_location_assignment PIN_D7 -to TDO
-set_instance_assignment -name IO_STANDARD LVTTL -to TDI
-set_instance_assignment -name IO_STANDARD LVTTL -to TCS
-set_instance_assignment -name IO_STANDARD LVTTL -to TCK
-set_instance_assignment -name IO_STANDARD LVTTL -to TDO
-set_location_assignment PIN_D9 -to VGA_R[0]
-set_location_assignment PIN_C9 -to VGA_R[1]
-set_location_assignment PIN_A7 -to VGA_R[2]
-set_location_assignment PIN_B7 -to VGA_R[3]
-set_location_assignment PIN_B8 -to VGA_G[0]
-set_location_assignment PIN_C10 -to VGA_G[1]
-set_location_assignment PIN_B9 -to VGA_G[2]
-set_location_assignment PIN_A8 -to VGA_G[3]
-set_location_assignment PIN_A9 -to VGA_B[0]
-set_location_assignment PIN_D11 -to VGA_B[1]
-set_location_assignment PIN_A10 -to VGA_B[2]
-set_location_assignment PIN_B10 -to VGA_B[3]
-set_location_assignment PIN_A11 -to VGA_HS
-set_location_assignment PIN_B11 -to VGA_VS
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[0]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[1]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[2]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[3]
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_HS
-set_instance_assignment -name IO_STANDARD LVTTL -to VGA_VS
-set_location_assignment PIN_A3 -to I2C_SCLK
-set_location_assignment PIN_B3 -to I2C_SDAT
-set_location_assignment PIN_A6 -to AUD_ADCLRCK
-set_location_assignment PIN_B6 -to AUD_ADCDAT
-set_location_assignment PIN_A5 -to AUD_DACLRCK
-set_location_assignment PIN_B5 -to AUD_DACDAT
-set_location_assignment PIN_B4 -to AUD_XCK
-set_location_assignment PIN_A4 -to AUD_BCLK
-set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SCLK
-set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SDAT
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCLRCK
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCDAT
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACLRCK
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACDAT
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_XCK
-set_instance_assignment -name IO_STANDARD LVTTL -to AUD_BCLK
-set_location_assignment PIN_W4 -to DRAM_ADDR[0]
-set_location_assignment PIN_W5 -to DRAM_ADDR[1]
-set_location_assignment PIN_Y3 -to DRAM_ADDR[2]
-set_location_assignment PIN_Y4 -to DRAM_ADDR[3]
-set_location_assignment PIN_R6 -to DRAM_ADDR[4]
-set_location_assignment PIN_R5 -to DRAM_ADDR[5]
-set_location_assignment PIN_P6 -to DRAM_ADDR[6]
-set_location_assignment PIN_P5 -to DRAM_ADDR[7]
-set_location_assignment PIN_P3 -to DRAM_ADDR[8]
-set_location_assignment PIN_N4 -to DRAM_ADDR[9]
-set_location_assignment PIN_W3 -to DRAM_ADDR[10]
-set_location_assignment PIN_N6 -to DRAM_ADDR[11]
-set_location_assignment PIN_U3 -to DRAM_BA_0
-set_location_assignment PIN_V4 -to DRAM_BA_1
-set_location_assignment PIN_T3 -to DRAM_CAS_N
-set_location_assignment PIN_N3 -to DRAM_CKE
-set_location_assignment PIN_U4 -to DRAM_CLK
-set_location_assignment PIN_T6 -to DRAM_CS_N
-set_location_assignment PIN_U1 -to DRAM_DQ[0]
-set_location_assignment PIN_U2 -to DRAM_DQ[1]
-set_location_assignment PIN_V1 -to DRAM_DQ[2]
-set_location_assignment PIN_V2 -to DRAM_DQ[3]
-set_location_assignment PIN_W1 -to DRAM_DQ[4]
-set_location_assignment PIN_W2 -to DRAM_DQ[5]
-set_location_assignment PIN_Y1 -to DRAM_DQ[6]
-set_location_assignment PIN_Y2 -to DRAM_DQ[7]
-set_location_assignment PIN_N1 -to DRAM_DQ[8]
-set_location_assignment PIN_N2 -to DRAM_DQ[9]
-set_location_assignment PIN_P1 -to DRAM_DQ[10]
-set_location_assignment PIN_P2 -to DRAM_DQ[11]
-set_location_assignment PIN_R1 -to DRAM_DQ[12]
-set_location_assignment PIN_R2 -to DRAM_DQ[13]
-set_location_assignment PIN_T1 -to DRAM_DQ[14]
-set_location_assignment PIN_T2 -to DRAM_DQ[15]
-set_location_assignment PIN_R7 -to DRAM_LDQM
-set_location_assignment PIN_T5 -to DRAM_RAS_N
-set_location_assignment PIN_M5 -to DRAM_UDQM
-set_location_assignment PIN_R8 -to DRAM_WE_N
-set_location_assignment PIN_AB20 -to FL_ADDR[0]
-set_location_assignment PIN_AA14 -to FL_ADDR[1]
-set_location_assignment PIN_Y16 -to FL_ADDR[2]
-set_location_assignment PIN_R15 -to FL_ADDR[3]
-set_location_assignment PIN_T15 -to FL_ADDR[4]
-set_location_assignment PIN_U15 -to FL_ADDR[5]
-set_location_assignment PIN_V15 -to FL_ADDR[6]
-set_location_assignment PIN_W15 -to FL_ADDR[7]
-set_location_assignment PIN_R14 -to FL_ADDR[8]
-set_location_assignment PIN_Y13 -to FL_ADDR[9]
-set_location_assignment PIN_R12 -to FL_ADDR[10]
-set_location_assignment PIN_T12 -to FL_ADDR[11]
-set_location_assignment PIN_AB14 -to FL_ADDR[12]
-set_location_assignment PIN_AA13 -to FL_ADDR[13]
-set_location_assignment PIN_AB13 -to FL_ADDR[14]
-set_location_assignment PIN_AA12 -to FL_ADDR[15]
-set_location_assignment PIN_AB12 -to FL_ADDR[16]
-set_location_assignment PIN_AA20 -to FL_ADDR[17]
-set_location_assignment PIN_U14 -to FL_ADDR[18]
-set_location_assignment PIN_V14 -to FL_ADDR[19]
-set_location_assignment PIN_U13 -to FL_ADDR[20]
-set_location_assignment PIN_R13 -to FL_ADDR[21]
-set_location_assignment PIN_AB16 -to FL_DQ[0]
-set_location_assignment PIN_AA16 -to FL_DQ[1]
-set_location_assignment PIN_AB17 -to FL_DQ[2]
-set_location_assignment PIN_AA17 -to FL_DQ[3]
-set_location_assignment PIN_AB18 -to FL_DQ[4]
-set_location_assignment PIN_AA18 -to FL_DQ[5]
-set_location_assignment PIN_AB19 -to FL_DQ[6]
-set_location_assignment PIN_AA19 -to FL_DQ[7]
-set_location_assignment PIN_AA15 -to FL_OE_N
-set_location_assignment PIN_W14 -to FL_RST_N
-set_location_assignment PIN_Y14 -to FL_WE_N
-set_location_assignment PIN_AA3 -to SRAM_ADDR[0]
-set_location_assignment PIN_AB3 -to SRAM_ADDR[1]
-set_location_assignment PIN_AA4 -to SRAM_ADDR[2]
-set_location_assignment PIN_AB4 -to SRAM_ADDR[3]
-set_location_assignment PIN_AA5 -to SRAM_ADDR[4]
-set_location_assignment PIN_AB10 -to SRAM_ADDR[5]
-set_location_assignment PIN_AA11 -to SRAM_ADDR[6]
-set_location_assignment PIN_AB11 -to SRAM_ADDR[7]
-set_location_assignment PIN_V11 -to SRAM_ADDR[8]
-set_location_assignment PIN_W11 -to SRAM_ADDR[9]
-set_location_assignment PIN_R11 -to SRAM_ADDR[10]
-set_location_assignment PIN_T11 -to SRAM_ADDR[11]
-set_location_assignment PIN_Y10 -to SRAM_ADDR[12]
-set_location_assignment PIN_U10 -to SRAM_ADDR[13]
-set_location_assignment PIN_R10 -to SRAM_ADDR[14]
-set_location_assignment PIN_T7 -to SRAM_ADDR[15]
-set_location_assignment PIN_Y6 -to SRAM_ADDR[16]
-set_location_assignment PIN_Y5 -to SRAM_ADDR[17]
-set_location_assignment PIN_AB5 -to SRAM_CE_N
-set_location_assignment PIN_AA6 -to SRAM_DQ[0]
-set_location_assignment PIN_AB6 -to SRAM_DQ[1]
-set_location_assignment PIN_AA7 -to SRAM_DQ[2]
-set_location_assignment PIN_AB7 -to SRAM_DQ[3]
-set_location_assignment PIN_AA8 -to SRAM_DQ[4]
-set_location_assignment PIN_AB8 -to SRAM_DQ[5]
-set_location_assignment PIN_AA9 -to SRAM_DQ[6]
-set_location_assignment PIN_AB9 -to SRAM_DQ[7]
-set_location_assignment PIN_Y9 -to SRAM_DQ[8]
-set_location_assignment PIN_W9 -to SRAM_DQ[9]
-set_location_assignment PIN_V9 -to SRAM_DQ[10]
-set_location_assignment PIN_U9 -to SRAM_DQ[11]
-set_location_assignment PIN_R9 -to SRAM_DQ[12]
-set_location_assignment PIN_W8 -to SRAM_DQ[13]
-set_location_assignment PIN_V8 -to SRAM_DQ[14]
-set_location_assignment PIN_U8 -to SRAM_DQ[15]
-set_location_assignment PIN_Y7 -to SRAM_LB_N
-set_location_assignment PIN_T8 -to SRAM_OE_N
-set_location_assignment PIN_W7 -to SRAM_UB_N
-set_location_assignment PIN_AA10 -to SRAM_WE_N
-set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP"
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
-set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_global_assignment -name MISC_FILE "U:/git_repos/fpga/bbc/bbc_micro_de1.dpf"
-set_location_assignment PIN_AB15 -to FL_CE_N
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
-set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
-set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_location_assignment PIN_U20 -to SD_nCS
-set_location_assignment PIN_V20 -to SD_SCLK
-set_location_assignment PIN_Y20 -to SD_MOSI
-set_location_assignment PIN_W20 -to SD_MISO
-set_global_assignment -name VHDL_FILE saa5050.vhd
-set_global_assignment -name VHDL_FILE i2s_intf.vhd
-set_global_assignment -name VHDL_FILE i2c_loader.vhd
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_comp_pack-p.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_noise.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_tone.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_top.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_attenuator.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_clock_div.vhd"
-set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_latch_ctrl.vhd"
-set_global_assignment -name VHDL_FILE ps2_intf.vhd
-set_global_assignment -name VHDL_FILE m6522.vhd
-set_global_assignment -name VHDL_FILE seg7.vhd
-set_global_assignment -name VHDL_FILE vidproc.vhd
-set_global_assignment -name VHDL_FILE mc6845.vhd
-set_global_assignment -name VHDL_FILE T65/T65_Pack.vhd
-set_global_assignment -name VHDL_FILE T65/T65.vhd
-set_global_assignment -name VHDL_FILE T65/T65_ALU.vhd
-set_global_assignment -name VHDL_FILE T65/T65_MCode.vhd
-set_global_assignment -name QIP_FILE pll32.qip
-set_global_assignment -name VHDL_FILE bbc_micro_de1.vhd
-set_global_assignment -name VHDL_FILE bbc_micro_de1_tb.vhd
-set_global_assignment -name VHDL_FILE m6522_tb.vhd
-set_global_assignment -name VHDL_FILE keyboard.vhd
-set_global_assignment -name VHDL_FILE debugger.vhd
-set_global_assignment -name QIP_FILE saa5050_rom.qip
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top -set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
\ No newline at end of file +set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga +set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA +set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 +set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7 +set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 +set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 +set_location_assignment PIN_A13 -to GPIO_0[0] +set_location_assignment PIN_B13 -to GPIO_0[1] +set_location_assignment PIN_A14 -to GPIO_0[2] +set_location_assignment PIN_B14 -to GPIO_0[3] +set_location_assignment PIN_A15 -to GPIO_0[4] +set_location_assignment PIN_B15 -to GPIO_0[5] +set_location_assignment PIN_A16 -to GPIO_0[6] +set_location_assignment PIN_B16 -to GPIO_0[7] +set_location_assignment PIN_A17 -to GPIO_0[8] +set_location_assignment PIN_B17 -to GPIO_0[9] +set_location_assignment PIN_A18 -to GPIO_0[10] +set_location_assignment PIN_B18 -to GPIO_0[11] +set_location_assignment PIN_A19 -to GPIO_0[12] +set_location_assignment PIN_B19 -to GPIO_0[13] +set_location_assignment PIN_A20 -to GPIO_0[14] +set_location_assignment PIN_B20 -to GPIO_0[15] +set_location_assignment PIN_C21 -to GPIO_0[16] +set_location_assignment PIN_C22 -to GPIO_0[17] +set_location_assignment PIN_D21 -to GPIO_0[18] +set_location_assignment PIN_D22 -to GPIO_0[19] +set_location_assignment PIN_E21 -to GPIO_0[20] +set_location_assignment PIN_E22 -to GPIO_0[21] +set_location_assignment PIN_F21 -to GPIO_0[22] +set_location_assignment PIN_F22 -to GPIO_0[23] +set_location_assignment PIN_G21 -to GPIO_0[24] +set_location_assignment PIN_G22 -to GPIO_0[25] +set_location_assignment PIN_J21 -to GPIO_0[26] +set_location_assignment PIN_J22 -to GPIO_0[27] +set_location_assignment PIN_K21 -to GPIO_0[28] +set_location_assignment PIN_K22 -to GPIO_0[29] +set_location_assignment PIN_J19 -to GPIO_0[30] +set_location_assignment PIN_J20 -to GPIO_0[31] +set_location_assignment PIN_J18 -to GPIO_0[32] +set_location_assignment PIN_K20 -to GPIO_0[33] +set_location_assignment PIN_L19 -to GPIO_0[34] +set_location_assignment PIN_L18 -to GPIO_0[35] +set_location_assignment PIN_H12 -to GPIO_1[0] +set_location_assignment PIN_H13 -to GPIO_1[1] +set_location_assignment PIN_H14 -to GPIO_1[2] +set_location_assignment PIN_G15 -to GPIO_1[3] +set_location_assignment PIN_E14 -to GPIO_1[4] +set_location_assignment PIN_E15 -to GPIO_1[5] +set_location_assignment PIN_F15 -to GPIO_1[6] +set_location_assignment PIN_G16 -to GPIO_1[7] +set_location_assignment PIN_F12 -to GPIO_1[8] +set_location_assignment PIN_F13 -to GPIO_1[9] +set_location_assignment PIN_C14 -to GPIO_1[10] +set_location_assignment PIN_D14 -to GPIO_1[11] +set_location_assignment PIN_D15 -to GPIO_1[12] +set_location_assignment PIN_D16 -to GPIO_1[13] +set_location_assignment PIN_C17 -to GPIO_1[14] +set_location_assignment PIN_C18 -to GPIO_1[15] +set_location_assignment PIN_C19 -to GPIO_1[16] +set_location_assignment PIN_C20 -to GPIO_1[17] +set_location_assignment PIN_D19 -to GPIO_1[18] +set_location_assignment PIN_D20 -to GPIO_1[19] +set_location_assignment PIN_E20 -to GPIO_1[20] +set_location_assignment PIN_F20 -to GPIO_1[21] +set_location_assignment PIN_E19 -to GPIO_1[22] +set_location_assignment PIN_E18 -to GPIO_1[23] +set_location_assignment PIN_G20 -to GPIO_1[24] +set_location_assignment PIN_G18 -to GPIO_1[25] +set_location_assignment PIN_G17 -to GPIO_1[26] +set_location_assignment PIN_H17 -to GPIO_1[27] +set_location_assignment PIN_J15 -to GPIO_1[28] +set_location_assignment PIN_H18 -to GPIO_1[29] +set_location_assignment PIN_N22 -to GPIO_1[30] +set_location_assignment PIN_N21 -to GPIO_1[31] +set_location_assignment PIN_P15 -to GPIO_1[32] +set_location_assignment PIN_N15 -to GPIO_1[33] +set_location_assignment PIN_P17 -to GPIO_1[34] +set_location_assignment PIN_P18 -to GPIO_1[35] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[0] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[1] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[2] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[3] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[4] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[5] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[6] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[7] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[8] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[9] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[10] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[11] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[12] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[13] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[14] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[15] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[16] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[17] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[18] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[19] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[20] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[21] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[22] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[23] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[24] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[25] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[26] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[27] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[28] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[29] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[30] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[31] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[32] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[33] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[34] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_0[35] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[0] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[1] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[2] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[3] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[4] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[5] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[6] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[7] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[8] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[9] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[10] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[11] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[12] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[13] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[14] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[15] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[16] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[17] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[18] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[19] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[20] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[21] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[22] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[23] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[24] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[25] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[26] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[27] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[28] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[29] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[30] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[31] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[32] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[33] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[34] +set_instance_assignment -name IO_STANDARD LVTTL -to GPIO_1[35] +set_location_assignment PIN_L22 -to SW[0] +set_location_assignment PIN_L21 -to SW[1] +set_location_assignment PIN_M22 -to SW[2] +set_location_assignment PIN_V12 -to SW[3] +set_location_assignment PIN_W12 -to SW[4] +set_location_assignment PIN_U12 -to SW[5] +set_location_assignment PIN_U11 -to SW[6] +set_location_assignment PIN_M2 -to SW[7] +set_location_assignment PIN_M1 -to SW[8] +set_location_assignment PIN_L2 -to SW[9] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[0] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[1] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[2] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[3] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[4] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[5] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[6] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[7] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[8] +set_instance_assignment -name IO_STANDARD LVTTL -to SW[9] +set_location_assignment PIN_J2 -to HEX0[0] +set_location_assignment PIN_J1 -to HEX0[1] +set_location_assignment PIN_H2 -to HEX0[2] +set_location_assignment PIN_H1 -to HEX0[3] +set_location_assignment PIN_F2 -to HEX0[4] +set_location_assignment PIN_F1 -to HEX0[5] +set_location_assignment PIN_E2 -to HEX0[6] +set_location_assignment PIN_E1 -to HEX1[0] +set_location_assignment PIN_H6 -to HEX1[1] +set_location_assignment PIN_H5 -to HEX1[2] +set_location_assignment PIN_H4 -to HEX1[3] +set_location_assignment PIN_G3 -to HEX1[4] +set_location_assignment PIN_D2 -to HEX1[5] +set_location_assignment PIN_D1 -to HEX1[6] +set_location_assignment PIN_G5 -to HEX2[0] +set_location_assignment PIN_G6 -to HEX2[1] +set_location_assignment PIN_C2 -to HEX2[2] +set_location_assignment PIN_C1 -to HEX2[3] +set_location_assignment PIN_E3 -to HEX2[4] +set_location_assignment PIN_E4 -to HEX2[5] +set_location_assignment PIN_D3 -to HEX2[6] +set_location_assignment PIN_F4 -to HEX3[0] +set_location_assignment PIN_D5 -to HEX3[1] +set_location_assignment PIN_D6 -to HEX3[2] +set_location_assignment PIN_J4 -to HEX3[3] +set_location_assignment PIN_L8 -to HEX3[4] +set_location_assignment PIN_F3 -to HEX3[5] +set_location_assignment PIN_D4 -to HEX3[6] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[0] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[1] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[2] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[3] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[4] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[5] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX0[6] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[0] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[1] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[2] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[3] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[4] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[5] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX1[6] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[0] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[1] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[2] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[3] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[4] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[5] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX2[6] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[0] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[1] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[2] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[3] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[4] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[5] +set_instance_assignment -name IO_STANDARD LVTTL -to HEX3[6] +set_location_assignment PIN_R22 -to KEY[0] +set_location_assignment PIN_R21 -to KEY[1] +set_location_assignment PIN_T22 -to KEY[2] +set_location_assignment PIN_T21 -to KEY[3] +set_location_assignment PIN_R20 -to LEDR[0] +set_location_assignment PIN_R19 -to LEDR[1] +set_location_assignment PIN_U19 -to LEDR[2] +set_location_assignment PIN_Y19 -to LEDR[3] +set_location_assignment PIN_T18 -to LEDR[4] +set_location_assignment PIN_V19 -to LEDR[5] +set_location_assignment PIN_Y18 -to LEDR[6] +set_location_assignment PIN_U18 -to LEDR[7] +set_location_assignment PIN_R18 -to LEDR[8] +set_location_assignment PIN_R17 -to LEDR[9] +set_location_assignment PIN_U22 -to LEDG[0] +set_location_assignment PIN_U21 -to LEDG[1] +set_location_assignment PIN_V22 -to LEDG[2] +set_location_assignment PIN_V21 -to LEDG[3] +set_location_assignment PIN_W22 -to LEDG[4] +set_location_assignment PIN_W21 -to LEDG[5] +set_location_assignment PIN_Y22 -to LEDG[6] +set_location_assignment PIN_Y21 -to LEDG[7] +set_instance_assignment -name IO_STANDARD LVTTL -to KEY[0] +set_instance_assignment -name IO_STANDARD LVTTL -to KEY[1] +set_instance_assignment -name IO_STANDARD LVTTL -to KEY[2] +set_instance_assignment -name IO_STANDARD LVTTL -to KEY[3] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[0] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[1] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[2] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[3] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[4] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[5] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[6] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[7] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[8] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDR[9] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[0] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[1] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[2] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[3] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[4] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[5] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[6] +set_instance_assignment -name IO_STANDARD LVTTL -to LEDG[7] +set_location_assignment PIN_D12 -to CLOCK_27[0] +set_location_assignment PIN_E12 -to CLOCK_27[1] +set_location_assignment PIN_B12 -to CLOCK_24[0] +set_location_assignment PIN_A12 -to CLOCK_24[1] +set_location_assignment PIN_L1 -to CLOCK_50 +set_location_assignment PIN_M21 -to EXT_CLOCK +set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_27[1] +set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[0] +set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_24[1] +set_instance_assignment -name IO_STANDARD LVTTL -to CLOCK_50 +set_instance_assignment -name IO_STANDARD LVTTL -to EXT_CLOCK +set_location_assignment PIN_H15 -to PS2_CLK +set_location_assignment PIN_J14 -to PS2_DAT +set_location_assignment PIN_F14 -to UART_RXD +set_location_assignment PIN_G12 -to UART_TXD +set_instance_assignment -name IO_STANDARD LVTTL -to PS2_CLK +set_instance_assignment -name IO_STANDARD LVTTL -to PS2_DAT +set_instance_assignment -name IO_STANDARD LVTTL -to UART_RXD +set_instance_assignment -name IO_STANDARD LVTTL -to UART_TXD +set_location_assignment PIN_E8 -to TDI +set_location_assignment PIN_D8 -to TCS +set_location_assignment PIN_C7 -to TCK +set_location_assignment PIN_D7 -to TDO +set_instance_assignment -name IO_STANDARD LVTTL -to TDI +set_instance_assignment -name IO_STANDARD LVTTL -to TCS +set_instance_assignment -name IO_STANDARD LVTTL -to TCK +set_instance_assignment -name IO_STANDARD LVTTL -to TDO +set_location_assignment PIN_D9 -to VGA_R[0] +set_location_assignment PIN_C9 -to VGA_R[1] +set_location_assignment PIN_A7 -to VGA_R[2] +set_location_assignment PIN_B7 -to VGA_R[3] +set_location_assignment PIN_B8 -to VGA_G[0] +set_location_assignment PIN_C10 -to VGA_G[1] +set_location_assignment PIN_B9 -to VGA_G[2] +set_location_assignment PIN_A8 -to VGA_G[3] +set_location_assignment PIN_A9 -to VGA_B[0] +set_location_assignment PIN_D11 -to VGA_B[1] +set_location_assignment PIN_A10 -to VGA_B[2] +set_location_assignment PIN_B10 -to VGA_B[3] +set_location_assignment PIN_A11 -to VGA_HS +set_location_assignment PIN_B11 -to VGA_VS +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[0] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[1] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[2] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_R[3] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[0] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[1] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[2] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_G[3] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[0] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[1] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[2] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_B[3] +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_HS +set_instance_assignment -name IO_STANDARD LVTTL -to VGA_VS +set_location_assignment PIN_A3 -to I2C_SCLK +set_location_assignment PIN_B3 -to I2C_SDAT +set_location_assignment PIN_A6 -to AUD_ADCLRCK +set_location_assignment PIN_B6 -to AUD_ADCDAT +set_location_assignment PIN_A5 -to AUD_DACLRCK +set_location_assignment PIN_B5 -to AUD_DACDAT +set_location_assignment PIN_B4 -to AUD_XCK +set_location_assignment PIN_A4 -to AUD_BCLK +set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SCLK +set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SDAT +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCLRCK +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCDAT +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACLRCK +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACDAT +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_XCK +set_instance_assignment -name IO_STANDARD LVTTL -to AUD_BCLK +set_location_assignment PIN_W4 -to DRAM_ADDR[0] +set_location_assignment PIN_W5 -to DRAM_ADDR[1] +set_location_assignment PIN_Y3 -to DRAM_ADDR[2] +set_location_assignment PIN_Y4 -to DRAM_ADDR[3] +set_location_assignment PIN_R6 -to DRAM_ADDR[4] +set_location_assignment PIN_R5 -to DRAM_ADDR[5] +set_location_assignment PIN_P6 -to DRAM_ADDR[6] +set_location_assignment PIN_P5 -to DRAM_ADDR[7] +set_location_assignment PIN_P3 -to DRAM_ADDR[8] +set_location_assignment PIN_N4 -to DRAM_ADDR[9] +set_location_assignment PIN_W3 -to DRAM_ADDR[10] +set_location_assignment PIN_N6 -to DRAM_ADDR[11] +set_location_assignment PIN_U3 -to DRAM_BA_0 +set_location_assignment PIN_V4 -to DRAM_BA_1 +set_location_assignment PIN_T3 -to DRAM_CAS_N +set_location_assignment PIN_N3 -to DRAM_CKE +set_location_assignment PIN_U4 -to DRAM_CLK +set_location_assignment PIN_T6 -to DRAM_CS_N +set_location_assignment PIN_U1 -to DRAM_DQ[0] +set_location_assignment PIN_U2 -to DRAM_DQ[1] +set_location_assignment PIN_V1 -to DRAM_DQ[2] +set_location_assignment PIN_V2 -to DRAM_DQ[3] +set_location_assignment PIN_W1 -to DRAM_DQ[4] +set_location_assignment PIN_W2 -to DRAM_DQ[5] +set_location_assignment PIN_Y1 -to DRAM_DQ[6] +set_location_assignment PIN_Y2 -to DRAM_DQ[7] +set_location_assignment PIN_N1 -to DRAM_DQ[8] +set_location_assignment PIN_N2 -to DRAM_DQ[9] +set_location_assignment PIN_P1 -to DRAM_DQ[10] +set_location_assignment PIN_P2 -to DRAM_DQ[11] +set_location_assignment PIN_R1 -to DRAM_DQ[12] +set_location_assignment PIN_R2 -to DRAM_DQ[13] +set_location_assignment PIN_T1 -to DRAM_DQ[14] +set_location_assignment PIN_T2 -to DRAM_DQ[15] +set_location_assignment PIN_R7 -to DRAM_LDQM +set_location_assignment PIN_T5 -to DRAM_RAS_N +set_location_assignment PIN_M5 -to DRAM_UDQM +set_location_assignment PIN_R8 -to DRAM_WE_N +set_location_assignment PIN_AB20 -to FL_ADDR[0] +set_location_assignment PIN_AA14 -to FL_ADDR[1] +set_location_assignment PIN_Y16 -to FL_ADDR[2] +set_location_assignment PIN_R15 -to FL_ADDR[3] +set_location_assignment PIN_T15 -to FL_ADDR[4] +set_location_assignment PIN_U15 -to FL_ADDR[5] +set_location_assignment PIN_V15 -to FL_ADDR[6] +set_location_assignment PIN_W15 -to FL_ADDR[7] +set_location_assignment PIN_R14 -to FL_ADDR[8] +set_location_assignment PIN_Y13 -to FL_ADDR[9] +set_location_assignment PIN_R12 -to FL_ADDR[10] +set_location_assignment PIN_T12 -to FL_ADDR[11] +set_location_assignment PIN_AB14 -to FL_ADDR[12] +set_location_assignment PIN_AA13 -to FL_ADDR[13] +set_location_assignment PIN_AB13 -to FL_ADDR[14] +set_location_assignment PIN_AA12 -to FL_ADDR[15] +set_location_assignment PIN_AB12 -to FL_ADDR[16] +set_location_assignment PIN_AA20 -to FL_ADDR[17] +set_location_assignment PIN_U14 -to FL_ADDR[18] +set_location_assignment PIN_V14 -to FL_ADDR[19] +set_location_assignment PIN_U13 -to FL_ADDR[20] +set_location_assignment PIN_R13 -to FL_ADDR[21] +set_location_assignment PIN_AB16 -to FL_DQ[0] +set_location_assignment PIN_AA16 -to FL_DQ[1] +set_location_assignment PIN_AB17 -to FL_DQ[2] +set_location_assignment PIN_AA17 -to FL_DQ[3] +set_location_assignment PIN_AB18 -to FL_DQ[4] +set_location_assignment PIN_AA18 -to FL_DQ[5] +set_location_assignment PIN_AB19 -to FL_DQ[6] +set_location_assignment PIN_AA19 -to FL_DQ[7] +set_location_assignment PIN_AA15 -to FL_OE_N +set_location_assignment PIN_W14 -to FL_RST_N +set_location_assignment PIN_Y14 -to FL_WE_N +set_location_assignment PIN_AA3 -to SRAM_ADDR[0] +set_location_assignment PIN_AB3 -to SRAM_ADDR[1] +set_location_assignment PIN_AA4 -to SRAM_ADDR[2] +set_location_assignment PIN_AB4 -to SRAM_ADDR[3] +set_location_assignment PIN_AA5 -to SRAM_ADDR[4] +set_location_assignment PIN_AB10 -to SRAM_ADDR[5] +set_location_assignment PIN_AA11 -to SRAM_ADDR[6] +set_location_assignment PIN_AB11 -to SRAM_ADDR[7] +set_location_assignment PIN_V11 -to SRAM_ADDR[8] +set_location_assignment PIN_W11 -to SRAM_ADDR[9] +set_location_assignment PIN_R11 -to SRAM_ADDR[10] +set_location_assignment PIN_T11 -to SRAM_ADDR[11] +set_location_assignment PIN_Y10 -to SRAM_ADDR[12] +set_location_assignment PIN_U10 -to SRAM_ADDR[13] +set_location_assignment PIN_R10 -to SRAM_ADDR[14] +set_location_assignment PIN_T7 -to SRAM_ADDR[15] +set_location_assignment PIN_Y6 -to SRAM_ADDR[16] +set_location_assignment PIN_Y5 -to SRAM_ADDR[17] +set_location_assignment PIN_AB5 -to SRAM_CE_N +set_location_assignment PIN_AA6 -to SRAM_DQ[0] +set_location_assignment PIN_AB6 -to SRAM_DQ[1] +set_location_assignment PIN_AA7 -to SRAM_DQ[2] +set_location_assignment PIN_AB7 -to SRAM_DQ[3] +set_location_assignment PIN_AA8 -to SRAM_DQ[4] +set_location_assignment PIN_AB8 -to SRAM_DQ[5] +set_location_assignment PIN_AA9 -to SRAM_DQ[6] +set_location_assignment PIN_AB9 -to SRAM_DQ[7] +set_location_assignment PIN_Y9 -to SRAM_DQ[8] +set_location_assignment PIN_W9 -to SRAM_DQ[9] +set_location_assignment PIN_V9 -to SRAM_DQ[10] +set_location_assignment PIN_U9 -to SRAM_DQ[11] +set_location_assignment PIN_R9 -to SRAM_DQ[12] +set_location_assignment PIN_W8 -to SRAM_DQ[13] +set_location_assignment PIN_V8 -to SRAM_DQ[14] +set_location_assignment PIN_U8 -to SRAM_DQ[15] +set_location_assignment PIN_Y7 -to SRAM_LB_N +set_location_assignment PIN_T8 -to SRAM_OE_N +set_location_assignment PIN_W7 -to SRAM_UB_N +set_location_assignment PIN_AA10 -to SRAM_WE_N +set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP" +set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top +set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top +set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" +set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region" +set_global_assignment -name MISC_FILE "U:/git_repos/fpga/bbc/bbc_micro_de1.dpf" +set_location_assignment PIN_AB15 -to FL_CE_N +set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL" +set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4 +set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" +set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO" +set_location_assignment PIN_U20 -to SD_nCS +set_location_assignment PIN_V20 -to SD_SCLK +set_location_assignment PIN_Y20 -to SD_MOSI +set_location_assignment PIN_W20 -to SD_MISO +set_global_assignment -name VHDL_FILE saa5050.vhd +set_global_assignment -name VHDL_FILE i2s_intf.vhd +set_global_assignment -name VHDL_FILE i2c_loader.vhd +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_comp_pack-p.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_noise.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_tone.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_top.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_attenuator.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_clock_div.vhd" +set_global_assignment -name VHDL_FILE "sn76489-1.0/sn76489_latch_ctrl.vhd" +set_global_assignment -name VHDL_FILE ps2_intf.vhd +set_global_assignment -name VHDL_FILE m6522.vhd +set_global_assignment -name VHDL_FILE seg7.vhd +set_global_assignment -name VHDL_FILE vidproc.vhd +set_global_assignment -name VHDL_FILE mc6845.vhd +set_global_assignment -name VHDL_FILE T65/T65_Pack.vhd +set_global_assignment -name VHDL_FILE T65/T65.vhd +set_global_assignment -name VHDL_FILE T65/T65_ALU.vhd +set_global_assignment -name VHDL_FILE T65/T65_MCode.vhd +set_global_assignment -name QIP_FILE pll32.qip +set_global_assignment -name VHDL_FILE bbc_micro_de1.vhd +set_global_assignment -name VHDL_FILE bbc_micro_de1_tb.vhd +set_global_assignment -name VHDL_FILE m6522_tb.vhd +set_global_assignment -name VHDL_FILE keyboard.vhd +set_global_assignment -name VHDL_FILE debugger.vhd +set_global_assignment -name QIP_FILE saa5050_rom.qip +set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top +set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file diff --git a/quartus/bbc_micro_de1.vhd b/quartus/bbc_micro_de1.vhd index 080b390..4cf33a8 100644 --- a/quartus/bbc_micro_de1.vhd +++ b/quartus/bbc_micro_de1.vhd @@ -159,11 +159,12 @@ port ( SD_MISO : in std_logic;
-- GPIO
- GPIO_0 : inout std_logic_vector(35 downto 0);
- GPIO_1 : inout std_logic_vector(35 downto 0)
+ GPIO_0 : out std_logic_vector(35 downto 0);
+ GPIO_1 : out std_logic_vector(35 downto 0)
);
end entity;
+-- altera message_off 10036
architecture rtl of bbc_micro_de1 is
------------------------------
@@ -743,6 +744,9 @@ signal romsel : std_logic_vector(3 downto 0); signal mhz1_enable : std_logic; -- Set for access to any 1 MHz peripheral
+signal video_data : std_logic_vector (7 downto 0);
+signal cpu_ram_di : std_logic_vector (7 downto 0);
+
begin
-------------------------
-- COMPONENT INSTANCES
@@ -775,6 +779,8 @@ begin LEDR(2) -- WATCHPOINT
);
+ debug_aux <= (others => '0');
+
-- 6502 CPU
cpu : T65 port map (
cpu_mode,
@@ -798,6 +804,8 @@ begin cpu_a,
cpu_di,
cpu_do );
+
+ crtc_lpstb <='0';
crtc : mc6845 port map (
clock,
@@ -824,7 +832,7 @@ begin vidproc_enable,
cpu_a(0),
cpu_do,
- SRAM_DQ(7 downto 0),
+ video_data,
vidproc_invert_n,
vidproc_disen,
crtc_cursor,
@@ -848,7 +856,7 @@ begin reset_n,
clock, -- Data input is synchronised from the bus clock domain
vid_clken,
- SRAM_DQ(6 downto 0),
+ video_data(6 downto 0),
ttxt_glr,
ttxt_dew,
ttxt_crs,
@@ -919,6 +927,12 @@ begin mhz4_clken,
clock
);
+
+ user_via_ca2_in <='0';
+ user_via_pa_in <=(others => '0');
+
+ PS2_CLK <= 'Z'; -- really - I thought you'd need to clock that?
+ PS2_DAT <= 'Z';
-- Keyboard
keyb : keyboard port map (
@@ -958,6 +972,12 @@ begin LEDR(5), -- IS_DONE
LEDR(4) -- IS_ERROR
);
+ AUD_ADCLRCK <= '1';
+
+ UART_TXD <= '0';
+ DRAM_ADDR <= (others => '1');
+ LEDR(9 downto 6) <= (others => '0');
+ sys_via_pb_in(3 downto 0) <= (others => '1');
-- Asynchronous reset
-- PLL is reset by external reset switch
@@ -1109,10 +1129,12 @@ begin end case;
end if;
end process;
+
+ FL_DQ <= (others =>'Z');
-- CPU data bus mux and interrupts
cpu_di <=
- SRAM_DQ(7 downto 0) when ram_enable = '1' else
+ cpu_ram_di when ram_enable = '1' else
FL_DQ when rom_enable = '1' else
FL_DQ when mos_enable = '1' else
crtc_do when crtc_enable = '1' else
@@ -1140,10 +1162,10 @@ begin -- SRAM bus
SRAM_UB_N <= '1';
SRAM_LB_N <= '0';
- SRAM_CE_N <= '0';
+ SRAM_CE_N <= clock;
SRAM_OE_N <= '0';
- SRAM_DQ(15 downto 8) <= (others => '0');
-
+ video_data <= SRAM_DQ(7 downto 0);
+
-- Synchronous outputs to SRAM
process(clock,reset_n,ram_enable,cpu_r_nw)
variable ram_write : std_logic;
@@ -1152,23 +1174,25 @@ begin if reset_n = '0' then
SRAM_WE_N <= '1';
- SRAM_DQ(7 downto 0) <= (others => 'Z');
+ SRAM_DQ(15 downto 0) <= (others => 'Z');
elsif rising_edge(clock) then
- -- Default to inputs
- SRAM_DQ(7 downto 0) <= (others => 'Z');
-
-- Register SRAM signals to outputs (clock must be at least 2x CPU clock)
if vid_clken = '1' then
- -- Fetch data from previous CPU cycle
+ -- set up bus for CPU cycle
SRAM_WE_N <= not ram_write;
SRAM_ADDR <= "00" & cpu_a(15 downto 0);
if ram_write = '1' then
+ SRAM_DQ(15 downto 8) <=(others =>'0');
SRAM_DQ(7 downto 0) <= cpu_do;
+ else
+ SRAM_DQ(15 downto 0) <= (others => 'Z');
end if;
else
- -- Fetch data from previous display cycle
+ cpu_ram_di <= SRAM_DQ(7 downto 0);
+ -- setup crtc cycle
SRAM_WE_N <= '1';
SRAM_ADDR <= "000" & display_a;
+ SRAM_DQ(15 downto 0) <= (others => 'Z');
end if;
end if;
end process;
@@ -1236,7 +1260,7 @@ begin -- Connections to System VIA
-- ADC
- sys_via_cb1_in <= '1'; -- /EOC
+ sys_via_cb1_in <= '1'; -- EOC
-- CRTC
sys_via_ca1_in <= crtc_vsync;
sys_via_cb2_in <= crtc_lpstb;
@@ -1254,6 +1278,7 @@ begin -- Connections to User VIA (user port is output on green LEDs)
user_via_ca1_in <= '1'; -- Pulled up
--LEDG <= user_via_pb_out;
+ LEDG <= (others => '0');
-- MMBEEB
user_via_cb1_in <= user_via_pb_out(1);
@@ -1304,7 +1329,14 @@ begin -- DEBUG STUFF
-----------------
+ DRAM_DQ <= (others => 'Z');
+ DRAM_DQ <= (others => 'Z');
+
GPIO_0(0) <= not (crtc_hsync xor crtc_vsync);
GPIO_0(1) <= crtc_de;
+ GPIO_0(2) <= ld_vsync;
+ GPIO_0(3) <= ld_hsync;
+ GPIO_0(35 downto 4) <= (others => '0');
+ GPIO_1 <= (others => '0');
end architecture;
diff --git a/quartus/saa5050.vhd b/quartus/saa5050.vhd index 5fa1b2c..e087b25 100644 --- a/quartus/saa5050.vhd +++ b/quartus/saa5050.vhd @@ -275,7 +275,7 @@ begin -- character and separated/hold graphics modes apply.
-- We don't just assume this to be the case if gfx=1 because
-- these modes don't apply to caps even in graphics mode
- if rom_data(7) = '1' then
+ if rom_data(7) = '1' and rom_data(6)='0' then
-- Apply a mask for separated graphics mode
if gfx_sep = '1' then
shift_reg(5) <= '0';
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