From 3f2546b2ef55b661fd8dd69682b38992225e86f6 Mon Sep 17 00:00:00 2001
From: fishsoupisgood <github@madingley.org>
Date: Mon, 29 Apr 2019 01:17:54 +0100
Subject: Initial import of qemu-2.4.1
---
tests/tcg/mips/mips32-dsp/extp.c | 62 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 tests/tcg/mips/mips32-dsp/extp.c
(limited to 'tests/tcg/mips/mips32-dsp/extp.c')
diff --git a/tests/tcg/mips/mips32-dsp/extp.c b/tests/tcg/mips/mips32-dsp/extp.c
new file mode 100644
index 00000000..b18bdb34
--- /dev/null
+++ b/tests/tcg/mips/mips32-dsp/extp.c
@@ -0,0 +1,62 @@
+#include<stdio.h>
+#include<assert.h>
+
+int main()
+{
+ int rt, ach, acl, dsp;
+ int result;
+
+ ach = 0x05;
+ acl = 0xB4CB;
+ dsp = 0x07;
+ result = 0x000C;
+
+ __asm
+ ("wrdsp %1, 0x01\n\t"
+ "mthi %2, $ac1\n\t"
+ "mtlo %3, $ac1\n\t"
+ "extp %0, $ac1, 0x03\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rt), "+r"(dsp)
+ : "r"(ach), "r"(acl)
+ );
+ dsp = (dsp >> 14) & 0x01;
+ assert(dsp == 0);
+ assert(result == rt);
+
+ ach = 0x05;
+ acl = 0xB4CB;
+ dsp = 0x01;
+
+ __asm
+ ("wrdsp %1, 0x01\n\t"
+ "mthi %2, $ac1\n\t"
+ "mtlo %3, $ac1\n\t"
+ "extp %0, $ac1, 0x03\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rt), "+r"(dsp)
+ : "r"(ach), "r"(acl)
+ );
+ dsp = (dsp >> 14) & 0x01;
+ assert(dsp == 1);
+
+ ach = 0;
+ acl = 0x80000001;
+ dsp = 0x1F;
+ result = 0x80000001;
+
+ __asm
+ ("wrdsp %1\n\t"
+ "mthi %2, $ac2\n\t"
+ "mtlo %3, $ac2\n\t"
+ "extp %0, $ac2, 0x1F\n\t"
+ "rddsp %1\n\t"
+ : "=r"(rt), "+r"(dsp)
+ : "r"(ach), "r"(acl)
+ );
+ dsp = (dsp >> 14) & 0x01;
+ assert(dsp == 0);
+ assert(result == rt);
+
+ return 0;
+}
--
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